1dbdc025bSLars-Peter Clausen /* 26a17a076SLars-Peter Clausen * AD5024, AD5025, AD5044, AD5045, AD5064, AD5064-1, AD5065, AD5628, AD5629R, 38d144c96SMarc Andre * AD5648, AD5666, AD5668, AD5669R, LTC2606, LTC2607, LTC2609, LTC2616, 48d144c96SMarc Andre * LTC2617, LTC2619, LTC2626, LTC2627, LTC2629 Digital to analog converters 58d144c96SMarc Andre * driver 6dbdc025bSLars-Peter Clausen * 7dbdc025bSLars-Peter Clausen * Copyright 2011 Analog Devices Inc. 8dbdc025bSLars-Peter Clausen * 9dbdc025bSLars-Peter Clausen * Licensed under the GPL-2. 10dbdc025bSLars-Peter Clausen */ 11dbdc025bSLars-Peter Clausen 12dbdc025bSLars-Peter Clausen #include <linux/device.h> 13dbdc025bSLars-Peter Clausen #include <linux/err.h> 14dbdc025bSLars-Peter Clausen #include <linux/module.h> 15dbdc025bSLars-Peter Clausen #include <linux/kernel.h> 16dbdc025bSLars-Peter Clausen #include <linux/spi/spi.h> 176a17a076SLars-Peter Clausen #include <linux/i2c.h> 18dbdc025bSLars-Peter Clausen #include <linux/slab.h> 19dbdc025bSLars-Peter Clausen #include <linux/sysfs.h> 20dbdc025bSLars-Peter Clausen #include <linux/regulator/consumer.h> 216a17a076SLars-Peter Clausen #include <asm/unaligned.h> 22dbdc025bSLars-Peter Clausen 23dbdc025bSLars-Peter Clausen #include <linux/iio/iio.h> 24dbdc025bSLars-Peter Clausen #include <linux/iio/sysfs.h> 25dbdc025bSLars-Peter Clausen 26dbdc025bSLars-Peter Clausen #define AD5064_MAX_DAC_CHANNELS 8 27dbdc025bSLars-Peter Clausen #define AD5064_MAX_VREFS 4 28dbdc025bSLars-Peter Clausen 29dbdc025bSLars-Peter Clausen #define AD5064_ADDR(x) ((x) << 20) 30dbdc025bSLars-Peter Clausen #define AD5064_CMD(x) ((x) << 24) 31dbdc025bSLars-Peter Clausen 32dbdc025bSLars-Peter Clausen #define AD5064_ADDR_ALL_DAC 0xF 33dbdc025bSLars-Peter Clausen 34dbdc025bSLars-Peter Clausen #define AD5064_CMD_WRITE_INPUT_N 0x0 35dbdc025bSLars-Peter Clausen #define AD5064_CMD_UPDATE_DAC_N 0x1 36dbdc025bSLars-Peter Clausen #define AD5064_CMD_WRITE_INPUT_N_UPDATE_ALL 0x2 37dbdc025bSLars-Peter Clausen #define AD5064_CMD_WRITE_INPUT_N_UPDATE_N 0x3 38dbdc025bSLars-Peter Clausen #define AD5064_CMD_POWERDOWN_DAC 0x4 39dbdc025bSLars-Peter Clausen #define AD5064_CMD_CLEAR 0x5 40dbdc025bSLars-Peter Clausen #define AD5064_CMD_LDAC_MASK 0x6 41dbdc025bSLars-Peter Clausen #define AD5064_CMD_RESET 0x7 42dbdc025bSLars-Peter Clausen #define AD5064_CMD_CONFIG 0x8 43dbdc025bSLars-Peter Clausen 44dbdc025bSLars-Peter Clausen #define AD5064_CONFIG_DAISY_CHAIN_ENABLE BIT(1) 45dbdc025bSLars-Peter Clausen #define AD5064_CONFIG_INT_VREF_ENABLE BIT(0) 46dbdc025bSLars-Peter Clausen 47dbdc025bSLars-Peter Clausen #define AD5064_LDAC_PWRDN_NONE 0x0 48dbdc025bSLars-Peter Clausen #define AD5064_LDAC_PWRDN_1K 0x1 49dbdc025bSLars-Peter Clausen #define AD5064_LDAC_PWRDN_100K 0x2 50dbdc025bSLars-Peter Clausen #define AD5064_LDAC_PWRDN_3STATE 0x3 51dbdc025bSLars-Peter Clausen 52dbdc025bSLars-Peter Clausen /** 53*4946ff58SLars-Peter Clausen * enum ad5064_regmap_type - Register layout variant 54*4946ff58SLars-Peter Clausen * @AD5064_REGMAP_ADI: Analog Devices register map layout 55*4946ff58SLars-Peter Clausen * @AD5064_REGMAP_LTC: LTC register map layout 56*4946ff58SLars-Peter Clausen */ 57*4946ff58SLars-Peter Clausen enum ad5064_regmap_type { 58*4946ff58SLars-Peter Clausen AD5064_REGMAP_ADI, 59*4946ff58SLars-Peter Clausen AD5064_REGMAP_LTC, 60*4946ff58SLars-Peter Clausen }; 61*4946ff58SLars-Peter Clausen 62*4946ff58SLars-Peter Clausen /** 63dbdc025bSLars-Peter Clausen * struct ad5064_chip_info - chip specific information 64dbdc025bSLars-Peter Clausen * @shared_vref: whether the vref supply is shared between channels 6578f585feSMarc Andre * @internal_vref: internal reference voltage. 0 if the chip has no 6678f585feSMarc Andre internal vref. 67dbdc025bSLars-Peter Clausen * @channel: channel specification 68dbdc025bSLars-Peter Clausen * @num_channels: number of channels 69*4946ff58SLars-Peter Clausen * @regmap_type: register map layout variant 70dbdc025bSLars-Peter Clausen */ 71dbdc025bSLars-Peter Clausen 72dbdc025bSLars-Peter Clausen struct ad5064_chip_info { 73dbdc025bSLars-Peter Clausen bool shared_vref; 74dbdc025bSLars-Peter Clausen unsigned long internal_vref; 75dbdc025bSLars-Peter Clausen const struct iio_chan_spec *channels; 76dbdc025bSLars-Peter Clausen unsigned int num_channels; 77*4946ff58SLars-Peter Clausen enum ad5064_regmap_type regmap_type; 78dbdc025bSLars-Peter Clausen }; 79dbdc025bSLars-Peter Clausen 806a17a076SLars-Peter Clausen struct ad5064_state; 816a17a076SLars-Peter Clausen 826a17a076SLars-Peter Clausen typedef int (*ad5064_write_func)(struct ad5064_state *st, unsigned int cmd, 836a17a076SLars-Peter Clausen unsigned int addr, unsigned int val); 846a17a076SLars-Peter Clausen 85dbdc025bSLars-Peter Clausen /** 86dbdc025bSLars-Peter Clausen * struct ad5064_state - driver instance specific data 876a17a076SLars-Peter Clausen * @dev: the device for this driver instance 88dbdc025bSLars-Peter Clausen * @chip_info: chip model specific constants, available modes etc 89dbdc025bSLars-Peter Clausen * @vref_reg: vref supply regulators 90dbdc025bSLars-Peter Clausen * @pwr_down: whether channel is powered down 91dbdc025bSLars-Peter Clausen * @pwr_down_mode: channel's current power down mode 92dbdc025bSLars-Peter Clausen * @dac_cache: current DAC raw value (chip does not support readback) 93dbdc025bSLars-Peter Clausen * @use_internal_vref: set to true if the internal reference voltage should be 94dbdc025bSLars-Peter Clausen * used. 956a17a076SLars-Peter Clausen * @write: register write callback 966a17a076SLars-Peter Clausen * @data: i2c/spi transfer buffers 97dbdc025bSLars-Peter Clausen */ 98dbdc025bSLars-Peter Clausen 99dbdc025bSLars-Peter Clausen struct ad5064_state { 1006a17a076SLars-Peter Clausen struct device *dev; 101dbdc025bSLars-Peter Clausen const struct ad5064_chip_info *chip_info; 102dbdc025bSLars-Peter Clausen struct regulator_bulk_data vref_reg[AD5064_MAX_VREFS]; 103dbdc025bSLars-Peter Clausen bool pwr_down[AD5064_MAX_DAC_CHANNELS]; 104dbdc025bSLars-Peter Clausen u8 pwr_down_mode[AD5064_MAX_DAC_CHANNELS]; 105dbdc025bSLars-Peter Clausen unsigned int dac_cache[AD5064_MAX_DAC_CHANNELS]; 106dbdc025bSLars-Peter Clausen bool use_internal_vref; 107dbdc025bSLars-Peter Clausen 1086a17a076SLars-Peter Clausen ad5064_write_func write; 1096a17a076SLars-Peter Clausen 110dbdc025bSLars-Peter Clausen /* 111dbdc025bSLars-Peter Clausen * DMA (thus cache coherency maintenance) requires the 112dbdc025bSLars-Peter Clausen * transfer buffers to live in their own cache lines. 113dbdc025bSLars-Peter Clausen */ 1146a17a076SLars-Peter Clausen union { 1156a17a076SLars-Peter Clausen u8 i2c[3]; 1166a17a076SLars-Peter Clausen __be32 spi; 1176a17a076SLars-Peter Clausen } data ____cacheline_aligned; 118dbdc025bSLars-Peter Clausen }; 119dbdc025bSLars-Peter Clausen 120dbdc025bSLars-Peter Clausen enum ad5064_type { 121dbdc025bSLars-Peter Clausen ID_AD5024, 122dbdc025bSLars-Peter Clausen ID_AD5025, 123dbdc025bSLars-Peter Clausen ID_AD5044, 124dbdc025bSLars-Peter Clausen ID_AD5045, 125dbdc025bSLars-Peter Clausen ID_AD5064, 126dbdc025bSLars-Peter Clausen ID_AD5064_1, 127dbdc025bSLars-Peter Clausen ID_AD5065, 128dbdc025bSLars-Peter Clausen ID_AD5628_1, 129dbdc025bSLars-Peter Clausen ID_AD5628_2, 1305dcbe97bSLars-Peter Clausen ID_AD5629_1, 1315dcbe97bSLars-Peter Clausen ID_AD5629_2, 132dbdc025bSLars-Peter Clausen ID_AD5648_1, 133dbdc025bSLars-Peter Clausen ID_AD5648_2, 134dbdc025bSLars-Peter Clausen ID_AD5666_1, 135dbdc025bSLars-Peter Clausen ID_AD5666_2, 136dbdc025bSLars-Peter Clausen ID_AD5668_1, 137dbdc025bSLars-Peter Clausen ID_AD5668_2, 1385dcbe97bSLars-Peter Clausen ID_AD5669_1, 1395dcbe97bSLars-Peter Clausen ID_AD5669_2, 1408d144c96SMarc Andre ID_LTC2606, 1418d144c96SMarc Andre ID_LTC2607, 1428d144c96SMarc Andre ID_LTC2609, 1438d144c96SMarc Andre ID_LTC2616, 1448d144c96SMarc Andre ID_LTC2617, 1458d144c96SMarc Andre ID_LTC2619, 1468d144c96SMarc Andre ID_LTC2626, 1478d144c96SMarc Andre ID_LTC2627, 1488d144c96SMarc Andre ID_LTC2629, 149dbdc025bSLars-Peter Clausen }; 150dbdc025bSLars-Peter Clausen 1516a17a076SLars-Peter Clausen static int ad5064_write(struct ad5064_state *st, unsigned int cmd, 152dbdc025bSLars-Peter Clausen unsigned int addr, unsigned int val, unsigned int shift) 153dbdc025bSLars-Peter Clausen { 154dbdc025bSLars-Peter Clausen val <<= shift; 155dbdc025bSLars-Peter Clausen 1566a17a076SLars-Peter Clausen return st->write(st, cmd, addr, val); 157dbdc025bSLars-Peter Clausen } 158dbdc025bSLars-Peter Clausen 159dbdc025bSLars-Peter Clausen static int ad5064_sync_powerdown_mode(struct ad5064_state *st, 160a2630262SLars-Peter Clausen const struct iio_chan_spec *chan) 161dbdc025bSLars-Peter Clausen { 16278f585feSMarc Andre unsigned int val, address; 163dbdc025bSLars-Peter Clausen int ret; 164dbdc025bSLars-Peter Clausen 165*4946ff58SLars-Peter Clausen if (st->chip_info->regmap_type == AD5064_REGMAP_LTC) { 16678f585feSMarc Andre val = 0; 16778f585feSMarc Andre address = chan->address; 16878f585feSMarc Andre } else { 16978f585feSMarc Andre address = 0; 170a2630262SLars-Peter Clausen val = (0x1 << chan->address); 171dbdc025bSLars-Peter Clausen 172a2630262SLars-Peter Clausen if (st->pwr_down[chan->channel]) 173a2630262SLars-Peter Clausen val |= st->pwr_down_mode[chan->channel] << 8; 17478f585feSMarc Andre } 175dbdc025bSLars-Peter Clausen 17678f585feSMarc Andre ret = ad5064_write(st, AD5064_CMD_POWERDOWN_DAC, address, val, 0); 177dbdc025bSLars-Peter Clausen 178dbdc025bSLars-Peter Clausen return ret; 179dbdc025bSLars-Peter Clausen } 180dbdc025bSLars-Peter Clausen 181dbdc025bSLars-Peter Clausen static const char * const ad5064_powerdown_modes[] = { 182dbdc025bSLars-Peter Clausen "1kohm_to_gnd", 183dbdc025bSLars-Peter Clausen "100kohm_to_gnd", 184dbdc025bSLars-Peter Clausen "three_state", 185dbdc025bSLars-Peter Clausen }; 186dbdc025bSLars-Peter Clausen 1878d144c96SMarc Andre static const char * const ltc2617_powerdown_modes[] = { 1888d144c96SMarc Andre "90kohm_to_gnd", 1898d144c96SMarc Andre }; 1908d144c96SMarc Andre 191dbdc025bSLars-Peter Clausen static int ad5064_get_powerdown_mode(struct iio_dev *indio_dev, 192dbdc025bSLars-Peter Clausen const struct iio_chan_spec *chan) 193dbdc025bSLars-Peter Clausen { 194dbdc025bSLars-Peter Clausen struct ad5064_state *st = iio_priv(indio_dev); 195dbdc025bSLars-Peter Clausen 196dbdc025bSLars-Peter Clausen return st->pwr_down_mode[chan->channel] - 1; 197dbdc025bSLars-Peter Clausen } 198dbdc025bSLars-Peter Clausen 199dbdc025bSLars-Peter Clausen static int ad5064_set_powerdown_mode(struct iio_dev *indio_dev, 200dbdc025bSLars-Peter Clausen const struct iio_chan_spec *chan, unsigned int mode) 201dbdc025bSLars-Peter Clausen { 202dbdc025bSLars-Peter Clausen struct ad5064_state *st = iio_priv(indio_dev); 203dbdc025bSLars-Peter Clausen int ret; 204dbdc025bSLars-Peter Clausen 205dbdc025bSLars-Peter Clausen mutex_lock(&indio_dev->mlock); 206dbdc025bSLars-Peter Clausen st->pwr_down_mode[chan->channel] = mode + 1; 207dbdc025bSLars-Peter Clausen 208a2630262SLars-Peter Clausen ret = ad5064_sync_powerdown_mode(st, chan); 209dbdc025bSLars-Peter Clausen mutex_unlock(&indio_dev->mlock); 210dbdc025bSLars-Peter Clausen 211dbdc025bSLars-Peter Clausen return ret; 212dbdc025bSLars-Peter Clausen } 213dbdc025bSLars-Peter Clausen 214dbdc025bSLars-Peter Clausen static const struct iio_enum ad5064_powerdown_mode_enum = { 215dbdc025bSLars-Peter Clausen .items = ad5064_powerdown_modes, 216dbdc025bSLars-Peter Clausen .num_items = ARRAY_SIZE(ad5064_powerdown_modes), 217dbdc025bSLars-Peter Clausen .get = ad5064_get_powerdown_mode, 218dbdc025bSLars-Peter Clausen .set = ad5064_set_powerdown_mode, 219dbdc025bSLars-Peter Clausen }; 220dbdc025bSLars-Peter Clausen 2218d144c96SMarc Andre static const struct iio_enum ltc2617_powerdown_mode_enum = { 2228d144c96SMarc Andre .items = ltc2617_powerdown_modes, 2238d144c96SMarc Andre .num_items = ARRAY_SIZE(ltc2617_powerdown_modes), 2248d144c96SMarc Andre .get = ad5064_get_powerdown_mode, 2258d144c96SMarc Andre .set = ad5064_set_powerdown_mode, 2268d144c96SMarc Andre }; 2278d144c96SMarc Andre 228dbdc025bSLars-Peter Clausen static ssize_t ad5064_read_dac_powerdown(struct iio_dev *indio_dev, 229dbdc025bSLars-Peter Clausen uintptr_t private, const struct iio_chan_spec *chan, char *buf) 230dbdc025bSLars-Peter Clausen { 231dbdc025bSLars-Peter Clausen struct ad5064_state *st = iio_priv(indio_dev); 232dbdc025bSLars-Peter Clausen 233dbdc025bSLars-Peter Clausen return sprintf(buf, "%d\n", st->pwr_down[chan->channel]); 234dbdc025bSLars-Peter Clausen } 235dbdc025bSLars-Peter Clausen 236dbdc025bSLars-Peter Clausen static ssize_t ad5064_write_dac_powerdown(struct iio_dev *indio_dev, 237dbdc025bSLars-Peter Clausen uintptr_t private, const struct iio_chan_spec *chan, const char *buf, 238dbdc025bSLars-Peter Clausen size_t len) 239dbdc025bSLars-Peter Clausen { 240dbdc025bSLars-Peter Clausen struct ad5064_state *st = iio_priv(indio_dev); 241dbdc025bSLars-Peter Clausen bool pwr_down; 242dbdc025bSLars-Peter Clausen int ret; 243dbdc025bSLars-Peter Clausen 244dbdc025bSLars-Peter Clausen ret = strtobool(buf, &pwr_down); 245dbdc025bSLars-Peter Clausen if (ret) 246dbdc025bSLars-Peter Clausen return ret; 247dbdc025bSLars-Peter Clausen 248dbdc025bSLars-Peter Clausen mutex_lock(&indio_dev->mlock); 249dbdc025bSLars-Peter Clausen st->pwr_down[chan->channel] = pwr_down; 250dbdc025bSLars-Peter Clausen 251a2630262SLars-Peter Clausen ret = ad5064_sync_powerdown_mode(st, chan); 252dbdc025bSLars-Peter Clausen mutex_unlock(&indio_dev->mlock); 253dbdc025bSLars-Peter Clausen return ret ? ret : len; 254dbdc025bSLars-Peter Clausen } 255dbdc025bSLars-Peter Clausen 256dbdc025bSLars-Peter Clausen static int ad5064_get_vref(struct ad5064_state *st, 257dbdc025bSLars-Peter Clausen struct iio_chan_spec const *chan) 258dbdc025bSLars-Peter Clausen { 259dbdc025bSLars-Peter Clausen unsigned int i; 260dbdc025bSLars-Peter Clausen 261dbdc025bSLars-Peter Clausen if (st->use_internal_vref) 262dbdc025bSLars-Peter Clausen return st->chip_info->internal_vref; 263dbdc025bSLars-Peter Clausen 264dbdc025bSLars-Peter Clausen i = st->chip_info->shared_vref ? 0 : chan->channel; 265dbdc025bSLars-Peter Clausen return regulator_get_voltage(st->vref_reg[i].consumer); 266dbdc025bSLars-Peter Clausen } 267dbdc025bSLars-Peter Clausen 268dbdc025bSLars-Peter Clausen static int ad5064_read_raw(struct iio_dev *indio_dev, 269dbdc025bSLars-Peter Clausen struct iio_chan_spec const *chan, 270dbdc025bSLars-Peter Clausen int *val, 271dbdc025bSLars-Peter Clausen int *val2, 272dbdc025bSLars-Peter Clausen long m) 273dbdc025bSLars-Peter Clausen { 274dbdc025bSLars-Peter Clausen struct ad5064_state *st = iio_priv(indio_dev); 275dbdc025bSLars-Peter Clausen int scale_uv; 276dbdc025bSLars-Peter Clausen 277dbdc025bSLars-Peter Clausen switch (m) { 278dbdc025bSLars-Peter Clausen case IIO_CHAN_INFO_RAW: 279dbdc025bSLars-Peter Clausen *val = st->dac_cache[chan->channel]; 280dbdc025bSLars-Peter Clausen return IIO_VAL_INT; 281dbdc025bSLars-Peter Clausen case IIO_CHAN_INFO_SCALE: 282dbdc025bSLars-Peter Clausen scale_uv = ad5064_get_vref(st, chan); 283dbdc025bSLars-Peter Clausen if (scale_uv < 0) 284dbdc025bSLars-Peter Clausen return scale_uv; 285dbdc025bSLars-Peter Clausen 28625682ae5SLars-Peter Clausen *val = scale_uv / 1000; 28725682ae5SLars-Peter Clausen *val2 = chan->scan_type.realbits; 28825682ae5SLars-Peter Clausen return IIO_VAL_FRACTIONAL_LOG2; 289dbdc025bSLars-Peter Clausen default: 290dbdc025bSLars-Peter Clausen break; 291dbdc025bSLars-Peter Clausen } 292dbdc025bSLars-Peter Clausen return -EINVAL; 293dbdc025bSLars-Peter Clausen } 294dbdc025bSLars-Peter Clausen 295dbdc025bSLars-Peter Clausen static int ad5064_write_raw(struct iio_dev *indio_dev, 296dbdc025bSLars-Peter Clausen struct iio_chan_spec const *chan, int val, int val2, long mask) 297dbdc025bSLars-Peter Clausen { 298dbdc025bSLars-Peter Clausen struct ad5064_state *st = iio_priv(indio_dev); 299dbdc025bSLars-Peter Clausen int ret; 300dbdc025bSLars-Peter Clausen 301dbdc025bSLars-Peter Clausen switch (mask) { 302dbdc025bSLars-Peter Clausen case IIO_CHAN_INFO_RAW: 303c5ef717aSLars-Peter Clausen if (val >= (1 << chan->scan_type.realbits) || val < 0) 304dbdc025bSLars-Peter Clausen return -EINVAL; 305dbdc025bSLars-Peter Clausen 306dbdc025bSLars-Peter Clausen mutex_lock(&indio_dev->mlock); 3076a17a076SLars-Peter Clausen ret = ad5064_write(st, AD5064_CMD_WRITE_INPUT_N_UPDATE_N, 308dbdc025bSLars-Peter Clausen chan->address, val, chan->scan_type.shift); 309dbdc025bSLars-Peter Clausen if (ret == 0) 310dbdc025bSLars-Peter Clausen st->dac_cache[chan->channel] = val; 311dbdc025bSLars-Peter Clausen mutex_unlock(&indio_dev->mlock); 312dbdc025bSLars-Peter Clausen break; 313dbdc025bSLars-Peter Clausen default: 314dbdc025bSLars-Peter Clausen ret = -EINVAL; 315dbdc025bSLars-Peter Clausen } 316dbdc025bSLars-Peter Clausen 317dbdc025bSLars-Peter Clausen return ret; 318dbdc025bSLars-Peter Clausen } 319dbdc025bSLars-Peter Clausen 320dbdc025bSLars-Peter Clausen static const struct iio_info ad5064_info = { 321dbdc025bSLars-Peter Clausen .read_raw = ad5064_read_raw, 322dbdc025bSLars-Peter Clausen .write_raw = ad5064_write_raw, 323dbdc025bSLars-Peter Clausen .driver_module = THIS_MODULE, 324dbdc025bSLars-Peter Clausen }; 325dbdc025bSLars-Peter Clausen 326dbdc025bSLars-Peter Clausen static const struct iio_chan_spec_ext_info ad5064_ext_info[] = { 327dbdc025bSLars-Peter Clausen { 328dbdc025bSLars-Peter Clausen .name = "powerdown", 329dbdc025bSLars-Peter Clausen .read = ad5064_read_dac_powerdown, 330dbdc025bSLars-Peter Clausen .write = ad5064_write_dac_powerdown, 3313704432fSJonathan Cameron .shared = IIO_SEPARATE, 332dbdc025bSLars-Peter Clausen }, 3333704432fSJonathan Cameron IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5064_powerdown_mode_enum), 334dbdc025bSLars-Peter Clausen IIO_ENUM_AVAILABLE("powerdown_mode", &ad5064_powerdown_mode_enum), 335dbdc025bSLars-Peter Clausen { }, 336dbdc025bSLars-Peter Clausen }; 337dbdc025bSLars-Peter Clausen 3388d144c96SMarc Andre static const struct iio_chan_spec_ext_info ltc2617_ext_info[] = { 3398d144c96SMarc Andre { 3408d144c96SMarc Andre .name = "powerdown", 3418d144c96SMarc Andre .read = ad5064_read_dac_powerdown, 3428d144c96SMarc Andre .write = ad5064_write_dac_powerdown, 3438d144c96SMarc Andre .shared = IIO_SEPARATE, 3448d144c96SMarc Andre }, 3458d144c96SMarc Andre IIO_ENUM("powerdown_mode", IIO_SEPARATE, <c2617_powerdown_mode_enum), 3468d144c96SMarc Andre IIO_ENUM_AVAILABLE("powerdown_mode", <c2617_powerdown_mode_enum), 3478d144c96SMarc Andre { }, 3488d144c96SMarc Andre }; 3498d144c96SMarc Andre 35078f585feSMarc Andre #define AD5064_CHANNEL(chan, addr, bits, _shift, _ext_info) { \ 351dbdc025bSLars-Peter Clausen .type = IIO_VOLTAGE, \ 352dbdc025bSLars-Peter Clausen .indexed = 1, \ 353dbdc025bSLars-Peter Clausen .output = 1, \ 354dbdc025bSLars-Peter Clausen .channel = (chan), \ 35520a0edddSJonathan Cameron .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 35620a0edddSJonathan Cameron BIT(IIO_CHAN_INFO_SCALE), \ 357a2630262SLars-Peter Clausen .address = addr, \ 35881d49bc6SJonathan Cameron .scan_type = { \ 35981d49bc6SJonathan Cameron .sign = 'u', \ 36081d49bc6SJonathan Cameron .realbits = (bits), \ 36181d49bc6SJonathan Cameron .storagebits = 16, \ 3625dcbe97bSLars-Peter Clausen .shift = (_shift), \ 36381d49bc6SJonathan Cameron }, \ 36478f585feSMarc Andre .ext_info = (_ext_info), \ 365dbdc025bSLars-Peter Clausen } 366dbdc025bSLars-Peter Clausen 36778f585feSMarc Andre #define DECLARE_AD5064_CHANNELS(name, bits, shift, ext_info) \ 368dbdc025bSLars-Peter Clausen const struct iio_chan_spec name[] = { \ 36978f585feSMarc Andre AD5064_CHANNEL(0, 0, bits, shift, ext_info), \ 37078f585feSMarc Andre AD5064_CHANNEL(1, 1, bits, shift, ext_info), \ 37178f585feSMarc Andre AD5064_CHANNEL(2, 2, bits, shift, ext_info), \ 37278f585feSMarc Andre AD5064_CHANNEL(3, 3, bits, shift, ext_info), \ 37378f585feSMarc Andre AD5064_CHANNEL(4, 4, bits, shift, ext_info), \ 37478f585feSMarc Andre AD5064_CHANNEL(5, 5, bits, shift, ext_info), \ 37578f585feSMarc Andre AD5064_CHANNEL(6, 6, bits, shift, ext_info), \ 37678f585feSMarc Andre AD5064_CHANNEL(7, 7, bits, shift, ext_info), \ 377a2630262SLars-Peter Clausen } 378a2630262SLars-Peter Clausen 37978f585feSMarc Andre #define DECLARE_AD5065_CHANNELS(name, bits, shift, ext_info) \ 380a2630262SLars-Peter Clausen const struct iio_chan_spec name[] = { \ 38178f585feSMarc Andre AD5064_CHANNEL(0, 0, bits, shift, ext_info), \ 38278f585feSMarc Andre AD5064_CHANNEL(1, 3, bits, shift, ext_info), \ 383dbdc025bSLars-Peter Clausen } 384dbdc025bSLars-Peter Clausen 38578f585feSMarc Andre static DECLARE_AD5064_CHANNELS(ad5024_channels, 12, 8, ad5064_ext_info); 38678f585feSMarc Andre static DECLARE_AD5064_CHANNELS(ad5044_channels, 14, 6, ad5064_ext_info); 38778f585feSMarc Andre static DECLARE_AD5064_CHANNELS(ad5064_channels, 16, 4, ad5064_ext_info); 388dbdc025bSLars-Peter Clausen 38978f585feSMarc Andre static DECLARE_AD5065_CHANNELS(ad5025_channels, 12, 8, ad5064_ext_info); 39078f585feSMarc Andre static DECLARE_AD5065_CHANNELS(ad5045_channels, 14, 6, ad5064_ext_info); 39178f585feSMarc Andre static DECLARE_AD5065_CHANNELS(ad5065_channels, 16, 4, ad5064_ext_info); 3925dcbe97bSLars-Peter Clausen 39378f585feSMarc Andre static DECLARE_AD5064_CHANNELS(ad5629_channels, 12, 4, ad5064_ext_info); 39478f585feSMarc Andre static DECLARE_AD5064_CHANNELS(ad5669_channels, 16, 0, ad5064_ext_info); 395a2630262SLars-Peter Clausen 3968d144c96SMarc Andre static DECLARE_AD5064_CHANNELS(ltc2607_channels, 16, 0, ltc2617_ext_info); 3978d144c96SMarc Andre static DECLARE_AD5064_CHANNELS(ltc2617_channels, 14, 2, ltc2617_ext_info); 3988d144c96SMarc Andre static DECLARE_AD5064_CHANNELS(ltc2627_channels, 12, 4, ltc2617_ext_info); 3998d144c96SMarc Andre 400dbdc025bSLars-Peter Clausen static const struct ad5064_chip_info ad5064_chip_info_tbl[] = { 401dbdc025bSLars-Peter Clausen [ID_AD5024] = { 402dbdc025bSLars-Peter Clausen .shared_vref = false, 403dbdc025bSLars-Peter Clausen .channels = ad5024_channels, 404dbdc025bSLars-Peter Clausen .num_channels = 4, 405*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_ADI, 406dbdc025bSLars-Peter Clausen }, 407dbdc025bSLars-Peter Clausen [ID_AD5025] = { 408dbdc025bSLars-Peter Clausen .shared_vref = false, 409a2630262SLars-Peter Clausen .channels = ad5025_channels, 410dbdc025bSLars-Peter Clausen .num_channels = 2, 411*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_ADI, 412dbdc025bSLars-Peter Clausen }, 413dbdc025bSLars-Peter Clausen [ID_AD5044] = { 414dbdc025bSLars-Peter Clausen .shared_vref = false, 415dbdc025bSLars-Peter Clausen .channels = ad5044_channels, 416dbdc025bSLars-Peter Clausen .num_channels = 4, 417*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_ADI, 418dbdc025bSLars-Peter Clausen }, 419dbdc025bSLars-Peter Clausen [ID_AD5045] = { 420dbdc025bSLars-Peter Clausen .shared_vref = false, 421a2630262SLars-Peter Clausen .channels = ad5045_channels, 422dbdc025bSLars-Peter Clausen .num_channels = 2, 423*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_ADI, 424dbdc025bSLars-Peter Clausen }, 425dbdc025bSLars-Peter Clausen [ID_AD5064] = { 426dbdc025bSLars-Peter Clausen .shared_vref = false, 427dbdc025bSLars-Peter Clausen .channels = ad5064_channels, 428dbdc025bSLars-Peter Clausen .num_channels = 4, 429*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_ADI, 430dbdc025bSLars-Peter Clausen }, 431dbdc025bSLars-Peter Clausen [ID_AD5064_1] = { 432dbdc025bSLars-Peter Clausen .shared_vref = true, 433dbdc025bSLars-Peter Clausen .channels = ad5064_channels, 434dbdc025bSLars-Peter Clausen .num_channels = 4, 435*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_ADI, 436dbdc025bSLars-Peter Clausen }, 437dbdc025bSLars-Peter Clausen [ID_AD5065] = { 438dbdc025bSLars-Peter Clausen .shared_vref = false, 439a2630262SLars-Peter Clausen .channels = ad5065_channels, 440dbdc025bSLars-Peter Clausen .num_channels = 2, 441*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_ADI, 442dbdc025bSLars-Peter Clausen }, 443dbdc025bSLars-Peter Clausen [ID_AD5628_1] = { 444dbdc025bSLars-Peter Clausen .shared_vref = true, 445dbdc025bSLars-Peter Clausen .internal_vref = 2500000, 446dbdc025bSLars-Peter Clausen .channels = ad5024_channels, 447dbdc025bSLars-Peter Clausen .num_channels = 8, 448*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_ADI, 449dbdc025bSLars-Peter Clausen }, 450dbdc025bSLars-Peter Clausen [ID_AD5628_2] = { 451dbdc025bSLars-Peter Clausen .shared_vref = true, 452dbdc025bSLars-Peter Clausen .internal_vref = 5000000, 453dbdc025bSLars-Peter Clausen .channels = ad5024_channels, 454dbdc025bSLars-Peter Clausen .num_channels = 8, 455*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_ADI, 456dbdc025bSLars-Peter Clausen }, 4575dcbe97bSLars-Peter Clausen [ID_AD5629_1] = { 4585dcbe97bSLars-Peter Clausen .shared_vref = true, 4595dcbe97bSLars-Peter Clausen .internal_vref = 2500000, 4605dcbe97bSLars-Peter Clausen .channels = ad5629_channels, 4615dcbe97bSLars-Peter Clausen .num_channels = 8, 462*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_ADI, 4635dcbe97bSLars-Peter Clausen }, 4645dcbe97bSLars-Peter Clausen [ID_AD5629_2] = { 4655dcbe97bSLars-Peter Clausen .shared_vref = true, 4665dcbe97bSLars-Peter Clausen .internal_vref = 5000000, 4675dcbe97bSLars-Peter Clausen .channels = ad5629_channels, 4685dcbe97bSLars-Peter Clausen .num_channels = 8, 469*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_ADI, 4705dcbe97bSLars-Peter Clausen }, 471dbdc025bSLars-Peter Clausen [ID_AD5648_1] = { 472dbdc025bSLars-Peter Clausen .shared_vref = true, 473dbdc025bSLars-Peter Clausen .internal_vref = 2500000, 474dbdc025bSLars-Peter Clausen .channels = ad5044_channels, 475dbdc025bSLars-Peter Clausen .num_channels = 8, 476*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_ADI, 477dbdc025bSLars-Peter Clausen }, 478dbdc025bSLars-Peter Clausen [ID_AD5648_2] = { 479dbdc025bSLars-Peter Clausen .shared_vref = true, 480dbdc025bSLars-Peter Clausen .internal_vref = 5000000, 481dbdc025bSLars-Peter Clausen .channels = ad5044_channels, 482dbdc025bSLars-Peter Clausen .num_channels = 8, 483*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_ADI, 484dbdc025bSLars-Peter Clausen }, 485dbdc025bSLars-Peter Clausen [ID_AD5666_1] = { 486dbdc025bSLars-Peter Clausen .shared_vref = true, 487dbdc025bSLars-Peter Clausen .internal_vref = 2500000, 488dbdc025bSLars-Peter Clausen .channels = ad5064_channels, 489dbdc025bSLars-Peter Clausen .num_channels = 4, 490*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_ADI, 491dbdc025bSLars-Peter Clausen }, 492dbdc025bSLars-Peter Clausen [ID_AD5666_2] = { 493dbdc025bSLars-Peter Clausen .shared_vref = true, 494dbdc025bSLars-Peter Clausen .internal_vref = 5000000, 495dbdc025bSLars-Peter Clausen .channels = ad5064_channels, 496dbdc025bSLars-Peter Clausen .num_channels = 4, 497*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_ADI, 498dbdc025bSLars-Peter Clausen }, 499dbdc025bSLars-Peter Clausen [ID_AD5668_1] = { 500dbdc025bSLars-Peter Clausen .shared_vref = true, 501dbdc025bSLars-Peter Clausen .internal_vref = 2500000, 502dbdc025bSLars-Peter Clausen .channels = ad5064_channels, 503dbdc025bSLars-Peter Clausen .num_channels = 8, 504*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_ADI, 505dbdc025bSLars-Peter Clausen }, 506dbdc025bSLars-Peter Clausen [ID_AD5668_2] = { 507dbdc025bSLars-Peter Clausen .shared_vref = true, 508dbdc025bSLars-Peter Clausen .internal_vref = 5000000, 509dbdc025bSLars-Peter Clausen .channels = ad5064_channels, 510dbdc025bSLars-Peter Clausen .num_channels = 8, 511*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_ADI, 512dbdc025bSLars-Peter Clausen }, 5135dcbe97bSLars-Peter Clausen [ID_AD5669_1] = { 5145dcbe97bSLars-Peter Clausen .shared_vref = true, 5155dcbe97bSLars-Peter Clausen .internal_vref = 2500000, 5165dcbe97bSLars-Peter Clausen .channels = ad5669_channels, 5175dcbe97bSLars-Peter Clausen .num_channels = 8, 518*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_ADI, 5195dcbe97bSLars-Peter Clausen }, 5205dcbe97bSLars-Peter Clausen [ID_AD5669_2] = { 5215dcbe97bSLars-Peter Clausen .shared_vref = true, 5225dcbe97bSLars-Peter Clausen .internal_vref = 5000000, 5235dcbe97bSLars-Peter Clausen .channels = ad5669_channels, 5245dcbe97bSLars-Peter Clausen .num_channels = 8, 525*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_ADI, 5265dcbe97bSLars-Peter Clausen }, 5278d144c96SMarc Andre [ID_LTC2606] = { 5288d144c96SMarc Andre .shared_vref = true, 5298d144c96SMarc Andre .internal_vref = 0, 5308d144c96SMarc Andre .channels = ltc2607_channels, 5318d144c96SMarc Andre .num_channels = 1, 532*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_LTC, 5338d144c96SMarc Andre }, 5348d144c96SMarc Andre [ID_LTC2607] = { 5358d144c96SMarc Andre .shared_vref = true, 5368d144c96SMarc Andre .internal_vref = 0, 5378d144c96SMarc Andre .channels = ltc2607_channels, 5388d144c96SMarc Andre .num_channels = 2, 539*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_LTC, 5408d144c96SMarc Andre }, 5418d144c96SMarc Andre [ID_LTC2609] = { 5428d144c96SMarc Andre .shared_vref = false, 5438d144c96SMarc Andre .internal_vref = 0, 5448d144c96SMarc Andre .channels = ltc2607_channels, 5458d144c96SMarc Andre .num_channels = 4, 546*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_LTC, 5478d144c96SMarc Andre }, 5488d144c96SMarc Andre [ID_LTC2616] = { 5498d144c96SMarc Andre .shared_vref = true, 5508d144c96SMarc Andre .internal_vref = 0, 5518d144c96SMarc Andre .channels = ltc2617_channels, 5528d144c96SMarc Andre .num_channels = 1, 553*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_LTC, 5548d144c96SMarc Andre }, 5558d144c96SMarc Andre [ID_LTC2617] = { 5568d144c96SMarc Andre .shared_vref = true, 5578d144c96SMarc Andre .internal_vref = 0, 5588d144c96SMarc Andre .channels = ltc2617_channels, 5598d144c96SMarc Andre .num_channels = 2, 560*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_LTC, 5618d144c96SMarc Andre }, 5628d144c96SMarc Andre [ID_LTC2619] = { 5638d144c96SMarc Andre .shared_vref = false, 5648d144c96SMarc Andre .internal_vref = 0, 5658d144c96SMarc Andre .channels = ltc2617_channels, 5668d144c96SMarc Andre .num_channels = 4, 567*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_LTC, 5688d144c96SMarc Andre }, 5698d144c96SMarc Andre [ID_LTC2626] = { 5708d144c96SMarc Andre .shared_vref = true, 5718d144c96SMarc Andre .internal_vref = 0, 5728d144c96SMarc Andre .channels = ltc2627_channels, 5738d144c96SMarc Andre .num_channels = 1, 574*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_LTC, 5758d144c96SMarc Andre }, 5768d144c96SMarc Andre [ID_LTC2627] = { 5778d144c96SMarc Andre .shared_vref = true, 5788d144c96SMarc Andre .internal_vref = 0, 5798d144c96SMarc Andre .channels = ltc2627_channels, 5808d144c96SMarc Andre .num_channels = 2, 581*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_LTC, 5828d144c96SMarc Andre }, 5838d144c96SMarc Andre [ID_LTC2629] = { 5848d144c96SMarc Andre .shared_vref = false, 5858d144c96SMarc Andre .internal_vref = 0, 5868d144c96SMarc Andre .channels = ltc2627_channels, 5878d144c96SMarc Andre .num_channels = 4, 588*4946ff58SLars-Peter Clausen .regmap_type = AD5064_REGMAP_LTC, 5898d144c96SMarc Andre }, 590dbdc025bSLars-Peter Clausen }; 591dbdc025bSLars-Peter Clausen 592dbdc025bSLars-Peter Clausen static inline unsigned int ad5064_num_vref(struct ad5064_state *st) 593dbdc025bSLars-Peter Clausen { 594dbdc025bSLars-Peter Clausen return st->chip_info->shared_vref ? 1 : st->chip_info->num_channels; 595dbdc025bSLars-Peter Clausen } 596dbdc025bSLars-Peter Clausen 597dbdc025bSLars-Peter Clausen static const char * const ad5064_vref_names[] = { 598dbdc025bSLars-Peter Clausen "vrefA", 599dbdc025bSLars-Peter Clausen "vrefB", 600dbdc025bSLars-Peter Clausen "vrefC", 601dbdc025bSLars-Peter Clausen "vrefD", 602dbdc025bSLars-Peter Clausen }; 603dbdc025bSLars-Peter Clausen 604dbdc025bSLars-Peter Clausen static const char * const ad5064_vref_name(struct ad5064_state *st, 605dbdc025bSLars-Peter Clausen unsigned int vref) 606dbdc025bSLars-Peter Clausen { 607dbdc025bSLars-Peter Clausen return st->chip_info->shared_vref ? "vref" : ad5064_vref_names[vref]; 608dbdc025bSLars-Peter Clausen } 609dbdc025bSLars-Peter Clausen 610fc52692cSGreg Kroah-Hartman static int ad5064_probe(struct device *dev, enum ad5064_type type, 6116a17a076SLars-Peter Clausen const char *name, ad5064_write_func write) 612dbdc025bSLars-Peter Clausen { 613dbdc025bSLars-Peter Clausen struct iio_dev *indio_dev; 614dbdc025bSLars-Peter Clausen struct ad5064_state *st; 615f77ae9d8SLars-Peter Clausen unsigned int midscale; 616dbdc025bSLars-Peter Clausen unsigned int i; 617dbdc025bSLars-Peter Clausen int ret; 618dbdc025bSLars-Peter Clausen 619c367982aSSachin Kamat indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 620dbdc025bSLars-Peter Clausen if (indio_dev == NULL) 621dbdc025bSLars-Peter Clausen return -ENOMEM; 622dbdc025bSLars-Peter Clausen 623dbdc025bSLars-Peter Clausen st = iio_priv(indio_dev); 6246a17a076SLars-Peter Clausen dev_set_drvdata(dev, indio_dev); 625dbdc025bSLars-Peter Clausen 626dbdc025bSLars-Peter Clausen st->chip_info = &ad5064_chip_info_tbl[type]; 6276a17a076SLars-Peter Clausen st->dev = dev; 6286a17a076SLars-Peter Clausen st->write = write; 629dbdc025bSLars-Peter Clausen 630dbdc025bSLars-Peter Clausen for (i = 0; i < ad5064_num_vref(st); ++i) 631dbdc025bSLars-Peter Clausen st->vref_reg[i].supply = ad5064_vref_name(st, i); 632dbdc025bSLars-Peter Clausen 633c367982aSSachin Kamat ret = devm_regulator_bulk_get(dev, ad5064_num_vref(st), 634dbdc025bSLars-Peter Clausen st->vref_reg); 635dbdc025bSLars-Peter Clausen if (ret) { 636dbdc025bSLars-Peter Clausen if (!st->chip_info->internal_vref) 637c367982aSSachin Kamat return ret; 638dbdc025bSLars-Peter Clausen st->use_internal_vref = true; 6396a17a076SLars-Peter Clausen ret = ad5064_write(st, AD5064_CMD_CONFIG, 0, 640dbdc025bSLars-Peter Clausen AD5064_CONFIG_INT_VREF_ENABLE, 0); 641dbdc025bSLars-Peter Clausen if (ret) { 6426a17a076SLars-Peter Clausen dev_err(dev, "Failed to enable internal vref: %d\n", 643dbdc025bSLars-Peter Clausen ret); 644c367982aSSachin Kamat return ret; 645dbdc025bSLars-Peter Clausen } 646dbdc025bSLars-Peter Clausen } else { 647dbdc025bSLars-Peter Clausen ret = regulator_bulk_enable(ad5064_num_vref(st), st->vref_reg); 648dbdc025bSLars-Peter Clausen if (ret) 649c367982aSSachin Kamat return ret; 650dbdc025bSLars-Peter Clausen } 651dbdc025bSLars-Peter Clausen 6526a17a076SLars-Peter Clausen indio_dev->dev.parent = dev; 6536a17a076SLars-Peter Clausen indio_dev->name = name; 654dbdc025bSLars-Peter Clausen indio_dev->info = &ad5064_info; 655dbdc025bSLars-Peter Clausen indio_dev->modes = INDIO_DIRECT_MODE; 656dbdc025bSLars-Peter Clausen indio_dev->channels = st->chip_info->channels; 657dbdc025bSLars-Peter Clausen indio_dev->num_channels = st->chip_info->num_channels; 658dbdc025bSLars-Peter Clausen 659f77ae9d8SLars-Peter Clausen midscale = (1 << indio_dev->channels[0].scan_type.realbits) / 2; 660f77ae9d8SLars-Peter Clausen 661f77ae9d8SLars-Peter Clausen for (i = 0; i < st->chip_info->num_channels; ++i) { 662f77ae9d8SLars-Peter Clausen st->pwr_down_mode[i] = AD5064_LDAC_PWRDN_1K; 663f77ae9d8SLars-Peter Clausen st->dac_cache[i] = midscale; 664f77ae9d8SLars-Peter Clausen } 665f77ae9d8SLars-Peter Clausen 666dbdc025bSLars-Peter Clausen ret = iio_device_register(indio_dev); 667dbdc025bSLars-Peter Clausen if (ret) 668dbdc025bSLars-Peter Clausen goto error_disable_reg; 669dbdc025bSLars-Peter Clausen 670dbdc025bSLars-Peter Clausen return 0; 671dbdc025bSLars-Peter Clausen 672dbdc025bSLars-Peter Clausen error_disable_reg: 673dbdc025bSLars-Peter Clausen if (!st->use_internal_vref) 674dbdc025bSLars-Peter Clausen regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg); 675dbdc025bSLars-Peter Clausen 676dbdc025bSLars-Peter Clausen return ret; 677dbdc025bSLars-Peter Clausen } 678dbdc025bSLars-Peter Clausen 679fc52692cSGreg Kroah-Hartman static int ad5064_remove(struct device *dev) 680dbdc025bSLars-Peter Clausen { 6816a17a076SLars-Peter Clausen struct iio_dev *indio_dev = dev_get_drvdata(dev); 682dbdc025bSLars-Peter Clausen struct ad5064_state *st = iio_priv(indio_dev); 683dbdc025bSLars-Peter Clausen 684dbdc025bSLars-Peter Clausen iio_device_unregister(indio_dev); 685dbdc025bSLars-Peter Clausen 686c367982aSSachin Kamat if (!st->use_internal_vref) 687dbdc025bSLars-Peter Clausen regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg); 688dbdc025bSLars-Peter Clausen 689dbdc025bSLars-Peter Clausen return 0; 690dbdc025bSLars-Peter Clausen } 691dbdc025bSLars-Peter Clausen 6926a17a076SLars-Peter Clausen #if IS_ENABLED(CONFIG_SPI_MASTER) 6936a17a076SLars-Peter Clausen 6949660ac70SLars-Peter Clausen static int ad5064_spi_write(struct ad5064_state *st, unsigned int cmd, 6959660ac70SLars-Peter Clausen unsigned int addr, unsigned int val) 6969660ac70SLars-Peter Clausen { 6979660ac70SLars-Peter Clausen struct spi_device *spi = to_spi_device(st->dev); 6989660ac70SLars-Peter Clausen 6999660ac70SLars-Peter Clausen st->data.spi = cpu_to_be32(AD5064_CMD(cmd) | AD5064_ADDR(addr) | val); 7009660ac70SLars-Peter Clausen return spi_write(spi, &st->data.spi, sizeof(st->data.spi)); 7019660ac70SLars-Peter Clausen } 7029660ac70SLars-Peter Clausen 703fc52692cSGreg Kroah-Hartman static int ad5064_spi_probe(struct spi_device *spi) 7046a17a076SLars-Peter Clausen { 7056a17a076SLars-Peter Clausen const struct spi_device_id *id = spi_get_device_id(spi); 7066a17a076SLars-Peter Clausen 7076a17a076SLars-Peter Clausen return ad5064_probe(&spi->dev, id->driver_data, id->name, 7086a17a076SLars-Peter Clausen ad5064_spi_write); 7096a17a076SLars-Peter Clausen } 7106a17a076SLars-Peter Clausen 711fc52692cSGreg Kroah-Hartman static int ad5064_spi_remove(struct spi_device *spi) 7126a17a076SLars-Peter Clausen { 7136a17a076SLars-Peter Clausen return ad5064_remove(&spi->dev); 7146a17a076SLars-Peter Clausen } 7156a17a076SLars-Peter Clausen 7166a17a076SLars-Peter Clausen static const struct spi_device_id ad5064_spi_ids[] = { 717dbdc025bSLars-Peter Clausen {"ad5024", ID_AD5024}, 718dbdc025bSLars-Peter Clausen {"ad5025", ID_AD5025}, 719dbdc025bSLars-Peter Clausen {"ad5044", ID_AD5044}, 720dbdc025bSLars-Peter Clausen {"ad5045", ID_AD5045}, 721dbdc025bSLars-Peter Clausen {"ad5064", ID_AD5064}, 722dbdc025bSLars-Peter Clausen {"ad5064-1", ID_AD5064_1}, 723dbdc025bSLars-Peter Clausen {"ad5065", ID_AD5065}, 724dbdc025bSLars-Peter Clausen {"ad5628-1", ID_AD5628_1}, 725dbdc025bSLars-Peter Clausen {"ad5628-2", ID_AD5628_2}, 726dbdc025bSLars-Peter Clausen {"ad5648-1", ID_AD5648_1}, 727dbdc025bSLars-Peter Clausen {"ad5648-2", ID_AD5648_2}, 728dbdc025bSLars-Peter Clausen {"ad5666-1", ID_AD5666_1}, 729dbdc025bSLars-Peter Clausen {"ad5666-2", ID_AD5666_2}, 730dbdc025bSLars-Peter Clausen {"ad5668-1", ID_AD5668_1}, 731dbdc025bSLars-Peter Clausen {"ad5668-2", ID_AD5668_2}, 732dbdc025bSLars-Peter Clausen {"ad5668-3", ID_AD5668_2}, /* similar enough to ad5668-2 */ 733dbdc025bSLars-Peter Clausen {} 734dbdc025bSLars-Peter Clausen }; 7356a17a076SLars-Peter Clausen MODULE_DEVICE_TABLE(spi, ad5064_spi_ids); 736dbdc025bSLars-Peter Clausen 7376a17a076SLars-Peter Clausen static struct spi_driver ad5064_spi_driver = { 738dbdc025bSLars-Peter Clausen .driver = { 739dbdc025bSLars-Peter Clausen .name = "ad5064", 740dbdc025bSLars-Peter Clausen }, 7416a17a076SLars-Peter Clausen .probe = ad5064_spi_probe, 742fc52692cSGreg Kroah-Hartman .remove = ad5064_spi_remove, 7436a17a076SLars-Peter Clausen .id_table = ad5064_spi_ids, 744dbdc025bSLars-Peter Clausen }; 7456a17a076SLars-Peter Clausen 7466a17a076SLars-Peter Clausen static int __init ad5064_spi_register_driver(void) 7476a17a076SLars-Peter Clausen { 7486a17a076SLars-Peter Clausen return spi_register_driver(&ad5064_spi_driver); 7496a17a076SLars-Peter Clausen } 7506a17a076SLars-Peter Clausen 75121fa54e4SGerard Snitselaar static void ad5064_spi_unregister_driver(void) 7526a17a076SLars-Peter Clausen { 7536a17a076SLars-Peter Clausen spi_unregister_driver(&ad5064_spi_driver); 7546a17a076SLars-Peter Clausen } 7556a17a076SLars-Peter Clausen 7566a17a076SLars-Peter Clausen #else 7576a17a076SLars-Peter Clausen 7586a17a076SLars-Peter Clausen static inline int ad5064_spi_register_driver(void) { return 0; } 7596a17a076SLars-Peter Clausen static inline void ad5064_spi_unregister_driver(void) { } 7606a17a076SLars-Peter Clausen 7616a17a076SLars-Peter Clausen #endif 7626a17a076SLars-Peter Clausen 7636a17a076SLars-Peter Clausen #if IS_ENABLED(CONFIG_I2C) 7646a17a076SLars-Peter Clausen 7659660ac70SLars-Peter Clausen static int ad5064_i2c_write(struct ad5064_state *st, unsigned int cmd, 7669660ac70SLars-Peter Clausen unsigned int addr, unsigned int val) 7679660ac70SLars-Peter Clausen { 7689660ac70SLars-Peter Clausen struct i2c_client *i2c = to_i2c_client(st->dev); 76903fe472eSMichael Hennerich int ret; 7709660ac70SLars-Peter Clausen 7719660ac70SLars-Peter Clausen st->data.i2c[0] = (cmd << 4) | addr; 7729660ac70SLars-Peter Clausen put_unaligned_be16(val, &st->data.i2c[1]); 77303fe472eSMichael Hennerich 77403fe472eSMichael Hennerich ret = i2c_master_send(i2c, st->data.i2c, 3); 77503fe472eSMichael Hennerich if (ret < 0) 77603fe472eSMichael Hennerich return ret; 77703fe472eSMichael Hennerich 77803fe472eSMichael Hennerich return 0; 7799660ac70SLars-Peter Clausen } 7809660ac70SLars-Peter Clausen 781fc52692cSGreg Kroah-Hartman static int ad5064_i2c_probe(struct i2c_client *i2c, 7826a17a076SLars-Peter Clausen const struct i2c_device_id *id) 7836a17a076SLars-Peter Clausen { 7846a17a076SLars-Peter Clausen return ad5064_probe(&i2c->dev, id->driver_data, id->name, 7856a17a076SLars-Peter Clausen ad5064_i2c_write); 7866a17a076SLars-Peter Clausen } 7876a17a076SLars-Peter Clausen 788fc52692cSGreg Kroah-Hartman static int ad5064_i2c_remove(struct i2c_client *i2c) 7896a17a076SLars-Peter Clausen { 7906a17a076SLars-Peter Clausen return ad5064_remove(&i2c->dev); 7916a17a076SLars-Peter Clausen } 7926a17a076SLars-Peter Clausen 7936a17a076SLars-Peter Clausen static const struct i2c_device_id ad5064_i2c_ids[] = { 7945dcbe97bSLars-Peter Clausen {"ad5629-1", ID_AD5629_1}, 7955dcbe97bSLars-Peter Clausen {"ad5629-2", ID_AD5629_2}, 7965dcbe97bSLars-Peter Clausen {"ad5629-3", ID_AD5629_2}, /* similar enough to ad5629-2 */ 7975dcbe97bSLars-Peter Clausen {"ad5669-1", ID_AD5669_1}, 7985dcbe97bSLars-Peter Clausen {"ad5669-2", ID_AD5669_2}, 7995dcbe97bSLars-Peter Clausen {"ad5669-3", ID_AD5669_2}, /* similar enough to ad5669-2 */ 8008d144c96SMarc Andre {"ltc2606", ID_LTC2606}, 8018d144c96SMarc Andre {"ltc2607", ID_LTC2607}, 8028d144c96SMarc Andre {"ltc2609", ID_LTC2609}, 8038d144c96SMarc Andre {"ltc2616", ID_LTC2616}, 8048d144c96SMarc Andre {"ltc2617", ID_LTC2617}, 8058d144c96SMarc Andre {"ltc2619", ID_LTC2619}, 8068d144c96SMarc Andre {"ltc2626", ID_LTC2626}, 8078d144c96SMarc Andre {"ltc2627", ID_LTC2627}, 8088d144c96SMarc Andre {"ltc2629", ID_LTC2629}, 8096a17a076SLars-Peter Clausen {} 8106a17a076SLars-Peter Clausen }; 8116a17a076SLars-Peter Clausen MODULE_DEVICE_TABLE(i2c, ad5064_i2c_ids); 8126a17a076SLars-Peter Clausen 8136a17a076SLars-Peter Clausen static struct i2c_driver ad5064_i2c_driver = { 8146a17a076SLars-Peter Clausen .driver = { 8156a17a076SLars-Peter Clausen .name = "ad5064", 8166a17a076SLars-Peter Clausen }, 8176a17a076SLars-Peter Clausen .probe = ad5064_i2c_probe, 818fc52692cSGreg Kroah-Hartman .remove = ad5064_i2c_remove, 8196a17a076SLars-Peter Clausen .id_table = ad5064_i2c_ids, 8206a17a076SLars-Peter Clausen }; 8216a17a076SLars-Peter Clausen 8226a17a076SLars-Peter Clausen static int __init ad5064_i2c_register_driver(void) 8236a17a076SLars-Peter Clausen { 8246a17a076SLars-Peter Clausen return i2c_add_driver(&ad5064_i2c_driver); 8256a17a076SLars-Peter Clausen } 8266a17a076SLars-Peter Clausen 8276a17a076SLars-Peter Clausen static void __exit ad5064_i2c_unregister_driver(void) 8286a17a076SLars-Peter Clausen { 8296a17a076SLars-Peter Clausen i2c_del_driver(&ad5064_i2c_driver); 8306a17a076SLars-Peter Clausen } 8316a17a076SLars-Peter Clausen 8326a17a076SLars-Peter Clausen #else 8336a17a076SLars-Peter Clausen 8346a17a076SLars-Peter Clausen static inline int ad5064_i2c_register_driver(void) { return 0; } 8356a17a076SLars-Peter Clausen static inline void ad5064_i2c_unregister_driver(void) { } 8366a17a076SLars-Peter Clausen 8376a17a076SLars-Peter Clausen #endif 8386a17a076SLars-Peter Clausen 8396a17a076SLars-Peter Clausen static int __init ad5064_init(void) 8406a17a076SLars-Peter Clausen { 8416a17a076SLars-Peter Clausen int ret; 8426a17a076SLars-Peter Clausen 8436a17a076SLars-Peter Clausen ret = ad5064_spi_register_driver(); 8446a17a076SLars-Peter Clausen if (ret) 8456a17a076SLars-Peter Clausen return ret; 8466a17a076SLars-Peter Clausen 8476a17a076SLars-Peter Clausen ret = ad5064_i2c_register_driver(); 8486a17a076SLars-Peter Clausen if (ret) { 8496a17a076SLars-Peter Clausen ad5064_spi_unregister_driver(); 8506a17a076SLars-Peter Clausen return ret; 8516a17a076SLars-Peter Clausen } 8526a17a076SLars-Peter Clausen 8536a17a076SLars-Peter Clausen return 0; 8546a17a076SLars-Peter Clausen } 8556a17a076SLars-Peter Clausen module_init(ad5064_init); 8566a17a076SLars-Peter Clausen 8576a17a076SLars-Peter Clausen static void __exit ad5064_exit(void) 8586a17a076SLars-Peter Clausen { 8596a17a076SLars-Peter Clausen ad5064_i2c_unregister_driver(); 8606a17a076SLars-Peter Clausen ad5064_spi_unregister_driver(); 8616a17a076SLars-Peter Clausen } 8626a17a076SLars-Peter Clausen module_exit(ad5064_exit); 863dbdc025bSLars-Peter Clausen 864dbdc025bSLars-Peter Clausen MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); 8656a17a076SLars-Peter Clausen MODULE_DESCRIPTION("Analog Devices AD5024 and similar multi-channel DACs"); 866dbdc025bSLars-Peter Clausen MODULE_LICENSE("GPL v2"); 867