1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Texas Instruments ADS1119 ADC driver. 4 * 5 * Copyright 2024 Toradex 6 */ 7 8 #include <linux/bits.h> 9 #include <linux/bitfield.h> 10 #include <linux/completion.h> 11 #include <linux/delay.h> 12 #include <linux/dev_printk.h> 13 #include <linux/err.h> 14 #include <linux/gpio/consumer.h> 15 #include <linux/interrupt.h> 16 #include <linux/iopoll.h> 17 #include <linux/i2c.h> 18 #include <linux/kernel.h> 19 #include <linux/math.h> 20 #include <linux/module.h> 21 #include <linux/pm_runtime.h> 22 #include <linux/regulator/consumer.h> 23 #include <linux/units.h> 24 25 #include <linux/iio/iio.h> 26 #include <linux/iio/buffer.h> 27 #include <linux/iio/trigger.h> 28 #include <linux/iio/triggered_buffer.h> 29 #include <linux/iio/trigger_consumer.h> 30 31 #define ADS1119_CMD_RESET 0x06 32 #define ADS1119_CMD_POWERDOWN 0x02 33 #define ADS1119_CMD_START_SYNC 0x08 34 #define ADS1119_CMD_RDATA 0x10 35 #define ADS1119_CMD_RREG_CONFIG 0x20 36 #define ADS1119_CMD_RREG_STATUS 0x24 37 #define ADS1119_CMD_WREG 0x40 38 39 #define ADS1119_CMD_RREG(reg) (0x20 | (reg) << 2) 40 41 /* Config register */ 42 #define ADS1119_REG_CONFIG 0x00 43 #define ADS1119_CONFIG_VREF_FIELD BIT(0) 44 #define ADS1119_CONFIG_CM_FIELD BIT(1) 45 #define ADS1119_CONFIG_DR_FIELD GENMASK(3, 2) 46 #define ADS1119_CONFIG_GAIN_FIELD BIT(4) 47 #define ADS1119_CONFIG_MUX_FIELD GENMASK(7, 5) 48 49 #define ADS1119_VREF_INTERNAL 0 50 #define ADS1119_VREF_EXTERNAL 1 51 #define ADS1119_VREF_INTERNAL_VAL 2048000 52 53 #define ADS1119_CM_SINGLE 0 54 #define ADS1119_CM_CONTINUOUS 1 55 56 #define ADS1119_DR_20_SPS 0 57 #define ADS1119_DR_90_SPS 1 58 #define ADS1119_DR_330_SPS 2 59 #define ADS1119_DR_1000_SPS 3 60 61 #define ADS1119_GAIN_1 0 62 #define ADS1119_GAIN_4 1 63 64 #define ADS1119_MUX_AIN0_AIN1 0 65 #define ADS1119_MUX_AIN2_AIN3 1 66 #define ADS1119_MUX_AIN1_AIN2 2 67 #define ADS1119_MUX_AIN0 3 68 #define ADS1119_MUX_AIN1 4 69 #define ADS1119_MUX_AIN2 5 70 #define ADS1119_MUX_AIN3 6 71 #define ADS1119_MUX_SHORTED 7 72 73 /* Status register */ 74 #define ADS1119_REG_STATUS 0x01 75 #define ADS1119_STATUS_DRDY_FIELD BIT(7) 76 77 #define ADS1119_DEFAULT_GAIN 1 78 #define ADS1119_DEFAULT_DATARATE 20 79 80 #define ADS1119_SUSPEND_DELAY 2000 81 82 /* Timeout based on the minimum sample rate of 20 SPS (50000us) */ 83 #define ADS1119_MAX_DRDY_TIMEOUT 85000 84 85 #define ADS1119_MAX_CHANNELS 7 86 #define ADS1119_MAX_SINGLE_CHANNELS 4 87 88 struct ads1119_channel_config { 89 int gain; 90 int datarate; 91 int mux; 92 }; 93 94 struct ads1119_state { 95 struct completion completion; 96 struct i2c_client *client; 97 struct gpio_desc *reset_gpio; 98 struct iio_trigger *trig; 99 struct ads1119_channel_config *channels_cfg; 100 unsigned int num_channels_cfg; 101 unsigned int cached_config; 102 int vref_uV; 103 }; 104 105 static const char * const ads1119_power_supplies[] = { 106 "avdd", "dvdd" 107 }; 108 109 static const int ads1119_available_datarates[] = { 110 20, 90, 330, 1000, 111 }; 112 113 static const int ads1119_available_gains[] = { 114 1, 1, 115 1, 4, 116 }; 117 118 static int ads1119_upd_cfg_reg(struct ads1119_state *st, unsigned int fields, 119 unsigned int val) 120 { 121 unsigned int config = st->cached_config; 122 int ret; 123 124 config &= ~fields; 125 config |= val; 126 127 ret = i2c_smbus_write_byte_data(st->client, ADS1119_CMD_WREG, config); 128 if (ret) 129 return ret; 130 131 st->cached_config = config; 132 133 return 0; 134 } 135 136 static bool ads1119_data_ready(struct ads1119_state *st) 137 { 138 int status; 139 140 status = i2c_smbus_read_byte_data(st->client, ADS1119_CMD_RREG_STATUS); 141 if (status < 0) 142 return false; 143 144 return FIELD_GET(ADS1119_STATUS_DRDY_FIELD, status); 145 } 146 147 static int ads1119_reset(struct ads1119_state *st) 148 { 149 st->cached_config = 0; 150 151 if (!st->reset_gpio) 152 return i2c_smbus_write_byte(st->client, ADS1119_CMD_RESET); 153 154 gpiod_set_value_cansleep(st->reset_gpio, 1); 155 udelay(1); 156 gpiod_set_value_cansleep(st->reset_gpio, 0); 157 udelay(1); 158 159 return 0; 160 } 161 162 static int ads1119_set_conv_mode(struct ads1119_state *st, bool continuous) 163 { 164 unsigned int mode; 165 166 if (continuous) 167 mode = ADS1119_CM_CONTINUOUS; 168 else 169 mode = ADS1119_CM_SINGLE; 170 171 return ads1119_upd_cfg_reg(st, ADS1119_CONFIG_CM_FIELD, 172 FIELD_PREP(ADS1119_CONFIG_CM_FIELD, mode)); 173 } 174 175 static int ads1119_get_hw_gain(int gain) 176 { 177 if (gain == 4) 178 return ADS1119_GAIN_4; 179 else 180 return ADS1119_GAIN_1; 181 } 182 183 static int ads1119_get_hw_datarate(int datarate) 184 { 185 switch (datarate) { 186 case 90: 187 return ADS1119_DR_90_SPS; 188 case 330: 189 return ADS1119_DR_330_SPS; 190 case 1000: 191 return ADS1119_DR_1000_SPS; 192 case 20: 193 default: 194 return ADS1119_DR_20_SPS; 195 } 196 } 197 198 static int ads1119_configure_channel(struct ads1119_state *st, int mux, 199 int gain, int datarate) 200 { 201 int ret; 202 203 ret = ads1119_upd_cfg_reg(st, ADS1119_CONFIG_MUX_FIELD, 204 FIELD_PREP(ADS1119_CONFIG_MUX_FIELD, mux)); 205 if (ret) 206 return ret; 207 208 ret = ads1119_upd_cfg_reg(st, ADS1119_CONFIG_GAIN_FIELD, 209 FIELD_PREP(ADS1119_CONFIG_GAIN_FIELD, 210 ads1119_get_hw_gain(gain))); 211 if (ret) 212 return ret; 213 214 return ads1119_upd_cfg_reg(st, ADS1119_CONFIG_DR_FIELD, 215 FIELD_PREP(ADS1119_CONFIG_DR_FIELD, 216 ads1119_get_hw_datarate(datarate))); 217 } 218 219 static int ads1119_poll_data_ready(struct ads1119_state *st, 220 struct iio_chan_spec const *chan) 221 { 222 unsigned int datarate = st->channels_cfg[chan->address].datarate; 223 unsigned long wait_time; 224 bool data_ready; 225 226 /* Poll 5 times more than the data rate */ 227 wait_time = DIV_ROUND_CLOSEST(MICRO, 5 * datarate); 228 229 return read_poll_timeout(ads1119_data_ready, data_ready, 230 data_ready, wait_time, 231 ADS1119_MAX_DRDY_TIMEOUT, false, st); 232 } 233 234 static int ads1119_read_data(struct ads1119_state *st, 235 struct iio_chan_spec const *chan, 236 unsigned int *val) 237 { 238 unsigned int timeout; 239 int ret = 0; 240 241 timeout = msecs_to_jiffies(ADS1119_MAX_DRDY_TIMEOUT); 242 243 if (!st->client->irq) { 244 ret = ads1119_poll_data_ready(st, chan); 245 if (ret) 246 return ret; 247 } else if (!wait_for_completion_timeout(&st->completion, timeout)) { 248 return -ETIMEDOUT; 249 } 250 251 ret = i2c_smbus_read_word_swapped(st->client, ADS1119_CMD_RDATA); 252 if (ret < 0) 253 return ret; 254 255 *val = ret; 256 257 return 0; 258 } 259 260 static int ads1119_single_conversion(struct ads1119_state *st, 261 struct iio_chan_spec const *chan, 262 int *val, 263 bool calib_offset) 264 { 265 struct device *dev = &st->client->dev; 266 int mux = st->channels_cfg[chan->address].mux; 267 int gain = st->channels_cfg[chan->address].gain; 268 int datarate = st->channels_cfg[chan->address].datarate; 269 unsigned int sample; 270 int ret; 271 272 if (calib_offset) 273 mux = ADS1119_MUX_SHORTED; 274 275 ret = pm_runtime_resume_and_get(dev); 276 if (ret) 277 goto pdown; 278 279 ret = ads1119_configure_channel(st, mux, gain, datarate); 280 if (ret) 281 goto pdown; 282 283 ret = i2c_smbus_write_byte(st->client, ADS1119_CMD_START_SYNC); 284 if (ret) 285 goto pdown; 286 287 ret = ads1119_read_data(st, chan, &sample); 288 if (ret) 289 goto pdown; 290 291 *val = sign_extend32(sample, chan->scan_type.realbits - 1); 292 ret = IIO_VAL_INT; 293 pdown: 294 pm_runtime_mark_last_busy(dev); 295 pm_runtime_put_autosuspend(dev); 296 return ret; 297 } 298 299 static int ads1119_validate_datarate(struct ads1119_state *st, int datarate) 300 { 301 switch (datarate) { 302 case 20: 303 case 90: 304 case 330: 305 case 1000: 306 return datarate; 307 default: 308 return -EINVAL; 309 } 310 } 311 312 static int ads1119_read_avail(struct iio_dev *indio_dev, 313 struct iio_chan_spec const *chan, 314 const int **vals, int *type, int *length, 315 long mask) 316 { 317 switch (mask) { 318 case IIO_CHAN_INFO_SCALE: 319 *type = IIO_VAL_FRACTIONAL; 320 *vals = ads1119_available_gains; 321 *length = ARRAY_SIZE(ads1119_available_gains); 322 return IIO_AVAIL_LIST; 323 case IIO_CHAN_INFO_SAMP_FREQ: 324 *type = IIO_VAL_INT; 325 *vals = ads1119_available_datarates; 326 *length = ARRAY_SIZE(ads1119_available_datarates); 327 return IIO_AVAIL_LIST; 328 default: 329 return -EINVAL; 330 } 331 } 332 333 static int ads1119_read_raw(struct iio_dev *indio_dev, 334 struct iio_chan_spec const *chan, int *val, 335 int *val2, long mask) 336 { 337 struct ads1119_state *st = iio_priv(indio_dev); 338 unsigned int index = chan->address; 339 340 if (index >= st->num_channels_cfg) 341 return -EINVAL; 342 343 switch (mask) { 344 case IIO_CHAN_INFO_RAW: 345 iio_device_claim_direct_scoped(return -EBUSY, indio_dev) 346 return ads1119_single_conversion(st, chan, val, false); 347 unreachable(); 348 case IIO_CHAN_INFO_OFFSET: 349 iio_device_claim_direct_scoped(return -EBUSY, indio_dev) 350 return ads1119_single_conversion(st, chan, val, true); 351 unreachable(); 352 case IIO_CHAN_INFO_SCALE: 353 *val = st->vref_uV / 1000; 354 *val /= st->channels_cfg[index].gain; 355 *val2 = chan->scan_type.realbits - 1; 356 return IIO_VAL_FRACTIONAL_LOG2; 357 case IIO_CHAN_INFO_SAMP_FREQ: 358 *val = st->channels_cfg[index].datarate; 359 return IIO_VAL_INT; 360 default: 361 return -EINVAL; 362 } 363 } 364 365 static int ads1119_write_raw(struct iio_dev *indio_dev, 366 struct iio_chan_spec const *chan, int val, 367 int val2, long mask) 368 { 369 struct ads1119_state *st = iio_priv(indio_dev); 370 unsigned int index = chan->address; 371 int ret; 372 373 if (index >= st->num_channels_cfg) 374 return -EINVAL; 375 376 switch (mask) { 377 case IIO_CHAN_INFO_SCALE: 378 ret = MICRO / ((val * MICRO) + val2); 379 if (ret != 1 && ret != 4) 380 return -EINVAL; 381 382 st->channels_cfg[index].gain = ret; 383 return 0; 384 case IIO_CHAN_INFO_SAMP_FREQ: 385 ret = ads1119_validate_datarate(st, val); 386 if (ret < 0) 387 return ret; 388 389 st->channels_cfg[index].datarate = ret; 390 return 0; 391 default: 392 return -EINVAL; 393 } 394 } 395 396 static int ads1119_debugfs_reg_access(struct iio_dev *indio_dev, 397 unsigned int reg, unsigned int writeval, 398 unsigned int *readval) 399 { 400 struct ads1119_state *st = iio_priv(indio_dev); 401 int ret; 402 403 if (reg > ADS1119_REG_STATUS) 404 return -EINVAL; 405 406 if (readval) { 407 ret = i2c_smbus_read_byte_data(st->client, 408 ADS1119_CMD_RREG(reg)); 409 if (ret < 0) 410 return ret; 411 412 *readval = ret; 413 return 0; 414 } 415 416 if (reg > ADS1119_REG_CONFIG) 417 return -EINVAL; 418 419 return i2c_smbus_write_byte_data(st->client, ADS1119_CMD_WREG, 420 writeval); 421 } 422 423 static const struct iio_info ads1119_info = { 424 .read_avail = ads1119_read_avail, 425 .read_raw = ads1119_read_raw, 426 .write_raw = ads1119_write_raw, 427 .debugfs_reg_access = ads1119_debugfs_reg_access, 428 }; 429 430 static int ads1119_triggered_buffer_preenable(struct iio_dev *indio_dev) 431 { 432 struct ads1119_state *st = iio_priv(indio_dev); 433 struct device *dev = &st->client->dev; 434 unsigned int index; 435 int ret; 436 437 index = find_first_bit(indio_dev->active_scan_mask, 438 iio_get_masklength(indio_dev)); 439 440 ret = ads1119_set_conv_mode(st, true); 441 if (ret) 442 return ret; 443 444 ret = ads1119_configure_channel(st, 445 st->channels_cfg[index].mux, 446 st->channels_cfg[index].gain, 447 st->channels_cfg[index].datarate); 448 if (ret) 449 return ret; 450 451 ret = pm_runtime_resume_and_get(dev); 452 if (ret) 453 return ret; 454 455 return i2c_smbus_write_byte(st->client, ADS1119_CMD_START_SYNC); 456 } 457 458 static int ads1119_triggered_buffer_postdisable(struct iio_dev *indio_dev) 459 { 460 struct ads1119_state *st = iio_priv(indio_dev); 461 struct device *dev = &st->client->dev; 462 int ret; 463 464 ret = ads1119_set_conv_mode(st, false); 465 if (ret) 466 return ret; 467 468 pm_runtime_mark_last_busy(dev); 469 pm_runtime_put_autosuspend(dev); 470 471 return 0; 472 } 473 474 static const struct iio_buffer_setup_ops ads1119_buffer_setup_ops = { 475 .preenable = ads1119_triggered_buffer_preenable, 476 .postdisable = ads1119_triggered_buffer_postdisable, 477 .validate_scan_mask = &iio_validate_scan_mask_onehot, 478 }; 479 480 static const struct iio_trigger_ops ads1119_trigger_ops = { 481 .validate_device = &iio_trigger_validate_own_device, 482 }; 483 484 static irqreturn_t ads1119_irq_handler(int irq, void *dev_id) 485 { 486 struct iio_dev *indio_dev = dev_id; 487 struct ads1119_state *st = iio_priv(indio_dev); 488 489 if (iio_buffer_enabled(indio_dev) && iio_trigger_using_own(indio_dev)) 490 iio_trigger_poll(indio_dev->trig); 491 else 492 complete(&st->completion); 493 494 return IRQ_HANDLED; 495 } 496 497 static irqreturn_t ads1119_trigger_handler(int irq, void *private) 498 { 499 struct iio_poll_func *pf = private; 500 struct iio_dev *indio_dev = pf->indio_dev; 501 struct ads1119_state *st = iio_priv(indio_dev); 502 struct { 503 unsigned int sample; 504 s64 timestamp __aligned(8); 505 } scan; 506 unsigned int index; 507 int ret; 508 509 if (!iio_trigger_using_own(indio_dev)) { 510 index = find_first_bit(indio_dev->active_scan_mask, 511 iio_get_masklength(indio_dev)); 512 513 ret = ads1119_poll_data_ready(st, &indio_dev->channels[index]); 514 if (ret) { 515 dev_err(&st->client->dev, 516 "Failed to poll data on trigger (%d)\n", ret); 517 goto done; 518 } 519 } 520 521 ret = i2c_smbus_read_word_swapped(st->client, ADS1119_CMD_RDATA); 522 if (ret < 0) { 523 dev_err(&st->client->dev, 524 "Failed to read data on trigger (%d)\n", ret); 525 goto done; 526 } 527 528 scan.sample = ret; 529 530 iio_push_to_buffers_with_timestamp(indio_dev, &scan, 531 iio_get_time_ns(indio_dev)); 532 done: 533 iio_trigger_notify_done(indio_dev->trig); 534 return IRQ_HANDLED; 535 } 536 537 static int ads1119_init(struct ads1119_state *st, bool vref_external) 538 { 539 int ret; 540 541 ret = ads1119_reset(st); 542 if (ret) 543 return ret; 544 545 if (vref_external) 546 return ads1119_upd_cfg_reg(st, 547 ADS1119_CONFIG_VREF_FIELD, 548 FIELD_PREP(ADS1119_CONFIG_VREF_FIELD, 549 ADS1119_VREF_EXTERNAL)); 550 return 0; 551 } 552 553 static int ads1119_map_analog_inputs_mux(int ain_pos, int ain_neg, 554 bool differential) 555 { 556 if (ain_pos >= ADS1119_MAX_SINGLE_CHANNELS) 557 return -EINVAL; 558 559 if (!differential) 560 return ADS1119_MUX_AIN0 + ain_pos; 561 562 if (ain_pos == 0 && ain_neg == 1) 563 return ADS1119_MUX_AIN0_AIN1; 564 else if (ain_pos == 1 && ain_neg == 2) 565 return ADS1119_MUX_AIN1_AIN2; 566 else if (ain_pos == 2 && ain_neg == 3) 567 return ADS1119_MUX_AIN2_AIN3; 568 569 return -EINVAL; 570 } 571 572 static int ads1119_alloc_and_config_channels(struct iio_dev *indio_dev) 573 { 574 const struct iio_chan_spec ads1119_channel = 575 (const struct iio_chan_spec) { 576 .type = IIO_VOLTAGE, 577 .indexed = 1, 578 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 579 BIT(IIO_CHAN_INFO_SCALE) | 580 BIT(IIO_CHAN_INFO_OFFSET) | 581 BIT(IIO_CHAN_INFO_SAMP_FREQ), 582 .info_mask_shared_by_all_available = 583 BIT(IIO_CHAN_INFO_SCALE) | 584 BIT(IIO_CHAN_INFO_SAMP_FREQ), 585 .scan_type = { 586 .sign = 's', 587 .realbits = 16, 588 .storagebits = 16, 589 .endianness = IIO_CPU, 590 }, 591 }; 592 const struct iio_chan_spec ads1119_ts = IIO_CHAN_SOFT_TIMESTAMP(0); 593 struct ads1119_state *st = iio_priv(indio_dev); 594 struct iio_chan_spec *iio_channels, *chan; 595 struct device *dev = &st->client->dev; 596 unsigned int num_channels, i; 597 bool differential; 598 u32 ain[2]; 599 int ret; 600 601 st->num_channels_cfg = device_get_child_node_count(dev); 602 if (st->num_channels_cfg > ADS1119_MAX_CHANNELS) 603 return dev_err_probe(dev, -EINVAL, 604 "Too many channels %d, max is %d\n", 605 st->num_channels_cfg, 606 ADS1119_MAX_CHANNELS); 607 608 st->channels_cfg = devm_kcalloc(dev, st->num_channels_cfg, 609 sizeof(*st->channels_cfg), GFP_KERNEL); 610 if (!st->channels_cfg) 611 return -ENOMEM; 612 613 /* Allocate one more iio channel for the timestamp */ 614 num_channels = st->num_channels_cfg + 1; 615 iio_channels = devm_kcalloc(dev, num_channels, sizeof(*iio_channels), 616 GFP_KERNEL); 617 if (!iio_channels) 618 return -ENOMEM; 619 620 i = 0; 621 622 device_for_each_child_node_scoped(dev, child) { 623 chan = &iio_channels[i]; 624 625 differential = fwnode_property_present(child, "diff-channels"); 626 if (differential) 627 ret = fwnode_property_read_u32_array(child, 628 "diff-channels", 629 ain, 2); 630 else 631 ret = fwnode_property_read_u32(child, "single-channel", 632 &ain[0]); 633 634 if (ret) 635 return dev_err_probe(dev, ret, 636 "Failed to get channel property\n"); 637 638 ret = ads1119_map_analog_inputs_mux(ain[0], ain[1], 639 differential); 640 if (ret < 0) 641 return dev_err_probe(dev, ret, 642 "Invalid channel value\n"); 643 644 st->channels_cfg[i].mux = ret; 645 st->channels_cfg[i].gain = ADS1119_DEFAULT_GAIN; 646 st->channels_cfg[i].datarate = ADS1119_DEFAULT_DATARATE; 647 648 *chan = ads1119_channel; 649 chan->channel = ain[0]; 650 chan->address = i; 651 chan->scan_index = i; 652 653 if (differential) { 654 chan->channel2 = ain[1]; 655 chan->differential = 1; 656 } 657 658 dev_dbg(dev, "channel: index %d, mux %d\n", i, 659 st->channels_cfg[i].mux); 660 661 i++; 662 } 663 664 iio_channels[i] = ads1119_ts; 665 iio_channels[i].address = i; 666 iio_channels[i].scan_index = i; 667 668 indio_dev->channels = iio_channels; 669 indio_dev->num_channels = num_channels; 670 671 return 0; 672 } 673 674 static void ads1119_powerdown(void *data) 675 { 676 struct ads1119_state *st = data; 677 678 i2c_smbus_write_byte(st->client, ADS1119_CMD_POWERDOWN); 679 } 680 681 static int ads1119_probe(struct i2c_client *client) 682 { 683 struct iio_dev *indio_dev; 684 struct ads1119_state *st; 685 struct device *dev = &client->dev; 686 bool vref_external = true; 687 int ret; 688 689 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 690 if (!indio_dev) 691 return dev_err_probe(dev, -ENOMEM, 692 "Failed to allocate IIO device\n"); 693 694 st = iio_priv(indio_dev); 695 st->client = client; 696 697 indio_dev->name = "ads1119"; 698 indio_dev->info = &ads1119_info; 699 indio_dev->modes = INDIO_DIRECT_MODE; 700 701 i2c_set_clientdata(client, indio_dev); 702 703 ret = devm_regulator_bulk_get_enable(dev, 704 ARRAY_SIZE(ads1119_power_supplies), 705 ads1119_power_supplies); 706 if (ret) 707 return dev_err_probe(dev, ret, 708 "Failed to get and enable supplies\n"); 709 710 st->vref_uV = devm_regulator_get_enable_read_voltage(dev, "vref"); 711 if (st->vref_uV == -ENODEV) { 712 vref_external = false; 713 st->vref_uV = ADS1119_VREF_INTERNAL_VAL; 714 } else if (st->vref_uV < 0) { 715 return dev_err_probe(dev, st->vref_uV, "Failed to get vref\n"); 716 } 717 718 st->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); 719 if (IS_ERR(st->reset_gpio)) 720 return dev_err_probe(dev, PTR_ERR(st->reset_gpio), 721 "Failed to get reset gpio\n"); 722 723 ret = ads1119_alloc_and_config_channels(indio_dev); 724 if (ret) 725 return ret; 726 727 init_completion(&st->completion); 728 729 ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL, 730 ads1119_trigger_handler, 731 &ads1119_buffer_setup_ops); 732 if (ret) 733 return dev_err_probe(dev, ret, "Failed to setup IIO buffer\n"); 734 735 if (client->irq > 0) { 736 ret = devm_request_threaded_irq(dev, client->irq, 737 ads1119_irq_handler, 738 NULL, IRQF_ONESHOT, 739 "ads1119", indio_dev); 740 if (ret) 741 return dev_err_probe(dev, ret, 742 "Failed to allocate irq\n"); 743 744 st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d", 745 indio_dev->name, 746 iio_device_id(indio_dev)); 747 if (!st->trig) 748 return dev_err_probe(dev, -ENOMEM, 749 "Failed to allocate IIO trigger\n"); 750 751 st->trig->ops = &ads1119_trigger_ops; 752 iio_trigger_set_drvdata(st->trig, indio_dev); 753 754 ret = devm_iio_trigger_register(dev, st->trig); 755 if (ret) 756 return dev_err_probe(dev, ret, 757 "Failed to register IIO trigger\n"); 758 } 759 760 ret = ads1119_init(st, vref_external); 761 if (ret) 762 return dev_err_probe(dev, ret, 763 "Failed to initialize device\n"); 764 765 pm_runtime_set_autosuspend_delay(dev, ADS1119_SUSPEND_DELAY); 766 pm_runtime_use_autosuspend(dev); 767 pm_runtime_mark_last_busy(dev); 768 pm_runtime_set_active(dev); 769 770 ret = devm_pm_runtime_enable(dev); 771 if (ret) 772 return dev_err_probe(dev, ret, "Failed to enable pm runtime\n"); 773 774 ret = devm_add_action_or_reset(dev, ads1119_powerdown, st); 775 if (ret) 776 return dev_err_probe(dev, ret, 777 "Failed to add powerdown action\n"); 778 779 return devm_iio_device_register(dev, indio_dev); 780 } 781 782 static int ads1119_runtime_suspend(struct device *dev) 783 { 784 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 785 struct ads1119_state *st = iio_priv(indio_dev); 786 787 return i2c_smbus_write_byte(st->client, ADS1119_CMD_POWERDOWN); 788 } 789 790 /* 791 * The ADS1119 does not require a resume function because it automatically 792 * powers on after a reset. 793 * After a power down command, the ADS1119 can still communicate but turns off 794 * its analog parts. To resume from power down, the device will power up again 795 * upon receiving a start/sync command. 796 */ 797 static DEFINE_RUNTIME_DEV_PM_OPS(ads1119_pm_ops, ads1119_runtime_suspend, 798 NULL, NULL); 799 800 static const struct of_device_id __maybe_unused ads1119_of_match[] = { 801 { .compatible = "ti,ads1119" }, 802 { } 803 }; 804 MODULE_DEVICE_TABLE(of, ads1119_of_match); 805 806 static const struct i2c_device_id ads1119_id[] = { 807 { "ads1119", 0 }, 808 { } 809 }; 810 MODULE_DEVICE_TABLE(i2c, ads1119_id); 811 812 static struct i2c_driver ads1119_driver = { 813 .driver = { 814 .name = "ads1119", 815 .of_match_table = ads1119_of_match, 816 .pm = pm_ptr(&ads1119_pm_ops), 817 }, 818 .probe = ads1119_probe, 819 .id_table = ads1119_id, 820 }; 821 module_i2c_driver(ads1119_driver); 822 823 MODULE_AUTHOR("João Paulo Gonçalves <joao.goncalves@toradex.com>"); 824 MODULE_DESCRIPTION("Texas Instruments ADS1119 ADC Driver"); 825 MODULE_LICENSE("GPL"); 826