1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Qualcomm PM8xxx PMIC XOADC driver 4 * 5 * These ADCs are known as HK/XO (house keeping / chrystal oscillator) 6 * "XO" in "XOADC" means Chrystal Oscillator. It's a bunch of 7 * specific-purpose and general purpose ADC converters and channels. 8 * 9 * Copyright (C) 2017 Linaro Ltd. 10 * Author: Linus Walleij <linus.walleij@linaro.org> 11 */ 12 13 #include <linux/iio/adc/qcom-vadc-common.h> 14 #include <linux/iio/iio.h> 15 #include <linux/iio/sysfs.h> 16 #include <linux/module.h> 17 #include <linux/of.h> 18 #include <linux/of_device.h> 19 #include <linux/platform_device.h> 20 #include <linux/regmap.h> 21 #include <linux/init.h> 22 #include <linux/interrupt.h> 23 #include <linux/regulator/consumer.h> 24 25 /* 26 * Definitions for the "user processor" registers lifted from the v3.4 27 * Qualcomm tree. Their kernel has two out-of-tree drivers for the ADC: 28 * drivers/misc/pmic8058-xoadc.c 29 * drivers/hwmon/pm8xxx-adc.c 30 * None of them contain any complete register specification, so this is 31 * a best effort of combining the information. 32 */ 33 34 /* These appear to be "battery monitor" registers */ 35 #define ADC_ARB_BTM_CNTRL1 0x17e 36 #define ADC_ARB_BTM_CNTRL1_EN_BTM BIT(0) 37 #define ADC_ARB_BTM_CNTRL1_SEL_OP_MODE BIT(1) 38 #define ADC_ARB_BTM_CNTRL1_MEAS_INTERVAL1 BIT(2) 39 #define ADC_ARB_BTM_CNTRL1_MEAS_INTERVAL2 BIT(3) 40 #define ADC_ARB_BTM_CNTRL1_MEAS_INTERVAL3 BIT(4) 41 #define ADC_ARB_BTM_CNTRL1_MEAS_INTERVAL4 BIT(5) 42 #define ADC_ARB_BTM_CNTRL1_EOC BIT(6) 43 #define ADC_ARB_BTM_CNTRL1_REQ BIT(7) 44 45 #define ADC_ARB_BTM_AMUX_CNTRL 0x17f 46 #define ADC_ARB_BTM_ANA_PARAM 0x180 47 #define ADC_ARB_BTM_DIG_PARAM 0x181 48 #define ADC_ARB_BTM_RSV 0x182 49 #define ADC_ARB_BTM_DATA1 0x183 50 #define ADC_ARB_BTM_DATA0 0x184 51 #define ADC_ARB_BTM_BAT_COOL_THR1 0x185 52 #define ADC_ARB_BTM_BAT_COOL_THR0 0x186 53 #define ADC_ARB_BTM_BAT_WARM_THR1 0x187 54 #define ADC_ARB_BTM_BAT_WARM_THR0 0x188 55 #define ADC_ARB_BTM_CNTRL2 0x18c 56 57 /* Proper ADC registers */ 58 59 #define ADC_ARB_USRP_CNTRL 0x197 60 #define ADC_ARB_USRP_CNTRL_EN_ARB BIT(0) 61 #define ADC_ARB_USRP_CNTRL_RSV1 BIT(1) 62 #define ADC_ARB_USRP_CNTRL_RSV2 BIT(2) 63 #define ADC_ARB_USRP_CNTRL_RSV3 BIT(3) 64 #define ADC_ARB_USRP_CNTRL_RSV4 BIT(4) 65 #define ADC_ARB_USRP_CNTRL_RSV5 BIT(5) 66 #define ADC_ARB_USRP_CNTRL_EOC BIT(6) 67 #define ADC_ARB_USRP_CNTRL_REQ BIT(7) 68 69 #define ADC_ARB_USRP_AMUX_CNTRL 0x198 70 /* 71 * The channel mask includes the bits selecting channel mux and prescaler 72 * on PM8058, or channel mux and premux on PM8921. 73 */ 74 #define ADC_ARB_USRP_AMUX_CNTRL_CHAN_MASK 0xfc 75 #define ADC_ARB_USRP_AMUX_CNTRL_RSV0 BIT(0) 76 #define ADC_ARB_USRP_AMUX_CNTRL_RSV1 BIT(1) 77 /* On PM8058 this is prescaling, on PM8921 this is premux */ 78 #define ADC_ARB_USRP_AMUX_CNTRL_PRESCALEMUX0 BIT(2) 79 #define ADC_ARB_USRP_AMUX_CNTRL_PRESCALEMUX1 BIT(3) 80 #define ADC_ARB_USRP_AMUX_CNTRL_SEL0 BIT(4) 81 #define ADC_ARB_USRP_AMUX_CNTRL_SEL1 BIT(5) 82 #define ADC_ARB_USRP_AMUX_CNTRL_SEL2 BIT(6) 83 #define ADC_ARB_USRP_AMUX_CNTRL_SEL3 BIT(7) 84 #define ADC_AMUX_PREMUX_SHIFT 2 85 #define ADC_AMUX_SEL_SHIFT 4 86 87 /* We know very little about the bits in this register */ 88 #define ADC_ARB_USRP_ANA_PARAM 0x199 89 #define ADC_ARB_USRP_ANA_PARAM_DIS 0xFE 90 #define ADC_ARB_USRP_ANA_PARAM_EN 0xFF 91 92 #define ADC_ARB_USRP_DIG_PARAM 0x19A 93 #define ADC_ARB_USRP_DIG_PARAM_SEL_SHIFT0 BIT(0) 94 #define ADC_ARB_USRP_DIG_PARAM_SEL_SHIFT1 BIT(1) 95 #define ADC_ARB_USRP_DIG_PARAM_CLK_RATE0 BIT(2) 96 #define ADC_ARB_USRP_DIG_PARAM_CLK_RATE1 BIT(3) 97 #define ADC_ARB_USRP_DIG_PARAM_EOC BIT(4) 98 /* 99 * On a later ADC the decimation factors are defined as 100 * 00 = 512, 01 = 1024, 10 = 2048, 11 = 4096 so assume this 101 * holds also for this older XOADC. 102 */ 103 #define ADC_ARB_USRP_DIG_PARAM_DEC_RATE0 BIT(5) 104 #define ADC_ARB_USRP_DIG_PARAM_DEC_RATE1 BIT(6) 105 #define ADC_ARB_USRP_DIG_PARAM_EN BIT(7) 106 #define ADC_DIG_PARAM_DEC_SHIFT 5 107 108 #define ADC_ARB_USRP_RSV 0x19B 109 #define ADC_ARB_USRP_RSV_RST BIT(0) 110 #define ADC_ARB_USRP_RSV_DTEST0 BIT(1) 111 #define ADC_ARB_USRP_RSV_DTEST1 BIT(2) 112 #define ADC_ARB_USRP_RSV_OP BIT(3) 113 #define ADC_ARB_USRP_RSV_IP_SEL0 BIT(4) 114 #define ADC_ARB_USRP_RSV_IP_SEL1 BIT(5) 115 #define ADC_ARB_USRP_RSV_IP_SEL2 BIT(6) 116 #define ADC_ARB_USRP_RSV_TRM BIT(7) 117 #define ADC_RSV_IP_SEL_SHIFT 4 118 119 #define ADC_ARB_USRP_DATA0 0x19D 120 #define ADC_ARB_USRP_DATA1 0x19C 121 122 /* 123 * Physical channels which MUST exist on all PM variants in order to provide 124 * proper reference points for calibration. 125 * 126 * @PM8XXX_CHANNEL_INTERNAL: 625mV reference channel 127 * @PM8XXX_CHANNEL_125V: 1250mV reference channel 128 * @PM8XXX_CHANNEL_INTERNAL_2: 325mV reference channel 129 * @PM8XXX_CHANNEL_MUXOFF: channel to reduce input load on mux, apparently also 130 * measures XO temperature 131 */ 132 #define PM8XXX_CHANNEL_INTERNAL 0x0c 133 #define PM8XXX_CHANNEL_125V 0x0d 134 #define PM8XXX_CHANNEL_INTERNAL_2 0x0e 135 #define PM8XXX_CHANNEL_MUXOFF 0x0f 136 137 /* 138 * PM8058 AMUX premux scaling, two bits. This is done of the channel before 139 * reaching the AMUX. 140 */ 141 #define PM8058_AMUX_PRESCALE_0 0x0 /* No scaling on the signal */ 142 #define PM8058_AMUX_PRESCALE_1 0x1 /* Unity scaling selected by the user */ 143 #define PM8058_AMUX_PRESCALE_1_DIV3 0x2 /* 1/3 prescaler on the input */ 144 145 /* Defines reference voltage for the XOADC */ 146 #define AMUX_RSV0 0x0 /* XO_IN/XOADC_GND, special selection to read XO temp */ 147 #define AMUX_RSV1 0x1 /* PMIC_IN/XOADC_GND */ 148 #define AMUX_RSV2 0x2 /* PMIC_IN/BMS_CSP */ 149 #define AMUX_RSV3 0x3 /* not used */ 150 #define AMUX_RSV4 0x4 /* XOADC_GND/XOADC_GND */ 151 #define AMUX_RSV5 0x5 /* XOADC_VREF/XOADC_GND */ 152 #define XOADC_RSV_MAX 5 /* 3 bits 0..7, 3 and 6,7 are invalid */ 153 154 /** 155 * struct xoadc_channel - encodes channel properties and defaults 156 * @datasheet_name: the hardwarename of this channel 157 * @pre_scale_mux: prescale (PM8058) or premux (PM8921) for selecting 158 * this channel. Both this and the amux channel is needed to uniquely 159 * identify a channel. Values 0..3. 160 * @amux_channel: value of the ADC_ARB_USRP_AMUX_CNTRL register for this 161 * channel, bits 4..7, selects the amux, values 0..f 162 * @prescale: the channels have hard-coded prescale ratios defined 163 * by the hardware, this tells us what it is 164 * @type: corresponding IIO channel type, usually IIO_VOLTAGE or 165 * IIO_TEMP 166 * @scale_fn_type: the liner interpolation etc to convert the 167 * ADC code to the value that IIO expects, in uV or millicelsius 168 * etc. This scale function can be pretty elaborate if different 169 * thermistors are connected or other hardware characteristics are 170 * deployed. 171 * @amux_ip_rsv: ratiometric scale value used by the analog muxer: this 172 * selects the reference voltage for ratiometric scaling 173 */ 174 struct xoadc_channel { 175 const char *datasheet_name; 176 u8 pre_scale_mux:2; 177 u8 amux_channel:4; 178 const struct vadc_prescale_ratio prescale; 179 enum iio_chan_type type; 180 enum vadc_scale_fn_type scale_fn_type; 181 u8 amux_ip_rsv:3; 182 }; 183 184 /** 185 * struct xoadc_variant - encodes the XOADC variant characteristics 186 * @name: name of this PMIC variant 187 * @channels: the hardware channels and respective settings and defaults 188 * @broken_ratiometric: if the PMIC has broken ratiometric scaling (this 189 * is a known problem on PM8058) 190 * @prescaling: this variant uses AMUX bits 2 & 3 for prescaling (PM8058) 191 * @second_level_mux: this variant uses AMUX bits 2 & 3 for a second level 192 * mux 193 */ 194 struct xoadc_variant { 195 const char name[16]; 196 const struct xoadc_channel *channels; 197 bool broken_ratiometric; 198 bool prescaling; 199 bool second_level_mux; 200 }; 201 202 /* 203 * XOADC_CHAN macro parameters: 204 * _dname: the name of the channel 205 * _presmux: prescaler (PM8058) or premux (PM8921) setting for this channel 206 * _amux: the value in bits 2..7 of the ADC_ARB_USRP_AMUX_CNTRL register 207 * for this channel. On some PMICs some of the bits select a prescaler, and 208 * on some PMICs some of the bits select various complex multiplex settings. 209 * _type: IIO channel type 210 * _prenum: prescaler numerator (dividend) 211 * _preden: prescaler denominator (divisor) 212 * _scale: scaling function type, this selects how the raw valued is mangled 213 * to output the actual processed measurement 214 * _amip: analog mux input parent when using ratiometric measurements 215 */ 216 #define XOADC_CHAN(_dname, _presmux, _amux, _type, _prenum, _preden, _scale, _amip) \ 217 { \ 218 .datasheet_name = __stringify(_dname), \ 219 .pre_scale_mux = _presmux, \ 220 .amux_channel = _amux, \ 221 .prescale = { .num = _prenum, .den = _preden }, \ 222 .type = _type, \ 223 .scale_fn_type = _scale, \ 224 .amux_ip_rsv = _amip, \ 225 } 226 227 /* 228 * Taken from arch/arm/mach-msm/board-9615.c in the vendor tree: 229 * TODO: incomplete, needs testing. 230 */ 231 static const struct xoadc_channel pm8018_xoadc_channels[] = { 232 XOADC_CHAN(VCOIN, 0x00, 0x00, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 233 XOADC_CHAN(VBAT, 0x00, 0x01, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 234 XOADC_CHAN(VPH_PWR, 0x00, 0x02, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 235 XOADC_CHAN(DIE_TEMP, 0x00, 0x0b, IIO_TEMP, 1, 1, SCALE_PMIC_THERM, AMUX_RSV1), 236 /* Used for battery ID or battery temperature */ 237 XOADC_CHAN(AMUX8, 0x00, 0x08, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV2), 238 XOADC_CHAN(INTERNAL, 0x00, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 239 XOADC_CHAN(125V, 0x00, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 240 XOADC_CHAN(MUXOFF, 0x00, 0x0f, IIO_TEMP, 1, 1, SCALE_XOTHERM, AMUX_RSV0), 241 { }, /* Sentinel */ 242 }; 243 244 /* 245 * Taken from arch/arm/mach-msm/board-8930-pmic.c in the vendor tree: 246 * TODO: needs testing. 247 */ 248 static const struct xoadc_channel pm8038_xoadc_channels[] = { 249 XOADC_CHAN(VCOIN, 0x00, 0x00, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 250 XOADC_CHAN(VBAT, 0x00, 0x01, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 251 XOADC_CHAN(DCIN, 0x00, 0x02, IIO_VOLTAGE, 1, 6, SCALE_DEFAULT, AMUX_RSV1), 252 XOADC_CHAN(ICHG, 0x00, 0x03, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 253 XOADC_CHAN(VPH_PWR, 0x00, 0x04, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 254 XOADC_CHAN(AMUX5, 0x00, 0x05, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 255 XOADC_CHAN(AMUX6, 0x00, 0x06, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 256 XOADC_CHAN(AMUX7, 0x00, 0x07, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 257 /* AMUX8 used for battery temperature in most cases */ 258 XOADC_CHAN(AMUX8, 0x00, 0x08, IIO_TEMP, 1, 1, SCALE_THERM_100K_PULLUP, AMUX_RSV2), 259 XOADC_CHAN(AMUX9, 0x00, 0x09, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 260 XOADC_CHAN(USB_VBUS, 0x00, 0x0a, IIO_VOLTAGE, 1, 4, SCALE_DEFAULT, AMUX_RSV1), 261 XOADC_CHAN(DIE_TEMP, 0x00, 0x0b, IIO_TEMP, 1, 1, SCALE_PMIC_THERM, AMUX_RSV1), 262 XOADC_CHAN(INTERNAL, 0x00, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 263 XOADC_CHAN(125V, 0x00, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 264 XOADC_CHAN(INTERNAL_2, 0x00, 0x0e, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 265 XOADC_CHAN(MUXOFF, 0x00, 0x0f, IIO_TEMP, 1, 1, SCALE_XOTHERM, AMUX_RSV0), 266 { }, /* Sentinel */ 267 }; 268 269 /* 270 * This was created by cross-referencing the vendor tree 271 * arch/arm/mach-msm/board-msm8x60.c msm_adc_channels_data[] 272 * with the "channel types" (first field) to find the right 273 * configuration for these channels on an MSM8x60 i.e. PM8058 274 * setup. 275 */ 276 static const struct xoadc_channel pm8058_xoadc_channels[] = { 277 XOADC_CHAN(VCOIN, 0x00, 0x00, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1), 278 XOADC_CHAN(VBAT, 0x00, 0x01, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 279 XOADC_CHAN(DCIN, 0x00, 0x02, IIO_VOLTAGE, 1, 10, SCALE_DEFAULT, AMUX_RSV1), 280 XOADC_CHAN(ICHG, 0x00, 0x03, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 281 XOADC_CHAN(VPH_PWR, 0x00, 0x04, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 282 /* 283 * AMUX channels 5 thru 9 are referred to as MPP5 thru MPP9 in 284 * some code and documentation. But they are really just 5 285 * channels just like any other. They are connected to a switching 286 * matrix where they can be routed to any of the MPPs, not just 287 * 1-to-1 onto MPP5 thru 9, so naming them MPP5 thru MPP9 is 288 * very confusing. 289 */ 290 XOADC_CHAN(AMUX5, 0x00, 0x05, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 291 XOADC_CHAN(AMUX6, 0x00, 0x06, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 292 XOADC_CHAN(AMUX7, 0x00, 0x07, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1), 293 XOADC_CHAN(AMUX8, 0x00, 0x08, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1), 294 XOADC_CHAN(AMUX9, 0x00, 0x09, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 295 XOADC_CHAN(USB_VBUS, 0x00, 0x0a, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 296 XOADC_CHAN(DIE_TEMP, 0x00, 0x0b, IIO_TEMP, 1, 1, SCALE_PMIC_THERM, AMUX_RSV1), 297 XOADC_CHAN(INTERNAL, 0x00, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 298 XOADC_CHAN(125V, 0x00, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 299 XOADC_CHAN(INTERNAL_2, 0x00, 0x0e, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 300 XOADC_CHAN(MUXOFF, 0x00, 0x0f, IIO_TEMP, 1, 1, SCALE_XOTHERM, AMUX_RSV0), 301 /* There are also "unity" and divided by 3 channels (prescaler) but noone is using them */ 302 { }, /* Sentinel */ 303 }; 304 305 /* 306 * The PM8921 has some pre-muxing on its channels, this comes from the vendor tree 307 * include/linux/mfd/pm8xxx/pm8xxx-adc.h 308 * board-flo-pmic.c (Nexus 7) and board-8064-pmic.c 309 */ 310 static const struct xoadc_channel pm8921_xoadc_channels[] = { 311 XOADC_CHAN(VCOIN, 0x00, 0x00, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 312 XOADC_CHAN(VBAT, 0x00, 0x01, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 313 XOADC_CHAN(DCIN, 0x00, 0x02, IIO_VOLTAGE, 1, 6, SCALE_DEFAULT, AMUX_RSV1), 314 /* channel "ICHG" is reserved and not used on PM8921 */ 315 XOADC_CHAN(VPH_PWR, 0x00, 0x04, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 316 XOADC_CHAN(IBAT, 0x00, 0x05, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 317 /* CHAN 6 & 7 (MPP1 & MPP2) are reserved for MPP channels on PM8921 */ 318 XOADC_CHAN(BATT_THERM, 0x00, 0x08, IIO_TEMP, 1, 1, SCALE_THERM_100K_PULLUP, AMUX_RSV1), 319 XOADC_CHAN(BATT_ID, 0x00, 0x09, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 320 XOADC_CHAN(USB_VBUS, 0x00, 0x0a, IIO_VOLTAGE, 1, 4, SCALE_DEFAULT, AMUX_RSV1), 321 XOADC_CHAN(DIE_TEMP, 0x00, 0x0b, IIO_TEMP, 1, 1, SCALE_PMIC_THERM, AMUX_RSV1), 322 XOADC_CHAN(INTERNAL, 0x00, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 323 XOADC_CHAN(125V, 0x00, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 324 /* FIXME: look into the scaling of this temperature */ 325 XOADC_CHAN(CHG_TEMP, 0x00, 0x0e, IIO_TEMP, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 326 XOADC_CHAN(MUXOFF, 0x00, 0x0f, IIO_TEMP, 1, 1, SCALE_XOTHERM, AMUX_RSV0), 327 /* The following channels have premux bit 0 set to 1 (all end in 4) */ 328 XOADC_CHAN(ATEST_8, 0x01, 0x00, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 329 /* Set scaling to 1/2 based on the name for these two */ 330 XOADC_CHAN(USB_SNS_DIV20, 0x01, 0x01, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1), 331 XOADC_CHAN(DCIN_SNS_DIV20, 0x01, 0x02, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1), 332 XOADC_CHAN(AMUX3, 0x01, 0x03, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 333 XOADC_CHAN(AMUX4, 0x01, 0x04, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 334 XOADC_CHAN(AMUX5, 0x01, 0x05, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 335 XOADC_CHAN(AMUX6, 0x01, 0x06, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 336 XOADC_CHAN(AMUX7, 0x01, 0x07, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 337 XOADC_CHAN(AMUX8, 0x01, 0x08, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 338 /* Internal test signals, I think */ 339 XOADC_CHAN(ATEST_1, 0x01, 0x09, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 340 XOADC_CHAN(ATEST_2, 0x01, 0x0a, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 341 XOADC_CHAN(ATEST_3, 0x01, 0x0b, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 342 XOADC_CHAN(ATEST_4, 0x01, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 343 XOADC_CHAN(ATEST_5, 0x01, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 344 XOADC_CHAN(ATEST_6, 0x01, 0x0e, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 345 XOADC_CHAN(ATEST_7, 0x01, 0x0f, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1), 346 /* The following channels have premux bit 1 set to 1 (all end in 8) */ 347 /* I guess even ATEST8 will be divided by 3 here */ 348 XOADC_CHAN(ATEST_8, 0x02, 0x00, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 349 /* I guess div 2 div 3 becomes div 6 */ 350 XOADC_CHAN(USB_SNS_DIV20_DIV3, 0x02, 0x01, IIO_VOLTAGE, 1, 6, SCALE_DEFAULT, AMUX_RSV1), 351 XOADC_CHAN(DCIN_SNS_DIV20_DIV3, 0x02, 0x02, IIO_VOLTAGE, 1, 6, SCALE_DEFAULT, AMUX_RSV1), 352 XOADC_CHAN(AMUX3_DIV3, 0x02, 0x03, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 353 XOADC_CHAN(AMUX4_DIV3, 0x02, 0x04, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 354 XOADC_CHAN(AMUX5_DIV3, 0x02, 0x05, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 355 XOADC_CHAN(AMUX6_DIV3, 0x02, 0x06, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 356 XOADC_CHAN(AMUX7_DIV3, 0x02, 0x07, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 357 XOADC_CHAN(AMUX8_DIV3, 0x02, 0x08, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 358 XOADC_CHAN(ATEST_1_DIV3, 0x02, 0x09, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 359 XOADC_CHAN(ATEST_2_DIV3, 0x02, 0x0a, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 360 XOADC_CHAN(ATEST_3_DIV3, 0x02, 0x0b, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 361 XOADC_CHAN(ATEST_4_DIV3, 0x02, 0x0c, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 362 XOADC_CHAN(ATEST_5_DIV3, 0x02, 0x0d, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 363 XOADC_CHAN(ATEST_6_DIV3, 0x02, 0x0e, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 364 XOADC_CHAN(ATEST_7_DIV3, 0x02, 0x0f, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1), 365 { }, /* Sentinel */ 366 }; 367 368 /** 369 * struct pm8xxx_chan_info - ADC channel information 370 * @name: name of this channel 371 * @hwchan: pointer to hardware channel information (muxing & scaling settings) 372 * @calibration: whether to use absolute or ratiometric calibration 373 * @scale_fn_type: scaling function type 374 * @decimation: 0,1,2,3 375 * @amux_ip_rsv: ratiometric scale value if using ratiometric 376 * calibration: 0, 1, 2, 4, 5. 377 */ 378 struct pm8xxx_chan_info { 379 const char *name; 380 const struct xoadc_channel *hwchan; 381 enum vadc_calibration calibration; 382 u8 decimation:2; 383 u8 amux_ip_rsv:3; 384 }; 385 386 /** 387 * struct pm8xxx_xoadc - state container for the XOADC 388 * @dev: pointer to device 389 * @map: regmap to access registers 390 * @variant: XOADC variant characteristics 391 * @vref: reference voltage regulator 392 * characteristics of the channels, and sensible default settings 393 * @nchans: number of channels, configured by the device tree 394 * @chans: the channel information per-channel, configured by the device tree 395 * @iio_chans: IIO channel specifiers 396 * @graph: linear calibration parameters for absolute and 397 * ratiometric measurements 398 * @complete: completion to indicate end of conversion 399 * @lock: lock to restrict access to the hardware to one client at the time 400 */ 401 struct pm8xxx_xoadc { 402 struct device *dev; 403 struct regmap *map; 404 const struct xoadc_variant *variant; 405 struct regulator *vref; 406 unsigned int nchans; 407 struct pm8xxx_chan_info *chans; 408 struct iio_chan_spec *iio_chans; 409 struct vadc_linear_graph graph[2]; 410 struct completion complete; 411 struct mutex lock; 412 }; 413 414 static irqreturn_t pm8xxx_eoc_irq(int irq, void *d) 415 { 416 struct iio_dev *indio_dev = d; 417 struct pm8xxx_xoadc *adc = iio_priv(indio_dev); 418 419 complete(&adc->complete); 420 421 return IRQ_HANDLED; 422 } 423 424 static struct pm8xxx_chan_info * 425 pm8xxx_get_channel(struct pm8xxx_xoadc *adc, u8 chan) 426 { 427 int i; 428 429 for (i = 0; i < adc->nchans; i++) { 430 struct pm8xxx_chan_info *ch = &adc->chans[i]; 431 if (ch->hwchan->amux_channel == chan) 432 return ch; 433 } 434 return NULL; 435 } 436 437 static int pm8xxx_read_channel_rsv(struct pm8xxx_xoadc *adc, 438 const struct pm8xxx_chan_info *ch, 439 u8 rsv, u16 *adc_code, 440 bool force_ratiometric) 441 { 442 int ret; 443 unsigned int val; 444 u8 rsvmask, rsvval; 445 u8 lsb, msb; 446 447 dev_dbg(adc->dev, "read channel \"%s\", amux %d, prescale/mux: %d, rsv %d\n", 448 ch->name, ch->hwchan->amux_channel, ch->hwchan->pre_scale_mux, rsv); 449 450 mutex_lock(&adc->lock); 451 452 /* Mux in this channel */ 453 val = ch->hwchan->amux_channel << ADC_AMUX_SEL_SHIFT; 454 val |= ch->hwchan->pre_scale_mux << ADC_AMUX_PREMUX_SHIFT; 455 ret = regmap_write(adc->map, ADC_ARB_USRP_AMUX_CNTRL, val); 456 if (ret) 457 goto unlock; 458 459 /* Set up ratiometric scale value, mask off all bits except these */ 460 rsvmask = (ADC_ARB_USRP_RSV_RST | ADC_ARB_USRP_RSV_DTEST0 | 461 ADC_ARB_USRP_RSV_DTEST1 | ADC_ARB_USRP_RSV_OP); 462 if (adc->variant->broken_ratiometric && !force_ratiometric) { 463 /* 464 * Apparently the PM8058 has some kind of bug which is 465 * reflected in the vendor tree drivers/misc/pmix8058-xoadc.c 466 * which just hardcodes the RSV selector to SEL1 (0x20) for 467 * most cases and SEL0 (0x10) for the MUXOFF channel only. 468 * If we force ratiometric (currently only done when attempting 469 * to do ratiometric calibration) this doesn't seem to work 470 * very well and I suspect ratiometric conversion is simply 471 * broken or not supported on the PM8058. 472 * 473 * Maybe IO_SEL2 doesn't exist on PM8058 and bits 4 & 5 select 474 * the mode alone. 475 * 476 * Some PM8058 register documentation would be nice to get 477 * this right. 478 */ 479 if (ch->hwchan->amux_channel == PM8XXX_CHANNEL_MUXOFF) 480 rsvval = ADC_ARB_USRP_RSV_IP_SEL0; 481 else 482 rsvval = ADC_ARB_USRP_RSV_IP_SEL1; 483 } else { 484 if (rsv == 0xff) 485 rsvval = (ch->amux_ip_rsv << ADC_RSV_IP_SEL_SHIFT) | 486 ADC_ARB_USRP_RSV_TRM; 487 else 488 rsvval = (rsv << ADC_RSV_IP_SEL_SHIFT) | 489 ADC_ARB_USRP_RSV_TRM; 490 } 491 492 ret = regmap_update_bits(adc->map, 493 ADC_ARB_USRP_RSV, 494 ~rsvmask, 495 rsvval); 496 if (ret) 497 goto unlock; 498 499 ret = regmap_write(adc->map, ADC_ARB_USRP_ANA_PARAM, 500 ADC_ARB_USRP_ANA_PARAM_DIS); 501 if (ret) 502 goto unlock; 503 504 /* Decimation factor */ 505 ret = regmap_write(adc->map, ADC_ARB_USRP_DIG_PARAM, 506 ADC_ARB_USRP_DIG_PARAM_SEL_SHIFT0 | 507 ADC_ARB_USRP_DIG_PARAM_SEL_SHIFT1 | 508 ch->decimation << ADC_DIG_PARAM_DEC_SHIFT); 509 if (ret) 510 goto unlock; 511 512 ret = regmap_write(adc->map, ADC_ARB_USRP_ANA_PARAM, 513 ADC_ARB_USRP_ANA_PARAM_EN); 514 if (ret) 515 goto unlock; 516 517 /* Enable the arbiter, the Qualcomm code does it twice like this */ 518 ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL, 519 ADC_ARB_USRP_CNTRL_EN_ARB); 520 if (ret) 521 goto unlock; 522 ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL, 523 ADC_ARB_USRP_CNTRL_EN_ARB); 524 if (ret) 525 goto unlock; 526 527 528 /* Fire a request! */ 529 reinit_completion(&adc->complete); 530 ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL, 531 ADC_ARB_USRP_CNTRL_EN_ARB | 532 ADC_ARB_USRP_CNTRL_REQ); 533 if (ret) 534 goto unlock; 535 536 /* Next the interrupt occurs */ 537 ret = wait_for_completion_timeout(&adc->complete, 538 VADC_CONV_TIME_MAX_US); 539 if (!ret) { 540 dev_err(adc->dev, "conversion timed out\n"); 541 ret = -ETIMEDOUT; 542 goto unlock; 543 } 544 545 ret = regmap_read(adc->map, ADC_ARB_USRP_DATA0, &val); 546 if (ret) 547 goto unlock; 548 lsb = val; 549 ret = regmap_read(adc->map, ADC_ARB_USRP_DATA1, &val); 550 if (ret) 551 goto unlock; 552 msb = val; 553 *adc_code = (msb << 8) | lsb; 554 555 /* Turn off the ADC by setting the arbiter to 0 twice */ 556 ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL, 0); 557 if (ret) 558 goto unlock; 559 ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL, 0); 560 if (ret) 561 goto unlock; 562 563 unlock: 564 mutex_unlock(&adc->lock); 565 return ret; 566 } 567 568 static int pm8xxx_read_channel(struct pm8xxx_xoadc *adc, 569 const struct pm8xxx_chan_info *ch, 570 u16 *adc_code) 571 { 572 /* 573 * Normally we just use the ratiometric scale value (RSV) predefined 574 * for the channel, but during calibration we need to modify this 575 * so this wrapper is a helper hiding the more complex version. 576 */ 577 return pm8xxx_read_channel_rsv(adc, ch, 0xff, adc_code, false); 578 } 579 580 static int pm8xxx_calibrate_device(struct pm8xxx_xoadc *adc) 581 { 582 const struct pm8xxx_chan_info *ch; 583 u16 read_1250v; 584 u16 read_0625v; 585 u16 read_nomux_rsv5; 586 u16 read_nomux_rsv4; 587 int ret; 588 589 adc->graph[VADC_CALIB_ABSOLUTE].dx = VADC_ABSOLUTE_RANGE_UV; 590 adc->graph[VADC_CALIB_RATIOMETRIC].dx = VADC_RATIOMETRIC_RANGE; 591 592 /* Common reference channel calibration */ 593 ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_125V); 594 if (!ch) 595 return -ENODEV; 596 ret = pm8xxx_read_channel(adc, ch, &read_1250v); 597 if (ret) { 598 dev_err(adc->dev, "could not read 1.25V reference channel\n"); 599 return -ENODEV; 600 } 601 ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_INTERNAL); 602 if (!ch) 603 return -ENODEV; 604 ret = pm8xxx_read_channel(adc, ch, &read_0625v); 605 if (ret) { 606 dev_err(adc->dev, "could not read 0.625V reference channel\n"); 607 return -ENODEV; 608 } 609 if (read_1250v == read_0625v) { 610 dev_err(adc->dev, "read same ADC code for 1.25V and 0.625V\n"); 611 return -ENODEV; 612 } 613 614 adc->graph[VADC_CALIB_ABSOLUTE].dy = read_1250v - read_0625v; 615 adc->graph[VADC_CALIB_ABSOLUTE].gnd = read_0625v; 616 617 dev_info(adc->dev, "absolute calibration dx = %d uV, dy = %d units\n", 618 VADC_ABSOLUTE_RANGE_UV, adc->graph[VADC_CALIB_ABSOLUTE].dy); 619 620 /* Ratiometric calibration */ 621 ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_MUXOFF); 622 if (!ch) 623 return -ENODEV; 624 ret = pm8xxx_read_channel_rsv(adc, ch, AMUX_RSV5, 625 &read_nomux_rsv5, true); 626 if (ret) { 627 dev_err(adc->dev, "could not read MUXOFF reference channel\n"); 628 return -ENODEV; 629 } 630 ret = pm8xxx_read_channel_rsv(adc, ch, AMUX_RSV4, 631 &read_nomux_rsv4, true); 632 if (ret) { 633 dev_err(adc->dev, "could not read MUXOFF reference channel\n"); 634 return -ENODEV; 635 } 636 adc->graph[VADC_CALIB_RATIOMETRIC].dy = 637 read_nomux_rsv5 - read_nomux_rsv4; 638 adc->graph[VADC_CALIB_RATIOMETRIC].gnd = read_nomux_rsv4; 639 640 dev_info(adc->dev, "ratiometric calibration dx = %d, dy = %d units\n", 641 VADC_RATIOMETRIC_RANGE, 642 adc->graph[VADC_CALIB_RATIOMETRIC].dy); 643 644 return 0; 645 } 646 647 static int pm8xxx_read_raw(struct iio_dev *indio_dev, 648 struct iio_chan_spec const *chan, 649 int *val, int *val2, long mask) 650 { 651 struct pm8xxx_xoadc *adc = iio_priv(indio_dev); 652 const struct pm8xxx_chan_info *ch; 653 u16 adc_code; 654 int ret; 655 656 switch (mask) { 657 case IIO_CHAN_INFO_PROCESSED: 658 ch = pm8xxx_get_channel(adc, chan->address); 659 if (!ch) { 660 dev_err(adc->dev, "no such channel %lu\n", 661 chan->address); 662 return -EINVAL; 663 } 664 ret = pm8xxx_read_channel(adc, ch, &adc_code); 665 if (ret) 666 return ret; 667 668 ret = qcom_vadc_scale(ch->hwchan->scale_fn_type, 669 &adc->graph[ch->calibration], 670 &ch->hwchan->prescale, 671 (ch->calibration == VADC_CALIB_ABSOLUTE), 672 adc_code, val); 673 if (ret) 674 return ret; 675 676 return IIO_VAL_INT; 677 case IIO_CHAN_INFO_RAW: 678 ch = pm8xxx_get_channel(adc, chan->address); 679 if (!ch) { 680 dev_err(adc->dev, "no such channel %lu\n", 681 chan->address); 682 return -EINVAL; 683 } 684 ret = pm8xxx_read_channel(adc, ch, &adc_code); 685 if (ret) 686 return ret; 687 688 *val = (int)adc_code; 689 return IIO_VAL_INT; 690 default: 691 return -EINVAL; 692 } 693 } 694 695 static int pm8xxx_of_xlate(struct iio_dev *indio_dev, 696 const struct of_phandle_args *iiospec) 697 { 698 struct pm8xxx_xoadc *adc = iio_priv(indio_dev); 699 u8 pre_scale_mux; 700 u8 amux_channel; 701 unsigned int i; 702 703 /* 704 * First cell is prescaler or premux, second cell is analog 705 * mux. 706 */ 707 if (iiospec->args_count != 2) { 708 dev_err(&indio_dev->dev, "wrong number of arguments for %pOFn need 2 got %d\n", 709 iiospec->np, 710 iiospec->args_count); 711 return -EINVAL; 712 } 713 pre_scale_mux = (u8)iiospec->args[0]; 714 amux_channel = (u8)iiospec->args[1]; 715 dev_dbg(&indio_dev->dev, "pre scale/mux: %02x, amux: %02x\n", 716 pre_scale_mux, amux_channel); 717 718 /* We need to match exactly on the prescale/premux and channel */ 719 for (i = 0; i < adc->nchans; i++) 720 if (adc->chans[i].hwchan->pre_scale_mux == pre_scale_mux && 721 adc->chans[i].hwchan->amux_channel == amux_channel) 722 return i; 723 724 return -EINVAL; 725 } 726 727 static const struct iio_info pm8xxx_xoadc_info = { 728 .of_xlate = pm8xxx_of_xlate, 729 .read_raw = pm8xxx_read_raw, 730 }; 731 732 static int pm8xxx_xoadc_parse_channel(struct device *dev, 733 struct device_node *np, 734 const struct xoadc_channel *hw_channels, 735 struct iio_chan_spec *iio_chan, 736 struct pm8xxx_chan_info *ch) 737 { 738 const char *name = np->name; 739 const struct xoadc_channel *hwchan; 740 u32 pre_scale_mux, amux_channel; 741 u32 rsv, dec; 742 int ret; 743 int chid; 744 745 ret = of_property_read_u32_index(np, "reg", 0, &pre_scale_mux); 746 if (ret) { 747 dev_err(dev, "invalid pre scale/mux number %s\n", name); 748 return ret; 749 } 750 ret = of_property_read_u32_index(np, "reg", 1, &amux_channel); 751 if (ret) { 752 dev_err(dev, "invalid amux channel number %s\n", name); 753 return ret; 754 } 755 756 /* Find the right channel setting */ 757 chid = 0; 758 hwchan = &hw_channels[0]; 759 while (hwchan && hwchan->datasheet_name) { 760 if (hwchan->pre_scale_mux == pre_scale_mux && 761 hwchan->amux_channel == amux_channel) 762 break; 763 hwchan++; 764 chid++; 765 } 766 /* The sentinel does not have a name assigned */ 767 if (!hwchan->datasheet_name) { 768 dev_err(dev, "could not locate channel %02x/%02x\n", 769 pre_scale_mux, amux_channel); 770 return -EINVAL; 771 } 772 ch->name = name; 773 ch->hwchan = hwchan; 774 /* Everyone seems to use absolute calibration except in special cases */ 775 ch->calibration = VADC_CALIB_ABSOLUTE; 776 /* Everyone seems to use default ("type 2") decimation */ 777 ch->decimation = VADC_DEF_DECIMATION; 778 779 if (!of_property_read_u32(np, "qcom,ratiometric", &rsv)) { 780 ch->calibration = VADC_CALIB_RATIOMETRIC; 781 if (rsv > XOADC_RSV_MAX) { 782 dev_err(dev, "%s too large RSV value %d\n", name, rsv); 783 return -EINVAL; 784 } 785 if (rsv == AMUX_RSV3) { 786 dev_err(dev, "%s invalid RSV value %d\n", name, rsv); 787 return -EINVAL; 788 } 789 } 790 791 /* Optional decimation, if omitted we use the default */ 792 ret = of_property_read_u32(np, "qcom,decimation", &dec); 793 if (!ret) { 794 ret = qcom_vadc_decimation_from_dt(dec); 795 if (ret < 0) { 796 dev_err(dev, "%s invalid decimation %d\n", 797 name, dec); 798 return ret; 799 } 800 ch->decimation = ret; 801 } 802 803 iio_chan->channel = chid; 804 iio_chan->address = hwchan->amux_channel; 805 iio_chan->datasheet_name = hwchan->datasheet_name; 806 iio_chan->type = hwchan->type; 807 /* All channels are raw or processed */ 808 iio_chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 809 BIT(IIO_CHAN_INFO_PROCESSED); 810 iio_chan->indexed = 1; 811 812 dev_dbg(dev, "channel [PRESCALE/MUX: %02x AMUX: %02x] \"%s\" " 813 "ref voltage: %d, decimation %d " 814 "prescale %d/%d, scale function %d\n", 815 hwchan->pre_scale_mux, hwchan->amux_channel, ch->name, 816 ch->amux_ip_rsv, ch->decimation, hwchan->prescale.num, 817 hwchan->prescale.den, hwchan->scale_fn_type); 818 819 return 0; 820 } 821 822 static int pm8xxx_xoadc_parse_channels(struct pm8xxx_xoadc *adc, 823 struct device_node *np) 824 { 825 struct device_node *child; 826 struct pm8xxx_chan_info *ch; 827 int ret; 828 int i; 829 830 adc->nchans = of_get_available_child_count(np); 831 if (!adc->nchans) { 832 dev_err(adc->dev, "no channel children\n"); 833 return -ENODEV; 834 } 835 dev_dbg(adc->dev, "found %d ADC channels\n", adc->nchans); 836 837 adc->iio_chans = devm_kcalloc(adc->dev, adc->nchans, 838 sizeof(*adc->iio_chans), GFP_KERNEL); 839 if (!adc->iio_chans) 840 return -ENOMEM; 841 842 adc->chans = devm_kcalloc(adc->dev, adc->nchans, 843 sizeof(*adc->chans), GFP_KERNEL); 844 if (!adc->chans) 845 return -ENOMEM; 846 847 i = 0; 848 for_each_available_child_of_node(np, child) { 849 ch = &adc->chans[i]; 850 ret = pm8xxx_xoadc_parse_channel(adc->dev, child, 851 adc->variant->channels, 852 &adc->iio_chans[i], 853 ch); 854 if (ret) { 855 of_node_put(child); 856 return ret; 857 } 858 i++; 859 } 860 861 /* Check for required channels */ 862 ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_125V); 863 if (!ch) { 864 dev_err(adc->dev, "missing 1.25V reference channel\n"); 865 return -ENODEV; 866 } 867 ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_INTERNAL); 868 if (!ch) { 869 dev_err(adc->dev, "missing 0.625V reference channel\n"); 870 return -ENODEV; 871 } 872 ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_MUXOFF); 873 if (!ch) { 874 dev_err(adc->dev, "missing MUXOFF reference channel\n"); 875 return -ENODEV; 876 } 877 878 return 0; 879 } 880 881 static int pm8xxx_xoadc_probe(struct platform_device *pdev) 882 { 883 const struct xoadc_variant *variant; 884 struct pm8xxx_xoadc *adc; 885 struct iio_dev *indio_dev; 886 struct device_node *np = pdev->dev.of_node; 887 struct regmap *map; 888 struct device *dev = &pdev->dev; 889 int ret; 890 891 variant = of_device_get_match_data(dev); 892 if (!variant) 893 return -ENODEV; 894 895 indio_dev = devm_iio_device_alloc(dev, sizeof(*adc)); 896 if (!indio_dev) 897 return -ENOMEM; 898 platform_set_drvdata(pdev, indio_dev); 899 900 adc = iio_priv(indio_dev); 901 adc->dev = dev; 902 adc->variant = variant; 903 init_completion(&adc->complete); 904 mutex_init(&adc->lock); 905 906 ret = pm8xxx_xoadc_parse_channels(adc, np); 907 if (ret) 908 return ret; 909 910 map = dev_get_regmap(dev->parent, NULL); 911 if (!map) { 912 dev_err(dev, "parent regmap unavailable.\n"); 913 return -ENODEV; 914 } 915 adc->map = map; 916 917 /* Bring up regulator */ 918 adc->vref = devm_regulator_get(dev, "xoadc-ref"); 919 if (IS_ERR(adc->vref)) 920 return dev_err_probe(dev, PTR_ERR(adc->vref), 921 "failed to get XOADC VREF regulator\n"); 922 ret = regulator_enable(adc->vref); 923 if (ret) { 924 dev_err(dev, "failed to enable XOADC VREF regulator\n"); 925 return ret; 926 } 927 928 ret = devm_request_threaded_irq(dev, platform_get_irq(pdev, 0), 929 pm8xxx_eoc_irq, NULL, 0, variant->name, indio_dev); 930 if (ret) { 931 dev_err(dev, "unable to request IRQ\n"); 932 goto out_disable_vref; 933 } 934 935 indio_dev->name = variant->name; 936 indio_dev->modes = INDIO_DIRECT_MODE; 937 indio_dev->info = &pm8xxx_xoadc_info; 938 indio_dev->channels = adc->iio_chans; 939 indio_dev->num_channels = adc->nchans; 940 941 ret = iio_device_register(indio_dev); 942 if (ret) 943 goto out_disable_vref; 944 945 ret = pm8xxx_calibrate_device(adc); 946 if (ret) 947 goto out_unreg_device; 948 949 dev_info(dev, "%s XOADC driver enabled\n", variant->name); 950 951 return 0; 952 953 out_unreg_device: 954 iio_device_unregister(indio_dev); 955 out_disable_vref: 956 regulator_disable(adc->vref); 957 958 return ret; 959 } 960 961 static int pm8xxx_xoadc_remove(struct platform_device *pdev) 962 { 963 struct iio_dev *indio_dev = platform_get_drvdata(pdev); 964 struct pm8xxx_xoadc *adc = iio_priv(indio_dev); 965 966 iio_device_unregister(indio_dev); 967 968 regulator_disable(adc->vref); 969 970 return 0; 971 } 972 973 static const struct xoadc_variant pm8018_variant = { 974 .name = "PM8018-XOADC", 975 .channels = pm8018_xoadc_channels, 976 }; 977 978 static const struct xoadc_variant pm8038_variant = { 979 .name = "PM8038-XOADC", 980 .channels = pm8038_xoadc_channels, 981 }; 982 983 static const struct xoadc_variant pm8058_variant = { 984 .name = "PM8058-XOADC", 985 .channels = pm8058_xoadc_channels, 986 .broken_ratiometric = true, 987 .prescaling = true, 988 }; 989 990 static const struct xoadc_variant pm8921_variant = { 991 .name = "PM8921-XOADC", 992 .channels = pm8921_xoadc_channels, 993 .second_level_mux = true, 994 }; 995 996 static const struct of_device_id pm8xxx_xoadc_id_table[] = { 997 { 998 .compatible = "qcom,pm8018-adc", 999 .data = &pm8018_variant, 1000 }, 1001 { 1002 .compatible = "qcom,pm8038-adc", 1003 .data = &pm8038_variant, 1004 }, 1005 { 1006 .compatible = "qcom,pm8058-adc", 1007 .data = &pm8058_variant, 1008 }, 1009 { 1010 .compatible = "qcom,pm8921-adc", 1011 .data = &pm8921_variant, 1012 }, 1013 { }, 1014 }; 1015 MODULE_DEVICE_TABLE(of, pm8xxx_xoadc_id_table); 1016 1017 static struct platform_driver pm8xxx_xoadc_driver = { 1018 .driver = { 1019 .name = "pm8xxx-adc", 1020 .of_match_table = pm8xxx_xoadc_id_table, 1021 }, 1022 .probe = pm8xxx_xoadc_probe, 1023 .remove = pm8xxx_xoadc_remove, 1024 }; 1025 module_platform_driver(pm8xxx_xoadc_driver); 1026 1027 MODULE_DESCRIPTION("PM8xxx XOADC driver"); 1028 MODULE_LICENSE("GPL v2"); 1029 MODULE_ALIAS("platform:pm8xxx-xoadc"); 1030