1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * IIO driver for PAC1934 Multi-Channel DC Power/Energy Monitor 4 * 5 * Copyright (C) 2017-2024 Microchip Technology Inc. and its subsidiaries 6 * 7 * Author: Bogdan Bolocan <bogdan.bolocan@microchip.com> 8 * Author: Victor Tudose 9 * Author: Marius Cristea <marius.cristea@microchip.com> 10 * 11 * Datasheet for PAC1931, PAC1932, PAC1933 and PAC1934 can be found here: 12 * https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/DataSheets/PAC1931-Family-Data-Sheet-DS20005850E.pdf 13 */ 14 15 #include <linux/acpi.h> 16 #include <linux/bitfield.h> 17 #include <linux/delay.h> 18 #include <linux/device.h> 19 #include <linux/i2c.h> 20 #include <linux/iio/iio.h> 21 #include <linux/iio/sysfs.h> 22 #include <linux/unaligned.h> 23 24 /* 25 * maximum accumulation time should be (17 * 60 * 1000) around 17 minutes@1024 sps 26 * till PAC1934 accumulation registers starts to saturate 27 */ 28 #define PAC1934_MAX_RFSH_LIMIT_MS 60000 29 /* 50msec is the timeout for validity of the cached registers */ 30 #define PAC1934_MIN_POLLING_TIME_MS 50 31 /* 32 * 1000usec is the minimum wait time for normal conversions when sample 33 * rate doesn't change 34 */ 35 #define PAC1934_MIN_UPDATE_WAIT_TIME_US 1000 36 37 /* 32000mV */ 38 #define PAC1934_VOLTAGE_MILLIVOLTS_MAX 32000 39 /* voltage bits resolution when set for unsigned values */ 40 #define PAC1934_VOLTAGE_U_RES 16 41 /* voltage bits resolution when set for signed values */ 42 #define PAC1934_VOLTAGE_S_RES 15 43 44 /* 45 * max signed value that can be stored on 32 bits and 8 digits fractional value 46 * (2^31 - 1) * 10^8 + 99999999 47 */ 48 #define PAC_193X_MAX_POWER_ACC 214748364799999999LL 49 /* 50 * min signed value that can be stored on 32 bits and 8 digits fractional value 51 * -(2^31) * 10^8 - 99999999 52 */ 53 #define PAC_193X_MIN_POWER_ACC -214748364899999999LL 54 55 #define PAC1934_MAX_NUM_CHANNELS 4 56 57 #define PAC1934_MEAS_REG_LEN 76 58 #define PAC1934_CTRL_REG_LEN 12 59 60 #define PAC1934_DEFAULT_CHIP_SAMP_SPEED_HZ 1024 61 62 /* I2C address map */ 63 #define PAC1934_REFRESH_REG_ADDR 0x00 64 #define PAC1934_CTRL_REG_ADDR 0x01 65 #define PAC1934_ACC_COUNT_REG_ADDR 0x02 66 #define PAC1934_VPOWER_ACC_1_ADDR 0x03 67 #define PAC1934_VPOWER_ACC_2_ADDR 0x04 68 #define PAC1934_VPOWER_ACC_3_ADDR 0x05 69 #define PAC1934_VPOWER_ACC_4_ADDR 0x06 70 #define PAC1934_VBUS_1_ADDR 0x07 71 #define PAC1934_VBUS_2_ADDR 0x08 72 #define PAC1934_VBUS_3_ADDR 0x09 73 #define PAC1934_VBUS_4_ADDR 0x0A 74 #define PAC1934_VSENSE_1_ADDR 0x0B 75 #define PAC1934_VSENSE_2_ADDR 0x0C 76 #define PAC1934_VSENSE_3_ADDR 0x0D 77 #define PAC1934_VSENSE_4_ADDR 0x0E 78 #define PAC1934_VBUS_AVG_1_ADDR 0x0F 79 #define PAC1934_VBUS_AVG_2_ADDR 0x10 80 #define PAC1934_VBUS_AVG_3_ADDR 0x11 81 #define PAC1934_VBUS_AVG_4_ADDR 0x12 82 #define PAC1934_VSENSE_AVG_1_ADDR 0x13 83 #define PAC1934_VSENSE_AVG_2_ADDR 0x14 84 #define PAC1934_VSENSE_AVG_3_ADDR 0x15 85 #define PAC1934_VSENSE_AVG_4_ADDR 0x16 86 #define PAC1934_VPOWER_1_ADDR 0x17 87 #define PAC1934_VPOWER_2_ADDR 0x18 88 #define PAC1934_VPOWER_3_ADDR 0x19 89 #define PAC1934_VPOWER_4_ADDR 0x1A 90 #define PAC1934_REFRESH_V_REG_ADDR 0x1F 91 #define PAC1934_CTRL_STAT_REGS_ADDR 0x1C 92 #define PAC1934_PID_REG_ADDR 0xFD 93 #define PAC1934_MID_REG_ADDR 0xFE 94 #define PAC1934_RID_REG_ADDR 0xFF 95 96 /* PRODUCT ID REGISTER + MANUFACTURER ID REGISTER + REVISION ID REGISTER */ 97 #define PAC1934_ID_REG_LEN 3 98 #define PAC1934_PID_IDX 0 99 #define PAC1934_MID_IDX 1 100 #define PAC1934_RID_IDX 2 101 102 #define PAC1934_ACPI_GET_NAMES_AND_MOHMS_VALS 1 103 #define PAC1934_ACPI_GET_UOHMS_VALS 2 104 #define PAC1934_ACPI_GET_BIPOLAR_SETTINGS 4 105 #define PAC1934_ACPI_GET_SAMP 5 106 107 #define PAC1934_SAMPLE_RATE_SHIFT 6 108 109 #define PAC1934_VBUS_SENSE_REG_LEN 2 110 #define PAC1934_ACC_REG_LEN 3 111 #define PAC1934_VPOWER_REG_LEN 4 112 #define PAC1934_VPOWER_ACC_REG_LEN 6 113 #define PAC1934_MAX_REGISTER_LENGTH 6 114 115 #define PAC1934_CUSTOM_ATTR_FOR_CHANNEL 1 116 117 /* 118 * relative offsets when using multi-byte reads/writes even though these 119 * bytes are read one after the other, they are not at adjacent memory 120 * locations within the I2C memory map. The chip can skip some addresses 121 */ 122 #define PAC1934_CHANNEL_DIS_REG_OFF 0 123 #define PAC1934_NEG_PWR_REG_OFF 1 124 125 /* 126 * when reading/writing multiple bytes from offset PAC1934_CHANNEL_DIS_REG_OFF, 127 * the chip jumps over the 0x1E (REFRESH_G) and 0x1F (REFRESH_V) offsets 128 */ 129 #define PAC1934_SLOW_REG_OFF 2 130 #define PAC1934_CTRL_ACT_REG_OFF 3 131 #define PAC1934_CHANNEL_DIS_ACT_REG_OFF 4 132 #define PAC1934_NEG_PWR_ACT_REG_OFF 5 133 #define PAC1934_CTRL_LAT_REG_OFF 6 134 #define PAC1934_CHANNEL_DIS_LAT_REG_OFF 7 135 #define PAC1934_NEG_PWR_LAT_REG_OFF 8 136 #define PAC1934_PID_REG_OFF 9 137 #define PAC1934_MID_REG_OFF 10 138 #define PAC1934_REV_REG_OFF 11 139 #define PAC1934_CTRL_STATUS_INFO_LEN 12 140 141 #define PAC1934_MID 0x5D 142 #define PAC1931_PID 0x58 143 #define PAC1932_PID 0x59 144 #define PAC1933_PID 0x5A 145 #define PAC1934_PID 0x5B 146 147 /* Scale constant = (10^3 * 3.2 * 10^9 / 2^28) for mili Watt-second */ 148 #define PAC1934_SCALE_CONSTANT 11921 149 150 #define PAC1934_MAX_VPOWER_RSHIFTED_BY_28B 11921 151 #define PAC1934_MAX_VSENSE_RSHIFTED_BY_16B 1525 152 153 #define PAC1934_DEV_ATTR(name) (&iio_dev_attr_##name.dev_attr.attr) 154 155 #define PAC1934_CRTL_SAMPLE_RATE_MASK GENMASK(7, 6) 156 #define PAC1934_CHAN_SLEEP_MASK BIT(5) 157 #define PAC1934_CHAN_SLEEP_SET BIT(5) 158 #define PAC1934_CHAN_SINGLE_MASK BIT(4) 159 #define PAC1934_CHAN_SINGLE_SHOT_SET BIT(4) 160 #define PAC1934_CHAN_ALERT_MASK BIT(3) 161 #define PAC1934_CHAN_ALERT_EN BIT(3) 162 #define PAC1934_CHAN_ALERT_CC_MASK BIT(2) 163 #define PAC1934_CHAN_ALERT_CC_EN BIT(2) 164 #define PAC1934_CHAN_OVF_ALERT_MASK BIT(1) 165 #define PAC1934_CHAN_OVF_ALERT_EN BIT(1) 166 #define PAC1934_CHAN_OVF_MASK BIT(0) 167 168 #define PAC1934_CHAN_DIS_CH1_OFF_MASK BIT(7) 169 #define PAC1934_CHAN_DIS_CH2_OFF_MASK BIT(6) 170 #define PAC1934_CHAN_DIS_CH3_OFF_MASK BIT(5) 171 #define PAC1934_CHAN_DIS_CH4_OFF_MASK BIT(4) 172 #define PAC1934_SMBUS_TIMEOUT_MASK BIT(3) 173 #define PAC1934_SMBUS_BYTECOUNT_MASK BIT(2) 174 #define PAC1934_SMBUS_NO_SKIP_MASK BIT(1) 175 176 #define PAC1934_NEG_PWR_CH1_BIDI_MASK BIT(7) 177 #define PAC1934_NEG_PWR_CH2_BIDI_MASK BIT(6) 178 #define PAC1934_NEG_PWR_CH3_BIDI_MASK BIT(5) 179 #define PAC1934_NEG_PWR_CH4_BIDI_MASK BIT(4) 180 #define PAC1934_NEG_PWR_CH1_BIDV_MASK BIT(3) 181 #define PAC1934_NEG_PWR_CH2_BIDV_MASK BIT(2) 182 #define PAC1934_NEG_PWR_CH3_BIDV_MASK BIT(1) 183 #define PAC1934_NEG_PWR_CH4_BIDV_MASK BIT(0) 184 185 /* 186 * Universal Unique Identifier (UUID), 187 * 033771E0-1705-47B4-9535-D1BBE14D9A09, 188 * is reserved to Microchip for the PAC1934. 189 */ 190 #define PAC1934_DSM_UUID "033771E0-1705-47B4-9535-D1BBE14D9A09" 191 192 enum pac1934_ids { 193 PAC1931, 194 PAC1932, 195 PAC1933, 196 PAC1934 197 }; 198 199 enum pac1934_samps { 200 PAC1934_SAMP_1024SPS, 201 PAC1934_SAMP_256SPS, 202 PAC1934_SAMP_64SPS, 203 PAC1934_SAMP_8SPS 204 }; 205 206 /* 207 * these indexes are exactly describing the element order within a single 208 * PAC1934 phys channel IIO channel descriptor; see the static const struct 209 * iio_chan_spec pac1934_single_channel[] declaration 210 */ 211 enum pac1934_ch_idx { 212 PAC1934_CH_ENERGY, 213 PAC1934_CH_POWER, 214 PAC1934_CH_VOLTAGE, 215 PAC1934_CH_CURRENT, 216 PAC1934_CH_VOLTAGE_AVERAGE, 217 PAC1934_CH_CURRENT_AVERAGE 218 }; 219 220 /** 221 * struct pac1934_features - features of a pac1934 instance 222 * @phys_channels: number of physical channels supported by the chip 223 * @name: chip's name 224 */ 225 struct pac1934_features { 226 u8 phys_channels; 227 const char *name; 228 }; 229 230 static const unsigned int samp_rate_map_tbl[] = { 231 [PAC1934_SAMP_1024SPS] = 1024, 232 [PAC1934_SAMP_256SPS] = 256, 233 [PAC1934_SAMP_64SPS] = 64, 234 [PAC1934_SAMP_8SPS] = 8, 235 }; 236 237 static const struct pac1934_features pac1934_chip_config[] = { 238 [PAC1931] = { 239 .phys_channels = 1, 240 .name = "pac1931", 241 }, 242 [PAC1932] = { 243 .phys_channels = 2, 244 .name = "pac1932", 245 }, 246 [PAC1933] = { 247 .phys_channels = 3, 248 .name = "pac1933", 249 }, 250 [PAC1934] = { 251 .phys_channels = 4, 252 .name = "pac1934", 253 }, 254 }; 255 256 /** 257 * struct reg_data - data from the registers 258 * @meas_regs: snapshot of raw measurements registers 259 * @ctrl_regs: snapshot of control registers 260 * @energy_sec_acc: snapshot of energy values 261 * @vpower_acc: accumulated vpower values 262 * @vpower: snapshot of vpower registers 263 * @vbus: snapshot of vbus registers 264 * @vbus_avg: averages of vbus registers 265 * @vsense: snapshot of vsense registers 266 * @vsense_avg: averages of vsense registers 267 * @num_enabled_channels: count of how many chip channels are currently enabled 268 */ 269 struct reg_data { 270 u8 meas_regs[PAC1934_MEAS_REG_LEN]; 271 u8 ctrl_regs[PAC1934_CTRL_REG_LEN]; 272 s64 energy_sec_acc[PAC1934_MAX_NUM_CHANNELS]; 273 s64 vpower_acc[PAC1934_MAX_NUM_CHANNELS]; 274 s32 vpower[PAC1934_MAX_NUM_CHANNELS]; 275 s32 vbus[PAC1934_MAX_NUM_CHANNELS]; 276 s32 vbus_avg[PAC1934_MAX_NUM_CHANNELS]; 277 s32 vsense[PAC1934_MAX_NUM_CHANNELS]; 278 s32 vsense_avg[PAC1934_MAX_NUM_CHANNELS]; 279 u8 num_enabled_channels; 280 }; 281 282 /** 283 * struct pac1934_chip_info - information about the chip 284 * @client: the i2c-client attached to the device 285 * @lock: synchronize access to driver's state members 286 * @work_chip_rfsh: work queue used for refresh commands 287 * @phys_channels: phys channels count 288 * @active_channels: array of values, true means that channel is active 289 * @enable_energy: array of values, true means that channel energy is measured 290 * @bi_dir: array of bools, true means that channel is bidirectional 291 * @chip_variant: chip variant 292 * @chip_revision: chip revision 293 * @shunts: shunts 294 * @chip_reg_data: chip reg data 295 * @sample_rate_value: sampling frequency 296 * @labels: table with channels labels 297 * @iio_info: iio_info 298 * @tstamp: chip's uptime 299 */ 300 struct pac1934_chip_info { 301 struct i2c_client *client; 302 struct mutex lock; /* synchronize access to driver's state members */ 303 struct delayed_work work_chip_rfsh; 304 u8 phys_channels; 305 bool active_channels[PAC1934_MAX_NUM_CHANNELS]; 306 bool enable_energy[PAC1934_MAX_NUM_CHANNELS]; 307 bool bi_dir[PAC1934_MAX_NUM_CHANNELS]; 308 u8 chip_variant; 309 u8 chip_revision; 310 u32 shunts[PAC1934_MAX_NUM_CHANNELS]; 311 struct reg_data chip_reg_data; 312 s32 sample_rate_value; 313 char *labels[PAC1934_MAX_NUM_CHANNELS]; 314 struct iio_info iio_info; 315 unsigned long tstamp; 316 }; 317 318 #define TO_PAC1934_CHIP_INFO(d) container_of(d, struct pac1934_chip_info, work_chip_rfsh) 319 320 #define PAC1934_VPOWER_ACC_CHANNEL(_index, _si, _address) { \ 321 .type = IIO_ENERGY, \ 322 .address = (_address), \ 323 .indexed = 1, \ 324 .channel = (_index), \ 325 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 326 BIT(IIO_CHAN_INFO_SCALE) | \ 327 BIT(IIO_CHAN_INFO_ENABLE), \ 328 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 329 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 330 .scan_index = (_si), \ 331 .scan_type = { \ 332 .sign = 'u', \ 333 .realbits = 48, \ 334 .storagebits = 64, \ 335 .endianness = IIO_CPU, \ 336 } \ 337 } 338 339 #define PAC1934_VBUS_CHANNEL(_index, _si, _address) { \ 340 .type = IIO_VOLTAGE, \ 341 .address = (_address), \ 342 .indexed = 1, \ 343 .channel = (_index), \ 344 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 345 BIT(IIO_CHAN_INFO_SCALE), \ 346 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 347 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 348 .scan_index = (_si), \ 349 .scan_type = { \ 350 .sign = 'u', \ 351 .realbits = 16, \ 352 .storagebits = 16, \ 353 .endianness = IIO_CPU, \ 354 } \ 355 } 356 357 #define PAC1934_VBUS_AVG_CHANNEL(_index, _si, _address) { \ 358 .type = IIO_VOLTAGE, \ 359 .address = (_address), \ 360 .indexed = 1, \ 361 .channel = (_index), \ 362 .info_mask_separate = BIT(IIO_CHAN_INFO_AVERAGE_RAW) | \ 363 BIT(IIO_CHAN_INFO_SCALE), \ 364 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 365 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 366 .scan_index = (_si), \ 367 .scan_type = { \ 368 .sign = 'u', \ 369 .realbits = 16, \ 370 .storagebits = 16, \ 371 .endianness = IIO_CPU, \ 372 } \ 373 } 374 375 #define PAC1934_VSENSE_CHANNEL(_index, _si, _address) { \ 376 .type = IIO_CURRENT, \ 377 .address = (_address), \ 378 .indexed = 1, \ 379 .channel = (_index), \ 380 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 381 BIT(IIO_CHAN_INFO_SCALE), \ 382 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 383 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 384 .scan_index = (_si), \ 385 .scan_type = { \ 386 .sign = 'u', \ 387 .realbits = 16, \ 388 .storagebits = 16, \ 389 .endianness = IIO_CPU, \ 390 } \ 391 } 392 393 #define PAC1934_VSENSE_AVG_CHANNEL(_index, _si, _address) { \ 394 .type = IIO_CURRENT, \ 395 .address = (_address), \ 396 .indexed = 1, \ 397 .channel = (_index), \ 398 .info_mask_separate = BIT(IIO_CHAN_INFO_AVERAGE_RAW) | \ 399 BIT(IIO_CHAN_INFO_SCALE), \ 400 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 401 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 402 .scan_index = (_si), \ 403 .scan_type = { \ 404 .sign = 'u', \ 405 .realbits = 16, \ 406 .storagebits = 16, \ 407 .endianness = IIO_CPU, \ 408 } \ 409 } 410 411 #define PAC1934_VPOWER_CHANNEL(_index, _si, _address) { \ 412 .type = IIO_POWER, \ 413 .address = (_address), \ 414 .indexed = 1, \ 415 .channel = (_index), \ 416 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 417 BIT(IIO_CHAN_INFO_SCALE), \ 418 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 419 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 420 .scan_index = (_si), \ 421 .scan_type = { \ 422 .sign = 'u', \ 423 .realbits = 28, \ 424 .storagebits = 32, \ 425 .shift = 4, \ 426 .endianness = IIO_CPU, \ 427 } \ 428 } 429 430 static const struct iio_chan_spec pac1934_single_channel[] = { 431 PAC1934_VPOWER_ACC_CHANNEL(0, 0, PAC1934_VPOWER_ACC_1_ADDR), 432 PAC1934_VPOWER_CHANNEL(0, 0, PAC1934_VPOWER_1_ADDR), 433 PAC1934_VBUS_CHANNEL(0, 0, PAC1934_VBUS_1_ADDR), 434 PAC1934_VSENSE_CHANNEL(0, 0, PAC1934_VSENSE_1_ADDR), 435 PAC1934_VBUS_AVG_CHANNEL(0, 0, PAC1934_VBUS_AVG_1_ADDR), 436 PAC1934_VSENSE_AVG_CHANNEL(0, 0, PAC1934_VSENSE_AVG_1_ADDR), 437 }; 438 439 /* Low-level I2c functions used to transfer up to 76 bytes at once */ 440 static int pac1934_i2c_read(struct i2c_client *client, u8 reg_addr, 441 void *databuf, u8 len) 442 { 443 int ret; 444 struct i2c_msg msgs[2] = { 445 { 446 .addr = client->addr, 447 .len = 1, 448 .buf = (u8 *)®_addr, 449 }, 450 { 451 .addr = client->addr, 452 .len = len, 453 .buf = databuf, 454 .flags = I2C_M_RD 455 } 456 }; 457 458 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 459 if (ret < 0) 460 return ret; 461 462 return 0; 463 } 464 465 static int pac1934_get_samp_rate_idx(struct pac1934_chip_info *info, 466 u32 new_samp_rate) 467 { 468 int cnt; 469 470 for (cnt = 0; cnt < ARRAY_SIZE(samp_rate_map_tbl); cnt++) 471 if (new_samp_rate == samp_rate_map_tbl[cnt]) 472 return cnt; 473 474 /* not a valid sample rate value */ 475 return -EINVAL; 476 } 477 478 static ssize_t pac1934_shunt_value_show(struct device *dev, 479 struct device_attribute *attr, 480 char *buf) 481 { 482 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 483 struct pac1934_chip_info *info = iio_priv(indio_dev); 484 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 485 486 return sysfs_emit(buf, "%u\n", info->shunts[this_attr->address]); 487 } 488 489 static ssize_t pac1934_shunt_value_store(struct device *dev, 490 struct device_attribute *attr, 491 const char *buf, size_t count) 492 { 493 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 494 struct pac1934_chip_info *info = iio_priv(indio_dev); 495 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 496 int sh_val; 497 498 if (kstrtouint(buf, 10, &sh_val)) { 499 dev_err(dev, "Shunt value is not valid\n"); 500 return -EINVAL; 501 } 502 503 scoped_guard(mutex, &info->lock) 504 info->shunts[this_attr->address] = sh_val; 505 506 return count; 507 } 508 509 static int pac1934_read_avail(struct iio_dev *indio_dev, 510 struct iio_chan_spec const *channel, 511 const int **vals, int *type, int *length, long mask) 512 { 513 switch (mask) { 514 case IIO_CHAN_INFO_SAMP_FREQ: 515 *type = IIO_VAL_INT; 516 *vals = samp_rate_map_tbl; 517 *length = ARRAY_SIZE(samp_rate_map_tbl); 518 return IIO_AVAIL_LIST; 519 } 520 521 return -EINVAL; 522 } 523 524 static int pac1934_send_refresh(struct pac1934_chip_info *info, 525 u8 refresh_cmd, u32 wait_time) 526 { 527 /* this function only sends REFRESH or REFRESH_V */ 528 struct i2c_client *client = info->client; 529 int ret; 530 u8 bidir_reg; 531 bool revision_bug = false; 532 533 if (info->chip_revision == 2 || info->chip_revision == 3) { 534 /* 535 * chip rev 2 and 3 bug workaround 536 * see: PAC1934 Family Data Sheet Errata DS80000836A.pdf 537 */ 538 revision_bug = true; 539 540 bidir_reg = 541 FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDI_MASK, info->bi_dir[0]) | 542 FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDI_MASK, info->bi_dir[1]) | 543 FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDI_MASK, info->bi_dir[2]) | 544 FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDI_MASK, info->bi_dir[3]) | 545 FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDV_MASK, info->bi_dir[0]) | 546 FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDV_MASK, info->bi_dir[1]) | 547 FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDV_MASK, info->bi_dir[2]) | 548 FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDV_MASK, info->bi_dir[3]); 549 550 ret = i2c_smbus_write_byte_data(client, 551 PAC1934_CTRL_STAT_REGS_ADDR + 552 PAC1934_NEG_PWR_REG_OFF, 553 bidir_reg); 554 if (ret) 555 return ret; 556 } 557 558 ret = i2c_smbus_write_byte(client, refresh_cmd); 559 if (ret) { 560 dev_err(&client->dev, "%s - cannot send 0x%02X\n", 561 __func__, refresh_cmd); 562 return ret; 563 } 564 565 if (revision_bug) { 566 /* 567 * chip rev 2 and 3 bug workaround - write again the same 568 * register write the updated registers back 569 */ 570 ret = i2c_smbus_write_byte_data(client, 571 PAC1934_CTRL_STAT_REGS_ADDR + 572 PAC1934_NEG_PWR_REG_OFF, bidir_reg); 573 if (ret) 574 return ret; 575 } 576 577 /* register data retrieval timestamp */ 578 info->tstamp = jiffies; 579 580 /* wait till the data is available */ 581 usleep_range(wait_time, wait_time + 100); 582 583 return ret; 584 } 585 586 static int pac1934_reg_snapshot(struct pac1934_chip_info *info, 587 bool do_refresh, u8 refresh_cmd, u32 wait_time) 588 { 589 int ret; 590 struct i2c_client *client = info->client; 591 u8 samp_shift, ctrl_regs_tmp; 592 u8 *offset_reg_data_p; 593 u16 tmp_value; 594 u32 samp_rate, cnt, tmp; 595 s64 curr_energy, inc; 596 u64 tmp_energy; 597 struct reg_data *reg_data; 598 599 guard(mutex)(&info->lock); 600 601 if (do_refresh) { 602 ret = pac1934_send_refresh(info, refresh_cmd, wait_time); 603 if (ret < 0) { 604 dev_err(&client->dev, 605 "%s - cannot send refresh\n", 606 __func__); 607 return ret; 608 } 609 } 610 611 ret = i2c_smbus_read_i2c_block_data(client, PAC1934_CTRL_STAT_REGS_ADDR, 612 PAC1934_CTRL_REG_LEN, 613 (u8 *)info->chip_reg_data.ctrl_regs); 614 if (ret < 0) { 615 dev_err(&client->dev, 616 "%s - cannot read ctrl/status registers\n", 617 __func__); 618 return ret; 619 } 620 621 reg_data = &info->chip_reg_data; 622 623 /* read the data registers */ 624 ret = pac1934_i2c_read(client, PAC1934_ACC_COUNT_REG_ADDR, 625 (u8 *)reg_data->meas_regs, PAC1934_MEAS_REG_LEN); 626 if (ret) { 627 dev_err(&client->dev, 628 "%s - cannot read ACC_COUNT register: %d:%d\n", 629 __func__, ret, PAC1934_MEAS_REG_LEN); 630 return ret; 631 } 632 633 /* see how much shift is required by the sample rate */ 634 samp_rate = samp_rate_map_tbl[((reg_data->ctrl_regs[PAC1934_CTRL_LAT_REG_OFF]) >> 6)]; 635 samp_shift = get_count_order(samp_rate); 636 637 ctrl_regs_tmp = reg_data->ctrl_regs[PAC1934_CHANNEL_DIS_LAT_REG_OFF]; 638 offset_reg_data_p = ®_data->meas_regs[PAC1934_ACC_REG_LEN]; 639 640 /* start with VPOWER_ACC */ 641 for (cnt = 0; cnt < info->phys_channels; cnt++) { 642 /* check if the channel is active, skip all fields if disabled */ 643 if ((ctrl_regs_tmp << cnt) & 0x80) 644 continue; 645 646 /* skip if the energy accumulation is disabled */ 647 if (info->enable_energy[cnt]) { 648 curr_energy = info->chip_reg_data.energy_sec_acc[cnt]; 649 650 tmp_energy = get_unaligned_be48(offset_reg_data_p); 651 652 if (info->bi_dir[cnt]) 653 reg_data->vpower_acc[cnt] = sign_extend64(tmp_energy, 47); 654 else 655 reg_data->vpower_acc[cnt] = tmp_energy; 656 657 /* 658 * compute the scaled to 1 second accumulated energy value; 659 * energy accumulator scaled to 1sec = VPOWER_ACC/2^samp_shift 660 * the chip's sampling rate is 2^samp_shift samples/sec 661 */ 662 inc = (reg_data->vpower_acc[cnt] >> samp_shift); 663 664 /* add the power_acc field */ 665 curr_energy += inc; 666 667 clamp(curr_energy, PAC_193X_MIN_POWER_ACC, PAC_193X_MAX_POWER_ACC); 668 669 reg_data->energy_sec_acc[cnt] = curr_energy; 670 } 671 672 offset_reg_data_p += PAC1934_VPOWER_ACC_REG_LEN; 673 } 674 675 /* continue with VBUS */ 676 for (cnt = 0; cnt < info->phys_channels; cnt++) { 677 if ((ctrl_regs_tmp << cnt) & 0x80) 678 continue; 679 680 tmp_value = get_unaligned_be16(offset_reg_data_p); 681 682 if (info->bi_dir[cnt]) 683 reg_data->vbus[cnt] = sign_extend32((u32)(tmp_value), 15); 684 else 685 reg_data->vbus[cnt] = tmp_value; 686 687 offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN; 688 } 689 690 /* VSENSE */ 691 for (cnt = 0; cnt < info->phys_channels; cnt++) { 692 if ((ctrl_regs_tmp << cnt) & 0x80) 693 continue; 694 695 tmp_value = get_unaligned_be16(offset_reg_data_p); 696 697 if (info->bi_dir[cnt]) 698 reg_data->vsense[cnt] = sign_extend32((u32)(tmp_value), 15); 699 else 700 reg_data->vsense[cnt] = tmp_value; 701 702 offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN; 703 } 704 705 /* VBUS_AVG */ 706 for (cnt = 0; cnt < info->phys_channels; cnt++) { 707 if ((ctrl_regs_tmp << cnt) & 0x80) 708 continue; 709 710 tmp_value = get_unaligned_be16(offset_reg_data_p); 711 712 if (info->bi_dir[cnt]) 713 reg_data->vbus_avg[cnt] = sign_extend32((u32)(tmp_value), 15); 714 else 715 reg_data->vbus_avg[cnt] = tmp_value; 716 717 offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN; 718 } 719 720 /* VSENSE_AVG */ 721 for (cnt = 0; cnt < info->phys_channels; cnt++) { 722 if ((ctrl_regs_tmp << cnt) & 0x80) 723 continue; 724 725 tmp_value = get_unaligned_be16(offset_reg_data_p); 726 727 if (info->bi_dir[cnt]) 728 reg_data->vsense_avg[cnt] = sign_extend32((u32)(tmp_value), 15); 729 else 730 reg_data->vsense_avg[cnt] = tmp_value; 731 732 offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN; 733 } 734 735 /* VPOWER */ 736 for (cnt = 0; cnt < info->phys_channels; cnt++) { 737 if ((ctrl_regs_tmp << cnt) & 0x80) 738 continue; 739 740 tmp = get_unaligned_be32(offset_reg_data_p) >> 4; 741 742 if (info->bi_dir[cnt]) 743 reg_data->vpower[cnt] = sign_extend32(tmp, 27); 744 else 745 reg_data->vpower[cnt] = tmp; 746 747 offset_reg_data_p += PAC1934_VPOWER_REG_LEN; 748 } 749 750 return 0; 751 } 752 753 static int pac1934_retrieve_data(struct pac1934_chip_info *info, 754 u32 wait_time) 755 { 756 int ret = 0; 757 758 /* 759 * check if the minimal elapsed time has passed and if so, 760 * re-read the chip, otherwise the cached info is just fine 761 */ 762 if (time_after(jiffies, info->tstamp + msecs_to_jiffies(PAC1934_MIN_POLLING_TIME_MS))) { 763 ret = pac1934_reg_snapshot(info, true, PAC1934_REFRESH_REG_ADDR, 764 wait_time); 765 766 /* 767 * Re-schedule the work for the read registers on timeout 768 * (to prevent chip registers saturation) 769 */ 770 mod_delayed_work(system_wq, &info->work_chip_rfsh, 771 msecs_to_jiffies(PAC1934_MAX_RFSH_LIMIT_MS)); 772 } 773 774 return ret; 775 } 776 777 static int pac1934_read_raw(struct iio_dev *indio_dev, 778 struct iio_chan_spec const *chan, int *val, 779 int *val2, long mask) 780 { 781 struct pac1934_chip_info *info = iio_priv(indio_dev); 782 s64 curr_energy; 783 int ret, channel = chan->channel - 1; 784 785 /* 786 * For AVG the index should be between 5 to 8. 787 * To calculate PAC1934_CH_VOLTAGE_AVERAGE, 788 * respectively PAC1934_CH_CURRENT real index, we need 789 * to remove the added offset (PAC1934_MAX_NUM_CHANNELS). 790 */ 791 if (channel >= PAC1934_MAX_NUM_CHANNELS) 792 channel = channel - PAC1934_MAX_NUM_CHANNELS; 793 794 ret = pac1934_retrieve_data(info, PAC1934_MIN_UPDATE_WAIT_TIME_US); 795 if (ret < 0) 796 return ret; 797 798 switch (mask) { 799 case IIO_CHAN_INFO_RAW: 800 switch (chan->type) { 801 case IIO_VOLTAGE: 802 *val = info->chip_reg_data.vbus[channel]; 803 return IIO_VAL_INT; 804 case IIO_CURRENT: 805 *val = info->chip_reg_data.vsense[channel]; 806 return IIO_VAL_INT; 807 case IIO_POWER: 808 *val = info->chip_reg_data.vpower[channel]; 809 return IIO_VAL_INT; 810 case IIO_ENERGY: 811 curr_energy = info->chip_reg_data.energy_sec_acc[channel]; 812 *val = (u32)curr_energy; 813 *val2 = (u32)(curr_energy >> 32); 814 return IIO_VAL_INT_64; 815 default: 816 return -EINVAL; 817 } 818 case IIO_CHAN_INFO_AVERAGE_RAW: 819 switch (chan->type) { 820 case IIO_VOLTAGE: 821 *val = info->chip_reg_data.vbus_avg[channel]; 822 return IIO_VAL_INT; 823 case IIO_CURRENT: 824 *val = info->chip_reg_data.vsense_avg[channel]; 825 return IIO_VAL_INT; 826 default: 827 return -EINVAL; 828 } 829 case IIO_CHAN_INFO_SCALE: 830 switch (chan->address) { 831 /* Voltages - scale for millivolts */ 832 case PAC1934_VBUS_1_ADDR: 833 case PAC1934_VBUS_2_ADDR: 834 case PAC1934_VBUS_3_ADDR: 835 case PAC1934_VBUS_4_ADDR: 836 case PAC1934_VBUS_AVG_1_ADDR: 837 case PAC1934_VBUS_AVG_2_ADDR: 838 case PAC1934_VBUS_AVG_3_ADDR: 839 case PAC1934_VBUS_AVG_4_ADDR: 840 *val = PAC1934_VOLTAGE_MILLIVOLTS_MAX; 841 if (chan->scan_type.sign == 'u') 842 *val2 = PAC1934_VOLTAGE_U_RES; 843 else 844 *val2 = PAC1934_VOLTAGE_S_RES; 845 return IIO_VAL_FRACTIONAL_LOG2; 846 /* 847 * Currents - scale for mA - depends on the 848 * channel's shunt value 849 * (100mV * 1000000) / (2^16 * shunt(uohm)) 850 */ 851 case PAC1934_VSENSE_1_ADDR: 852 case PAC1934_VSENSE_2_ADDR: 853 case PAC1934_VSENSE_3_ADDR: 854 case PAC1934_VSENSE_4_ADDR: 855 case PAC1934_VSENSE_AVG_1_ADDR: 856 case PAC1934_VSENSE_AVG_2_ADDR: 857 case PAC1934_VSENSE_AVG_3_ADDR: 858 case PAC1934_VSENSE_AVG_4_ADDR: 859 *val = PAC1934_MAX_VSENSE_RSHIFTED_BY_16B; 860 if (chan->scan_type.sign == 'u') 861 *val2 = info->shunts[channel]; 862 else 863 *val2 = info->shunts[channel] >> 1; 864 return IIO_VAL_FRACTIONAL; 865 /* 866 * Power - uW - it will use the combined scale 867 * for current and voltage 868 * current(mA) * voltage(mV) = power (uW) 869 */ 870 case PAC1934_VPOWER_1_ADDR: 871 case PAC1934_VPOWER_2_ADDR: 872 case PAC1934_VPOWER_3_ADDR: 873 case PAC1934_VPOWER_4_ADDR: 874 *val = PAC1934_MAX_VPOWER_RSHIFTED_BY_28B; 875 if (chan->scan_type.sign == 'u') 876 *val2 = info->shunts[channel]; 877 else 878 *val2 = info->shunts[channel] >> 1; 879 return IIO_VAL_FRACTIONAL; 880 case PAC1934_VPOWER_ACC_1_ADDR: 881 case PAC1934_VPOWER_ACC_2_ADDR: 882 case PAC1934_VPOWER_ACC_3_ADDR: 883 case PAC1934_VPOWER_ACC_4_ADDR: 884 /* 885 * expresses the 32 bit scale value here compute 886 * the scale for energy (miliWatt-second or miliJoule) 887 */ 888 *val = PAC1934_SCALE_CONSTANT; 889 890 if (chan->scan_type.sign == 'u') 891 *val2 = info->shunts[channel]; 892 else 893 *val2 = info->shunts[channel] >> 1; 894 return IIO_VAL_FRACTIONAL; 895 default: 896 return -EINVAL; 897 } 898 case IIO_CHAN_INFO_SAMP_FREQ: 899 *val = info->sample_rate_value; 900 return IIO_VAL_INT; 901 case IIO_CHAN_INFO_ENABLE: 902 *val = info->enable_energy[channel]; 903 return IIO_VAL_INT; 904 default: 905 return -EINVAL; 906 } 907 } 908 909 static int pac1934_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, 910 int val, int val2, long mask) 911 { 912 struct pac1934_chip_info *info = iio_priv(indio_dev); 913 struct i2c_client *client = info->client; 914 int ret = -EINVAL; 915 s32 old_samp_rate; 916 u8 ctrl_reg; 917 918 switch (mask) { 919 case IIO_CHAN_INFO_SAMP_FREQ: 920 ret = pac1934_get_samp_rate_idx(info, val); 921 if (ret < 0) 922 return ret; 923 924 /* write the new sampling value and trigger a snapshot(incl refresh) */ 925 scoped_guard(mutex, &info->lock) { 926 ctrl_reg = FIELD_PREP(PAC1934_CRTL_SAMPLE_RATE_MASK, ret); 927 ret = i2c_smbus_write_byte_data(client, PAC1934_CTRL_REG_ADDR, ctrl_reg); 928 if (ret) { 929 dev_err(&client->dev, 930 "%s - can't update sample rate\n", 931 __func__); 932 return ret; 933 } 934 } 935 936 old_samp_rate = info->sample_rate_value; 937 info->sample_rate_value = val; 938 939 /* 940 * now, force a snapshot with refresh - call retrieve 941 * data in order to update the refresh timer 942 * alter the timestamp in order to force trigger a 943 * register snapshot and a timestamp update 944 */ 945 info->tstamp -= msecs_to_jiffies(PAC1934_MIN_POLLING_TIME_MS); 946 ret = pac1934_retrieve_data(info, (1024 / old_samp_rate) * 1000); 947 if (ret < 0) { 948 dev_err(&client->dev, 949 "%s - cannot snapshot ctrl and measurement regs\n", 950 __func__); 951 return ret; 952 } 953 954 return 0; 955 case IIO_CHAN_INFO_ENABLE: 956 scoped_guard(mutex, &info->lock) { 957 info->enable_energy[chan->channel - 1] = val ? true : false; 958 if (!val) 959 info->chip_reg_data.energy_sec_acc[chan->channel - 1] = 0; 960 } 961 962 return 0; 963 default: 964 return -EINVAL; 965 } 966 } 967 968 static int pac1934_read_label(struct iio_dev *indio_dev, 969 struct iio_chan_spec const *chan, char *label) 970 { 971 struct pac1934_chip_info *info = iio_priv(indio_dev); 972 973 switch (chan->address) { 974 case PAC1934_VBUS_1_ADDR: 975 case PAC1934_VBUS_2_ADDR: 976 case PAC1934_VBUS_3_ADDR: 977 case PAC1934_VBUS_4_ADDR: 978 return sysfs_emit(label, "%s_VBUS_%d\n", 979 info->labels[chan->scan_index], 980 chan->scan_index + 1); 981 case PAC1934_VBUS_AVG_1_ADDR: 982 case PAC1934_VBUS_AVG_2_ADDR: 983 case PAC1934_VBUS_AVG_3_ADDR: 984 case PAC1934_VBUS_AVG_4_ADDR: 985 return sysfs_emit(label, "%s_VBUS_AVG_%d\n", 986 info->labels[chan->scan_index], 987 chan->scan_index + 1); 988 case PAC1934_VSENSE_1_ADDR: 989 case PAC1934_VSENSE_2_ADDR: 990 case PAC1934_VSENSE_3_ADDR: 991 case PAC1934_VSENSE_4_ADDR: 992 return sysfs_emit(label, "%s_IBUS_%d\n", 993 info->labels[chan->scan_index], 994 chan->scan_index + 1); 995 case PAC1934_VSENSE_AVG_1_ADDR: 996 case PAC1934_VSENSE_AVG_2_ADDR: 997 case PAC1934_VSENSE_AVG_3_ADDR: 998 case PAC1934_VSENSE_AVG_4_ADDR: 999 return sysfs_emit(label, "%s_IBUS_AVG_%d\n", 1000 info->labels[chan->scan_index], 1001 chan->scan_index + 1); 1002 case PAC1934_VPOWER_1_ADDR: 1003 case PAC1934_VPOWER_2_ADDR: 1004 case PAC1934_VPOWER_3_ADDR: 1005 case PAC1934_VPOWER_4_ADDR: 1006 return sysfs_emit(label, "%s_POWER_%d\n", 1007 info->labels[chan->scan_index], 1008 chan->scan_index + 1); 1009 case PAC1934_VPOWER_ACC_1_ADDR: 1010 case PAC1934_VPOWER_ACC_2_ADDR: 1011 case PAC1934_VPOWER_ACC_3_ADDR: 1012 case PAC1934_VPOWER_ACC_4_ADDR: 1013 return sysfs_emit(label, "%s_ENERGY_%d\n", 1014 info->labels[chan->scan_index], 1015 chan->scan_index + 1); 1016 } 1017 1018 return 0; 1019 } 1020 1021 static void pac1934_work_periodic_rfsh(struct work_struct *work) 1022 { 1023 struct pac1934_chip_info *info = TO_PAC1934_CHIP_INFO((struct delayed_work *)work); 1024 struct device *dev = &info->client->dev; 1025 1026 dev_dbg(dev, "%s - Periodic refresh\n", __func__); 1027 1028 /* do a REFRESH, then read */ 1029 pac1934_reg_snapshot(info, true, PAC1934_REFRESH_REG_ADDR, 1030 PAC1934_MIN_UPDATE_WAIT_TIME_US); 1031 1032 schedule_delayed_work(&info->work_chip_rfsh, 1033 msecs_to_jiffies(PAC1934_MAX_RFSH_LIMIT_MS)); 1034 } 1035 1036 static int pac1934_read_revision(struct pac1934_chip_info *info, u8 *buf) 1037 { 1038 int ret; 1039 struct i2c_client *client = info->client; 1040 1041 ret = i2c_smbus_read_i2c_block_data(client, PAC1934_PID_REG_ADDR, 1042 PAC1934_ID_REG_LEN, 1043 buf); 1044 if (ret < 0) { 1045 dev_err(&client->dev, "cannot read revision\n"); 1046 return ret; 1047 } 1048 1049 return 0; 1050 } 1051 1052 static int pac1934_chip_identify(struct pac1934_chip_info *info) 1053 { 1054 u8 rev_info[PAC1934_ID_REG_LEN]; 1055 struct device *dev = &info->client->dev; 1056 int ret = 0; 1057 1058 ret = pac1934_read_revision(info, (u8 *)rev_info); 1059 if (ret) 1060 return ret; 1061 1062 info->chip_variant = rev_info[PAC1934_PID_IDX]; 1063 info->chip_revision = rev_info[PAC1934_RID_IDX]; 1064 1065 dev_dbg(dev, "Chip variant: 0x%02X\n", info->chip_variant); 1066 dev_dbg(dev, "Chip revision: 0x%02X\n", info->chip_revision); 1067 1068 switch (info->chip_variant) { 1069 case PAC1934_PID: 1070 return PAC1934; 1071 case PAC1933_PID: 1072 return PAC1933; 1073 case PAC1932_PID: 1074 return PAC1932; 1075 case PAC1931_PID: 1076 return PAC1931; 1077 default: 1078 return -EINVAL; 1079 } 1080 } 1081 1082 /* 1083 * documentation related to the ACPI device definition 1084 * https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ApplicationNotes/ApplicationNotes/PAC1934-Integration-Notes-for-Microsoft-Windows-10-and-Windows-11-Driver-Support-DS00002534.pdf 1085 */ 1086 static int pac1934_acpi_parse_channel_config(struct i2c_client *client, 1087 struct pac1934_chip_info *info) 1088 { 1089 acpi_handle handle; 1090 union acpi_object *rez; 1091 struct device *dev = &client->dev; 1092 unsigned short bi_dir_mask; 1093 int idx, i; 1094 guid_t guid; 1095 1096 handle = ACPI_HANDLE(dev); 1097 1098 guid_parse(PAC1934_DSM_UUID, &guid); 1099 1100 rez = acpi_evaluate_dsm(handle, &guid, 0, PAC1934_ACPI_GET_NAMES_AND_MOHMS_VALS, NULL); 1101 if (!rez) 1102 return -EINVAL; 1103 1104 for (i = 0; i < rez->package.count; i += 2) { 1105 idx = i / 2; 1106 info->labels[idx] = 1107 devm_kmemdup(dev, rez->package.elements[i].string.pointer, 1108 (size_t)rez->package.elements[i].string.length + 1, 1109 GFP_KERNEL); 1110 info->labels[idx][rez->package.elements[i].string.length] = '\0'; 1111 info->shunts[idx] = rez->package.elements[i + 1].integer.value * 1000; 1112 info->active_channels[idx] = (info->shunts[idx] != 0); 1113 } 1114 1115 ACPI_FREE(rez); 1116 1117 rez = acpi_evaluate_dsm(handle, &guid, 1, PAC1934_ACPI_GET_UOHMS_VALS, NULL); 1118 if (!rez) { 1119 /* 1120 * initializing with default values 1121 * we assume all channels are unidirectional(the mask is zero) 1122 * and assign the default sampling rate 1123 */ 1124 info->sample_rate_value = PAC1934_DEFAULT_CHIP_SAMP_SPEED_HZ; 1125 return 0; 1126 } 1127 1128 for (i = 0; i < rez->package.count; i++) { 1129 idx = i; 1130 info->shunts[idx] = rez->package.elements[i].integer.value; 1131 info->active_channels[idx] = (info->shunts[idx] != 0); 1132 } 1133 1134 ACPI_FREE(rez); 1135 1136 rez = acpi_evaluate_dsm(handle, &guid, 1, PAC1934_ACPI_GET_BIPOLAR_SETTINGS, NULL); 1137 if (!rez) 1138 return -EINVAL; 1139 1140 bi_dir_mask = rez->package.elements[0].integer.value; 1141 info->bi_dir[0] = ((bi_dir_mask & (1 << 3)) | (bi_dir_mask & (1 << 7))) != 0; 1142 info->bi_dir[1] = ((bi_dir_mask & (1 << 2)) | (bi_dir_mask & (1 << 6))) != 0; 1143 info->bi_dir[2] = ((bi_dir_mask & (1 << 1)) | (bi_dir_mask & (1 << 5))) != 0; 1144 info->bi_dir[3] = ((bi_dir_mask & (1 << 0)) | (bi_dir_mask & (1 << 4))) != 0; 1145 1146 ACPI_FREE(rez); 1147 1148 rez = acpi_evaluate_dsm(handle, &guid, 1, PAC1934_ACPI_GET_SAMP, NULL); 1149 if (!rez) 1150 return -EINVAL; 1151 1152 info->sample_rate_value = rez->package.elements[0].integer.value; 1153 1154 ACPI_FREE(rez); 1155 1156 return 0; 1157 } 1158 1159 static int pac1934_fw_parse_channel_config(struct i2c_client *client, 1160 struct pac1934_chip_info *info) 1161 { 1162 struct device *dev = &client->dev; 1163 unsigned int current_channel; 1164 int idx, ret; 1165 1166 info->sample_rate_value = 1024; 1167 current_channel = 1; 1168 1169 device_for_each_child_node_scoped(dev, node) { 1170 ret = fwnode_property_read_u32(node, "reg", &idx); 1171 if (ret) 1172 return dev_err_probe(dev, ret, 1173 "reading invalid channel index\n"); 1174 1175 /* adjust idx to match channel index (1 to 4) from the datasheet */ 1176 idx--; 1177 1178 if (current_channel >= (info->phys_channels + 1) || 1179 idx >= info->phys_channels || idx < 0) 1180 return dev_err_probe(dev, -EINVAL, 1181 "%s: invalid channel_index %d value\n", 1182 fwnode_get_name(node), idx); 1183 1184 /* enable channel */ 1185 info->active_channels[idx] = true; 1186 1187 ret = fwnode_property_read_u32(node, "shunt-resistor-micro-ohms", 1188 &info->shunts[idx]); 1189 if (ret) 1190 return dev_err_probe(dev, ret, 1191 "%s: invalid shunt-resistor value: %d\n", 1192 fwnode_get_name(node), info->shunts[idx]); 1193 1194 if (fwnode_property_present(node, "label")) { 1195 ret = fwnode_property_read_string(node, "label", 1196 (const char **)&info->labels[idx]); 1197 if (ret) 1198 return dev_err_probe(dev, ret, 1199 "%s: invalid rail-name value\n", 1200 fwnode_get_name(node)); 1201 } 1202 1203 info->bi_dir[idx] = fwnode_property_read_bool(node, "bipolar"); 1204 1205 current_channel++; 1206 } 1207 1208 return 0; 1209 } 1210 1211 static void pac1934_cancel_delayed_work(void *dwork) 1212 { 1213 cancel_delayed_work_sync(dwork); 1214 } 1215 1216 static int pac1934_chip_configure(struct pac1934_chip_info *info) 1217 { 1218 int cnt, ret; 1219 struct i2c_client *client = info->client; 1220 u8 regs[PAC1934_CTRL_STATUS_INFO_LEN], idx, ctrl_reg; 1221 u32 wait_time; 1222 1223 info->chip_reg_data.num_enabled_channels = 0; 1224 for (cnt = 0; cnt < info->phys_channels; cnt++) { 1225 if (info->active_channels[cnt]) 1226 info->chip_reg_data.num_enabled_channels++; 1227 } 1228 1229 /* 1230 * read whatever information was gathered before the driver was loaded 1231 * establish which channels are enabled/disabled and then establish the 1232 * information retrieval mode (using SKIP or no). 1233 * Read the chip ID values 1234 */ 1235 ret = i2c_smbus_read_i2c_block_data(client, PAC1934_CTRL_STAT_REGS_ADDR, 1236 ARRAY_SIZE(regs), 1237 (u8 *)regs); 1238 if (ret < 0) { 1239 dev_err_probe(&client->dev, ret, 1240 "%s - cannot read regs from 0x%02X\n", 1241 __func__, PAC1934_CTRL_STAT_REGS_ADDR); 1242 return ret; 1243 } 1244 1245 /* write the CHANNEL_DIS and the NEG_PWR registers */ 1246 regs[PAC1934_CHANNEL_DIS_REG_OFF] = 1247 FIELD_PREP(PAC1934_CHAN_DIS_CH1_OFF_MASK, info->active_channels[0] ? 0 : 1) | 1248 FIELD_PREP(PAC1934_CHAN_DIS_CH2_OFF_MASK, info->active_channels[1] ? 0 : 1) | 1249 FIELD_PREP(PAC1934_CHAN_DIS_CH3_OFF_MASK, info->active_channels[2] ? 0 : 1) | 1250 FIELD_PREP(PAC1934_CHAN_DIS_CH4_OFF_MASK, info->active_channels[3] ? 0 : 1) | 1251 FIELD_PREP(PAC1934_SMBUS_TIMEOUT_MASK, 0) | 1252 FIELD_PREP(PAC1934_SMBUS_BYTECOUNT_MASK, 0) | 1253 FIELD_PREP(PAC1934_SMBUS_NO_SKIP_MASK, 0); 1254 1255 regs[PAC1934_NEG_PWR_REG_OFF] = 1256 FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDI_MASK, info->bi_dir[0]) | 1257 FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDI_MASK, info->bi_dir[1]) | 1258 FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDI_MASK, info->bi_dir[2]) | 1259 FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDI_MASK, info->bi_dir[3]) | 1260 FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDV_MASK, info->bi_dir[0]) | 1261 FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDV_MASK, info->bi_dir[1]) | 1262 FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDV_MASK, info->bi_dir[2]) | 1263 FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDV_MASK, info->bi_dir[3]); 1264 1265 /* no SLOW triggered REFRESH, clear POR */ 1266 regs[PAC1934_SLOW_REG_OFF] = 0; 1267 1268 ret = i2c_smbus_write_block_data(client, PAC1934_CTRL_STAT_REGS_ADDR, 1269 ARRAY_SIZE(regs), (u8 *)regs); 1270 if (ret) 1271 return ret; 1272 1273 /* Default sampling rate */ 1274 ctrl_reg = FIELD_PREP(PAC1934_CRTL_SAMPLE_RATE_MASK, PAC1934_SAMP_1024SPS); 1275 1276 ret = i2c_smbus_write_byte_data(client, PAC1934_CTRL_REG_ADDR, ctrl_reg); 1277 if (ret) 1278 return ret; 1279 1280 /* 1281 * send a REFRESH to the chip, so the new settings take place 1282 * as well as resetting the accumulators 1283 */ 1284 ret = i2c_smbus_write_byte(client, PAC1934_REFRESH_REG_ADDR); 1285 if (ret) { 1286 dev_err(&client->dev, 1287 "%s - cannot send 0x%02X\n", 1288 __func__, PAC1934_REFRESH_REG_ADDR); 1289 return ret; 1290 } 1291 1292 /* 1293 * get the current(in the chip) sampling speed and compute the 1294 * required timeout based on its value 1295 * the timeout is 1/sampling_speed 1296 */ 1297 idx = regs[PAC1934_CTRL_ACT_REG_OFF] >> PAC1934_SAMPLE_RATE_SHIFT; 1298 wait_time = (1024 / samp_rate_map_tbl[idx]) * 1000; 1299 1300 /* 1301 * wait the maximum amount of time to be on the safe side 1302 * the maximum wait time is for 8sps 1303 */ 1304 usleep_range(wait_time, wait_time + 100); 1305 1306 INIT_DELAYED_WORK(&info->work_chip_rfsh, pac1934_work_periodic_rfsh); 1307 /* Setup the latest moment for reading the regs before saturation */ 1308 schedule_delayed_work(&info->work_chip_rfsh, 1309 msecs_to_jiffies(PAC1934_MAX_RFSH_LIMIT_MS)); 1310 1311 return devm_add_action_or_reset(&client->dev, pac1934_cancel_delayed_work, 1312 &info->work_chip_rfsh); 1313 } 1314 1315 static int pac1934_prep_iio_channels(struct pac1934_chip_info *info, struct iio_dev *indio_dev) 1316 { 1317 struct iio_chan_spec *ch_sp; 1318 int channel_size, attribute_count, cnt; 1319 void *dyn_ch_struct, *tmp_data; 1320 struct device *dev = &info->client->dev; 1321 1322 /* find out dynamically how many IIO channels we need */ 1323 attribute_count = 0; 1324 channel_size = 0; 1325 for (cnt = 0; cnt < info->phys_channels; cnt++) { 1326 if (!info->active_channels[cnt]) 1327 continue; 1328 1329 /* add the size of the properties of one chip physical channel */ 1330 channel_size += sizeof(pac1934_single_channel); 1331 /* count how many enabled channels we have */ 1332 attribute_count += ARRAY_SIZE(pac1934_single_channel); 1333 dev_dbg(dev, ":%s: Channel %d active\n", __func__, cnt + 1); 1334 } 1335 1336 dyn_ch_struct = devm_kzalloc(dev, channel_size, GFP_KERNEL); 1337 if (!dyn_ch_struct) 1338 return -EINVAL; 1339 1340 tmp_data = dyn_ch_struct; 1341 1342 /* populate the dynamic channels and make all the adjustments */ 1343 for (cnt = 0; cnt < info->phys_channels; cnt++) { 1344 if (!info->active_channels[cnt]) 1345 continue; 1346 1347 memcpy(tmp_data, pac1934_single_channel, sizeof(pac1934_single_channel)); 1348 ch_sp = (struct iio_chan_spec *)tmp_data; 1349 ch_sp[PAC1934_CH_ENERGY].channel = cnt + 1; 1350 ch_sp[PAC1934_CH_ENERGY].scan_index = cnt; 1351 ch_sp[PAC1934_CH_ENERGY].address = cnt + PAC1934_VPOWER_ACC_1_ADDR; 1352 ch_sp[PAC1934_CH_POWER].channel = cnt + 1; 1353 ch_sp[PAC1934_CH_POWER].scan_index = cnt; 1354 ch_sp[PAC1934_CH_POWER].address = cnt + PAC1934_VPOWER_1_ADDR; 1355 ch_sp[PAC1934_CH_VOLTAGE].channel = cnt + 1; 1356 ch_sp[PAC1934_CH_VOLTAGE].scan_index = cnt; 1357 ch_sp[PAC1934_CH_VOLTAGE].address = cnt + PAC1934_VBUS_1_ADDR; 1358 ch_sp[PAC1934_CH_CURRENT].channel = cnt + 1; 1359 ch_sp[PAC1934_CH_CURRENT].scan_index = cnt; 1360 ch_sp[PAC1934_CH_CURRENT].address = cnt + PAC1934_VSENSE_1_ADDR; 1361 1362 /* 1363 * In order to be able to use labels for PAC1934_CH_VOLTAGE, and 1364 * PAC1934_CH_VOLTAGE_AVERAGE,respectively PAC1934_CH_CURRENT 1365 * and PAC1934_CH_CURRENT_AVERAGE we need to use different 1366 * channel numbers. We will add +5 (+1 to maximum PAC channels). 1367 */ 1368 ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].channel = cnt + 5; 1369 ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].scan_index = cnt; 1370 ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].address = cnt + PAC1934_VBUS_AVG_1_ADDR; 1371 ch_sp[PAC1934_CH_CURRENT_AVERAGE].channel = cnt + 5; 1372 ch_sp[PAC1934_CH_CURRENT_AVERAGE].scan_index = cnt; 1373 ch_sp[PAC1934_CH_CURRENT_AVERAGE].address = cnt + PAC1934_VSENSE_AVG_1_ADDR; 1374 1375 /* 1376 * now modify the parameters in all channels if the 1377 * whole chip rail(channel) is bi-directional 1378 */ 1379 if (info->bi_dir[cnt]) { 1380 ch_sp[PAC1934_CH_ENERGY].scan_type.sign = 's'; 1381 ch_sp[PAC1934_CH_ENERGY].scan_type.realbits = 47; 1382 ch_sp[PAC1934_CH_POWER].scan_type.sign = 's'; 1383 ch_sp[PAC1934_CH_POWER].scan_type.realbits = 27; 1384 ch_sp[PAC1934_CH_VOLTAGE].scan_type.sign = 's'; 1385 ch_sp[PAC1934_CH_VOLTAGE].scan_type.realbits = 15; 1386 ch_sp[PAC1934_CH_CURRENT].scan_type.sign = 's'; 1387 ch_sp[PAC1934_CH_CURRENT].scan_type.realbits = 15; 1388 ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].scan_type.sign = 's'; 1389 ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].scan_type.realbits = 15; 1390 ch_sp[PAC1934_CH_CURRENT_AVERAGE].scan_type.sign = 's'; 1391 ch_sp[PAC1934_CH_CURRENT_AVERAGE].scan_type.realbits = 15; 1392 } 1393 tmp_data += sizeof(pac1934_single_channel); 1394 } 1395 1396 /* 1397 * send the updated dynamic channel structure information towards IIO 1398 * prepare the required field for IIO class registration 1399 */ 1400 indio_dev->num_channels = attribute_count; 1401 indio_dev->channels = (const struct iio_chan_spec *)dyn_ch_struct; 1402 1403 return 0; 1404 } 1405 1406 static IIO_DEVICE_ATTR(in_shunt_resistor1, 0644, 1407 pac1934_shunt_value_show, pac1934_shunt_value_store, 0); 1408 static IIO_DEVICE_ATTR(in_shunt_resistor2, 0644, 1409 pac1934_shunt_value_show, pac1934_shunt_value_store, 1); 1410 static IIO_DEVICE_ATTR(in_shunt_resistor3, 0644, 1411 pac1934_shunt_value_show, pac1934_shunt_value_store, 2); 1412 static IIO_DEVICE_ATTR(in_shunt_resistor4, 0644, 1413 pac1934_shunt_value_show, pac1934_shunt_value_store, 3); 1414 1415 static int pac1934_prep_custom_attributes(struct pac1934_chip_info *info, 1416 struct iio_dev *indio_dev) 1417 { 1418 int i, active_channels_count = 0; 1419 struct attribute **pac1934_custom_attr; 1420 struct attribute_group *pac1934_group; 1421 struct device *dev = &info->client->dev; 1422 1423 for (i = 0 ; i < info->phys_channels; i++) 1424 if (info->active_channels[i]) 1425 active_channels_count++; 1426 1427 pac1934_group = devm_kzalloc(dev, sizeof(*pac1934_group), GFP_KERNEL); 1428 if (!pac1934_group) 1429 return -ENOMEM; 1430 1431 pac1934_custom_attr = devm_kzalloc(dev, 1432 (PAC1934_CUSTOM_ATTR_FOR_CHANNEL * 1433 active_channels_count) 1434 * sizeof(*pac1934_group) + 1, 1435 GFP_KERNEL); 1436 if (!pac1934_custom_attr) 1437 return -ENOMEM; 1438 1439 i = 0; 1440 if (info->active_channels[0]) 1441 pac1934_custom_attr[i++] = PAC1934_DEV_ATTR(in_shunt_resistor1); 1442 1443 if (info->active_channels[1]) 1444 pac1934_custom_attr[i++] = PAC1934_DEV_ATTR(in_shunt_resistor2); 1445 1446 if (info->active_channels[2]) 1447 pac1934_custom_attr[i++] = PAC1934_DEV_ATTR(in_shunt_resistor3); 1448 1449 if (info->active_channels[3]) 1450 pac1934_custom_attr[i] = PAC1934_DEV_ATTR(in_shunt_resistor4); 1451 1452 pac1934_group->attrs = pac1934_custom_attr; 1453 info->iio_info.attrs = pac1934_group; 1454 1455 return 0; 1456 } 1457 1458 static void pac1934_mutex_destroy(void *data) 1459 { 1460 struct mutex *lock = data; 1461 1462 mutex_destroy(lock); 1463 } 1464 1465 static const struct iio_info pac1934_info = { 1466 .read_raw = pac1934_read_raw, 1467 .write_raw = pac1934_write_raw, 1468 .read_avail = pac1934_read_avail, 1469 .read_label = pac1934_read_label, 1470 }; 1471 1472 static int pac1934_probe(struct i2c_client *client) 1473 { 1474 struct pac1934_chip_info *info; 1475 const struct pac1934_features *chip; 1476 struct iio_dev *indio_dev; 1477 int cnt, ret; 1478 struct device *dev = &client->dev; 1479 1480 indio_dev = devm_iio_device_alloc(dev, sizeof(*info)); 1481 if (!indio_dev) 1482 return -ENOMEM; 1483 1484 info = iio_priv(indio_dev); 1485 1486 info->client = client; 1487 1488 /* always start with energy accumulation enabled */ 1489 for (cnt = 0; cnt < PAC1934_MAX_NUM_CHANNELS; cnt++) 1490 info->enable_energy[cnt] = true; 1491 1492 ret = pac1934_chip_identify(info); 1493 if (ret < 0) { 1494 /* 1495 * If failed to identify the hardware based on internal 1496 * registers, try using fallback compatible in device tree 1497 * to deal with some newer part number. 1498 */ 1499 chip = i2c_get_match_data(client); 1500 if (!chip) 1501 return -EINVAL; 1502 1503 info->phys_channels = chip->phys_channels; 1504 indio_dev->name = chip->name; 1505 } else { 1506 info->phys_channels = pac1934_chip_config[ret].phys_channels; 1507 indio_dev->name = pac1934_chip_config[ret].name; 1508 } 1509 1510 if (acpi_match_device(dev->driver->acpi_match_table, dev)) 1511 ret = pac1934_acpi_parse_channel_config(client, info); 1512 else 1513 /* 1514 * This makes it possible to use also ACPI PRP0001 for 1515 * registering the device using device tree properties. 1516 */ 1517 ret = pac1934_fw_parse_channel_config(client, info); 1518 1519 if (ret) 1520 return dev_err_probe(dev, ret, 1521 "parameter parsing returned an error\n"); 1522 1523 mutex_init(&info->lock); 1524 ret = devm_add_action_or_reset(dev, pac1934_mutex_destroy, 1525 &info->lock); 1526 if (ret < 0) 1527 return ret; 1528 1529 /* 1530 * do now any chip specific initialization (e.g. read/write 1531 * some registers), enable/disable certain channels, change the sampling 1532 * rate to the requested value 1533 */ 1534 ret = pac1934_chip_configure(info); 1535 if (ret < 0) 1536 return ret; 1537 1538 /* prepare the channel information */ 1539 ret = pac1934_prep_iio_channels(info, indio_dev); 1540 if (ret < 0) 1541 return ret; 1542 1543 info->iio_info = pac1934_info; 1544 indio_dev->info = &info->iio_info; 1545 indio_dev->modes = INDIO_DIRECT_MODE; 1546 1547 ret = pac1934_prep_custom_attributes(info, indio_dev); 1548 if (ret < 0) 1549 return dev_err_probe(dev, ret, 1550 "Can't configure custom attributes for PAC1934 device\n"); 1551 1552 /* 1553 * read whatever has been accumulated in the chip so far 1554 * and reset the accumulators 1555 */ 1556 ret = pac1934_reg_snapshot(info, true, PAC1934_REFRESH_REG_ADDR, 1557 PAC1934_MIN_UPDATE_WAIT_TIME_US); 1558 if (ret < 0) 1559 return ret; 1560 1561 ret = devm_iio_device_register(dev, indio_dev); 1562 if (ret < 0) 1563 return dev_err_probe(dev, ret, 1564 "Can't register IIO device\n"); 1565 1566 return 0; 1567 } 1568 1569 static const struct i2c_device_id pac1934_id[] = { 1570 { .name = "pac1931", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1931] }, 1571 { .name = "pac1932", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1932] }, 1572 { .name = "pac1933", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1933] }, 1573 { .name = "pac1934", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1934] }, 1574 { } 1575 }; 1576 MODULE_DEVICE_TABLE(i2c, pac1934_id); 1577 1578 static const struct of_device_id pac1934_of_match[] = { 1579 { 1580 .compatible = "microchip,pac1931", 1581 .data = &pac1934_chip_config[PAC1931] 1582 }, 1583 { 1584 .compatible = "microchip,pac1932", 1585 .data = &pac1934_chip_config[PAC1932] 1586 }, 1587 { 1588 .compatible = "microchip,pac1933", 1589 .data = &pac1934_chip_config[PAC1933] 1590 }, 1591 { 1592 .compatible = "microchip,pac1934", 1593 .data = &pac1934_chip_config[PAC1934] 1594 }, 1595 { } 1596 }; 1597 MODULE_DEVICE_TABLE(of, pac1934_of_match); 1598 1599 /* 1600 * using MCHP1930 to be compatible with BIOS ACPI. See example: 1601 * https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ApplicationNotes/ApplicationNotes/PAC1934-Integration-Notes-for-Microsoft-Windows-10-and-Windows-11-Driver-Support-DS00002534.pdf 1602 */ 1603 static const struct acpi_device_id pac1934_acpi_match[] = { 1604 { "MCHP1930", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1934] }, 1605 { } 1606 }; 1607 MODULE_DEVICE_TABLE(acpi, pac1934_acpi_match); 1608 1609 static struct i2c_driver pac1934_driver = { 1610 .driver = { 1611 .name = "pac1934", 1612 .of_match_table = pac1934_of_match, 1613 .acpi_match_table = pac1934_acpi_match 1614 }, 1615 .probe = pac1934_probe, 1616 .id_table = pac1934_id, 1617 }; 1618 1619 module_i2c_driver(pac1934_driver); 1620 1621 MODULE_AUTHOR("Bogdan Bolocan <bogdan.bolocan@microchip.com>"); 1622 MODULE_AUTHOR("Victor Tudose"); 1623 MODULE_AUTHOR("Marius Cristea <marius.cristea@microchip.com>"); 1624 MODULE_DESCRIPTION("IIO driver for PAC1934 Multi-Channel DC Power/Energy Monitor"); 1625 MODULE_LICENSE("GPL"); 1626