1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * IIO driver for PAC1934 Multi-Channel DC Power/Energy Monitor 4 * 5 * Copyright (C) 2017-2024 Microchip Technology Inc. and its subsidiaries 6 * 7 * Author: Bogdan Bolocan <bogdan.bolocan@microchip.com> 8 * Author: Victor Tudose 9 * Author: Marius Cristea <marius.cristea@microchip.com> 10 * 11 * Datasheet for PAC1931, PAC1932, PAC1933 and PAC1934 can be found here: 12 * https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/DataSheets/PAC1931-Family-Data-Sheet-DS20005850E.pdf 13 */ 14 15 #include <linux/acpi.h> 16 #include <linux/bitfield.h> 17 #include <linux/delay.h> 18 #include <linux/device.h> 19 #include <linux/i2c.h> 20 #include <linux/iio/iio.h> 21 #include <linux/iio/sysfs.h> 22 #include <asm/unaligned.h> 23 24 /* 25 * maximum accumulation time should be (17 * 60 * 1000) around 17 minutes@1024 sps 26 * till PAC1934 accumulation registers starts to saturate 27 */ 28 #define PAC1934_MAX_RFSH_LIMIT_MS 60000 29 /* 50msec is the timeout for validity of the cached registers */ 30 #define PAC1934_MIN_POLLING_TIME_MS 50 31 /* 32 * 1000usec is the minimum wait time for normal conversions when sample 33 * rate doesn't change 34 */ 35 #define PAC1934_MIN_UPDATE_WAIT_TIME_US 1000 36 37 /* 32000mV */ 38 #define PAC1934_VOLTAGE_MILLIVOLTS_MAX 32000 39 /* voltage bits resolution when set for unsigned values */ 40 #define PAC1934_VOLTAGE_U_RES 16 41 /* voltage bits resolution when set for signed values */ 42 #define PAC1934_VOLTAGE_S_RES 15 43 44 /* 45 * max signed value that can be stored on 32 bits and 8 digits fractional value 46 * (2^31 - 1) * 10^8 + 99999999 47 */ 48 #define PAC_193X_MAX_POWER_ACC 214748364799999999LL 49 /* 50 * min signed value that can be stored on 32 bits and 8 digits fractional value 51 * -(2^31) * 10^8 - 99999999 52 */ 53 #define PAC_193X_MIN_POWER_ACC -214748364899999999LL 54 55 #define PAC1934_MAX_NUM_CHANNELS 4 56 57 #define PAC1934_MEAS_REG_LEN 76 58 #define PAC1934_CTRL_REG_LEN 12 59 60 #define PAC1934_DEFAULT_CHIP_SAMP_SPEED_HZ 1024 61 62 /* I2C address map */ 63 #define PAC1934_REFRESH_REG_ADDR 0x00 64 #define PAC1934_CTRL_REG_ADDR 0x01 65 #define PAC1934_ACC_COUNT_REG_ADDR 0x02 66 #define PAC1934_VPOWER_ACC_1_ADDR 0x03 67 #define PAC1934_VPOWER_ACC_2_ADDR 0x04 68 #define PAC1934_VPOWER_ACC_3_ADDR 0x05 69 #define PAC1934_VPOWER_ACC_4_ADDR 0x06 70 #define PAC1934_VBUS_1_ADDR 0x07 71 #define PAC1934_VBUS_2_ADDR 0x08 72 #define PAC1934_VBUS_3_ADDR 0x09 73 #define PAC1934_VBUS_4_ADDR 0x0A 74 #define PAC1934_VSENSE_1_ADDR 0x0B 75 #define PAC1934_VSENSE_2_ADDR 0x0C 76 #define PAC1934_VSENSE_3_ADDR 0x0D 77 #define PAC1934_VSENSE_4_ADDR 0x0E 78 #define PAC1934_VBUS_AVG_1_ADDR 0x0F 79 #define PAC1934_VBUS_AVG_2_ADDR 0x10 80 #define PAC1934_VBUS_AVG_3_ADDR 0x11 81 #define PAC1934_VBUS_AVG_4_ADDR 0x12 82 #define PAC1934_VSENSE_AVG_1_ADDR 0x13 83 #define PAC1934_VSENSE_AVG_2_ADDR 0x14 84 #define PAC1934_VSENSE_AVG_3_ADDR 0x15 85 #define PAC1934_VSENSE_AVG_4_ADDR 0x16 86 #define PAC1934_VPOWER_1_ADDR 0x17 87 #define PAC1934_VPOWER_2_ADDR 0x18 88 #define PAC1934_VPOWER_3_ADDR 0x19 89 #define PAC1934_VPOWER_4_ADDR 0x1A 90 #define PAC1934_REFRESH_V_REG_ADDR 0x1F 91 #define PAC1934_CTRL_STAT_REGS_ADDR 0x1C 92 #define PAC1934_PID_REG_ADDR 0xFD 93 #define PAC1934_MID_REG_ADDR 0xFE 94 #define PAC1934_RID_REG_ADDR 0xFF 95 96 /* PRODUCT ID REGISTER + MANUFACTURER ID REGISTER + REVISION ID REGISTER */ 97 #define PAC1934_ID_REG_LEN 3 98 #define PAC1934_PID_IDX 0 99 #define PAC1934_MID_IDX 1 100 #define PAC1934_RID_IDX 2 101 102 #define PAC1934_ACPI_GET_NAMES_AND_MOHMS_VALS 1 103 #define PAC1934_ACPI_GET_UOHMS_VALS 2 104 #define PAC1934_ACPI_GET_BIPOLAR_SETTINGS 4 105 #define PAC1934_ACPI_GET_SAMP 5 106 107 #define PAC1934_SAMPLE_RATE_SHIFT 6 108 109 #define PAC1934_VBUS_SENSE_REG_LEN 2 110 #define PAC1934_ACC_REG_LEN 3 111 #define PAC1934_VPOWER_REG_LEN 4 112 #define PAC1934_VPOWER_ACC_REG_LEN 6 113 #define PAC1934_MAX_REGISTER_LENGTH 6 114 115 #define PAC1934_CUSTOM_ATTR_FOR_CHANNEL 1 116 117 /* 118 * relative offsets when using multi-byte reads/writes even though these 119 * bytes are read one after the other, they are not at adjacent memory 120 * locations within the I2C memory map. The chip can skip some addresses 121 */ 122 #define PAC1934_CHANNEL_DIS_REG_OFF 0 123 #define PAC1934_NEG_PWR_REG_OFF 1 124 125 /* 126 * when reading/writing multiple bytes from offset PAC1934_CHANNEL_DIS_REG_OFF, 127 * the chip jumps over the 0x1E (REFRESH_G) and 0x1F (REFRESH_V) offsets 128 */ 129 #define PAC1934_SLOW_REG_OFF 2 130 #define PAC1934_CTRL_ACT_REG_OFF 3 131 #define PAC1934_CHANNEL_DIS_ACT_REG_OFF 4 132 #define PAC1934_NEG_PWR_ACT_REG_OFF 5 133 #define PAC1934_CTRL_LAT_REG_OFF 6 134 #define PAC1934_CHANNEL_DIS_LAT_REG_OFF 7 135 #define PAC1934_NEG_PWR_LAT_REG_OFF 8 136 #define PAC1934_PID_REG_OFF 9 137 #define PAC1934_MID_REG_OFF 10 138 #define PAC1934_REV_REG_OFF 11 139 #define PAC1934_CTRL_STATUS_INFO_LEN 12 140 141 #define PAC1934_MID 0x5D 142 #define PAC1931_PID 0x58 143 #define PAC1932_PID 0x59 144 #define PAC1933_PID 0x5A 145 #define PAC1934_PID 0x5B 146 147 /* Scale constant = (10^3 * 3.2 * 10^9 / 2^28) for mili Watt-second */ 148 #define PAC1934_SCALE_CONSTANT 11921 149 150 #define PAC1934_MAX_VPOWER_RSHIFTED_BY_28B 11921 151 #define PAC1934_MAX_VSENSE_RSHIFTED_BY_16B 1525 152 153 #define PAC1934_DEV_ATTR(name) (&iio_dev_attr_##name.dev_attr.attr) 154 155 #define PAC1934_CRTL_SAMPLE_RATE_MASK GENMASK(7, 6) 156 #define PAC1934_CHAN_SLEEP_MASK BIT(5) 157 #define PAC1934_CHAN_SLEEP_SET BIT(5) 158 #define PAC1934_CHAN_SINGLE_MASK BIT(4) 159 #define PAC1934_CHAN_SINGLE_SHOT_SET BIT(4) 160 #define PAC1934_CHAN_ALERT_MASK BIT(3) 161 #define PAC1934_CHAN_ALERT_EN BIT(3) 162 #define PAC1934_CHAN_ALERT_CC_MASK BIT(2) 163 #define PAC1934_CHAN_ALERT_CC_EN BIT(2) 164 #define PAC1934_CHAN_OVF_ALERT_MASK BIT(1) 165 #define PAC1934_CHAN_OVF_ALERT_EN BIT(1) 166 #define PAC1934_CHAN_OVF_MASK BIT(0) 167 168 #define PAC1934_CHAN_DIS_CH1_OFF_MASK BIT(7) 169 #define PAC1934_CHAN_DIS_CH2_OFF_MASK BIT(6) 170 #define PAC1934_CHAN_DIS_CH3_OFF_MASK BIT(5) 171 #define PAC1934_CHAN_DIS_CH4_OFF_MASK BIT(4) 172 #define PAC1934_SMBUS_TIMEOUT_MASK BIT(3) 173 #define PAC1934_SMBUS_BYTECOUNT_MASK BIT(2) 174 #define PAC1934_SMBUS_NO_SKIP_MASK BIT(1) 175 176 #define PAC1934_NEG_PWR_CH1_BIDI_MASK BIT(7) 177 #define PAC1934_NEG_PWR_CH2_BIDI_MASK BIT(6) 178 #define PAC1934_NEG_PWR_CH3_BIDI_MASK BIT(5) 179 #define PAC1934_NEG_PWR_CH4_BIDI_MASK BIT(4) 180 #define PAC1934_NEG_PWR_CH1_BIDV_MASK BIT(3) 181 #define PAC1934_NEG_PWR_CH2_BIDV_MASK BIT(2) 182 #define PAC1934_NEG_PWR_CH3_BIDV_MASK BIT(1) 183 #define PAC1934_NEG_PWR_CH4_BIDV_MASK BIT(0) 184 185 /* 186 * Universal Unique Identifier (UUID), 187 * 033771E0-1705-47B4-9535-D1BBE14D9A09, 188 * is reserved to Microchip for the PAC1934. 189 */ 190 #define PAC1934_DSM_UUID "033771E0-1705-47B4-9535-D1BBE14D9A09" 191 192 enum pac1934_ids { 193 PAC1931, 194 PAC1932, 195 PAC1933, 196 PAC1934 197 }; 198 199 enum pac1934_samps { 200 PAC1934_SAMP_1024SPS, 201 PAC1934_SAMP_256SPS, 202 PAC1934_SAMP_64SPS, 203 PAC1934_SAMP_8SPS 204 }; 205 206 /* 207 * these indexes are exactly describing the element order within a single 208 * PAC1934 phys channel IIO channel descriptor; see the static const struct 209 * iio_chan_spec pac1934_single_channel[] declaration 210 */ 211 enum pac1934_ch_idx { 212 PAC1934_CH_ENERGY, 213 PAC1934_CH_POWER, 214 PAC1934_CH_VOLTAGE, 215 PAC1934_CH_CURRENT, 216 PAC1934_CH_VOLTAGE_AVERAGE, 217 PAC1934_CH_CURRENT_AVERAGE 218 }; 219 220 /** 221 * struct pac1934_features - features of a pac1934 instance 222 * @phys_channels: number of physical channels supported by the chip 223 * @name: chip's name 224 */ 225 struct pac1934_features { 226 u8 phys_channels; 227 const char *name; 228 }; 229 230 struct samp_rate_mapping { 231 u16 samp_rate; 232 u8 shift2value; 233 }; 234 235 static const unsigned int samp_rate_map_tbl[] = { 236 [PAC1934_SAMP_1024SPS] = 1024, 237 [PAC1934_SAMP_256SPS] = 256, 238 [PAC1934_SAMP_64SPS] = 64, 239 [PAC1934_SAMP_8SPS] = 8, 240 }; 241 242 static const struct pac1934_features pac1934_chip_config[] = { 243 [PAC1931] = { 244 .phys_channels = 1, 245 .name = "pac1931", 246 }, 247 [PAC1932] = { 248 .phys_channels = 2, 249 .name = "pac1932", 250 }, 251 [PAC1933] = { 252 .phys_channels = 3, 253 .name = "pac1933", 254 }, 255 [PAC1934] = { 256 .phys_channels = 4, 257 .name = "pac1934", 258 }, 259 }; 260 261 /** 262 * struct reg_data - data from the registers 263 * @meas_regs: snapshot of raw measurements registers 264 * @ctrl_regs: snapshot of control registers 265 * @energy_sec_acc: snapshot of energy values 266 * @vpower_acc: accumulated vpower values 267 * @vpower: snapshot of vpower registers 268 * @vbus: snapshot of vbus registers 269 * @vbus_avg: averages of vbus registers 270 * @vsense: snapshot of vsense registers 271 * @vsense_avg: averages of vsense registers 272 * @num_enabled_channels: count of how many chip channels are currently enabled 273 */ 274 struct reg_data { 275 u8 meas_regs[PAC1934_MEAS_REG_LEN]; 276 u8 ctrl_regs[PAC1934_CTRL_REG_LEN]; 277 s64 energy_sec_acc[PAC1934_MAX_NUM_CHANNELS]; 278 s64 vpower_acc[PAC1934_MAX_NUM_CHANNELS]; 279 s32 vpower[PAC1934_MAX_NUM_CHANNELS]; 280 s32 vbus[PAC1934_MAX_NUM_CHANNELS]; 281 s32 vbus_avg[PAC1934_MAX_NUM_CHANNELS]; 282 s32 vsense[PAC1934_MAX_NUM_CHANNELS]; 283 s32 vsense_avg[PAC1934_MAX_NUM_CHANNELS]; 284 u8 num_enabled_channels; 285 }; 286 287 /** 288 * struct pac1934_chip_info - information about the chip 289 * @client: the i2c-client attached to the device 290 * @lock: synchronize access to driver's state members 291 * @work_chip_rfsh: work queue used for refresh commands 292 * @phys_channels: phys channels count 293 * @active_channels: array of values, true means that channel is active 294 * @enable_energy: array of values, true means that channel energy is measured 295 * @bi_dir: array of bools, true means that channel is bidirectional 296 * @chip_variant: chip variant 297 * @chip_revision: chip revision 298 * @shunts: shunts 299 * @chip_reg_data: chip reg data 300 * @sample_rate_value: sampling frequency 301 * @labels: table with channels labels 302 * @iio_info: iio_info 303 * @tstamp: chip's uptime 304 */ 305 struct pac1934_chip_info { 306 struct i2c_client *client; 307 struct mutex lock; /* synchronize access to driver's state members */ 308 struct delayed_work work_chip_rfsh; 309 u8 phys_channels; 310 bool active_channels[PAC1934_MAX_NUM_CHANNELS]; 311 bool enable_energy[PAC1934_MAX_NUM_CHANNELS]; 312 bool bi_dir[PAC1934_MAX_NUM_CHANNELS]; 313 u8 chip_variant; 314 u8 chip_revision; 315 u32 shunts[PAC1934_MAX_NUM_CHANNELS]; 316 struct reg_data chip_reg_data; 317 s32 sample_rate_value; 318 char *labels[PAC1934_MAX_NUM_CHANNELS]; 319 struct iio_info iio_info; 320 unsigned long tstamp; 321 }; 322 323 #define TO_PAC1934_CHIP_INFO(d) container_of(d, struct pac1934_chip_info, work_chip_rfsh) 324 325 #define PAC1934_VPOWER_ACC_CHANNEL(_index, _si, _address) { \ 326 .type = IIO_ENERGY, \ 327 .address = (_address), \ 328 .indexed = 1, \ 329 .channel = (_index), \ 330 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 331 BIT(IIO_CHAN_INFO_SCALE) | \ 332 BIT(IIO_CHAN_INFO_ENABLE), \ 333 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 334 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 335 .scan_index = (_si), \ 336 .scan_type = { \ 337 .sign = 'u', \ 338 .realbits = 48, \ 339 .storagebits = 64, \ 340 .endianness = IIO_CPU, \ 341 } \ 342 } 343 344 #define PAC1934_VBUS_CHANNEL(_index, _si, _address) { \ 345 .type = IIO_VOLTAGE, \ 346 .address = (_address), \ 347 .indexed = 1, \ 348 .channel = (_index), \ 349 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 350 BIT(IIO_CHAN_INFO_SCALE), \ 351 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 352 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 353 .scan_index = (_si), \ 354 .scan_type = { \ 355 .sign = 'u', \ 356 .realbits = 16, \ 357 .storagebits = 16, \ 358 .endianness = IIO_CPU, \ 359 } \ 360 } 361 362 #define PAC1934_VBUS_AVG_CHANNEL(_index, _si, _address) { \ 363 .type = IIO_VOLTAGE, \ 364 .address = (_address), \ 365 .indexed = 1, \ 366 .channel = (_index), \ 367 .info_mask_separate = BIT(IIO_CHAN_INFO_AVERAGE_RAW) | \ 368 BIT(IIO_CHAN_INFO_SCALE), \ 369 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 370 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 371 .scan_index = (_si), \ 372 .scan_type = { \ 373 .sign = 'u', \ 374 .realbits = 16, \ 375 .storagebits = 16, \ 376 .endianness = IIO_CPU, \ 377 } \ 378 } 379 380 #define PAC1934_VSENSE_CHANNEL(_index, _si, _address) { \ 381 .type = IIO_CURRENT, \ 382 .address = (_address), \ 383 .indexed = 1, \ 384 .channel = (_index), \ 385 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 386 BIT(IIO_CHAN_INFO_SCALE), \ 387 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 388 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 389 .scan_index = (_si), \ 390 .scan_type = { \ 391 .sign = 'u', \ 392 .realbits = 16, \ 393 .storagebits = 16, \ 394 .endianness = IIO_CPU, \ 395 } \ 396 } 397 398 #define PAC1934_VSENSE_AVG_CHANNEL(_index, _si, _address) { \ 399 .type = IIO_CURRENT, \ 400 .address = (_address), \ 401 .indexed = 1, \ 402 .channel = (_index), \ 403 .info_mask_separate = BIT(IIO_CHAN_INFO_AVERAGE_RAW) | \ 404 BIT(IIO_CHAN_INFO_SCALE), \ 405 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 406 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 407 .scan_index = (_si), \ 408 .scan_type = { \ 409 .sign = 'u', \ 410 .realbits = 16, \ 411 .storagebits = 16, \ 412 .endianness = IIO_CPU, \ 413 } \ 414 } 415 416 #define PAC1934_VPOWER_CHANNEL(_index, _si, _address) { \ 417 .type = IIO_POWER, \ 418 .address = (_address), \ 419 .indexed = 1, \ 420 .channel = (_index), \ 421 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 422 BIT(IIO_CHAN_INFO_SCALE), \ 423 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 424 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 425 .scan_index = (_si), \ 426 .scan_type = { \ 427 .sign = 'u', \ 428 .realbits = 28, \ 429 .storagebits = 32, \ 430 .shift = 4, \ 431 .endianness = IIO_CPU, \ 432 } \ 433 } 434 435 static const struct iio_chan_spec pac1934_single_channel[] = { 436 PAC1934_VPOWER_ACC_CHANNEL(0, 0, PAC1934_VPOWER_ACC_1_ADDR), 437 PAC1934_VPOWER_CHANNEL(0, 0, PAC1934_VPOWER_1_ADDR), 438 PAC1934_VBUS_CHANNEL(0, 0, PAC1934_VBUS_1_ADDR), 439 PAC1934_VSENSE_CHANNEL(0, 0, PAC1934_VSENSE_1_ADDR), 440 PAC1934_VBUS_AVG_CHANNEL(0, 0, PAC1934_VBUS_AVG_1_ADDR), 441 PAC1934_VSENSE_AVG_CHANNEL(0, 0, PAC1934_VSENSE_AVG_1_ADDR), 442 }; 443 444 /* Low-level I2c functions used to transfer up to 76 bytes at once */ 445 static int pac1934_i2c_read(struct i2c_client *client, u8 reg_addr, 446 void *databuf, u8 len) 447 { 448 int ret; 449 struct i2c_msg msgs[2] = { 450 { 451 .addr = client->addr, 452 .len = 1, 453 .buf = (u8 *)®_addr, 454 }, 455 { 456 .addr = client->addr, 457 .len = len, 458 .buf = databuf, 459 .flags = I2C_M_RD 460 } 461 }; 462 463 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 464 if (ret < 0) 465 return ret; 466 467 return 0; 468 } 469 470 static int pac1934_get_samp_rate_idx(struct pac1934_chip_info *info, 471 u32 new_samp_rate) 472 { 473 int cnt; 474 475 for (cnt = 0; cnt < ARRAY_SIZE(samp_rate_map_tbl); cnt++) 476 if (new_samp_rate == samp_rate_map_tbl[cnt]) 477 return cnt; 478 479 /* not a valid sample rate value */ 480 return -EINVAL; 481 } 482 483 static ssize_t pac1934_shunt_value_show(struct device *dev, 484 struct device_attribute *attr, 485 char *buf) 486 { 487 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 488 struct pac1934_chip_info *info = iio_priv(indio_dev); 489 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 490 491 return sysfs_emit(buf, "%u\n", info->shunts[this_attr->address]); 492 } 493 494 static ssize_t pac1934_shunt_value_store(struct device *dev, 495 struct device_attribute *attr, 496 const char *buf, size_t count) 497 { 498 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 499 struct pac1934_chip_info *info = iio_priv(indio_dev); 500 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 501 int sh_val; 502 503 if (kstrtouint(buf, 10, &sh_val)) { 504 dev_err(dev, "Shunt value is not valid\n"); 505 return -EINVAL; 506 } 507 508 scoped_guard(mutex, &info->lock) 509 info->shunts[this_attr->address] = sh_val; 510 511 return count; 512 } 513 514 static int pac1934_read_avail(struct iio_dev *indio_dev, 515 struct iio_chan_spec const *channel, 516 const int **vals, int *type, int *length, long mask) 517 { 518 switch (mask) { 519 case IIO_CHAN_INFO_SAMP_FREQ: 520 *type = IIO_VAL_INT; 521 *vals = samp_rate_map_tbl; 522 *length = ARRAY_SIZE(samp_rate_map_tbl); 523 return IIO_AVAIL_LIST; 524 } 525 526 return -EINVAL; 527 } 528 529 static int pac1934_send_refresh(struct pac1934_chip_info *info, 530 u8 refresh_cmd, u32 wait_time) 531 { 532 /* this function only sends REFRESH or REFRESH_V */ 533 struct i2c_client *client = info->client; 534 int ret; 535 u8 bidir_reg; 536 bool revision_bug = false; 537 538 if (info->chip_revision == 2 || info->chip_revision == 3) { 539 /* 540 * chip rev 2 and 3 bug workaround 541 * see: PAC1934 Family Data Sheet Errata DS80000836A.pdf 542 */ 543 revision_bug = true; 544 545 bidir_reg = 546 FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDI_MASK, info->bi_dir[0]) | 547 FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDI_MASK, info->bi_dir[1]) | 548 FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDI_MASK, info->bi_dir[2]) | 549 FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDI_MASK, info->bi_dir[3]) | 550 FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDV_MASK, info->bi_dir[0]) | 551 FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDV_MASK, info->bi_dir[1]) | 552 FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDV_MASK, info->bi_dir[2]) | 553 FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDV_MASK, info->bi_dir[3]); 554 555 ret = i2c_smbus_write_byte_data(client, 556 PAC1934_CTRL_STAT_REGS_ADDR + 557 PAC1934_NEG_PWR_REG_OFF, 558 bidir_reg); 559 if (ret) 560 return ret; 561 } 562 563 ret = i2c_smbus_write_byte(client, refresh_cmd); 564 if (ret) { 565 dev_err(&client->dev, "%s - cannot send 0x%02X\n", 566 __func__, refresh_cmd); 567 return ret; 568 } 569 570 if (revision_bug) { 571 /* 572 * chip rev 2 and 3 bug workaround - write again the same 573 * register write the updated registers back 574 */ 575 ret = i2c_smbus_write_byte_data(client, 576 PAC1934_CTRL_STAT_REGS_ADDR + 577 PAC1934_NEG_PWR_REG_OFF, bidir_reg); 578 if (ret) 579 return ret; 580 } 581 582 /* register data retrieval timestamp */ 583 info->tstamp = jiffies; 584 585 /* wait till the data is available */ 586 usleep_range(wait_time, wait_time + 100); 587 588 return ret; 589 } 590 591 static int pac1934_reg_snapshot(struct pac1934_chip_info *info, 592 bool do_refresh, u8 refresh_cmd, u32 wait_time) 593 { 594 int ret; 595 struct i2c_client *client = info->client; 596 u8 samp_shift, ctrl_regs_tmp; 597 u8 *offset_reg_data_p; 598 u16 tmp_value; 599 u32 samp_rate, cnt, tmp; 600 s64 curr_energy, inc; 601 u64 tmp_energy; 602 struct reg_data *reg_data; 603 604 guard(mutex)(&info->lock); 605 606 if (do_refresh) { 607 ret = pac1934_send_refresh(info, refresh_cmd, wait_time); 608 if (ret < 0) { 609 dev_err(&client->dev, 610 "%s - cannot send refresh\n", 611 __func__); 612 return ret; 613 } 614 } 615 616 ret = i2c_smbus_read_i2c_block_data(client, PAC1934_CTRL_STAT_REGS_ADDR, 617 PAC1934_CTRL_REG_LEN, 618 (u8 *)info->chip_reg_data.ctrl_regs); 619 if (ret < 0) { 620 dev_err(&client->dev, 621 "%s - cannot read ctrl/status registers\n", 622 __func__); 623 return ret; 624 } 625 626 reg_data = &info->chip_reg_data; 627 628 /* read the data registers */ 629 ret = pac1934_i2c_read(client, PAC1934_ACC_COUNT_REG_ADDR, 630 (u8 *)reg_data->meas_regs, PAC1934_MEAS_REG_LEN); 631 if (ret) { 632 dev_err(&client->dev, 633 "%s - cannot read ACC_COUNT register: %d:%d\n", 634 __func__, ret, PAC1934_MEAS_REG_LEN); 635 return ret; 636 } 637 638 /* see how much shift is required by the sample rate */ 639 samp_rate = samp_rate_map_tbl[((reg_data->ctrl_regs[PAC1934_CTRL_LAT_REG_OFF]) >> 6)]; 640 samp_shift = get_count_order(samp_rate); 641 642 ctrl_regs_tmp = reg_data->ctrl_regs[PAC1934_CHANNEL_DIS_LAT_REG_OFF]; 643 offset_reg_data_p = ®_data->meas_regs[PAC1934_ACC_REG_LEN]; 644 645 /* start with VPOWER_ACC */ 646 for (cnt = 0; cnt < info->phys_channels; cnt++) { 647 /* check if the channel is active, skip all fields if disabled */ 648 if ((ctrl_regs_tmp << cnt) & 0x80) 649 continue; 650 651 /* skip if the energy accumulation is disabled */ 652 if (info->enable_energy[cnt]) { 653 curr_energy = info->chip_reg_data.energy_sec_acc[cnt]; 654 655 tmp_energy = get_unaligned_be48(offset_reg_data_p); 656 657 if (info->bi_dir[cnt]) 658 reg_data->vpower_acc[cnt] = sign_extend64(tmp_energy, 47); 659 else 660 reg_data->vpower_acc[cnt] = tmp_energy; 661 662 /* 663 * compute the scaled to 1 second accumulated energy value; 664 * energy accumulator scaled to 1sec = VPOWER_ACC/2^samp_shift 665 * the chip's sampling rate is 2^samp_shift samples/sec 666 */ 667 inc = (reg_data->vpower_acc[cnt] >> samp_shift); 668 669 /* add the power_acc field */ 670 curr_energy += inc; 671 672 clamp(curr_energy, PAC_193X_MIN_POWER_ACC, PAC_193X_MAX_POWER_ACC); 673 674 reg_data->energy_sec_acc[cnt] = curr_energy; 675 } 676 677 offset_reg_data_p += PAC1934_VPOWER_ACC_REG_LEN; 678 } 679 680 /* continue with VBUS */ 681 for (cnt = 0; cnt < info->phys_channels; cnt++) { 682 if ((ctrl_regs_tmp << cnt) & 0x80) 683 continue; 684 685 tmp_value = get_unaligned_be16(offset_reg_data_p); 686 687 if (info->bi_dir[cnt]) 688 reg_data->vbus[cnt] = sign_extend32((u32)(tmp_value), 15); 689 else 690 reg_data->vbus[cnt] = tmp_value; 691 692 offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN; 693 } 694 695 /* VSENSE */ 696 for (cnt = 0; cnt < info->phys_channels; cnt++) { 697 if ((ctrl_regs_tmp << cnt) & 0x80) 698 continue; 699 700 tmp_value = get_unaligned_be16(offset_reg_data_p); 701 702 if (info->bi_dir[cnt]) 703 reg_data->vsense[cnt] = sign_extend32((u32)(tmp_value), 15); 704 else 705 reg_data->vsense[cnt] = tmp_value; 706 707 offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN; 708 } 709 710 /* VBUS_AVG */ 711 for (cnt = 0; cnt < info->phys_channels; cnt++) { 712 if ((ctrl_regs_tmp << cnt) & 0x80) 713 continue; 714 715 tmp_value = get_unaligned_be16(offset_reg_data_p); 716 717 if (info->bi_dir[cnt]) 718 reg_data->vbus_avg[cnt] = sign_extend32((u32)(tmp_value), 15); 719 else 720 reg_data->vbus_avg[cnt] = tmp_value; 721 722 offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN; 723 } 724 725 /* VSENSE_AVG */ 726 for (cnt = 0; cnt < info->phys_channels; cnt++) { 727 if ((ctrl_regs_tmp << cnt) & 0x80) 728 continue; 729 730 tmp_value = get_unaligned_be16(offset_reg_data_p); 731 732 if (info->bi_dir[cnt]) 733 reg_data->vsense_avg[cnt] = sign_extend32((u32)(tmp_value), 15); 734 else 735 reg_data->vsense_avg[cnt] = tmp_value; 736 737 offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN; 738 } 739 740 /* VPOWER */ 741 for (cnt = 0; cnt < info->phys_channels; cnt++) { 742 if ((ctrl_regs_tmp << cnt) & 0x80) 743 continue; 744 745 tmp = get_unaligned_be32(offset_reg_data_p) >> 4; 746 747 if (info->bi_dir[cnt]) 748 reg_data->vpower[cnt] = sign_extend32(tmp, 27); 749 else 750 reg_data->vpower[cnt] = tmp; 751 752 offset_reg_data_p += PAC1934_VPOWER_REG_LEN; 753 } 754 755 return 0; 756 } 757 758 static int pac1934_retrieve_data(struct pac1934_chip_info *info, 759 u32 wait_time) 760 { 761 int ret = 0; 762 763 /* 764 * check if the minimal elapsed time has passed and if so, 765 * re-read the chip, otherwise the cached info is just fine 766 */ 767 if (time_after(jiffies, info->tstamp + msecs_to_jiffies(PAC1934_MIN_POLLING_TIME_MS))) { 768 ret = pac1934_reg_snapshot(info, true, PAC1934_REFRESH_REG_ADDR, 769 wait_time); 770 771 /* 772 * Re-schedule the work for the read registers on timeout 773 * (to prevent chip registers saturation) 774 */ 775 mod_delayed_work(system_wq, &info->work_chip_rfsh, 776 msecs_to_jiffies(PAC1934_MAX_RFSH_LIMIT_MS)); 777 } 778 779 return ret; 780 } 781 782 static int pac1934_read_raw(struct iio_dev *indio_dev, 783 struct iio_chan_spec const *chan, int *val, 784 int *val2, long mask) 785 { 786 struct pac1934_chip_info *info = iio_priv(indio_dev); 787 s64 curr_energy; 788 int ret, channel = chan->channel - 1; 789 790 /* 791 * For AVG the index should be between 5 to 8. 792 * To calculate PAC1934_CH_VOLTAGE_AVERAGE, 793 * respectively PAC1934_CH_CURRENT real index, we need 794 * to remove the added offset (PAC1934_MAX_NUM_CHANNELS). 795 */ 796 if (channel >= PAC1934_MAX_NUM_CHANNELS) 797 channel = channel - PAC1934_MAX_NUM_CHANNELS; 798 799 ret = pac1934_retrieve_data(info, PAC1934_MIN_UPDATE_WAIT_TIME_US); 800 if (ret < 0) 801 return ret; 802 803 switch (mask) { 804 case IIO_CHAN_INFO_RAW: 805 switch (chan->type) { 806 case IIO_VOLTAGE: 807 *val = info->chip_reg_data.vbus[channel]; 808 return IIO_VAL_INT; 809 case IIO_CURRENT: 810 *val = info->chip_reg_data.vsense[channel]; 811 return IIO_VAL_INT; 812 case IIO_POWER: 813 *val = info->chip_reg_data.vpower[channel]; 814 return IIO_VAL_INT; 815 case IIO_ENERGY: 816 curr_energy = info->chip_reg_data.energy_sec_acc[channel]; 817 *val = (u32)curr_energy; 818 *val2 = (u32)(curr_energy >> 32); 819 return IIO_VAL_INT_64; 820 default: 821 return -EINVAL; 822 } 823 case IIO_CHAN_INFO_AVERAGE_RAW: 824 switch (chan->type) { 825 case IIO_VOLTAGE: 826 *val = info->chip_reg_data.vbus_avg[channel]; 827 return IIO_VAL_INT; 828 case IIO_CURRENT: 829 *val = info->chip_reg_data.vsense_avg[channel]; 830 return IIO_VAL_INT; 831 default: 832 return -EINVAL; 833 } 834 case IIO_CHAN_INFO_SCALE: 835 switch (chan->address) { 836 /* Voltages - scale for millivolts */ 837 case PAC1934_VBUS_1_ADDR: 838 case PAC1934_VBUS_2_ADDR: 839 case PAC1934_VBUS_3_ADDR: 840 case PAC1934_VBUS_4_ADDR: 841 case PAC1934_VBUS_AVG_1_ADDR: 842 case PAC1934_VBUS_AVG_2_ADDR: 843 case PAC1934_VBUS_AVG_3_ADDR: 844 case PAC1934_VBUS_AVG_4_ADDR: 845 *val = PAC1934_VOLTAGE_MILLIVOLTS_MAX; 846 if (chan->scan_type.sign == 'u') 847 *val2 = PAC1934_VOLTAGE_U_RES; 848 else 849 *val2 = PAC1934_VOLTAGE_S_RES; 850 return IIO_VAL_FRACTIONAL_LOG2; 851 /* 852 * Currents - scale for mA - depends on the 853 * channel's shunt value 854 * (100mV * 1000000) / (2^16 * shunt(uohm)) 855 */ 856 case PAC1934_VSENSE_1_ADDR: 857 case PAC1934_VSENSE_2_ADDR: 858 case PAC1934_VSENSE_3_ADDR: 859 case PAC1934_VSENSE_4_ADDR: 860 case PAC1934_VSENSE_AVG_1_ADDR: 861 case PAC1934_VSENSE_AVG_2_ADDR: 862 case PAC1934_VSENSE_AVG_3_ADDR: 863 case PAC1934_VSENSE_AVG_4_ADDR: 864 *val = PAC1934_MAX_VSENSE_RSHIFTED_BY_16B; 865 if (chan->scan_type.sign == 'u') 866 *val2 = info->shunts[channel]; 867 else 868 *val2 = info->shunts[channel] >> 1; 869 return IIO_VAL_FRACTIONAL; 870 /* 871 * Power - uW - it will use the combined scale 872 * for current and voltage 873 * current(mA) * voltage(mV) = power (uW) 874 */ 875 case PAC1934_VPOWER_1_ADDR: 876 case PAC1934_VPOWER_2_ADDR: 877 case PAC1934_VPOWER_3_ADDR: 878 case PAC1934_VPOWER_4_ADDR: 879 *val = PAC1934_MAX_VPOWER_RSHIFTED_BY_28B; 880 if (chan->scan_type.sign == 'u') 881 *val2 = info->shunts[channel]; 882 else 883 *val2 = info->shunts[channel] >> 1; 884 return IIO_VAL_FRACTIONAL; 885 case PAC1934_VPOWER_ACC_1_ADDR: 886 case PAC1934_VPOWER_ACC_2_ADDR: 887 case PAC1934_VPOWER_ACC_3_ADDR: 888 case PAC1934_VPOWER_ACC_4_ADDR: 889 /* 890 * expresses the 32 bit scale value here compute 891 * the scale for energy (miliWatt-second or miliJoule) 892 */ 893 *val = PAC1934_SCALE_CONSTANT; 894 895 if (chan->scan_type.sign == 'u') 896 *val2 = info->shunts[channel]; 897 else 898 *val2 = info->shunts[channel] >> 1; 899 return IIO_VAL_FRACTIONAL; 900 default: 901 return -EINVAL; 902 } 903 case IIO_CHAN_INFO_SAMP_FREQ: 904 *val = info->sample_rate_value; 905 return IIO_VAL_INT; 906 case IIO_CHAN_INFO_ENABLE: 907 *val = info->enable_energy[channel]; 908 return IIO_VAL_INT; 909 default: 910 return -EINVAL; 911 } 912 } 913 914 static int pac1934_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, 915 int val, int val2, long mask) 916 { 917 struct pac1934_chip_info *info = iio_priv(indio_dev); 918 struct i2c_client *client = info->client; 919 int ret = -EINVAL; 920 s32 old_samp_rate; 921 u8 ctrl_reg; 922 923 switch (mask) { 924 case IIO_CHAN_INFO_SAMP_FREQ: 925 ret = pac1934_get_samp_rate_idx(info, val); 926 if (ret < 0) 927 return ret; 928 929 /* write the new sampling value and trigger a snapshot(incl refresh) */ 930 scoped_guard(mutex, &info->lock) { 931 ctrl_reg = FIELD_PREP(PAC1934_CRTL_SAMPLE_RATE_MASK, ret); 932 ret = i2c_smbus_write_byte_data(client, PAC1934_CTRL_REG_ADDR, ctrl_reg); 933 if (ret) { 934 dev_err(&client->dev, 935 "%s - can't update sample rate\n", 936 __func__); 937 return ret; 938 } 939 } 940 941 old_samp_rate = info->sample_rate_value; 942 info->sample_rate_value = val; 943 944 /* 945 * now, force a snapshot with refresh - call retrieve 946 * data in order to update the refresh timer 947 * alter the timestamp in order to force trigger a 948 * register snapshot and a timestamp update 949 */ 950 info->tstamp -= msecs_to_jiffies(PAC1934_MIN_POLLING_TIME_MS); 951 ret = pac1934_retrieve_data(info, (1024 / old_samp_rate) * 1000); 952 if (ret < 0) { 953 dev_err(&client->dev, 954 "%s - cannot snapshot ctrl and measurement regs\n", 955 __func__); 956 return ret; 957 } 958 959 return 0; 960 case IIO_CHAN_INFO_ENABLE: 961 scoped_guard(mutex, &info->lock) { 962 info->enable_energy[chan->channel - 1] = val ? true : false; 963 if (!val) 964 info->chip_reg_data.energy_sec_acc[chan->channel - 1] = 0; 965 } 966 967 return 0; 968 default: 969 return -EINVAL; 970 } 971 } 972 973 static int pac1934_read_label(struct iio_dev *indio_dev, 974 struct iio_chan_spec const *chan, char *label) 975 { 976 struct pac1934_chip_info *info = iio_priv(indio_dev); 977 978 switch (chan->address) { 979 case PAC1934_VBUS_1_ADDR: 980 case PAC1934_VBUS_2_ADDR: 981 case PAC1934_VBUS_3_ADDR: 982 case PAC1934_VBUS_4_ADDR: 983 return sysfs_emit(label, "%s_VBUS_%d\n", 984 info->labels[chan->scan_index], 985 chan->scan_index + 1); 986 case PAC1934_VBUS_AVG_1_ADDR: 987 case PAC1934_VBUS_AVG_2_ADDR: 988 case PAC1934_VBUS_AVG_3_ADDR: 989 case PAC1934_VBUS_AVG_4_ADDR: 990 return sysfs_emit(label, "%s_VBUS_AVG_%d\n", 991 info->labels[chan->scan_index], 992 chan->scan_index + 1); 993 case PAC1934_VSENSE_1_ADDR: 994 case PAC1934_VSENSE_2_ADDR: 995 case PAC1934_VSENSE_3_ADDR: 996 case PAC1934_VSENSE_4_ADDR: 997 return sysfs_emit(label, "%s_IBUS_%d\n", 998 info->labels[chan->scan_index], 999 chan->scan_index + 1); 1000 case PAC1934_VSENSE_AVG_1_ADDR: 1001 case PAC1934_VSENSE_AVG_2_ADDR: 1002 case PAC1934_VSENSE_AVG_3_ADDR: 1003 case PAC1934_VSENSE_AVG_4_ADDR: 1004 return sysfs_emit(label, "%s_IBUS_AVG_%d\n", 1005 info->labels[chan->scan_index], 1006 chan->scan_index + 1); 1007 case PAC1934_VPOWER_1_ADDR: 1008 case PAC1934_VPOWER_2_ADDR: 1009 case PAC1934_VPOWER_3_ADDR: 1010 case PAC1934_VPOWER_4_ADDR: 1011 return sysfs_emit(label, "%s_POWER_%d\n", 1012 info->labels[chan->scan_index], 1013 chan->scan_index + 1); 1014 case PAC1934_VPOWER_ACC_1_ADDR: 1015 case PAC1934_VPOWER_ACC_2_ADDR: 1016 case PAC1934_VPOWER_ACC_3_ADDR: 1017 case PAC1934_VPOWER_ACC_4_ADDR: 1018 return sysfs_emit(label, "%s_ENERGY_%d\n", 1019 info->labels[chan->scan_index], 1020 chan->scan_index + 1); 1021 } 1022 1023 return 0; 1024 } 1025 1026 static void pac1934_work_periodic_rfsh(struct work_struct *work) 1027 { 1028 struct pac1934_chip_info *info = TO_PAC1934_CHIP_INFO((struct delayed_work *)work); 1029 struct device *dev = &info->client->dev; 1030 1031 dev_dbg(dev, "%s - Periodic refresh\n", __func__); 1032 1033 /* do a REFRESH, then read */ 1034 pac1934_reg_snapshot(info, true, PAC1934_REFRESH_REG_ADDR, 1035 PAC1934_MIN_UPDATE_WAIT_TIME_US); 1036 1037 schedule_delayed_work(&info->work_chip_rfsh, 1038 msecs_to_jiffies(PAC1934_MAX_RFSH_LIMIT_MS)); 1039 } 1040 1041 static int pac1934_read_revision(struct pac1934_chip_info *info, u8 *buf) 1042 { 1043 int ret; 1044 struct i2c_client *client = info->client; 1045 1046 ret = i2c_smbus_read_i2c_block_data(client, PAC1934_PID_REG_ADDR, 1047 PAC1934_ID_REG_LEN, 1048 buf); 1049 if (ret < 0) { 1050 dev_err(&client->dev, "cannot read revision\n"); 1051 return ret; 1052 } 1053 1054 return 0; 1055 } 1056 1057 static int pac1934_chip_identify(struct pac1934_chip_info *info) 1058 { 1059 u8 rev_info[PAC1934_ID_REG_LEN]; 1060 struct device *dev = &info->client->dev; 1061 int ret = 0; 1062 1063 ret = pac1934_read_revision(info, (u8 *)rev_info); 1064 if (ret) 1065 return ret; 1066 1067 info->chip_variant = rev_info[PAC1934_PID_IDX]; 1068 info->chip_revision = rev_info[PAC1934_RID_IDX]; 1069 1070 dev_dbg(dev, "Chip variant: 0x%02X\n", info->chip_variant); 1071 dev_dbg(dev, "Chip revision: 0x%02X\n", info->chip_revision); 1072 1073 switch (info->chip_variant) { 1074 case PAC1934_PID: 1075 return PAC1934; 1076 case PAC1933_PID: 1077 return PAC1933; 1078 case PAC1932_PID: 1079 return PAC1932; 1080 case PAC1931_PID: 1081 return PAC1931; 1082 default: 1083 return -EINVAL; 1084 } 1085 } 1086 1087 /* 1088 * documentation related to the ACPI device definition 1089 * https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ApplicationNotes/ApplicationNotes/PAC1934-Integration-Notes-for-Microsoft-Windows-10-and-Windows-11-Driver-Support-DS00002534.pdf 1090 */ 1091 static int pac1934_acpi_parse_channel_config(struct i2c_client *client, 1092 struct pac1934_chip_info *info) 1093 { 1094 acpi_handle handle; 1095 union acpi_object *rez; 1096 struct device *dev = &client->dev; 1097 unsigned short bi_dir_mask; 1098 int idx, i; 1099 guid_t guid; 1100 1101 handle = ACPI_HANDLE(dev); 1102 1103 guid_parse(PAC1934_DSM_UUID, &guid); 1104 1105 rez = acpi_evaluate_dsm(handle, &guid, 0, PAC1934_ACPI_GET_NAMES_AND_MOHMS_VALS, NULL); 1106 if (!rez) 1107 return -EINVAL; 1108 1109 for (i = 0; i < rez->package.count; i += 2) { 1110 idx = i / 2; 1111 info->labels[idx] = 1112 devm_kmemdup(dev, rez->package.elements[i].string.pointer, 1113 (size_t)rez->package.elements[i].string.length + 1, 1114 GFP_KERNEL); 1115 info->labels[idx][rez->package.elements[i].string.length] = '\0'; 1116 info->shunts[idx] = rez->package.elements[i + 1].integer.value * 1000; 1117 info->active_channels[idx] = (info->shunts[idx] != 0); 1118 } 1119 1120 ACPI_FREE(rez); 1121 1122 rez = acpi_evaluate_dsm(handle, &guid, 1, PAC1934_ACPI_GET_UOHMS_VALS, NULL); 1123 if (!rez) { 1124 /* 1125 * initializing with default values 1126 * we assume all channels are unidirectional(the mask is zero) 1127 * and assign the default sampling rate 1128 */ 1129 info->sample_rate_value = PAC1934_DEFAULT_CHIP_SAMP_SPEED_HZ; 1130 return 0; 1131 } 1132 1133 for (i = 0; i < rez->package.count; i++) { 1134 idx = i; 1135 info->shunts[idx] = rez->package.elements[i].integer.value; 1136 info->active_channels[idx] = (info->shunts[idx] != 0); 1137 } 1138 1139 ACPI_FREE(rez); 1140 1141 rez = acpi_evaluate_dsm(handle, &guid, 1, PAC1934_ACPI_GET_BIPOLAR_SETTINGS, NULL); 1142 if (!rez) 1143 return -EINVAL; 1144 1145 bi_dir_mask = rez->package.elements[0].integer.value; 1146 info->bi_dir[0] = ((bi_dir_mask & (1 << 3)) | (bi_dir_mask & (1 << 7))) != 0; 1147 info->bi_dir[1] = ((bi_dir_mask & (1 << 2)) | (bi_dir_mask & (1 << 6))) != 0; 1148 info->bi_dir[2] = ((bi_dir_mask & (1 << 1)) | (bi_dir_mask & (1 << 5))) != 0; 1149 info->bi_dir[3] = ((bi_dir_mask & (1 << 0)) | (bi_dir_mask & (1 << 4))) != 0; 1150 1151 ACPI_FREE(rez); 1152 1153 rez = acpi_evaluate_dsm(handle, &guid, 1, PAC1934_ACPI_GET_SAMP, NULL); 1154 if (!rez) 1155 return -EINVAL; 1156 1157 info->sample_rate_value = rez->package.elements[0].integer.value; 1158 1159 ACPI_FREE(rez); 1160 1161 return 0; 1162 } 1163 1164 static int pac1934_fw_parse_channel_config(struct i2c_client *client, 1165 struct pac1934_chip_info *info) 1166 { 1167 struct device *dev = &client->dev; 1168 unsigned int current_channel; 1169 int idx, ret; 1170 1171 info->sample_rate_value = 1024; 1172 current_channel = 1; 1173 1174 device_for_each_child_node_scoped(dev, node) { 1175 ret = fwnode_property_read_u32(node, "reg", &idx); 1176 if (ret) 1177 return dev_err_probe(dev, ret, 1178 "reading invalid channel index\n"); 1179 1180 /* adjust idx to match channel index (1 to 4) from the datasheet */ 1181 idx--; 1182 1183 if (current_channel >= (info->phys_channels + 1) || 1184 idx >= info->phys_channels || idx < 0) 1185 return dev_err_probe(dev, -EINVAL, 1186 "%s: invalid channel_index %d value\n", 1187 fwnode_get_name(node), idx); 1188 1189 /* enable channel */ 1190 info->active_channels[idx] = true; 1191 1192 ret = fwnode_property_read_u32(node, "shunt-resistor-micro-ohms", 1193 &info->shunts[idx]); 1194 if (ret) 1195 return dev_err_probe(dev, ret, 1196 "%s: invalid shunt-resistor value: %d\n", 1197 fwnode_get_name(node), info->shunts[idx]); 1198 1199 if (fwnode_property_present(node, "label")) { 1200 ret = fwnode_property_read_string(node, "label", 1201 (const char **)&info->labels[idx]); 1202 if (ret) 1203 return dev_err_probe(dev, ret, 1204 "%s: invalid rail-name value\n", 1205 fwnode_get_name(node)); 1206 } 1207 1208 info->bi_dir[idx] = fwnode_property_read_bool(node, "bipolar"); 1209 1210 current_channel++; 1211 } 1212 1213 return 0; 1214 } 1215 1216 static void pac1934_cancel_delayed_work(void *dwork) 1217 { 1218 cancel_delayed_work_sync(dwork); 1219 } 1220 1221 static int pac1934_chip_configure(struct pac1934_chip_info *info) 1222 { 1223 int cnt, ret; 1224 struct i2c_client *client = info->client; 1225 u8 regs[PAC1934_CTRL_STATUS_INFO_LEN], idx, ctrl_reg; 1226 u32 wait_time; 1227 1228 info->chip_reg_data.num_enabled_channels = 0; 1229 for (cnt = 0; cnt < info->phys_channels; cnt++) { 1230 if (info->active_channels[cnt]) 1231 info->chip_reg_data.num_enabled_channels++; 1232 } 1233 1234 /* 1235 * read whatever information was gathered before the driver was loaded 1236 * establish which channels are enabled/disabled and then establish the 1237 * information retrieval mode (using SKIP or no). 1238 * Read the chip ID values 1239 */ 1240 ret = i2c_smbus_read_i2c_block_data(client, PAC1934_CTRL_STAT_REGS_ADDR, 1241 ARRAY_SIZE(regs), 1242 (u8 *)regs); 1243 if (ret < 0) { 1244 dev_err_probe(&client->dev, ret, 1245 "%s - cannot read regs from 0x%02X\n", 1246 __func__, PAC1934_CTRL_STAT_REGS_ADDR); 1247 return ret; 1248 } 1249 1250 /* write the CHANNEL_DIS and the NEG_PWR registers */ 1251 regs[PAC1934_CHANNEL_DIS_REG_OFF] = 1252 FIELD_PREP(PAC1934_CHAN_DIS_CH1_OFF_MASK, info->active_channels[0] ? 0 : 1) | 1253 FIELD_PREP(PAC1934_CHAN_DIS_CH2_OFF_MASK, info->active_channels[1] ? 0 : 1) | 1254 FIELD_PREP(PAC1934_CHAN_DIS_CH3_OFF_MASK, info->active_channels[2] ? 0 : 1) | 1255 FIELD_PREP(PAC1934_CHAN_DIS_CH4_OFF_MASK, info->active_channels[3] ? 0 : 1) | 1256 FIELD_PREP(PAC1934_SMBUS_TIMEOUT_MASK, 0) | 1257 FIELD_PREP(PAC1934_SMBUS_BYTECOUNT_MASK, 0) | 1258 FIELD_PREP(PAC1934_SMBUS_NO_SKIP_MASK, 0); 1259 1260 regs[PAC1934_NEG_PWR_REG_OFF] = 1261 FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDI_MASK, info->bi_dir[0]) | 1262 FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDI_MASK, info->bi_dir[1]) | 1263 FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDI_MASK, info->bi_dir[2]) | 1264 FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDI_MASK, info->bi_dir[3]) | 1265 FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDV_MASK, info->bi_dir[0]) | 1266 FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDV_MASK, info->bi_dir[1]) | 1267 FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDV_MASK, info->bi_dir[2]) | 1268 FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDV_MASK, info->bi_dir[3]); 1269 1270 /* no SLOW triggered REFRESH, clear POR */ 1271 regs[PAC1934_SLOW_REG_OFF] = 0; 1272 1273 ret = i2c_smbus_write_block_data(client, PAC1934_CTRL_STAT_REGS_ADDR, 1274 ARRAY_SIZE(regs), (u8 *)regs); 1275 if (ret) 1276 return ret; 1277 1278 /* Default sampling rate */ 1279 ctrl_reg = FIELD_PREP(PAC1934_CRTL_SAMPLE_RATE_MASK, PAC1934_SAMP_1024SPS); 1280 1281 ret = i2c_smbus_write_byte_data(client, PAC1934_CTRL_REG_ADDR, ctrl_reg); 1282 if (ret) 1283 return ret; 1284 1285 /* 1286 * send a REFRESH to the chip, so the new settings take place 1287 * as well as resetting the accumulators 1288 */ 1289 ret = i2c_smbus_write_byte(client, PAC1934_REFRESH_REG_ADDR); 1290 if (ret) { 1291 dev_err(&client->dev, 1292 "%s - cannot send 0x%02X\n", 1293 __func__, PAC1934_REFRESH_REG_ADDR); 1294 return ret; 1295 } 1296 1297 /* 1298 * get the current(in the chip) sampling speed and compute the 1299 * required timeout based on its value 1300 * the timeout is 1/sampling_speed 1301 */ 1302 idx = regs[PAC1934_CTRL_ACT_REG_OFF] >> PAC1934_SAMPLE_RATE_SHIFT; 1303 wait_time = (1024 / samp_rate_map_tbl[idx]) * 1000; 1304 1305 /* 1306 * wait the maximum amount of time to be on the safe side 1307 * the maximum wait time is for 8sps 1308 */ 1309 usleep_range(wait_time, wait_time + 100); 1310 1311 INIT_DELAYED_WORK(&info->work_chip_rfsh, pac1934_work_periodic_rfsh); 1312 /* Setup the latest moment for reading the regs before saturation */ 1313 schedule_delayed_work(&info->work_chip_rfsh, 1314 msecs_to_jiffies(PAC1934_MAX_RFSH_LIMIT_MS)); 1315 1316 return devm_add_action_or_reset(&client->dev, pac1934_cancel_delayed_work, 1317 &info->work_chip_rfsh); 1318 } 1319 1320 static int pac1934_prep_iio_channels(struct pac1934_chip_info *info, struct iio_dev *indio_dev) 1321 { 1322 struct iio_chan_spec *ch_sp; 1323 int channel_size, attribute_count, cnt; 1324 void *dyn_ch_struct, *tmp_data; 1325 struct device *dev = &info->client->dev; 1326 1327 /* find out dynamically how many IIO channels we need */ 1328 attribute_count = 0; 1329 channel_size = 0; 1330 for (cnt = 0; cnt < info->phys_channels; cnt++) { 1331 if (!info->active_channels[cnt]) 1332 continue; 1333 1334 /* add the size of the properties of one chip physical channel */ 1335 channel_size += sizeof(pac1934_single_channel); 1336 /* count how many enabled channels we have */ 1337 attribute_count += ARRAY_SIZE(pac1934_single_channel); 1338 dev_dbg(dev, ":%s: Channel %d active\n", __func__, cnt + 1); 1339 } 1340 1341 dyn_ch_struct = devm_kzalloc(dev, channel_size, GFP_KERNEL); 1342 if (!dyn_ch_struct) 1343 return -EINVAL; 1344 1345 tmp_data = dyn_ch_struct; 1346 1347 /* populate the dynamic channels and make all the adjustments */ 1348 for (cnt = 0; cnt < info->phys_channels; cnt++) { 1349 if (!info->active_channels[cnt]) 1350 continue; 1351 1352 memcpy(tmp_data, pac1934_single_channel, sizeof(pac1934_single_channel)); 1353 ch_sp = (struct iio_chan_spec *)tmp_data; 1354 ch_sp[PAC1934_CH_ENERGY].channel = cnt + 1; 1355 ch_sp[PAC1934_CH_ENERGY].scan_index = cnt; 1356 ch_sp[PAC1934_CH_ENERGY].address = cnt + PAC1934_VPOWER_ACC_1_ADDR; 1357 ch_sp[PAC1934_CH_POWER].channel = cnt + 1; 1358 ch_sp[PAC1934_CH_POWER].scan_index = cnt; 1359 ch_sp[PAC1934_CH_POWER].address = cnt + PAC1934_VPOWER_1_ADDR; 1360 ch_sp[PAC1934_CH_VOLTAGE].channel = cnt + 1; 1361 ch_sp[PAC1934_CH_VOLTAGE].scan_index = cnt; 1362 ch_sp[PAC1934_CH_VOLTAGE].address = cnt + PAC1934_VBUS_1_ADDR; 1363 ch_sp[PAC1934_CH_CURRENT].channel = cnt + 1; 1364 ch_sp[PAC1934_CH_CURRENT].scan_index = cnt; 1365 ch_sp[PAC1934_CH_CURRENT].address = cnt + PAC1934_VSENSE_1_ADDR; 1366 1367 /* 1368 * In order to be able to use labels for PAC1934_CH_VOLTAGE, and 1369 * PAC1934_CH_VOLTAGE_AVERAGE,respectively PAC1934_CH_CURRENT 1370 * and PAC1934_CH_CURRENT_AVERAGE we need to use different 1371 * channel numbers. We will add +5 (+1 to maximum PAC channels). 1372 */ 1373 ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].channel = cnt + 5; 1374 ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].scan_index = cnt; 1375 ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].address = cnt + PAC1934_VBUS_AVG_1_ADDR; 1376 ch_sp[PAC1934_CH_CURRENT_AVERAGE].channel = cnt + 5; 1377 ch_sp[PAC1934_CH_CURRENT_AVERAGE].scan_index = cnt; 1378 ch_sp[PAC1934_CH_CURRENT_AVERAGE].address = cnt + PAC1934_VSENSE_AVG_1_ADDR; 1379 1380 /* 1381 * now modify the parameters in all channels if the 1382 * whole chip rail(channel) is bi-directional 1383 */ 1384 if (info->bi_dir[cnt]) { 1385 ch_sp[PAC1934_CH_ENERGY].scan_type.sign = 's'; 1386 ch_sp[PAC1934_CH_ENERGY].scan_type.realbits = 47; 1387 ch_sp[PAC1934_CH_POWER].scan_type.sign = 's'; 1388 ch_sp[PAC1934_CH_POWER].scan_type.realbits = 27; 1389 ch_sp[PAC1934_CH_VOLTAGE].scan_type.sign = 's'; 1390 ch_sp[PAC1934_CH_VOLTAGE].scan_type.realbits = 15; 1391 ch_sp[PAC1934_CH_CURRENT].scan_type.sign = 's'; 1392 ch_sp[PAC1934_CH_CURRENT].scan_type.realbits = 15; 1393 ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].scan_type.sign = 's'; 1394 ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].scan_type.realbits = 15; 1395 ch_sp[PAC1934_CH_CURRENT_AVERAGE].scan_type.sign = 's'; 1396 ch_sp[PAC1934_CH_CURRENT_AVERAGE].scan_type.realbits = 15; 1397 } 1398 tmp_data += sizeof(pac1934_single_channel); 1399 } 1400 1401 /* 1402 * send the updated dynamic channel structure information towards IIO 1403 * prepare the required field for IIO class registration 1404 */ 1405 indio_dev->num_channels = attribute_count; 1406 indio_dev->channels = (const struct iio_chan_spec *)dyn_ch_struct; 1407 1408 return 0; 1409 } 1410 1411 static IIO_DEVICE_ATTR(in_shunt_resistor1, 0644, 1412 pac1934_shunt_value_show, pac1934_shunt_value_store, 0); 1413 static IIO_DEVICE_ATTR(in_shunt_resistor2, 0644, 1414 pac1934_shunt_value_show, pac1934_shunt_value_store, 1); 1415 static IIO_DEVICE_ATTR(in_shunt_resistor3, 0644, 1416 pac1934_shunt_value_show, pac1934_shunt_value_store, 2); 1417 static IIO_DEVICE_ATTR(in_shunt_resistor4, 0644, 1418 pac1934_shunt_value_show, pac1934_shunt_value_store, 3); 1419 1420 static int pac1934_prep_custom_attributes(struct pac1934_chip_info *info, 1421 struct iio_dev *indio_dev) 1422 { 1423 int i, active_channels_count = 0; 1424 struct attribute **pac1934_custom_attr; 1425 struct attribute_group *pac1934_group; 1426 struct device *dev = &info->client->dev; 1427 1428 for (i = 0 ; i < info->phys_channels; i++) 1429 if (info->active_channels[i]) 1430 active_channels_count++; 1431 1432 pac1934_group = devm_kzalloc(dev, sizeof(*pac1934_group), GFP_KERNEL); 1433 if (!pac1934_group) 1434 return -ENOMEM; 1435 1436 pac1934_custom_attr = devm_kzalloc(dev, 1437 (PAC1934_CUSTOM_ATTR_FOR_CHANNEL * 1438 active_channels_count) 1439 * sizeof(*pac1934_group) + 1, 1440 GFP_KERNEL); 1441 if (!pac1934_custom_attr) 1442 return -ENOMEM; 1443 1444 i = 0; 1445 if (info->active_channels[0]) 1446 pac1934_custom_attr[i++] = PAC1934_DEV_ATTR(in_shunt_resistor1); 1447 1448 if (info->active_channels[1]) 1449 pac1934_custom_attr[i++] = PAC1934_DEV_ATTR(in_shunt_resistor2); 1450 1451 if (info->active_channels[2]) 1452 pac1934_custom_attr[i++] = PAC1934_DEV_ATTR(in_shunt_resistor3); 1453 1454 if (info->active_channels[3]) 1455 pac1934_custom_attr[i] = PAC1934_DEV_ATTR(in_shunt_resistor4); 1456 1457 pac1934_group->attrs = pac1934_custom_attr; 1458 info->iio_info.attrs = pac1934_group; 1459 1460 return 0; 1461 } 1462 1463 static void pac1934_mutex_destroy(void *data) 1464 { 1465 struct mutex *lock = data; 1466 1467 mutex_destroy(lock); 1468 } 1469 1470 static const struct iio_info pac1934_info = { 1471 .read_raw = pac1934_read_raw, 1472 .write_raw = pac1934_write_raw, 1473 .read_avail = pac1934_read_avail, 1474 .read_label = pac1934_read_label, 1475 }; 1476 1477 static int pac1934_probe(struct i2c_client *client) 1478 { 1479 struct pac1934_chip_info *info; 1480 const struct pac1934_features *chip; 1481 struct iio_dev *indio_dev; 1482 int cnt, ret; 1483 struct device *dev = &client->dev; 1484 1485 indio_dev = devm_iio_device_alloc(dev, sizeof(*info)); 1486 if (!indio_dev) 1487 return -ENOMEM; 1488 1489 info = iio_priv(indio_dev); 1490 1491 info->client = client; 1492 1493 /* always start with energy accumulation enabled */ 1494 for (cnt = 0; cnt < PAC1934_MAX_NUM_CHANNELS; cnt++) 1495 info->enable_energy[cnt] = true; 1496 1497 ret = pac1934_chip_identify(info); 1498 if (ret < 0) { 1499 /* 1500 * If failed to identify the hardware based on internal 1501 * registers, try using fallback compatible in device tree 1502 * to deal with some newer part number. 1503 */ 1504 chip = i2c_get_match_data(client); 1505 if (!chip) 1506 return -EINVAL; 1507 1508 info->phys_channels = chip->phys_channels; 1509 indio_dev->name = chip->name; 1510 } else { 1511 info->phys_channels = pac1934_chip_config[ret].phys_channels; 1512 indio_dev->name = pac1934_chip_config[ret].name; 1513 } 1514 1515 if (acpi_match_device(dev->driver->acpi_match_table, dev)) 1516 ret = pac1934_acpi_parse_channel_config(client, info); 1517 else 1518 /* 1519 * This makes it possible to use also ACPI PRP0001 for 1520 * registering the device using device tree properties. 1521 */ 1522 ret = pac1934_fw_parse_channel_config(client, info); 1523 1524 if (ret) 1525 return dev_err_probe(dev, ret, 1526 "parameter parsing returned an error\n"); 1527 1528 mutex_init(&info->lock); 1529 ret = devm_add_action_or_reset(dev, pac1934_mutex_destroy, 1530 &info->lock); 1531 if (ret < 0) 1532 return ret; 1533 1534 /* 1535 * do now any chip specific initialization (e.g. read/write 1536 * some registers), enable/disable certain channels, change the sampling 1537 * rate to the requested value 1538 */ 1539 ret = pac1934_chip_configure(info); 1540 if (ret < 0) 1541 return ret; 1542 1543 /* prepare the channel information */ 1544 ret = pac1934_prep_iio_channels(info, indio_dev); 1545 if (ret < 0) 1546 return ret; 1547 1548 info->iio_info = pac1934_info; 1549 indio_dev->info = &info->iio_info; 1550 indio_dev->modes = INDIO_DIRECT_MODE; 1551 1552 ret = pac1934_prep_custom_attributes(info, indio_dev); 1553 if (ret < 0) 1554 return dev_err_probe(dev, ret, 1555 "Can't configure custom attributes for PAC1934 device\n"); 1556 1557 /* 1558 * read whatever has been accumulated in the chip so far 1559 * and reset the accumulators 1560 */ 1561 ret = pac1934_reg_snapshot(info, true, PAC1934_REFRESH_REG_ADDR, 1562 PAC1934_MIN_UPDATE_WAIT_TIME_US); 1563 if (ret < 0) 1564 return ret; 1565 1566 ret = devm_iio_device_register(dev, indio_dev); 1567 if (ret < 0) 1568 return dev_err_probe(dev, ret, 1569 "Can't register IIO device\n"); 1570 1571 return 0; 1572 } 1573 1574 static const struct i2c_device_id pac1934_id[] = { 1575 { .name = "pac1931", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1931] }, 1576 { .name = "pac1932", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1932] }, 1577 { .name = "pac1933", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1933] }, 1578 { .name = "pac1934", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1934] }, 1579 {} 1580 }; 1581 MODULE_DEVICE_TABLE(i2c, pac1934_id); 1582 1583 static const struct of_device_id pac1934_of_match[] = { 1584 { 1585 .compatible = "microchip,pac1931", 1586 .data = &pac1934_chip_config[PAC1931] 1587 }, 1588 { 1589 .compatible = "microchip,pac1932", 1590 .data = &pac1934_chip_config[PAC1932] 1591 }, 1592 { 1593 .compatible = "microchip,pac1933", 1594 .data = &pac1934_chip_config[PAC1933] 1595 }, 1596 { 1597 .compatible = "microchip,pac1934", 1598 .data = &pac1934_chip_config[PAC1934] 1599 }, 1600 {} 1601 }; 1602 MODULE_DEVICE_TABLE(of, pac1934_of_match); 1603 1604 /* 1605 * using MCHP1930 to be compatible with BIOS ACPI. See example: 1606 * https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ApplicationNotes/ApplicationNotes/PAC1934-Integration-Notes-for-Microsoft-Windows-10-and-Windows-11-Driver-Support-DS00002534.pdf 1607 */ 1608 static const struct acpi_device_id pac1934_acpi_match[] = { 1609 { "MCHP1930", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1934] }, 1610 {} 1611 }; 1612 MODULE_DEVICE_TABLE(acpi, pac1934_acpi_match); 1613 1614 static struct i2c_driver pac1934_driver = { 1615 .driver = { 1616 .name = "pac1934", 1617 .of_match_table = pac1934_of_match, 1618 .acpi_match_table = pac1934_acpi_match 1619 }, 1620 .probe = pac1934_probe, 1621 .id_table = pac1934_id, 1622 }; 1623 1624 module_i2c_driver(pac1934_driver); 1625 1626 MODULE_AUTHOR("Bogdan Bolocan <bogdan.bolocan@microchip.com>"); 1627 MODULE_AUTHOR("Victor Tudose"); 1628 MODULE_AUTHOR("Marius Cristea <marius.cristea@microchip.com>"); 1629 MODULE_DESCRIPTION("IIO driver for PAC1934 Multi-Channel DC Power/Energy Monitor"); 1630 MODULE_LICENSE("GPL"); 1631