xref: /linux/drivers/iio/adc/mcp3422.c (revision 93d90ad708b8da6efc0e487b66111aa9db7f70c7)
1 /*
2  * mcp3422.c - driver for the Microchip mcp3422/3/4/6/7/8 chip family
3  *
4  * Copyright (C) 2013, Angelo Compagnucci
5  * Author: Angelo Compagnucci <angelo.compagnucci@gmail.com>
6  *
7  * Datasheet: http://ww1.microchip.com/downloads/en/devicedoc/22088b.pdf
8  *            http://ww1.microchip.com/downloads/en/DeviceDoc/22226a.pdf
9  *
10  * This driver exports the value of analog input voltage to sysfs, the
11  * voltage unit is nV.
12  *
13  * This program is free software; you can redistribute it and/or modify
14  * it under the terms of the GNU General Public License as published by
15  * the Free Software Foundation; either version 2 of the License, or
16  * (at your option) any later version.
17  */
18 
19 #include <linux/err.h>
20 #include <linux/i2c.h>
21 #include <linux/module.h>
22 #include <linux/delay.h>
23 #include <linux/sysfs.h>
24 #include <linux/of.h>
25 
26 #include <linux/iio/iio.h>
27 #include <linux/iio/sysfs.h>
28 
29 /* Masks */
30 #define MCP3422_CHANNEL_MASK	0x60
31 #define MCP3422_PGA_MASK	0x03
32 #define MCP3422_SRATE_MASK	0x0C
33 #define MCP3422_SRATE_240	0x0
34 #define MCP3422_SRATE_60	0x1
35 #define MCP3422_SRATE_15	0x2
36 #define MCP3422_SRATE_3	0x3
37 #define MCP3422_PGA_1	0
38 #define MCP3422_PGA_2	1
39 #define MCP3422_PGA_4	2
40 #define MCP3422_PGA_8	3
41 #define MCP3422_CONT_SAMPLING	0x10
42 
43 #define MCP3422_CHANNEL(config)	(((config) & MCP3422_CHANNEL_MASK) >> 5)
44 #define MCP3422_PGA(config)	((config) & MCP3422_PGA_MASK)
45 #define MCP3422_SAMPLE_RATE(config)	(((config) & MCP3422_SRATE_MASK) >> 2)
46 
47 #define MCP3422_CHANNEL_VALUE(value) (((value) << 5) & MCP3422_CHANNEL_MASK)
48 #define MCP3422_PGA_VALUE(value) ((value) & MCP3422_PGA_MASK)
49 #define MCP3422_SAMPLE_RATE_VALUE(value) ((value << 2) & MCP3422_SRATE_MASK)
50 
51 #define MCP3422_CHAN(_index) \
52 	{ \
53 		.type = IIO_VOLTAGE, \
54 		.indexed = 1, \
55 		.channel = _index, \
56 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
57 				| BIT(IIO_CHAN_INFO_SCALE), \
58 		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
59 	}
60 
61 /* LSB is in nV to eliminate floating point */
62 static const u32 rates_to_lsb[] = {1000000, 250000, 62500, 15625};
63 
64 /*
65  *  scales calculated as:
66  *  rates_to_lsb[sample_rate] / (1 << pga);
67  *  pga is 1 for 0, 2
68  */
69 
70 static const int mcp3422_scales[4][4] = {
71 	{ 1000000, 250000, 62500, 15625 },
72 	{ 500000 , 125000, 31250, 7812 },
73 	{ 250000 , 62500 , 15625, 3906 },
74 	{ 125000 , 31250 , 7812 , 1953 } };
75 
76 /* Constant msleep times for data acquisitions */
77 static const int mcp3422_read_times[4] = {
78 	[MCP3422_SRATE_240] = 1000 / 240,
79 	[MCP3422_SRATE_60] = 1000 / 60,
80 	[MCP3422_SRATE_15] = 1000 / 15,
81 	[MCP3422_SRATE_3] = 1000 / 3 };
82 
83 /* sample rates to integer conversion table */
84 static const int mcp3422_sample_rates[4] = {
85 	[MCP3422_SRATE_240] = 240,
86 	[MCP3422_SRATE_60] = 60,
87 	[MCP3422_SRATE_15] = 15,
88 	[MCP3422_SRATE_3] = 3 };
89 
90 /* sample rates to sign extension table */
91 static const int mcp3422_sign_extend[4] = {
92 	[MCP3422_SRATE_240] = 11,
93 	[MCP3422_SRATE_60] = 13,
94 	[MCP3422_SRATE_15] = 15,
95 	[MCP3422_SRATE_3] = 17 };
96 
97 /* Client data (each client gets its own) */
98 struct mcp3422 {
99 	struct i2c_client *i2c;
100 	u8 id;
101 	u8 config;
102 	u8 pga[4];
103 	struct mutex lock;
104 };
105 
106 static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig)
107 {
108 	int ret;
109 
110 	mutex_lock(&adc->lock);
111 
112 	ret = i2c_master_send(adc->i2c, &newconfig, 1);
113 	if (ret > 0) {
114 		adc->config = newconfig;
115 		ret = 0;
116 	}
117 
118 	mutex_unlock(&adc->lock);
119 
120 	return ret;
121 }
122 
123 static int mcp3422_read(struct mcp3422 *adc, int *value, u8 *config)
124 {
125 	int ret = 0;
126 	u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
127 	u8 buf[4] = {0, 0, 0, 0};
128 	u32 temp;
129 
130 	if (sample_rate == MCP3422_SRATE_3) {
131 		ret = i2c_master_recv(adc->i2c, buf, 4);
132 		temp = buf[0] << 16 | buf[1] << 8 | buf[2];
133 		*config = buf[3];
134 	} else {
135 		ret = i2c_master_recv(adc->i2c, buf, 3);
136 		temp = buf[0] << 8 | buf[1];
137 		*config = buf[2];
138 	}
139 
140 	*value = sign_extend32(temp, mcp3422_sign_extend[sample_rate]);
141 
142 	return ret;
143 }
144 
145 static int mcp3422_read_channel(struct mcp3422 *adc,
146 				struct iio_chan_spec const *channel, int *value)
147 {
148 	int ret;
149 	u8 config;
150 	u8 req_channel = channel->channel;
151 
152 	if (req_channel != MCP3422_CHANNEL(adc->config)) {
153 		config = adc->config;
154 		config &= ~MCP3422_CHANNEL_MASK;
155 		config |= MCP3422_CHANNEL_VALUE(req_channel);
156 		config &= ~MCP3422_PGA_MASK;
157 		config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
158 		ret = mcp3422_update_config(adc, config);
159 		if (ret < 0)
160 			return ret;
161 		msleep(mcp3422_read_times[MCP3422_SAMPLE_RATE(adc->config)]);
162 	}
163 
164 	return mcp3422_read(adc, value, &config);
165 }
166 
167 static int mcp3422_read_raw(struct iio_dev *iio,
168 			struct iio_chan_spec const *channel, int *val1,
169 			int *val2, long mask)
170 {
171 	struct mcp3422 *adc = iio_priv(iio);
172 	int err;
173 
174 	u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
175 	u8 pga		 = MCP3422_PGA(adc->config);
176 
177 	switch (mask) {
178 	case IIO_CHAN_INFO_RAW:
179 		err = mcp3422_read_channel(adc, channel, val1);
180 		if (err < 0)
181 			return -EINVAL;
182 		return IIO_VAL_INT;
183 
184 	case IIO_CHAN_INFO_SCALE:
185 
186 		*val1 = 0;
187 		*val2 = mcp3422_scales[sample_rate][pga];
188 		return IIO_VAL_INT_PLUS_NANO;
189 
190 	case IIO_CHAN_INFO_SAMP_FREQ:
191 		*val1 = mcp3422_sample_rates[MCP3422_SAMPLE_RATE(adc->config)];
192 		return IIO_VAL_INT;
193 
194 	default:
195 		break;
196 	}
197 
198 	return -EINVAL;
199 }
200 
201 static int mcp3422_write_raw(struct iio_dev *iio,
202 			struct iio_chan_spec const *channel, int val1,
203 			int val2, long mask)
204 {
205 	struct mcp3422 *adc = iio_priv(iio);
206 	u8 temp;
207 	u8 config = adc->config;
208 	u8 req_channel = channel->channel;
209 	u8 sample_rate = MCP3422_SAMPLE_RATE(config);
210 	u8 i;
211 
212 	switch (mask) {
213 	case IIO_CHAN_INFO_SCALE:
214 		if (val1 != 0)
215 			return -EINVAL;
216 
217 		for (i = 0; i < ARRAY_SIZE(mcp3422_scales[0]); i++) {
218 			if (val2 == mcp3422_scales[sample_rate][i]) {
219 				adc->pga[req_channel] = i;
220 
221 				config &= ~MCP3422_CHANNEL_MASK;
222 				config |= MCP3422_CHANNEL_VALUE(req_channel);
223 				config &= ~MCP3422_PGA_MASK;
224 				config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
225 
226 				return mcp3422_update_config(adc, config);
227 			}
228 		}
229 		return -EINVAL;
230 
231 	case IIO_CHAN_INFO_SAMP_FREQ:
232 		switch (val1) {
233 		case 240:
234 			temp = MCP3422_SRATE_240;
235 			break;
236 		case 60:
237 			temp = MCP3422_SRATE_60;
238 			break;
239 		case 15:
240 			temp = MCP3422_SRATE_15;
241 			break;
242 		case 3:
243 			if (adc->id > 4)
244 				return -EINVAL;
245 			temp = MCP3422_SRATE_3;
246 			break;
247 		default:
248 			return -EINVAL;
249 		}
250 
251 		config &= ~MCP3422_CHANNEL_MASK;
252 		config |= MCP3422_CHANNEL_VALUE(req_channel);
253 		config &= ~MCP3422_SRATE_MASK;
254 		config |= MCP3422_SAMPLE_RATE_VALUE(temp);
255 
256 		return mcp3422_update_config(adc, config);
257 
258 	default:
259 		break;
260 	}
261 
262 	return -EINVAL;
263 }
264 
265 static int mcp3422_write_raw_get_fmt(struct iio_dev *indio_dev,
266 		struct iio_chan_spec const *chan, long mask)
267 {
268 	switch (mask) {
269 	case IIO_CHAN_INFO_SCALE:
270 		return IIO_VAL_INT_PLUS_NANO;
271 	case IIO_CHAN_INFO_SAMP_FREQ:
272 		return IIO_VAL_INT_PLUS_MICRO;
273 	default:
274 		return -EINVAL;
275 	}
276 }
277 
278 static ssize_t mcp3422_show_samp_freqs(struct device *dev,
279 		struct device_attribute *attr, char *buf)
280 {
281 	struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
282 
283 	if (adc->id > 4)
284 		return sprintf(buf, "240 60 15\n");
285 
286 	return sprintf(buf, "240 60 15 3\n");
287 }
288 
289 static ssize_t mcp3422_show_scales(struct device *dev,
290 		struct device_attribute *attr, char *buf)
291 {
292 	struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
293 	u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
294 
295 	return sprintf(buf, "0.%09u 0.%09u 0.%09u 0.%09u\n",
296 		mcp3422_scales[sample_rate][0],
297 		mcp3422_scales[sample_rate][1],
298 		mcp3422_scales[sample_rate][2],
299 		mcp3422_scales[sample_rate][3]);
300 }
301 
302 static IIO_DEVICE_ATTR(sampling_frequency_available, S_IRUGO,
303 		mcp3422_show_samp_freqs, NULL, 0);
304 static IIO_DEVICE_ATTR(in_voltage_scale_available, S_IRUGO,
305 		mcp3422_show_scales, NULL, 0);
306 
307 static struct attribute *mcp3422_attributes[] = {
308 	&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
309 	&iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
310 	NULL,
311 };
312 
313 static const struct attribute_group mcp3422_attribute_group = {
314 	.attrs = mcp3422_attributes,
315 };
316 
317 static const struct iio_chan_spec mcp3422_channels[] = {
318 	MCP3422_CHAN(0),
319 	MCP3422_CHAN(1),
320 };
321 
322 static const struct iio_chan_spec mcp3424_channels[] = {
323 	MCP3422_CHAN(0),
324 	MCP3422_CHAN(1),
325 	MCP3422_CHAN(2),
326 	MCP3422_CHAN(3),
327 };
328 
329 static const struct iio_info mcp3422_info = {
330 	.read_raw = mcp3422_read_raw,
331 	.write_raw = mcp3422_write_raw,
332 	.write_raw_get_fmt = mcp3422_write_raw_get_fmt,
333 	.attrs = &mcp3422_attribute_group,
334 	.driver_module = THIS_MODULE,
335 };
336 
337 static int mcp3422_probe(struct i2c_client *client,
338 			 const struct i2c_device_id *id)
339 {
340 	struct iio_dev *indio_dev;
341 	struct mcp3422 *adc;
342 	int err;
343 	u8 config;
344 
345 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
346 		return -ENODEV;
347 
348 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*adc));
349 	if (!indio_dev)
350 		return -ENOMEM;
351 
352 	adc = iio_priv(indio_dev);
353 	adc->i2c = client;
354 	adc->id = (u8)(id->driver_data);
355 
356 	mutex_init(&adc->lock);
357 
358 	indio_dev->dev.parent = &client->dev;
359 	indio_dev->name = dev_name(&client->dev);
360 	indio_dev->modes = INDIO_DIRECT_MODE;
361 	indio_dev->info = &mcp3422_info;
362 
363 	switch (adc->id) {
364 	case 2:
365 	case 3:
366 	case 6:
367 	case 7:
368 		indio_dev->channels = mcp3422_channels;
369 		indio_dev->num_channels = ARRAY_SIZE(mcp3422_channels);
370 		break;
371 	case 4:
372 	case 8:
373 		indio_dev->channels = mcp3424_channels;
374 		indio_dev->num_channels = ARRAY_SIZE(mcp3424_channels);
375 		break;
376 	}
377 
378 	/* meaningful default configuration */
379 	config = (MCP3422_CONT_SAMPLING
380 		| MCP3422_CHANNEL_VALUE(1)
381 		| MCP3422_PGA_VALUE(MCP3422_PGA_1)
382 		| MCP3422_SAMPLE_RATE_VALUE(MCP3422_SRATE_240));
383 	mcp3422_update_config(adc, config);
384 
385 	err = devm_iio_device_register(&client->dev, indio_dev);
386 	if (err < 0)
387 		return err;
388 
389 	i2c_set_clientdata(client, indio_dev);
390 
391 	return 0;
392 }
393 
394 static const struct i2c_device_id mcp3422_id[] = {
395 	{ "mcp3422", 2 },
396 	{ "mcp3423", 3 },
397 	{ "mcp3424", 4 },
398 	{ "mcp3426", 6 },
399 	{ "mcp3427", 7 },
400 	{ "mcp3428", 8 },
401 	{ }
402 };
403 MODULE_DEVICE_TABLE(i2c, mcp3422_id);
404 
405 #ifdef CONFIG_OF
406 static const struct of_device_id mcp3422_of_match[] = {
407 	{ .compatible = "mcp3422" },
408 	{ }
409 };
410 MODULE_DEVICE_TABLE(of, mcp3422_of_match);
411 #endif
412 
413 static struct i2c_driver mcp3422_driver = {
414 	.driver = {
415 		.name = "mcp3422",
416 		.owner = THIS_MODULE,
417 		.of_match_table = of_match_ptr(mcp3422_of_match),
418 	},
419 	.probe = mcp3422_probe,
420 	.id_table = mcp3422_id,
421 };
422 module_i2c_driver(mcp3422_driver);
423 
424 MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>");
425 MODULE_DESCRIPTION("Microchip mcp3422/3/4/6/7/8 driver");
426 MODULE_LICENSE("GPL v2");
427