1 /* 2 * Copyright (C) 2013 Oskar Andero <oskar.andero@gmail.com> 3 * Copyright (C) 2014 Rose Technology 4 * Allan Bendorff Jensen <abj@rosetechnology.dk> 5 * Soren Andersen <san@rosetechnology.dk> 6 * 7 * Driver for following ADC chips from Microchip Technology's: 8 * 10 Bit converter 9 * MCP3001 10 * MCP3002 11 * MCP3004 12 * MCP3008 13 * ------------ 14 * 12 bit converter 15 * MCP3201 16 * MCP3202 17 * MCP3204 18 * MCP3208 19 * ------------ 20 * 21 * Datasheet can be found here: 22 * http://ww1.microchip.com/downloads/en/DeviceDoc/21293C.pdf mcp3001 23 * http://ww1.microchip.com/downloads/en/DeviceDoc/21294E.pdf mcp3002 24 * http://ww1.microchip.com/downloads/en/DeviceDoc/21295d.pdf mcp3004/08 25 * http://ww1.microchip.com/downloads/en/DeviceDoc/21290D.pdf mcp3201 26 * http://ww1.microchip.com/downloads/en/DeviceDoc/21034D.pdf mcp3202 27 * http://ww1.microchip.com/downloads/en/DeviceDoc/21298c.pdf mcp3204/08 28 * http://ww1.microchip.com/downloads/en/DeviceDoc/21700E.pdf mcp3301 29 * 30 * This program is free software; you can redistribute it and/or modify 31 * it under the terms of the GNU General Public License version 2 as 32 * published by the Free Software Foundation. 33 */ 34 35 #include <linux/err.h> 36 #include <linux/delay.h> 37 #include <linux/spi/spi.h> 38 #include <linux/module.h> 39 #include <linux/iio/iio.h> 40 #include <linux/regulator/consumer.h> 41 42 enum { 43 mcp3001, 44 mcp3002, 45 mcp3004, 46 mcp3008, 47 mcp3201, 48 mcp3202, 49 mcp3204, 50 mcp3208, 51 mcp3301, 52 }; 53 54 struct mcp320x_chip_info { 55 const struct iio_chan_spec *channels; 56 unsigned int num_channels; 57 unsigned int resolution; 58 }; 59 60 struct mcp320x { 61 struct spi_device *spi; 62 struct spi_message msg; 63 struct spi_transfer transfer[2]; 64 65 struct regulator *reg; 66 struct mutex lock; 67 const struct mcp320x_chip_info *chip_info; 68 69 u8 tx_buf ____cacheline_aligned; 70 u8 rx_buf[2]; 71 }; 72 73 static int mcp320x_channel_to_tx_data(int device_index, 74 const unsigned int channel, bool differential) 75 { 76 int start_bit = 1; 77 78 switch (device_index) { 79 case mcp3001: 80 case mcp3201: 81 case mcp3301: 82 return 0; 83 case mcp3002: 84 case mcp3202: 85 return ((start_bit << 4) | (!differential << 3) | 86 (channel << 2)); 87 case mcp3004: 88 case mcp3204: 89 case mcp3008: 90 case mcp3208: 91 return ((start_bit << 6) | (!differential << 5) | 92 (channel << 2)); 93 default: 94 return -EINVAL; 95 } 96 } 97 98 static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel, 99 bool differential, int device_index) 100 { 101 int ret; 102 103 adc->rx_buf[0] = 0; 104 adc->rx_buf[1] = 0; 105 adc->tx_buf = mcp320x_channel_to_tx_data(device_index, 106 channel, differential); 107 108 if (device_index != mcp3001 && device_index != mcp3201 && device_index != mcp3301) { 109 ret = spi_sync(adc->spi, &adc->msg); 110 if (ret < 0) 111 return ret; 112 } else { 113 ret = spi_read(adc->spi, &adc->rx_buf, sizeof(adc->rx_buf)); 114 if (ret < 0) 115 return ret; 116 } 117 118 switch (device_index) { 119 case mcp3001: 120 return (adc->rx_buf[0] << 5 | adc->rx_buf[1] >> 3); 121 case mcp3002: 122 case mcp3004: 123 case mcp3008: 124 return (adc->rx_buf[0] << 2 | adc->rx_buf[1] >> 6); 125 case mcp3201: 126 return (adc->rx_buf[0] << 7 | adc->rx_buf[1] >> 1); 127 case mcp3202: 128 case mcp3204: 129 case mcp3208: 130 return (adc->rx_buf[0] << 4 | adc->rx_buf[1] >> 4); 131 case mcp3301: 132 return sign_extend32((adc->rx_buf[0] & 0x1f) << 8 | adc->rx_buf[1], 12); 133 default: 134 return -EINVAL; 135 } 136 } 137 138 static int mcp320x_read_raw(struct iio_dev *indio_dev, 139 struct iio_chan_spec const *channel, int *val, 140 int *val2, long mask) 141 { 142 struct mcp320x *adc = iio_priv(indio_dev); 143 int ret = -EINVAL; 144 int device_index = 0; 145 146 mutex_lock(&adc->lock); 147 148 device_index = spi_get_device_id(adc->spi)->driver_data; 149 150 switch (mask) { 151 case IIO_CHAN_INFO_RAW: 152 ret = mcp320x_adc_conversion(adc, channel->address, 153 channel->differential, device_index); 154 155 if (ret < 0) 156 goto out; 157 158 *val = ret; 159 ret = IIO_VAL_INT; 160 break; 161 162 case IIO_CHAN_INFO_SCALE: 163 ret = regulator_get_voltage(adc->reg); 164 if (ret < 0) 165 goto out; 166 167 /* convert regulator output voltage to mV */ 168 *val = ret / 1000; 169 *val2 = adc->chip_info->resolution; 170 ret = IIO_VAL_FRACTIONAL_LOG2; 171 break; 172 } 173 174 out: 175 mutex_unlock(&adc->lock); 176 177 return ret; 178 } 179 180 #define MCP320X_VOLTAGE_CHANNEL(num) \ 181 { \ 182 .type = IIO_VOLTAGE, \ 183 .indexed = 1, \ 184 .channel = (num), \ 185 .address = (num), \ 186 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 187 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \ 188 } 189 190 #define MCP320X_VOLTAGE_CHANNEL_DIFF(num) \ 191 { \ 192 .type = IIO_VOLTAGE, \ 193 .indexed = 1, \ 194 .channel = (num * 2), \ 195 .channel2 = (num * 2 + 1), \ 196 .address = (num * 2), \ 197 .differential = 1, \ 198 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 199 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \ 200 } 201 202 static const struct iio_chan_spec mcp3201_channels[] = { 203 MCP320X_VOLTAGE_CHANNEL_DIFF(0), 204 }; 205 206 static const struct iio_chan_spec mcp3202_channels[] = { 207 MCP320X_VOLTAGE_CHANNEL(0), 208 MCP320X_VOLTAGE_CHANNEL(1), 209 MCP320X_VOLTAGE_CHANNEL_DIFF(0), 210 }; 211 212 static const struct iio_chan_spec mcp3204_channels[] = { 213 MCP320X_VOLTAGE_CHANNEL(0), 214 MCP320X_VOLTAGE_CHANNEL(1), 215 MCP320X_VOLTAGE_CHANNEL(2), 216 MCP320X_VOLTAGE_CHANNEL(3), 217 MCP320X_VOLTAGE_CHANNEL_DIFF(0), 218 MCP320X_VOLTAGE_CHANNEL_DIFF(1), 219 }; 220 221 static const struct iio_chan_spec mcp3208_channels[] = { 222 MCP320X_VOLTAGE_CHANNEL(0), 223 MCP320X_VOLTAGE_CHANNEL(1), 224 MCP320X_VOLTAGE_CHANNEL(2), 225 MCP320X_VOLTAGE_CHANNEL(3), 226 MCP320X_VOLTAGE_CHANNEL(4), 227 MCP320X_VOLTAGE_CHANNEL(5), 228 MCP320X_VOLTAGE_CHANNEL(6), 229 MCP320X_VOLTAGE_CHANNEL(7), 230 MCP320X_VOLTAGE_CHANNEL_DIFF(0), 231 MCP320X_VOLTAGE_CHANNEL_DIFF(1), 232 MCP320X_VOLTAGE_CHANNEL_DIFF(2), 233 MCP320X_VOLTAGE_CHANNEL_DIFF(3), 234 }; 235 236 static const struct iio_info mcp320x_info = { 237 .read_raw = mcp320x_read_raw, 238 .driver_module = THIS_MODULE, 239 }; 240 241 static const struct mcp320x_chip_info mcp320x_chip_infos[] = { 242 [mcp3001] = { 243 .channels = mcp3201_channels, 244 .num_channels = ARRAY_SIZE(mcp3201_channels), 245 .resolution = 10 246 }, 247 [mcp3002] = { 248 .channels = mcp3202_channels, 249 .num_channels = ARRAY_SIZE(mcp3202_channels), 250 .resolution = 10 251 }, 252 [mcp3004] = { 253 .channels = mcp3204_channels, 254 .num_channels = ARRAY_SIZE(mcp3204_channels), 255 .resolution = 10 256 }, 257 [mcp3008] = { 258 .channels = mcp3208_channels, 259 .num_channels = ARRAY_SIZE(mcp3208_channels), 260 .resolution = 10 261 }, 262 [mcp3201] = { 263 .channels = mcp3201_channels, 264 .num_channels = ARRAY_SIZE(mcp3201_channels), 265 .resolution = 12 266 }, 267 [mcp3202] = { 268 .channels = mcp3202_channels, 269 .num_channels = ARRAY_SIZE(mcp3202_channels), 270 .resolution = 12 271 }, 272 [mcp3204] = { 273 .channels = mcp3204_channels, 274 .num_channels = ARRAY_SIZE(mcp3204_channels), 275 .resolution = 12 276 }, 277 [mcp3208] = { 278 .channels = mcp3208_channels, 279 .num_channels = ARRAY_SIZE(mcp3208_channels), 280 .resolution = 12 281 }, 282 [mcp3301] = { 283 .channels = mcp3201_channels, 284 .num_channels = ARRAY_SIZE(mcp3201_channels), 285 .resolution = 13 286 }, 287 }; 288 289 static int mcp320x_probe(struct spi_device *spi) 290 { 291 struct iio_dev *indio_dev; 292 struct mcp320x *adc; 293 const struct mcp320x_chip_info *chip_info; 294 int ret; 295 296 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc)); 297 if (!indio_dev) 298 return -ENOMEM; 299 300 adc = iio_priv(indio_dev); 301 adc->spi = spi; 302 303 indio_dev->dev.parent = &spi->dev; 304 indio_dev->name = spi_get_device_id(spi)->name; 305 indio_dev->modes = INDIO_DIRECT_MODE; 306 indio_dev->info = &mcp320x_info; 307 308 chip_info = &mcp320x_chip_infos[spi_get_device_id(spi)->driver_data]; 309 indio_dev->channels = chip_info->channels; 310 indio_dev->num_channels = chip_info->num_channels; 311 312 adc->chip_info = chip_info; 313 314 adc->transfer[0].tx_buf = &adc->tx_buf; 315 adc->transfer[0].len = sizeof(adc->tx_buf); 316 adc->transfer[1].rx_buf = adc->rx_buf; 317 adc->transfer[1].len = sizeof(adc->rx_buf); 318 319 spi_message_init_with_transfers(&adc->msg, adc->transfer, 320 ARRAY_SIZE(adc->transfer)); 321 322 adc->reg = devm_regulator_get(&spi->dev, "vref"); 323 if (IS_ERR(adc->reg)) 324 return PTR_ERR(adc->reg); 325 326 ret = regulator_enable(adc->reg); 327 if (ret < 0) 328 return ret; 329 330 mutex_init(&adc->lock); 331 332 ret = iio_device_register(indio_dev); 333 if (ret < 0) 334 goto reg_disable; 335 336 return 0; 337 338 reg_disable: 339 regulator_disable(adc->reg); 340 341 return ret; 342 } 343 344 static int mcp320x_remove(struct spi_device *spi) 345 { 346 struct iio_dev *indio_dev = spi_get_drvdata(spi); 347 struct mcp320x *adc = iio_priv(indio_dev); 348 349 iio_device_unregister(indio_dev); 350 regulator_disable(adc->reg); 351 352 return 0; 353 } 354 355 #if defined(CONFIG_OF) 356 static const struct of_device_id mcp320x_dt_ids[] = { 357 { 358 .compatible = "mcp3001", 359 .data = &mcp320x_chip_infos[mcp3001], 360 }, { 361 .compatible = "mcp3002", 362 .data = &mcp320x_chip_infos[mcp3002], 363 }, { 364 .compatible = "mcp3004", 365 .data = &mcp320x_chip_infos[mcp3004], 366 }, { 367 .compatible = "mcp3008", 368 .data = &mcp320x_chip_infos[mcp3008], 369 }, { 370 .compatible = "mcp3201", 371 .data = &mcp320x_chip_infos[mcp3201], 372 }, { 373 .compatible = "mcp3202", 374 .data = &mcp320x_chip_infos[mcp3202], 375 }, { 376 .compatible = "mcp3204", 377 .data = &mcp320x_chip_infos[mcp3204], 378 }, { 379 .compatible = "mcp3208", 380 .data = &mcp320x_chip_infos[mcp3208], 381 }, { 382 .compatible = "mcp3301", 383 .data = &mcp320x_chip_infos[mcp3301], 384 }, { 385 } 386 }; 387 MODULE_DEVICE_TABLE(of, mcp320x_dt_ids); 388 #endif 389 390 static const struct spi_device_id mcp320x_id[] = { 391 { "mcp3001", mcp3001 }, 392 { "mcp3002", mcp3002 }, 393 { "mcp3004", mcp3004 }, 394 { "mcp3008", mcp3008 }, 395 { "mcp3201", mcp3201 }, 396 { "mcp3202", mcp3202 }, 397 { "mcp3204", mcp3204 }, 398 { "mcp3208", mcp3208 }, 399 { "mcp3301", mcp3301 }, 400 { } 401 }; 402 MODULE_DEVICE_TABLE(spi, mcp320x_id); 403 404 static struct spi_driver mcp320x_driver = { 405 .driver = { 406 .name = "mcp320x", 407 .owner = THIS_MODULE, 408 }, 409 .probe = mcp320x_probe, 410 .remove = mcp320x_remove, 411 .id_table = mcp320x_id, 412 }; 413 module_spi_driver(mcp320x_driver); 414 415 MODULE_AUTHOR("Oskar Andero <oskar.andero@gmail.com>"); 416 MODULE_DESCRIPTION("Microchip Technology MCP3x01/02/04/08"); 417 MODULE_LICENSE("GPL v2"); 418