xref: /linux/drivers/iio/adc/lpc32xx_adc.c (revision e58e871becec2d3b04ed91c0c16fe8deac9c9dfa)
1 /*
2  *  lpc32xx_adc.c - Support for ADC in LPC32XX
3  *
4  *  3-channel, 10-bit ADC
5  *
6  *  Copyright (C) 2011, 2012 Roland Stigge <stigge@antcom.de>
7  *
8  *  This program is free software; you can redistribute it and/or modify
9  *  it under the terms of the GNU General Public License as published by
10  *  the Free Software Foundation; either version 2 of the License, or
11  *  (at your option) any later version.
12  *
13  *  This program is distributed in the hope that it will be useful,
14  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  *  GNU General Public License for more details.
17  *
18  *  You should have received a copy of the GNU General Public License
19  *  along with this program; if not, write to the Free Software
20  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22 
23 #include <linux/module.h>
24 #include <linux/platform_device.h>
25 #include <linux/interrupt.h>
26 #include <linux/device.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/io.h>
30 #include <linux/clk.h>
31 #include <linux/err.h>
32 #include <linux/completion.h>
33 #include <linux/of.h>
34 
35 #include <linux/iio/iio.h>
36 #include <linux/iio/sysfs.h>
37 
38 /*
39  * LPC32XX registers definitions
40  */
41 #define LPC32XXAD_SELECT(x)	((x) + 0x04)
42 #define LPC32XXAD_CTRL(x)	((x) + 0x08)
43 #define LPC32XXAD_VALUE(x)	((x) + 0x48)
44 
45 /* Bit definitions for LPC32XXAD_SELECT: */
46 /* constant, always write this value! */
47 #define LPC32XXAD_REFm         0x00000200
48 /* constant, always write this value! */
49 #define LPC32XXAD_REFp		0x00000080
50  /* multiple of this is the channel number: 0, 1, 2 */
51 #define LPC32XXAD_IN		0x00000010
52 /* constant, always write this value! */
53 #define LPC32XXAD_INTERNAL	0x00000004
54 
55 /* Bit definitions for LPC32XXAD_CTRL: */
56 #define LPC32XXAD_STROBE	0x00000002
57 #define LPC32XXAD_PDN_CTRL	0x00000004
58 
59 /* Bit definitions for LPC32XXAD_VALUE: */
60 #define LPC32XXAD_VALUE_MASK	0x000003FF
61 
62 #define LPC32XXAD_NAME "lpc32xx-adc"
63 
64 struct lpc32xx_adc_state {
65 	void __iomem *adc_base;
66 	struct clk *clk;
67 	struct completion completion;
68 
69 	u32 value;
70 };
71 
72 static int lpc32xx_read_raw(struct iio_dev *indio_dev,
73 			    struct iio_chan_spec const *chan,
74 			    int *val,
75 			    int *val2,
76 			    long mask)
77 {
78 	struct lpc32xx_adc_state *st = iio_priv(indio_dev);
79 
80 	if (mask == IIO_CHAN_INFO_RAW) {
81 		mutex_lock(&indio_dev->mlock);
82 		clk_prepare_enable(st->clk);
83 		/* Measurement setup */
84 		__raw_writel(LPC32XXAD_INTERNAL | (chan->address) |
85 			     LPC32XXAD_REFp | LPC32XXAD_REFm,
86 			     LPC32XXAD_SELECT(st->adc_base));
87 		/* Trigger conversion */
88 		__raw_writel(LPC32XXAD_PDN_CTRL | LPC32XXAD_STROBE,
89 			     LPC32XXAD_CTRL(st->adc_base));
90 		wait_for_completion(&st->completion); /* set by ISR */
91 		clk_disable_unprepare(st->clk);
92 		*val = st->value;
93 		mutex_unlock(&indio_dev->mlock);
94 
95 		return IIO_VAL_INT;
96 	}
97 
98 	return -EINVAL;
99 }
100 
101 static const struct iio_info lpc32xx_adc_iio_info = {
102 	.read_raw = &lpc32xx_read_raw,
103 	.driver_module = THIS_MODULE,
104 };
105 
106 #define LPC32XX_ADC_CHANNEL(_index) {			\
107 	.type = IIO_VOLTAGE,				\
108 	.indexed = 1,					\
109 	.channel = _index,				\
110 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
111 	.address = LPC32XXAD_IN * _index,		\
112 	.scan_index = _index,				\
113 }
114 
115 static const struct iio_chan_spec lpc32xx_adc_iio_channels[] = {
116 	LPC32XX_ADC_CHANNEL(0),
117 	LPC32XX_ADC_CHANNEL(1),
118 	LPC32XX_ADC_CHANNEL(2),
119 };
120 
121 static irqreturn_t lpc32xx_adc_isr(int irq, void *dev_id)
122 {
123 	struct lpc32xx_adc_state *st = dev_id;
124 
125 	/* Read value and clear irq */
126 	st->value = __raw_readl(LPC32XXAD_VALUE(st->adc_base)) &
127 		LPC32XXAD_VALUE_MASK;
128 	complete(&st->completion);
129 
130 	return IRQ_HANDLED;
131 }
132 
133 static int lpc32xx_adc_probe(struct platform_device *pdev)
134 {
135 	struct lpc32xx_adc_state *st = NULL;
136 	struct resource *res;
137 	int retval = -ENODEV;
138 	struct iio_dev *iodev = NULL;
139 	int irq;
140 
141 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
142 	if (!res) {
143 		dev_err(&pdev->dev, "failed to get platform I/O memory\n");
144 		return -ENXIO;
145 	}
146 
147 	iodev = devm_iio_device_alloc(&pdev->dev, sizeof(*st));
148 	if (!iodev)
149 		return -ENOMEM;
150 
151 	st = iio_priv(iodev);
152 
153 	st->adc_base = devm_ioremap(&pdev->dev, res->start,
154 				    resource_size(res));
155 	if (!st->adc_base) {
156 		dev_err(&pdev->dev, "failed mapping memory\n");
157 		return -EBUSY;
158 	}
159 
160 	st->clk = devm_clk_get(&pdev->dev, NULL);
161 	if (IS_ERR(st->clk)) {
162 		dev_err(&pdev->dev, "failed getting clock\n");
163 		return PTR_ERR(st->clk);
164 	}
165 
166 	irq = platform_get_irq(pdev, 0);
167 	if (irq <= 0) {
168 		dev_err(&pdev->dev, "failed getting interrupt resource\n");
169 		return -ENXIO;
170 	}
171 
172 	retval = devm_request_irq(&pdev->dev, irq, lpc32xx_adc_isr, 0,
173 				  LPC32XXAD_NAME, st);
174 	if (retval < 0) {
175 		dev_err(&pdev->dev, "failed requesting interrupt\n");
176 		return retval;
177 	}
178 
179 	platform_set_drvdata(pdev, iodev);
180 
181 	init_completion(&st->completion);
182 
183 	iodev->name = LPC32XXAD_NAME;
184 	iodev->dev.parent = &pdev->dev;
185 	iodev->info = &lpc32xx_adc_iio_info;
186 	iodev->modes = INDIO_DIRECT_MODE;
187 	iodev->channels = lpc32xx_adc_iio_channels;
188 	iodev->num_channels = ARRAY_SIZE(lpc32xx_adc_iio_channels);
189 
190 	retval = devm_iio_device_register(&pdev->dev, iodev);
191 	if (retval)
192 		return retval;
193 
194 	dev_info(&pdev->dev, "LPC32XX ADC driver loaded, IRQ %d\n", irq);
195 
196 	return 0;
197 }
198 
199 #ifdef CONFIG_OF
200 static const struct of_device_id lpc32xx_adc_match[] = {
201 	{ .compatible = "nxp,lpc3220-adc" },
202 	{},
203 };
204 MODULE_DEVICE_TABLE(of, lpc32xx_adc_match);
205 #endif
206 
207 static struct platform_driver lpc32xx_adc_driver = {
208 	.probe		= lpc32xx_adc_probe,
209 	.driver		= {
210 		.name	= LPC32XXAD_NAME,
211 		.of_match_table = of_match_ptr(lpc32xx_adc_match),
212 	},
213 };
214 
215 module_platform_driver(lpc32xx_adc_driver);
216 
217 MODULE_AUTHOR("Roland Stigge <stigge@antcom.de>");
218 MODULE_DESCRIPTION("LPC32XX ADC driver");
219 MODULE_LICENSE("GPL");
220