1 /* 2 * INA2XX Current and Power Monitors 3 * 4 * Copyright 2015 Baylibre SAS. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * Based on linux/drivers/iio/adc/ad7291.c 11 * Copyright 2010-2011 Analog Devices Inc. 12 * 13 * Based on linux/drivers/hwmon/ina2xx.c 14 * Copyright 2012 Lothar Felten <l-felten@ti.com> 15 * 16 * Licensed under the GPL-2 or later. 17 * 18 * IIO driver for INA219-220-226-230-231 19 * 20 * Configurable 7-bit I2C slave address from 0x40 to 0x4F 21 */ 22 23 #include <linux/delay.h> 24 #include <linux/i2c.h> 25 #include <linux/iio/kfifo_buf.h> 26 #include <linux/iio/sysfs.h> 27 #include <linux/kthread.h> 28 #include <linux/module.h> 29 #include <linux/regmap.h> 30 #include <linux/util_macros.h> 31 32 #include <linux/platform_data/ina2xx.h> 33 34 /* INA2XX registers definition */ 35 #define INA2XX_CONFIG 0x00 36 #define INA2XX_SHUNT_VOLTAGE 0x01 /* readonly */ 37 #define INA2XX_BUS_VOLTAGE 0x02 /* readonly */ 38 #define INA2XX_POWER 0x03 /* readonly */ 39 #define INA2XX_CURRENT 0x04 /* readonly */ 40 #define INA2XX_CALIBRATION 0x05 41 42 #define INA226_ALERT_MASK GENMASK(2, 1) 43 #define INA266_CVRF BIT(3) 44 45 #define INA2XX_MAX_REGISTERS 8 46 47 /* settings - depend on use case */ 48 #define INA219_CONFIG_DEFAULT 0x399F /* PGA=8 */ 49 #define INA226_CONFIG_DEFAULT 0x4327 50 #define INA226_DEFAULT_AVG 4 51 #define INA226_DEFAULT_IT 1110 52 53 #define INA2XX_RSHUNT_DEFAULT 10000 54 55 /* 56 * bit mask for reading the averaging setting in the configuration register 57 * FIXME: use regmap_fields. 58 */ 59 #define INA2XX_MODE_MASK GENMASK(3, 0) 60 61 #define INA226_AVG_MASK GENMASK(11, 9) 62 #define INA226_SHIFT_AVG(val) ((val) << 9) 63 64 /* Integration time for VBus */ 65 #define INA226_ITB_MASK GENMASK(8, 6) 66 #define INA226_SHIFT_ITB(val) ((val) << 6) 67 68 /* Integration time for VShunt */ 69 #define INA226_ITS_MASK GENMASK(5, 3) 70 #define INA226_SHIFT_ITS(val) ((val) << 3) 71 72 /* Cosmetic macro giving the sampling period for a full P=UxI cycle */ 73 #define SAMPLING_PERIOD(c) ((c->int_time_vbus + c->int_time_vshunt) \ 74 * c->avg) 75 76 static bool ina2xx_is_writeable_reg(struct device *dev, unsigned int reg) 77 { 78 return (reg == INA2XX_CONFIG) || (reg > INA2XX_CURRENT); 79 } 80 81 static bool ina2xx_is_volatile_reg(struct device *dev, unsigned int reg) 82 { 83 return (reg != INA2XX_CONFIG); 84 } 85 86 static inline bool is_signed_reg(unsigned int reg) 87 { 88 return (reg == INA2XX_SHUNT_VOLTAGE) || (reg == INA2XX_CURRENT); 89 } 90 91 static const struct regmap_config ina2xx_regmap_config = { 92 .reg_bits = 8, 93 .val_bits = 16, 94 .max_register = INA2XX_MAX_REGISTERS, 95 .writeable_reg = ina2xx_is_writeable_reg, 96 .volatile_reg = ina2xx_is_volatile_reg, 97 }; 98 99 enum ina2xx_ids { ina219, ina226 }; 100 101 struct ina2xx_config { 102 u16 config_default; 103 int calibration_factor; 104 int shunt_div; 105 int bus_voltage_shift; 106 int bus_voltage_lsb; /* uV */ 107 int power_lsb; /* uW */ 108 }; 109 110 struct ina2xx_chip_info { 111 struct regmap *regmap; 112 struct task_struct *task; 113 const struct ina2xx_config *config; 114 struct mutex state_lock; 115 unsigned int shunt_resistor; 116 int avg; 117 int int_time_vbus; /* Bus voltage integration time uS */ 118 int int_time_vshunt; /* Shunt voltage integration time uS */ 119 bool allow_async_readout; 120 }; 121 122 static const struct ina2xx_config ina2xx_config[] = { 123 [ina219] = { 124 .config_default = INA219_CONFIG_DEFAULT, 125 .calibration_factor = 40960000, 126 .shunt_div = 100, 127 .bus_voltage_shift = 3, 128 .bus_voltage_lsb = 4000, 129 .power_lsb = 20000, 130 }, 131 [ina226] = { 132 .config_default = INA226_CONFIG_DEFAULT, 133 .calibration_factor = 5120000, 134 .shunt_div = 400, 135 .bus_voltage_shift = 0, 136 .bus_voltage_lsb = 1250, 137 .power_lsb = 25000, 138 }, 139 }; 140 141 static int ina2xx_read_raw(struct iio_dev *indio_dev, 142 struct iio_chan_spec const *chan, 143 int *val, int *val2, long mask) 144 { 145 int ret; 146 struct ina2xx_chip_info *chip = iio_priv(indio_dev); 147 unsigned int regval; 148 149 switch (mask) { 150 case IIO_CHAN_INFO_RAW: 151 ret = regmap_read(chip->regmap, chan->address, ®val); 152 if (ret) 153 return ret; 154 155 if (is_signed_reg(chan->address)) 156 *val = (s16) regval; 157 else 158 *val = regval; 159 160 return IIO_VAL_INT; 161 162 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 163 *val = chip->avg; 164 return IIO_VAL_INT; 165 166 case IIO_CHAN_INFO_INT_TIME: 167 *val = 0; 168 if (chan->address == INA2XX_SHUNT_VOLTAGE) 169 *val2 = chip->int_time_vshunt; 170 else 171 *val2 = chip->int_time_vbus; 172 173 return IIO_VAL_INT_PLUS_MICRO; 174 175 case IIO_CHAN_INFO_SAMP_FREQ: 176 /* 177 * Sample freq is read only, it is a consequence of 178 * 1/AVG*(CT_bus+CT_shunt). 179 */ 180 *val = DIV_ROUND_CLOSEST(1000000, SAMPLING_PERIOD(chip)); 181 182 return IIO_VAL_INT; 183 184 case IIO_CHAN_INFO_SCALE: 185 switch (chan->address) { 186 case INA2XX_SHUNT_VOLTAGE: 187 /* processed (mV) = raw/shunt_div */ 188 *val2 = chip->config->shunt_div; 189 *val = 1; 190 return IIO_VAL_FRACTIONAL; 191 192 case INA2XX_BUS_VOLTAGE: 193 /* processed (mV) = raw*lsb (uV) / (1000 << shift) */ 194 *val = chip->config->bus_voltage_lsb; 195 *val2 = 1000 << chip->config->bus_voltage_shift; 196 return IIO_VAL_FRACTIONAL; 197 198 case INA2XX_POWER: 199 /* processed (mW) = raw*lsb (uW) / 1000 */ 200 *val = chip->config->power_lsb; 201 *val2 = 1000; 202 return IIO_VAL_FRACTIONAL; 203 204 case INA2XX_CURRENT: 205 /* processed (mA) = raw (mA) */ 206 *val = 1; 207 return IIO_VAL_INT; 208 } 209 } 210 211 return -EINVAL; 212 } 213 214 /* 215 * Available averaging rates for ina226. The indices correspond with 216 * the bit values expected by the chip (according to the ina226 datasheet, 217 * table 3 AVG bit settings, found at 218 * http://www.ti.com/lit/ds/symlink/ina226.pdf. 219 */ 220 static const int ina226_avg_tab[] = { 1, 4, 16, 64, 128, 256, 512, 1024 }; 221 222 static int ina226_set_average(struct ina2xx_chip_info *chip, unsigned int val, 223 unsigned int *config) 224 { 225 int bits; 226 227 if (val > 1024 || val < 1) 228 return -EINVAL; 229 230 bits = find_closest(val, ina226_avg_tab, 231 ARRAY_SIZE(ina226_avg_tab)); 232 233 chip->avg = ina226_avg_tab[bits]; 234 235 *config &= ~INA226_AVG_MASK; 236 *config |= INA226_SHIFT_AVG(bits) & INA226_AVG_MASK; 237 238 return 0; 239 } 240 241 /* Conversion times in uS */ 242 static const int ina226_conv_time_tab[] = { 140, 204, 332, 588, 1100, 243 2116, 4156, 8244 }; 244 245 static int ina226_set_int_time_vbus(struct ina2xx_chip_info *chip, 246 unsigned int val_us, unsigned int *config) 247 { 248 int bits; 249 250 if (val_us > 8244 || val_us < 140) 251 return -EINVAL; 252 253 bits = find_closest(val_us, ina226_conv_time_tab, 254 ARRAY_SIZE(ina226_conv_time_tab)); 255 256 chip->int_time_vbus = ina226_conv_time_tab[bits]; 257 258 *config &= ~INA226_ITB_MASK; 259 *config |= INA226_SHIFT_ITB(bits) & INA226_ITB_MASK; 260 261 return 0; 262 } 263 264 static int ina226_set_int_time_vshunt(struct ina2xx_chip_info *chip, 265 unsigned int val_us, unsigned int *config) 266 { 267 int bits; 268 269 if (val_us > 8244 || val_us < 140) 270 return -EINVAL; 271 272 bits = find_closest(val_us, ina226_conv_time_tab, 273 ARRAY_SIZE(ina226_conv_time_tab)); 274 275 chip->int_time_vshunt = ina226_conv_time_tab[bits]; 276 277 *config &= ~INA226_ITS_MASK; 278 *config |= INA226_SHIFT_ITS(bits) & INA226_ITS_MASK; 279 280 return 0; 281 } 282 283 static int ina2xx_write_raw(struct iio_dev *indio_dev, 284 struct iio_chan_spec const *chan, 285 int val, int val2, long mask) 286 { 287 struct ina2xx_chip_info *chip = iio_priv(indio_dev); 288 unsigned int config, tmp; 289 int ret; 290 291 if (iio_buffer_enabled(indio_dev)) 292 return -EBUSY; 293 294 mutex_lock(&chip->state_lock); 295 296 ret = regmap_read(chip->regmap, INA2XX_CONFIG, &config); 297 if (ret) 298 goto err; 299 300 tmp = config; 301 302 switch (mask) { 303 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 304 ret = ina226_set_average(chip, val, &tmp); 305 break; 306 307 case IIO_CHAN_INFO_INT_TIME: 308 if (chan->address == INA2XX_SHUNT_VOLTAGE) 309 ret = ina226_set_int_time_vshunt(chip, val2, &tmp); 310 else 311 ret = ina226_set_int_time_vbus(chip, val2, &tmp); 312 break; 313 314 default: 315 ret = -EINVAL; 316 } 317 318 if (!ret && (tmp != config)) 319 ret = regmap_write(chip->regmap, INA2XX_CONFIG, tmp); 320 err: 321 mutex_unlock(&chip->state_lock); 322 323 return ret; 324 } 325 326 static ssize_t ina2xx_allow_async_readout_show(struct device *dev, 327 struct device_attribute *attr, 328 char *buf) 329 { 330 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev)); 331 332 return sprintf(buf, "%d\n", chip->allow_async_readout); 333 } 334 335 static ssize_t ina2xx_allow_async_readout_store(struct device *dev, 336 struct device_attribute *attr, 337 const char *buf, size_t len) 338 { 339 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev)); 340 bool val; 341 int ret; 342 343 ret = strtobool((const char *) buf, &val); 344 if (ret) 345 return ret; 346 347 chip->allow_async_readout = val; 348 349 return len; 350 } 351 352 /* 353 * Set current LSB to 1mA, shunt is in uOhms 354 * (equation 13 in datasheet). We hardcode a Current_LSB 355 * of 1.0 x10-6. The only remaining parameter is RShunt. 356 * There is no need to expose the CALIBRATION register 357 * to the user for now. But we need to reset this register 358 * if the user updates RShunt after driver init, e.g upon 359 * reading an EEPROM/Probe-type value. 360 */ 361 static int ina2xx_set_calibration(struct ina2xx_chip_info *chip) 362 { 363 u16 regval = DIV_ROUND_CLOSEST(chip->config->calibration_factor, 364 chip->shunt_resistor); 365 366 return regmap_write(chip->regmap, INA2XX_CALIBRATION, regval); 367 } 368 369 static int set_shunt_resistor(struct ina2xx_chip_info *chip, unsigned int val) 370 { 371 if (val <= 0 || val > chip->config->calibration_factor) 372 return -EINVAL; 373 374 chip->shunt_resistor = val; 375 376 return 0; 377 } 378 379 static ssize_t ina2xx_shunt_resistor_show(struct device *dev, 380 struct device_attribute *attr, 381 char *buf) 382 { 383 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev)); 384 385 return sprintf(buf, "%d\n", chip->shunt_resistor); 386 } 387 388 static ssize_t ina2xx_shunt_resistor_store(struct device *dev, 389 struct device_attribute *attr, 390 const char *buf, size_t len) 391 { 392 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev)); 393 unsigned long val; 394 int ret; 395 396 ret = kstrtoul((const char *) buf, 10, &val); 397 if (ret) 398 return ret; 399 400 ret = set_shunt_resistor(chip, val); 401 if (ret) 402 return ret; 403 404 /* Update the Calibration register */ 405 ret = ina2xx_set_calibration(chip); 406 if (ret) 407 return ret; 408 409 return len; 410 } 411 412 #define INA2XX_CHAN(_type, _index, _address) { \ 413 .type = (_type), \ 414 .address = (_address), \ 415 .indexed = 1, \ 416 .channel = (_index), \ 417 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \ 418 | BIT(IIO_CHAN_INFO_SCALE), \ 419 .info_mask_shared_by_dir = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \ 420 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ 421 .scan_index = (_index), \ 422 .scan_type = { \ 423 .sign = 'u', \ 424 .realbits = 16, \ 425 .storagebits = 16, \ 426 .endianness = IIO_CPU, \ 427 } \ 428 } 429 430 /* 431 * Sampling Freq is a consequence of the integration times of 432 * the Voltage channels. 433 */ 434 #define INA2XX_CHAN_VOLTAGE(_index, _address) { \ 435 .type = IIO_VOLTAGE, \ 436 .address = (_address), \ 437 .indexed = 1, \ 438 .channel = (_index), \ 439 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 440 BIT(IIO_CHAN_INFO_SCALE) | \ 441 BIT(IIO_CHAN_INFO_INT_TIME), \ 442 .scan_index = (_index), \ 443 .scan_type = { \ 444 .sign = 'u', \ 445 .realbits = 16, \ 446 .storagebits = 16, \ 447 .endianness = IIO_LE, \ 448 } \ 449 } 450 451 static const struct iio_chan_spec ina2xx_channels[] = { 452 INA2XX_CHAN_VOLTAGE(0, INA2XX_SHUNT_VOLTAGE), 453 INA2XX_CHAN_VOLTAGE(1, INA2XX_BUS_VOLTAGE), 454 INA2XX_CHAN(IIO_POWER, 2, INA2XX_POWER), 455 INA2XX_CHAN(IIO_CURRENT, 3, INA2XX_CURRENT), 456 IIO_CHAN_SOFT_TIMESTAMP(4), 457 }; 458 459 static int ina2xx_work_buffer(struct iio_dev *indio_dev) 460 { 461 struct ina2xx_chip_info *chip = iio_priv(indio_dev); 462 unsigned short data[8]; 463 int bit, ret, i = 0; 464 s64 time_a, time_b; 465 unsigned int alert; 466 467 time_a = iio_get_time_ns(indio_dev); 468 469 /* 470 * Because the timer thread and the chip conversion clock 471 * are asynchronous, the period difference will eventually 472 * result in reading V[k-1] again, or skip V[k] at time Tk. 473 * In order to resync the timer with the conversion process 474 * we check the ConVersionReadyFlag. 475 * On hardware that supports using the ALERT pin to toggle a 476 * GPIO a triggered buffer could be used instead. 477 * For now, we pay for that extra read of the ALERT register 478 */ 479 if (!chip->allow_async_readout) 480 do { 481 ret = regmap_read(chip->regmap, INA226_ALERT_MASK, 482 &alert); 483 if (ret < 0) 484 return ret; 485 486 alert &= INA266_CVRF; 487 } while (!alert); 488 489 /* 490 * Single register reads: bulk_read will not work with ina226 491 * as there is no auto-increment of the address register for 492 * data length longer than 16bits. 493 */ 494 for_each_set_bit(bit, indio_dev->active_scan_mask, 495 indio_dev->masklength) { 496 unsigned int val; 497 498 ret = regmap_read(chip->regmap, 499 INA2XX_SHUNT_VOLTAGE + bit, &val); 500 if (ret < 0) 501 return ret; 502 503 data[i++] = val; 504 } 505 506 time_b = iio_get_time_ns(indio_dev); 507 508 iio_push_to_buffers_with_timestamp(indio_dev, 509 (unsigned int *)data, time_a); 510 511 return (unsigned long)(time_b - time_a) / 1000; 512 }; 513 514 static int ina2xx_capture_thread(void *data) 515 { 516 struct iio_dev *indio_dev = data; 517 struct ina2xx_chip_info *chip = iio_priv(indio_dev); 518 unsigned int sampling_us = SAMPLING_PERIOD(chip); 519 int buffer_us; 520 521 /* 522 * Poll a bit faster than the chip internal Fs, in case 523 * we wish to sync with the conversion ready flag. 524 */ 525 if (!chip->allow_async_readout) 526 sampling_us -= 200; 527 528 do { 529 buffer_us = ina2xx_work_buffer(indio_dev); 530 if (buffer_us < 0) 531 return buffer_us; 532 533 if (sampling_us > buffer_us) 534 udelay(sampling_us - buffer_us); 535 536 } while (!kthread_should_stop()); 537 538 return 0; 539 } 540 541 static int ina2xx_buffer_enable(struct iio_dev *indio_dev) 542 { 543 struct ina2xx_chip_info *chip = iio_priv(indio_dev); 544 unsigned int sampling_us = SAMPLING_PERIOD(chip); 545 546 dev_dbg(&indio_dev->dev, "Enabling buffer w/ scan_mask %02x, freq = %d, avg =%u\n", 547 (unsigned int)(*indio_dev->active_scan_mask), 548 1000000 / sampling_us, chip->avg); 549 550 dev_dbg(&indio_dev->dev, "Expected work period: %u us\n", sampling_us); 551 dev_dbg(&indio_dev->dev, "Async readout mode: %d\n", 552 chip->allow_async_readout); 553 554 chip->task = kthread_run(ina2xx_capture_thread, (void *)indio_dev, 555 "%s:%d-%uus", indio_dev->name, indio_dev->id, 556 sampling_us); 557 558 return PTR_ERR_OR_ZERO(chip->task); 559 } 560 561 static int ina2xx_buffer_disable(struct iio_dev *indio_dev) 562 { 563 struct ina2xx_chip_info *chip = iio_priv(indio_dev); 564 565 if (chip->task) { 566 kthread_stop(chip->task); 567 chip->task = NULL; 568 } 569 570 return 0; 571 } 572 573 static const struct iio_buffer_setup_ops ina2xx_setup_ops = { 574 .postenable = &ina2xx_buffer_enable, 575 .predisable = &ina2xx_buffer_disable, 576 }; 577 578 static int ina2xx_debug_reg(struct iio_dev *indio_dev, 579 unsigned reg, unsigned writeval, unsigned *readval) 580 { 581 struct ina2xx_chip_info *chip = iio_priv(indio_dev); 582 583 if (!readval) 584 return regmap_write(chip->regmap, reg, writeval); 585 586 return regmap_read(chip->regmap, reg, readval); 587 } 588 589 /* Possible integration times for vshunt and vbus */ 590 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.000140 0.000204 0.000332 0.000588 0.001100 0.002116 0.004156 0.008244"); 591 592 static IIO_DEVICE_ATTR(in_allow_async_readout, S_IRUGO | S_IWUSR, 593 ina2xx_allow_async_readout_show, 594 ina2xx_allow_async_readout_store, 0); 595 596 static IIO_DEVICE_ATTR(in_shunt_resistor, S_IRUGO | S_IWUSR, 597 ina2xx_shunt_resistor_show, 598 ina2xx_shunt_resistor_store, 0); 599 600 static struct attribute *ina2xx_attributes[] = { 601 &iio_dev_attr_in_allow_async_readout.dev_attr.attr, 602 &iio_const_attr_integration_time_available.dev_attr.attr, 603 &iio_dev_attr_in_shunt_resistor.dev_attr.attr, 604 NULL, 605 }; 606 607 static const struct attribute_group ina2xx_attribute_group = { 608 .attrs = ina2xx_attributes, 609 }; 610 611 static const struct iio_info ina2xx_info = { 612 .driver_module = THIS_MODULE, 613 .attrs = &ina2xx_attribute_group, 614 .read_raw = ina2xx_read_raw, 615 .write_raw = ina2xx_write_raw, 616 .debugfs_reg_access = ina2xx_debug_reg, 617 }; 618 619 /* Initialize the configuration and calibration registers. */ 620 static int ina2xx_init(struct ina2xx_chip_info *chip, unsigned int config) 621 { 622 int ret = regmap_write(chip->regmap, INA2XX_CONFIG, config); 623 if (ret) 624 return ret; 625 626 return ina2xx_set_calibration(chip); 627 } 628 629 static int ina2xx_probe(struct i2c_client *client, 630 const struct i2c_device_id *id) 631 { 632 struct ina2xx_chip_info *chip; 633 struct iio_dev *indio_dev; 634 struct iio_buffer *buffer; 635 unsigned int val; 636 int ret; 637 638 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip)); 639 if (!indio_dev) 640 return -ENOMEM; 641 642 chip = iio_priv(indio_dev); 643 644 /* This is only used for device removal purposes. */ 645 i2c_set_clientdata(client, indio_dev); 646 647 chip->regmap = devm_regmap_init_i2c(client, &ina2xx_regmap_config); 648 if (IS_ERR(chip->regmap)) { 649 dev_err(&client->dev, "failed to allocate register map\n"); 650 return PTR_ERR(chip->regmap); 651 } 652 653 chip->config = &ina2xx_config[id->driver_data]; 654 655 mutex_init(&chip->state_lock); 656 657 if (of_property_read_u32(client->dev.of_node, 658 "shunt-resistor", &val) < 0) { 659 struct ina2xx_platform_data *pdata = 660 dev_get_platdata(&client->dev); 661 662 if (pdata) 663 val = pdata->shunt_uohms; 664 else 665 val = INA2XX_RSHUNT_DEFAULT; 666 } 667 668 ret = set_shunt_resistor(chip, val); 669 if (ret) 670 return ret; 671 672 /* Patch the current config register with default. */ 673 val = chip->config->config_default; 674 675 if (id->driver_data == ina226) { 676 ina226_set_average(chip, INA226_DEFAULT_AVG, &val); 677 ina226_set_int_time_vbus(chip, INA226_DEFAULT_IT, &val); 678 ina226_set_int_time_vshunt(chip, INA226_DEFAULT_IT, &val); 679 } 680 681 ret = ina2xx_init(chip, val); 682 if (ret) { 683 dev_err(&client->dev, "error configuring the device\n"); 684 return ret; 685 } 686 687 indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE; 688 indio_dev->dev.parent = &client->dev; 689 indio_dev->dev.of_node = client->dev.of_node; 690 indio_dev->channels = ina2xx_channels; 691 indio_dev->num_channels = ARRAY_SIZE(ina2xx_channels); 692 indio_dev->name = id->name; 693 indio_dev->info = &ina2xx_info; 694 indio_dev->setup_ops = &ina2xx_setup_ops; 695 696 buffer = devm_iio_kfifo_allocate(&indio_dev->dev); 697 if (!buffer) 698 return -ENOMEM; 699 700 iio_device_attach_buffer(indio_dev, buffer); 701 702 return iio_device_register(indio_dev); 703 } 704 705 static int ina2xx_remove(struct i2c_client *client) 706 { 707 struct iio_dev *indio_dev = i2c_get_clientdata(client); 708 struct ina2xx_chip_info *chip = iio_priv(indio_dev); 709 710 iio_device_unregister(indio_dev); 711 712 /* Powerdown */ 713 return regmap_update_bits(chip->regmap, INA2XX_CONFIG, 714 INA2XX_MODE_MASK, 0); 715 } 716 717 static const struct i2c_device_id ina2xx_id[] = { 718 {"ina219", ina219}, 719 {"ina220", ina219}, 720 {"ina226", ina226}, 721 {"ina230", ina226}, 722 {"ina231", ina226}, 723 {} 724 }; 725 MODULE_DEVICE_TABLE(i2c, ina2xx_id); 726 727 static struct i2c_driver ina2xx_driver = { 728 .driver = { 729 .name = KBUILD_MODNAME, 730 }, 731 .probe = ina2xx_probe, 732 .remove = ina2xx_remove, 733 .id_table = ina2xx_id, 734 }; 735 module_i2c_driver(ina2xx_driver); 736 737 MODULE_AUTHOR("Marc Titinger <marc.titinger@baylibre.com>"); 738 MODULE_DESCRIPTION("Texas Instruments INA2XX ADC driver"); 739 MODULE_LICENSE("GPL v2"); 740