1 // SPDX-License-Identifier: GPL-2.0-only 2 /* ADC driver for AXP20X and AXP22X PMICs 3 * 4 * Copyright (c) 2016 Free Electrons NextThing Co. 5 * Quentin Schulz <quentin.schulz@free-electrons.com> 6 */ 7 8 #include <linux/bitfield.h> 9 #include <linux/completion.h> 10 #include <linux/interrupt.h> 11 #include <linux/io.h> 12 #include <linux/module.h> 13 #include <linux/mod_devicetable.h> 14 #include <linux/platform_device.h> 15 #include <linux/pm_runtime.h> 16 #include <linux/property.h> 17 #include <linux/regmap.h> 18 #include <linux/thermal.h> 19 20 #include <linux/iio/iio.h> 21 #include <linux/iio/driver.h> 22 #include <linux/iio/machine.h> 23 #include <linux/mfd/axp20x.h> 24 25 #define AXP192_ADC_EN1_MASK GENMASK(7, 0) 26 #define AXP192_ADC_EN2_MASK (GENMASK(3, 0) | BIT(7)) 27 28 #define AXP20X_ADC_EN1_MASK GENMASK(7, 0) 29 #define AXP20X_ADC_EN2_MASK (GENMASK(3, 2) | BIT(7)) 30 31 #define AXP22X_ADC_EN1_MASK (GENMASK(7, 5) | BIT(0)) 32 33 #define AXP192_GPIO30_IN_RANGE_GPIO0 BIT(0) 34 #define AXP192_GPIO30_IN_RANGE_GPIO1 BIT(1) 35 #define AXP192_GPIO30_IN_RANGE_GPIO2 BIT(2) 36 #define AXP192_GPIO30_IN_RANGE_GPIO3 BIT(3) 37 38 #define AXP20X_GPIO10_IN_RANGE_GPIO0 BIT(0) 39 #define AXP20X_GPIO10_IN_RANGE_GPIO1 BIT(1) 40 41 #define AXP20X_ADC_RATE_MASK GENMASK(7, 6) 42 #define AXP20X_ADC_RATE_HZ(x) ((ilog2((x) / 25) << 6) & AXP20X_ADC_RATE_MASK) 43 44 #define AXP22X_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 6) & AXP20X_ADC_RATE_MASK) 45 46 #define AXP813_V_I_ADC_RATE_MASK GENMASK(5, 4) 47 #define AXP813_ADC_RATE_MASK (AXP20X_ADC_RATE_MASK | AXP813_V_I_ADC_RATE_MASK) 48 #define AXP813_TS_GPIO0_ADC_RATE_HZ(x) AXP20X_ADC_RATE_HZ(x) 49 #define AXP813_V_I_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 4) & AXP813_V_I_ADC_RATE_MASK) 50 #define AXP813_ADC_RATE_HZ(x) (AXP20X_ADC_RATE_HZ(x) | AXP813_V_I_ADC_RATE_HZ(x)) 51 52 #define AXP20X_ADC_CHANNEL(_channel, _name, _type, _reg) \ 53 { \ 54 .type = _type, \ 55 .indexed = 1, \ 56 .channel = _channel, \ 57 .address = _reg, \ 58 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 59 BIT(IIO_CHAN_INFO_SCALE), \ 60 .datasheet_name = _name, \ 61 } 62 63 #define AXP20X_ADC_CHANNEL_OFFSET(_channel, _name, _type, _reg) \ 64 { \ 65 .type = _type, \ 66 .indexed = 1, \ 67 .channel = _channel, \ 68 .address = _reg, \ 69 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 70 BIT(IIO_CHAN_INFO_SCALE) |\ 71 BIT(IIO_CHAN_INFO_OFFSET),\ 72 .datasheet_name = _name, \ 73 } 74 75 struct axp_data; 76 77 struct axp20x_adc_iio { 78 struct regmap *regmap; 79 const struct axp_data *data; 80 }; 81 82 enum axp192_adc_channel_v { 83 AXP192_ACIN_V = 0, 84 AXP192_VBUS_V, 85 AXP192_TS_IN, 86 AXP192_GPIO0_V, 87 AXP192_GPIO1_V, 88 AXP192_GPIO2_V, 89 AXP192_GPIO3_V, 90 AXP192_IPSOUT_V, 91 AXP192_BATT_V, 92 }; 93 94 enum axp192_adc_channel_i { 95 AXP192_ACIN_I = 0, 96 AXP192_VBUS_I, 97 AXP192_BATT_CHRG_I, 98 AXP192_BATT_DISCHRG_I, 99 }; 100 101 enum axp20x_adc_channel_v { 102 AXP20X_ACIN_V = 0, 103 AXP20X_VBUS_V, 104 AXP20X_TS_IN, 105 AXP20X_GPIO0_V, 106 AXP20X_GPIO1_V, 107 AXP20X_IPSOUT_V, 108 AXP20X_BATT_V, 109 }; 110 111 enum axp20x_adc_channel_i { 112 AXP20X_ACIN_I = 0, 113 AXP20X_VBUS_I, 114 AXP20X_BATT_CHRG_I, 115 AXP20X_BATT_DISCHRG_I, 116 }; 117 118 enum axp22x_adc_channel_v { 119 AXP22X_TS_IN = 0, 120 AXP22X_BATT_V, 121 }; 122 123 enum axp22x_adc_channel_i { 124 AXP22X_BATT_CHRG_I = 1, 125 AXP22X_BATT_DISCHRG_I, 126 }; 127 128 enum axp813_adc_channel_v { 129 AXP813_TS_IN = 0, 130 AXP813_GPIO0_V, 131 AXP813_BATT_V, 132 }; 133 134 static struct iio_map axp20x_maps[] = { 135 { 136 .consumer_dev_name = "axp20x-usb-power-supply", 137 .consumer_channel = "vbus_v", 138 .adc_channel_label = "vbus_v", 139 }, { 140 .consumer_dev_name = "axp20x-usb-power-supply", 141 .consumer_channel = "vbus_i", 142 .adc_channel_label = "vbus_i", 143 }, { 144 .consumer_dev_name = "axp20x-ac-power-supply", 145 .consumer_channel = "acin_v", 146 .adc_channel_label = "acin_v", 147 }, { 148 .consumer_dev_name = "axp20x-ac-power-supply", 149 .consumer_channel = "acin_i", 150 .adc_channel_label = "acin_i", 151 }, { 152 .consumer_dev_name = "axp20x-battery-power-supply", 153 .consumer_channel = "batt_v", 154 .adc_channel_label = "batt_v", 155 }, { 156 .consumer_dev_name = "axp20x-battery-power-supply", 157 .consumer_channel = "batt_chrg_i", 158 .adc_channel_label = "batt_chrg_i", 159 }, { 160 .consumer_dev_name = "axp20x-battery-power-supply", 161 .consumer_channel = "batt_dischrg_i", 162 .adc_channel_label = "batt_dischrg_i", 163 }, { /* sentinel */ } 164 }; 165 166 static struct iio_map axp22x_maps[] = { 167 { 168 .consumer_dev_name = "axp20x-battery-power-supply", 169 .consumer_channel = "batt_v", 170 .adc_channel_label = "batt_v", 171 }, { 172 .consumer_dev_name = "axp20x-battery-power-supply", 173 .consumer_channel = "batt_chrg_i", 174 .adc_channel_label = "batt_chrg_i", 175 }, { 176 .consumer_dev_name = "axp20x-battery-power-supply", 177 .consumer_channel = "batt_dischrg_i", 178 .adc_channel_label = "batt_dischrg_i", 179 }, { /* sentinel */ } 180 }; 181 182 /* 183 * Channels are mapped by physical system. Their channels share the same index. 184 * i.e. acin_i is in_current0_raw and acin_v is in_voltage0_raw. 185 * The only exception is for the battery. batt_v will be in_voltage6_raw and 186 * charge current in_current6_raw and discharge current will be in_current7_raw. 187 */ 188 static const struct iio_chan_spec axp192_adc_channels[] = { 189 AXP20X_ADC_CHANNEL(AXP192_ACIN_V, "acin_v", IIO_VOLTAGE, 190 AXP20X_ACIN_V_ADC_H), 191 AXP20X_ADC_CHANNEL(AXP192_ACIN_I, "acin_i", IIO_CURRENT, 192 AXP20X_ACIN_I_ADC_H), 193 AXP20X_ADC_CHANNEL(AXP192_VBUS_V, "vbus_v", IIO_VOLTAGE, 194 AXP20X_VBUS_V_ADC_H), 195 AXP20X_ADC_CHANNEL(AXP192_VBUS_I, "vbus_i", IIO_CURRENT, 196 AXP20X_VBUS_I_ADC_H), 197 { 198 .type = IIO_TEMP, 199 .address = AXP20X_TEMP_ADC_H, 200 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 201 BIT(IIO_CHAN_INFO_SCALE) | 202 BIT(IIO_CHAN_INFO_OFFSET), 203 .datasheet_name = "pmic_temp", 204 }, 205 AXP20X_ADC_CHANNEL_OFFSET(AXP192_GPIO0_V, "gpio0_v", IIO_VOLTAGE, 206 AXP20X_GPIO0_V_ADC_H), 207 AXP20X_ADC_CHANNEL_OFFSET(AXP192_GPIO1_V, "gpio1_v", IIO_VOLTAGE, 208 AXP20X_GPIO1_V_ADC_H), 209 AXP20X_ADC_CHANNEL_OFFSET(AXP192_GPIO2_V, "gpio2_v", IIO_VOLTAGE, 210 AXP192_GPIO2_V_ADC_H), 211 AXP20X_ADC_CHANNEL_OFFSET(AXP192_GPIO3_V, "gpio3_v", IIO_VOLTAGE, 212 AXP192_GPIO3_V_ADC_H), 213 AXP20X_ADC_CHANNEL(AXP192_IPSOUT_V, "ipsout_v", IIO_VOLTAGE, 214 AXP20X_IPSOUT_V_HIGH_H), 215 AXP20X_ADC_CHANNEL(AXP192_BATT_V, "batt_v", IIO_VOLTAGE, 216 AXP20X_BATT_V_H), 217 AXP20X_ADC_CHANNEL(AXP192_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT, 218 AXP20X_BATT_CHRG_I_H), 219 AXP20X_ADC_CHANNEL(AXP192_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT, 220 AXP20X_BATT_DISCHRG_I_H), 221 AXP20X_ADC_CHANNEL(AXP192_TS_IN, "ts_v", IIO_VOLTAGE, 222 AXP20X_TS_IN_H), 223 }; 224 225 static const struct iio_chan_spec axp20x_adc_channels[] = { 226 AXP20X_ADC_CHANNEL(AXP20X_ACIN_V, "acin_v", IIO_VOLTAGE, 227 AXP20X_ACIN_V_ADC_H), 228 AXP20X_ADC_CHANNEL(AXP20X_ACIN_I, "acin_i", IIO_CURRENT, 229 AXP20X_ACIN_I_ADC_H), 230 AXP20X_ADC_CHANNEL(AXP20X_VBUS_V, "vbus_v", IIO_VOLTAGE, 231 AXP20X_VBUS_V_ADC_H), 232 AXP20X_ADC_CHANNEL(AXP20X_VBUS_I, "vbus_i", IIO_CURRENT, 233 AXP20X_VBUS_I_ADC_H), 234 { 235 .type = IIO_TEMP, 236 .address = AXP20X_TEMP_ADC_H, 237 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 238 BIT(IIO_CHAN_INFO_SCALE) | 239 BIT(IIO_CHAN_INFO_OFFSET), 240 .datasheet_name = "pmic_temp", 241 }, 242 AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO0_V, "gpio0_v", IIO_VOLTAGE, 243 AXP20X_GPIO0_V_ADC_H), 244 AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO1_V, "gpio1_v", IIO_VOLTAGE, 245 AXP20X_GPIO1_V_ADC_H), 246 AXP20X_ADC_CHANNEL(AXP20X_IPSOUT_V, "ipsout_v", IIO_VOLTAGE, 247 AXP20X_IPSOUT_V_HIGH_H), 248 AXP20X_ADC_CHANNEL(AXP20X_BATT_V, "batt_v", IIO_VOLTAGE, 249 AXP20X_BATT_V_H), 250 AXP20X_ADC_CHANNEL(AXP20X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT, 251 AXP20X_BATT_CHRG_I_H), 252 AXP20X_ADC_CHANNEL(AXP20X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT, 253 AXP20X_BATT_DISCHRG_I_H), 254 AXP20X_ADC_CHANNEL(AXP20X_TS_IN, "ts_v", IIO_VOLTAGE, 255 AXP20X_TS_IN_H), 256 }; 257 258 static const struct iio_chan_spec axp22x_adc_channels[] = { 259 { 260 .type = IIO_TEMP, 261 .address = AXP22X_PMIC_TEMP_H, 262 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 263 BIT(IIO_CHAN_INFO_SCALE) | 264 BIT(IIO_CHAN_INFO_OFFSET), 265 .datasheet_name = "pmic_temp", 266 }, 267 AXP20X_ADC_CHANNEL(AXP22X_BATT_V, "batt_v", IIO_VOLTAGE, 268 AXP20X_BATT_V_H), 269 AXP20X_ADC_CHANNEL(AXP22X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT, 270 AXP20X_BATT_CHRG_I_H), 271 AXP20X_ADC_CHANNEL(AXP22X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT, 272 AXP20X_BATT_DISCHRG_I_H), 273 AXP20X_ADC_CHANNEL(AXP22X_TS_IN, "ts_v", IIO_VOLTAGE, 274 AXP22X_TS_ADC_H), 275 }; 276 277 static const struct iio_chan_spec axp813_adc_channels[] = { 278 { 279 .type = IIO_TEMP, 280 .address = AXP22X_PMIC_TEMP_H, 281 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 282 BIT(IIO_CHAN_INFO_SCALE) | 283 BIT(IIO_CHAN_INFO_OFFSET), 284 .datasheet_name = "pmic_temp", 285 }, 286 AXP20X_ADC_CHANNEL(AXP813_GPIO0_V, "gpio0_v", IIO_VOLTAGE, 287 AXP288_GP_ADC_H), 288 AXP20X_ADC_CHANNEL(AXP813_BATT_V, "batt_v", IIO_VOLTAGE, 289 AXP20X_BATT_V_H), 290 AXP20X_ADC_CHANNEL(AXP22X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT, 291 AXP20X_BATT_CHRG_I_H), 292 AXP20X_ADC_CHANNEL(AXP22X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT, 293 AXP20X_BATT_DISCHRG_I_H), 294 AXP20X_ADC_CHANNEL(AXP813_TS_IN, "ts_v", IIO_VOLTAGE, 295 AXP288_TS_ADC_H), 296 }; 297 298 static int axp192_adc_raw(struct iio_dev *indio_dev, 299 struct iio_chan_spec const *chan, int *val) 300 { 301 struct axp20x_adc_iio *info = iio_priv(indio_dev); 302 int ret, size; 303 304 if (chan->type == IIO_CURRENT && 305 (chan->channel == AXP192_BATT_CHRG_I || 306 chan->channel == AXP192_BATT_DISCHRG_I)) 307 size = 13; 308 else 309 size = 12; 310 311 ret = axp20x_read_variable_width(info->regmap, chan->address, size); 312 if (ret < 0) 313 return ret; 314 315 *val = ret; 316 return IIO_VAL_INT; 317 } 318 319 static int axp20x_adc_raw(struct iio_dev *indio_dev, 320 struct iio_chan_spec const *chan, int *val) 321 { 322 struct axp20x_adc_iio *info = iio_priv(indio_dev); 323 int ret, size; 324 325 /* 326 * N.B.: Unlike the Chinese datasheets tell, the charging current is 327 * stored on 12 bits, not 13 bits. Only discharging current is on 13 328 * bits. 329 */ 330 if (chan->type == IIO_CURRENT && chan->channel == AXP20X_BATT_DISCHRG_I) 331 size = 13; 332 else 333 size = 12; 334 335 ret = axp20x_read_variable_width(info->regmap, chan->address, size); 336 if (ret < 0) 337 return ret; 338 339 *val = ret; 340 return IIO_VAL_INT; 341 } 342 343 static int axp22x_adc_raw(struct iio_dev *indio_dev, 344 struct iio_chan_spec const *chan, int *val) 345 { 346 struct axp20x_adc_iio *info = iio_priv(indio_dev); 347 int ret; 348 349 ret = axp20x_read_variable_width(info->regmap, chan->address, 12); 350 if (ret < 0) 351 return ret; 352 353 *val = ret; 354 return IIO_VAL_INT; 355 } 356 357 static int axp813_adc_raw(struct iio_dev *indio_dev, 358 struct iio_chan_spec const *chan, int *val) 359 { 360 struct axp20x_adc_iio *info = iio_priv(indio_dev); 361 int ret; 362 363 ret = axp20x_read_variable_width(info->regmap, chan->address, 12); 364 if (ret < 0) 365 return ret; 366 367 *val = ret; 368 return IIO_VAL_INT; 369 } 370 371 static int axp192_adc_scale_voltage(int channel, int *val, int *val2) 372 { 373 switch (channel) { 374 case AXP192_ACIN_V: 375 case AXP192_VBUS_V: 376 *val = 1; 377 *val2 = 700000; 378 return IIO_VAL_INT_PLUS_MICRO; 379 380 case AXP192_GPIO0_V: 381 case AXP192_GPIO1_V: 382 case AXP192_GPIO2_V: 383 case AXP192_GPIO3_V: 384 *val = 0; 385 *val2 = 500000; 386 return IIO_VAL_INT_PLUS_MICRO; 387 388 case AXP192_BATT_V: 389 *val = 1; 390 *val2 = 100000; 391 return IIO_VAL_INT_PLUS_MICRO; 392 393 case AXP192_IPSOUT_V: 394 *val = 1; 395 *val2 = 400000; 396 return IIO_VAL_INT_PLUS_MICRO; 397 398 case AXP192_TS_IN: 399 /* 0.8 mV per LSB */ 400 *val = 0; 401 *val2 = 800000; 402 return IIO_VAL_INT_PLUS_MICRO; 403 404 default: 405 return -EINVAL; 406 } 407 } 408 409 static int axp20x_adc_scale_voltage(int channel, int *val, int *val2) 410 { 411 switch (channel) { 412 case AXP20X_ACIN_V: 413 case AXP20X_VBUS_V: 414 *val = 1; 415 *val2 = 700000; 416 return IIO_VAL_INT_PLUS_MICRO; 417 418 case AXP20X_GPIO0_V: 419 case AXP20X_GPIO1_V: 420 *val = 0; 421 *val2 = 500000; 422 return IIO_VAL_INT_PLUS_MICRO; 423 424 case AXP20X_BATT_V: 425 *val = 1; 426 *val2 = 100000; 427 return IIO_VAL_INT_PLUS_MICRO; 428 429 case AXP20X_IPSOUT_V: 430 *val = 1; 431 *val2 = 400000; 432 return IIO_VAL_INT_PLUS_MICRO; 433 434 case AXP20X_TS_IN: 435 /* 0.8 mV per LSB */ 436 *val = 0; 437 *val2 = 800000; 438 return IIO_VAL_INT_PLUS_MICRO; 439 440 default: 441 return -EINVAL; 442 } 443 } 444 445 static int axp22x_adc_scale_voltage(int channel, int *val, int *val2) 446 { 447 switch (channel) { 448 case AXP22X_BATT_V: 449 /* 1.1 mV per LSB */ 450 *val = 1; 451 *val2 = 100000; 452 return IIO_VAL_INT_PLUS_MICRO; 453 454 case AXP22X_TS_IN: 455 /* 0.8 mV per LSB */ 456 *val = 0; 457 *val2 = 800000; 458 return IIO_VAL_INT_PLUS_MICRO; 459 460 default: 461 return -EINVAL; 462 } 463 } 464 static int axp813_adc_scale_voltage(int channel, int *val, int *val2) 465 { 466 switch (channel) { 467 case AXP813_GPIO0_V: 468 *val = 0; 469 *val2 = 800000; 470 return IIO_VAL_INT_PLUS_MICRO; 471 472 case AXP813_BATT_V: 473 *val = 1; 474 *val2 = 100000; 475 return IIO_VAL_INT_PLUS_MICRO; 476 477 case AXP813_TS_IN: 478 /* 0.8 mV per LSB */ 479 *val = 0; 480 *val2 = 800000; 481 return IIO_VAL_INT_PLUS_MICRO; 482 483 default: 484 return -EINVAL; 485 } 486 } 487 488 static int axp20x_adc_scale_current(int channel, int *val, int *val2) 489 { 490 switch (channel) { 491 case AXP20X_ACIN_I: 492 *val = 0; 493 *val2 = 625000; 494 return IIO_VAL_INT_PLUS_MICRO; 495 496 case AXP20X_VBUS_I: 497 *val = 0; 498 *val2 = 375000; 499 return IIO_VAL_INT_PLUS_MICRO; 500 501 case AXP20X_BATT_DISCHRG_I: 502 case AXP20X_BATT_CHRG_I: 503 *val = 0; 504 *val2 = 500000; 505 return IIO_VAL_INT_PLUS_MICRO; 506 507 default: 508 return -EINVAL; 509 } 510 } 511 512 static int axp192_adc_scale(struct iio_chan_spec const *chan, int *val, 513 int *val2) 514 { 515 switch (chan->type) { 516 case IIO_VOLTAGE: 517 return axp192_adc_scale_voltage(chan->channel, val, val2); 518 519 case IIO_CURRENT: 520 /* 521 * AXP192 current channels are identical to the AXP20x, 522 * therefore we can re-use the scaling function. 523 */ 524 return axp20x_adc_scale_current(chan->channel, val, val2); 525 526 case IIO_TEMP: 527 *val = 100; 528 return IIO_VAL_INT; 529 530 default: 531 return -EINVAL; 532 } 533 } 534 535 static int axp20x_adc_scale(struct iio_chan_spec const *chan, int *val, 536 int *val2) 537 { 538 switch (chan->type) { 539 case IIO_VOLTAGE: 540 return axp20x_adc_scale_voltage(chan->channel, val, val2); 541 542 case IIO_CURRENT: 543 return axp20x_adc_scale_current(chan->channel, val, val2); 544 545 case IIO_TEMP: 546 *val = 100; 547 return IIO_VAL_INT; 548 549 default: 550 return -EINVAL; 551 } 552 } 553 554 static int axp22x_adc_scale(struct iio_chan_spec const *chan, int *val, 555 int *val2) 556 { 557 switch (chan->type) { 558 case IIO_VOLTAGE: 559 return axp22x_adc_scale_voltage(chan->channel, val, val2); 560 561 case IIO_CURRENT: 562 *val = 1; 563 return IIO_VAL_INT; 564 565 case IIO_TEMP: 566 *val = 100; 567 return IIO_VAL_INT; 568 569 default: 570 return -EINVAL; 571 } 572 } 573 574 static int axp813_adc_scale(struct iio_chan_spec const *chan, int *val, 575 int *val2) 576 { 577 switch (chan->type) { 578 case IIO_VOLTAGE: 579 return axp813_adc_scale_voltage(chan->channel, val, val2); 580 581 case IIO_CURRENT: 582 *val = 1; 583 return IIO_VAL_INT; 584 585 case IIO_TEMP: 586 *val = 100; 587 return IIO_VAL_INT; 588 589 default: 590 return -EINVAL; 591 } 592 } 593 594 static int axp192_adc_offset_voltage(struct iio_dev *indio_dev, int channel, 595 int *val) 596 { 597 struct axp20x_adc_iio *info = iio_priv(indio_dev); 598 unsigned int regval; 599 int ret; 600 601 ret = regmap_read(info->regmap, AXP192_GPIO30_IN_RANGE, ®val); 602 if (ret < 0) 603 return ret; 604 605 switch (channel) { 606 case AXP192_GPIO0_V: 607 regval = FIELD_GET(AXP192_GPIO30_IN_RANGE_GPIO0, regval); 608 break; 609 610 case AXP192_GPIO1_V: 611 regval = FIELD_GET(AXP192_GPIO30_IN_RANGE_GPIO1, regval); 612 break; 613 614 case AXP192_GPIO2_V: 615 regval = FIELD_GET(AXP192_GPIO30_IN_RANGE_GPIO2, regval); 616 break; 617 618 case AXP192_GPIO3_V: 619 regval = FIELD_GET(AXP192_GPIO30_IN_RANGE_GPIO3, regval); 620 break; 621 622 default: 623 return -EINVAL; 624 } 625 626 *val = regval ? 700000 : 0; 627 return IIO_VAL_INT; 628 } 629 630 static int axp20x_adc_offset_voltage(struct iio_dev *indio_dev, int channel, 631 int *val) 632 { 633 struct axp20x_adc_iio *info = iio_priv(indio_dev); 634 unsigned int regval; 635 int ret; 636 637 ret = regmap_read(info->regmap, AXP20X_GPIO10_IN_RANGE, ®val); 638 if (ret < 0) 639 return ret; 640 641 switch (channel) { 642 case AXP20X_GPIO0_V: 643 regval = FIELD_GET(AXP20X_GPIO10_IN_RANGE_GPIO0, regval); 644 break; 645 646 case AXP20X_GPIO1_V: 647 regval = FIELD_GET(AXP20X_GPIO10_IN_RANGE_GPIO1, regval); 648 break; 649 650 default: 651 return -EINVAL; 652 } 653 654 *val = regval ? 700000 : 0; 655 return IIO_VAL_INT; 656 } 657 658 static int axp192_adc_offset(struct iio_dev *indio_dev, 659 struct iio_chan_spec const *chan, int *val) 660 { 661 switch (chan->type) { 662 case IIO_VOLTAGE: 663 return axp192_adc_offset_voltage(indio_dev, chan->channel, val); 664 665 case IIO_TEMP: 666 *val = -1447; 667 return IIO_VAL_INT; 668 669 default: 670 return -EINVAL; 671 } 672 } 673 674 static int axp20x_adc_offset(struct iio_dev *indio_dev, 675 struct iio_chan_spec const *chan, int *val) 676 { 677 switch (chan->type) { 678 case IIO_VOLTAGE: 679 return axp20x_adc_offset_voltage(indio_dev, chan->channel, val); 680 681 case IIO_TEMP: 682 *val = -1447; 683 return IIO_VAL_INT; 684 685 default: 686 return -EINVAL; 687 } 688 } 689 690 static int axp192_read_raw(struct iio_dev *indio_dev, 691 struct iio_chan_spec const *chan, int *val, 692 int *val2, long mask) 693 { 694 switch (mask) { 695 case IIO_CHAN_INFO_OFFSET: 696 return axp192_adc_offset(indio_dev, chan, val); 697 698 case IIO_CHAN_INFO_SCALE: 699 return axp192_adc_scale(chan, val, val2); 700 701 case IIO_CHAN_INFO_RAW: 702 return axp192_adc_raw(indio_dev, chan, val); 703 704 default: 705 return -EINVAL; 706 } 707 } 708 709 static int axp20x_read_raw(struct iio_dev *indio_dev, 710 struct iio_chan_spec const *chan, int *val, 711 int *val2, long mask) 712 { 713 switch (mask) { 714 case IIO_CHAN_INFO_OFFSET: 715 return axp20x_adc_offset(indio_dev, chan, val); 716 717 case IIO_CHAN_INFO_SCALE: 718 return axp20x_adc_scale(chan, val, val2); 719 720 case IIO_CHAN_INFO_RAW: 721 return axp20x_adc_raw(indio_dev, chan, val); 722 723 default: 724 return -EINVAL; 725 } 726 } 727 728 static int axp22x_read_raw(struct iio_dev *indio_dev, 729 struct iio_chan_spec const *chan, int *val, 730 int *val2, long mask) 731 { 732 switch (mask) { 733 case IIO_CHAN_INFO_OFFSET: 734 /* For PMIC temp only */ 735 *val = -2677; 736 return IIO_VAL_INT; 737 738 case IIO_CHAN_INFO_SCALE: 739 return axp22x_adc_scale(chan, val, val2); 740 741 case IIO_CHAN_INFO_RAW: 742 return axp22x_adc_raw(indio_dev, chan, val); 743 744 default: 745 return -EINVAL; 746 } 747 } 748 749 static int axp813_read_raw(struct iio_dev *indio_dev, 750 struct iio_chan_spec const *chan, int *val, 751 int *val2, long mask) 752 { 753 switch (mask) { 754 case IIO_CHAN_INFO_OFFSET: 755 *val = -2667; 756 return IIO_VAL_INT; 757 758 case IIO_CHAN_INFO_SCALE: 759 return axp813_adc_scale(chan, val, val2); 760 761 case IIO_CHAN_INFO_RAW: 762 return axp813_adc_raw(indio_dev, chan, val); 763 764 default: 765 return -EINVAL; 766 } 767 } 768 769 static int axp192_write_raw(struct iio_dev *indio_dev, 770 struct iio_chan_spec const *chan, int val, int val2, 771 long mask) 772 { 773 struct axp20x_adc_iio *info = iio_priv(indio_dev); 774 unsigned int regmask, regval; 775 776 /* 777 * The AXP192 PMIC allows the user to choose between 0V and 0.7V offsets 778 * for (independently) GPIO0-3 when in ADC mode. 779 */ 780 if (mask != IIO_CHAN_INFO_OFFSET) 781 return -EINVAL; 782 783 if (val != 0 && val != 700000) 784 return -EINVAL; 785 786 switch (chan->channel) { 787 case AXP192_GPIO0_V: 788 regmask = AXP192_GPIO30_IN_RANGE_GPIO0; 789 regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO0, !!val); 790 break; 791 792 case AXP192_GPIO1_V: 793 regmask = AXP192_GPIO30_IN_RANGE_GPIO1; 794 regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO1, !!val); 795 break; 796 797 case AXP192_GPIO2_V: 798 regmask = AXP192_GPIO30_IN_RANGE_GPIO2; 799 regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO2, !!val); 800 break; 801 802 case AXP192_GPIO3_V: 803 regmask = AXP192_GPIO30_IN_RANGE_GPIO3; 804 regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO3, !!val); 805 break; 806 807 default: 808 return -EINVAL; 809 } 810 811 return regmap_update_bits(info->regmap, AXP192_GPIO30_IN_RANGE, regmask, regval); 812 } 813 814 static int axp20x_write_raw(struct iio_dev *indio_dev, 815 struct iio_chan_spec const *chan, int val, int val2, 816 long mask) 817 { 818 struct axp20x_adc_iio *info = iio_priv(indio_dev); 819 unsigned int regmask, regval; 820 821 /* 822 * The AXP20X PMIC allows the user to choose between 0V and 0.7V offsets 823 * for (independently) GPIO0 and GPIO1 when in ADC mode. 824 */ 825 if (mask != IIO_CHAN_INFO_OFFSET) 826 return -EINVAL; 827 828 if (val != 0 && val != 700000) 829 return -EINVAL; 830 831 switch (chan->channel) { 832 case AXP20X_GPIO0_V: 833 regmask = AXP20X_GPIO10_IN_RANGE_GPIO0; 834 regval = FIELD_PREP(AXP20X_GPIO10_IN_RANGE_GPIO0, !!val); 835 break; 836 837 case AXP20X_GPIO1_V: 838 regmask = AXP20X_GPIO10_IN_RANGE_GPIO1; 839 regval = FIELD_PREP(AXP20X_GPIO10_IN_RANGE_GPIO1, !!val); 840 break; 841 842 default: 843 return -EINVAL; 844 } 845 846 return regmap_update_bits(info->regmap, AXP20X_GPIO10_IN_RANGE, regmask, regval); 847 } 848 849 static const struct iio_info axp192_adc_iio_info = { 850 .read_raw = axp192_read_raw, 851 .write_raw = axp192_write_raw, 852 }; 853 854 static const struct iio_info axp20x_adc_iio_info = { 855 .read_raw = axp20x_read_raw, 856 .write_raw = axp20x_write_raw, 857 }; 858 859 static const struct iio_info axp22x_adc_iio_info = { 860 .read_raw = axp22x_read_raw, 861 }; 862 863 static const struct iio_info axp813_adc_iio_info = { 864 .read_raw = axp813_read_raw, 865 }; 866 867 static int axp20x_adc_rate(struct axp20x_adc_iio *info, int rate) 868 { 869 return regmap_update_bits(info->regmap, AXP20X_ADC_RATE, 870 AXP20X_ADC_RATE_MASK, 871 AXP20X_ADC_RATE_HZ(rate)); 872 } 873 874 static int axp22x_adc_rate(struct axp20x_adc_iio *info, int rate) 875 { 876 return regmap_update_bits(info->regmap, AXP20X_ADC_RATE, 877 AXP20X_ADC_RATE_MASK, 878 AXP22X_ADC_RATE_HZ(rate)); 879 } 880 881 static int axp813_adc_rate(struct axp20x_adc_iio *info, int rate) 882 { 883 return regmap_update_bits(info->regmap, AXP813_ADC_RATE, 884 AXP813_ADC_RATE_MASK, 885 AXP813_ADC_RATE_HZ(rate)); 886 } 887 888 struct axp_data { 889 const struct iio_info *iio_info; 890 int num_channels; 891 struct iio_chan_spec const *channels; 892 unsigned long adc_en1_mask; 893 unsigned long adc_en2_mask; 894 int (*adc_rate)(struct axp20x_adc_iio *info, 895 int rate); 896 struct iio_map *maps; 897 }; 898 899 static const struct axp_data axp192_data = { 900 .iio_info = &axp192_adc_iio_info, 901 .num_channels = ARRAY_SIZE(axp192_adc_channels), 902 .channels = axp192_adc_channels, 903 .adc_en1_mask = AXP192_ADC_EN1_MASK, 904 .adc_en2_mask = AXP192_ADC_EN2_MASK, 905 .adc_rate = axp20x_adc_rate, 906 .maps = axp20x_maps, 907 }; 908 909 static const struct axp_data axp20x_data = { 910 .iio_info = &axp20x_adc_iio_info, 911 .num_channels = ARRAY_SIZE(axp20x_adc_channels), 912 .channels = axp20x_adc_channels, 913 .adc_en1_mask = AXP20X_ADC_EN1_MASK, 914 .adc_en2_mask = AXP20X_ADC_EN2_MASK, 915 .adc_rate = axp20x_adc_rate, 916 .maps = axp20x_maps, 917 }; 918 919 static const struct axp_data axp22x_data = { 920 .iio_info = &axp22x_adc_iio_info, 921 .num_channels = ARRAY_SIZE(axp22x_adc_channels), 922 .channels = axp22x_adc_channels, 923 .adc_en1_mask = AXP22X_ADC_EN1_MASK, 924 .adc_rate = axp22x_adc_rate, 925 .maps = axp22x_maps, 926 }; 927 928 static const struct axp_data axp813_data = { 929 .iio_info = &axp813_adc_iio_info, 930 .num_channels = ARRAY_SIZE(axp813_adc_channels), 931 .channels = axp813_adc_channels, 932 .adc_en1_mask = AXP22X_ADC_EN1_MASK, 933 .adc_rate = axp813_adc_rate, 934 .maps = axp22x_maps, 935 }; 936 937 static const struct of_device_id axp20x_adc_of_match[] = { 938 { .compatible = "x-powers,axp192-adc", .data = (void *)&axp192_data, }, 939 { .compatible = "x-powers,axp209-adc", .data = (void *)&axp20x_data, }, 940 { .compatible = "x-powers,axp221-adc", .data = (void *)&axp22x_data, }, 941 { .compatible = "x-powers,axp813-adc", .data = (void *)&axp813_data, }, 942 { /* sentinel */ } 943 }; 944 MODULE_DEVICE_TABLE(of, axp20x_adc_of_match); 945 946 static const struct platform_device_id axp20x_adc_id_match[] = { 947 { .name = "axp192-adc", .driver_data = (kernel_ulong_t)&axp192_data, }, 948 { .name = "axp20x-adc", .driver_data = (kernel_ulong_t)&axp20x_data, }, 949 { .name = "axp22x-adc", .driver_data = (kernel_ulong_t)&axp22x_data, }, 950 { .name = "axp813-adc", .driver_data = (kernel_ulong_t)&axp813_data, }, 951 { /* sentinel */ }, 952 }; 953 MODULE_DEVICE_TABLE(platform, axp20x_adc_id_match); 954 955 static int axp20x_probe(struct platform_device *pdev) 956 { 957 struct axp20x_adc_iio *info; 958 struct iio_dev *indio_dev; 959 struct axp20x_dev *axp20x_dev; 960 int ret; 961 962 axp20x_dev = dev_get_drvdata(pdev->dev.parent); 963 964 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info)); 965 if (!indio_dev) 966 return -ENOMEM; 967 968 info = iio_priv(indio_dev); 969 platform_set_drvdata(pdev, indio_dev); 970 971 info->regmap = axp20x_dev->regmap; 972 indio_dev->modes = INDIO_DIRECT_MODE; 973 974 if (!dev_fwnode(&pdev->dev)) { 975 const struct platform_device_id *id; 976 977 id = platform_get_device_id(pdev); 978 info->data = (const struct axp_data *)id->driver_data; 979 } else { 980 struct device *dev = &pdev->dev; 981 982 info->data = device_get_match_data(dev); 983 } 984 985 indio_dev->name = platform_get_device_id(pdev)->name; 986 indio_dev->info = info->data->iio_info; 987 indio_dev->num_channels = info->data->num_channels; 988 indio_dev->channels = info->data->channels; 989 990 /* Enable the ADCs on IP */ 991 regmap_write(info->regmap, AXP20X_ADC_EN1, info->data->adc_en1_mask); 992 993 if (info->data->adc_en2_mask) 994 regmap_set_bits(info->regmap, AXP20X_ADC_EN2, 995 info->data->adc_en2_mask); 996 997 /* Configure ADCs rate */ 998 info->data->adc_rate(info, 100); 999 1000 ret = iio_map_array_register(indio_dev, info->data->maps); 1001 if (ret < 0) { 1002 dev_err(&pdev->dev, "failed to register IIO maps: %d\n", ret); 1003 goto fail_map; 1004 } 1005 1006 ret = iio_device_register(indio_dev); 1007 if (ret < 0) { 1008 dev_err(&pdev->dev, "could not register the device\n"); 1009 goto fail_register; 1010 } 1011 1012 return 0; 1013 1014 fail_register: 1015 iio_map_array_unregister(indio_dev); 1016 1017 fail_map: 1018 regmap_write(info->regmap, AXP20X_ADC_EN1, 0); 1019 1020 if (info->data->adc_en2_mask) 1021 regmap_write(info->regmap, AXP20X_ADC_EN2, 0); 1022 1023 return ret; 1024 } 1025 1026 static void axp20x_remove(struct platform_device *pdev) 1027 { 1028 struct iio_dev *indio_dev = platform_get_drvdata(pdev); 1029 struct axp20x_adc_iio *info = iio_priv(indio_dev); 1030 1031 iio_device_unregister(indio_dev); 1032 iio_map_array_unregister(indio_dev); 1033 1034 regmap_write(info->regmap, AXP20X_ADC_EN1, 0); 1035 1036 if (info->data->adc_en2_mask) 1037 regmap_write(info->regmap, AXP20X_ADC_EN2, 0); 1038 } 1039 1040 static struct platform_driver axp20x_adc_driver = { 1041 .driver = { 1042 .name = "axp20x-adc", 1043 .of_match_table = axp20x_adc_of_match, 1044 }, 1045 .id_table = axp20x_adc_id_match, 1046 .probe = axp20x_probe, 1047 .remove_new = axp20x_remove, 1048 }; 1049 1050 module_platform_driver(axp20x_adc_driver); 1051 1052 MODULE_DESCRIPTION("ADC driver for AXP20X and AXP22X PMICs"); 1053 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>"); 1054 MODULE_LICENSE("GPL"); 1055