xref: /linux/drivers/iio/adc/at91_adc.c (revision 0d456bad36d42d16022be045c8a53ddbb59ee478)
1 /*
2  * Driver for the ADC present in the Atmel AT91 evaluation boards.
3  *
4  * Copyright 2011 Free Electrons
5  *
6  * Licensed under the GPLv2 or later.
7  */
8 
9 #include <linux/bitmap.h>
10 #include <linux/bitops.h>
11 #include <linux/clk.h>
12 #include <linux/err.h>
13 #include <linux/io.h>
14 #include <linux/interrupt.h>
15 #include <linux/jiffies.h>
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/of.h>
19 #include <linux/of_device.h>
20 #include <linux/platform_device.h>
21 #include <linux/sched.h>
22 #include <linux/slab.h>
23 #include <linux/wait.h>
24 
25 #include <linux/platform_data/at91_adc.h>
26 
27 #include <linux/iio/iio.h>
28 #include <linux/iio/buffer.h>
29 #include <linux/iio/trigger.h>
30 #include <linux/iio/trigger_consumer.h>
31 #include <linux/iio/triggered_buffer.h>
32 
33 #include <mach/at91_adc.h>
34 
35 #define AT91_ADC_CHAN(st, ch) \
36 	(st->registers->channel_base + (ch * 4))
37 #define at91_adc_readl(st, reg) \
38 	(readl_relaxed(st->reg_base + reg))
39 #define at91_adc_writel(st, reg, val) \
40 	(writel_relaxed(val, st->reg_base + reg))
41 
42 struct at91_adc_state {
43 	struct clk		*adc_clk;
44 	u16			*buffer;
45 	unsigned long		channels_mask;
46 	struct clk		*clk;
47 	bool			done;
48 	int			irq;
49 	u16			last_value;
50 	struct mutex		lock;
51 	u8			num_channels;
52 	void __iomem		*reg_base;
53 	struct at91_adc_reg_desc *registers;
54 	u8			startup_time;
55 	struct iio_trigger	**trig;
56 	struct at91_adc_trigger	*trigger_list;
57 	u32			trigger_number;
58 	bool			use_external;
59 	u32			vref_mv;
60 	wait_queue_head_t	wq_data_avail;
61 };
62 
63 static irqreturn_t at91_adc_trigger_handler(int irq, void *p)
64 {
65 	struct iio_poll_func *pf = p;
66 	struct iio_dev *idev = pf->indio_dev;
67 	struct at91_adc_state *st = iio_priv(idev);
68 	int i, j = 0;
69 
70 	for (i = 0; i < idev->masklength; i++) {
71 		if (!test_bit(i, idev->active_scan_mask))
72 			continue;
73 		st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, i));
74 		j++;
75 	}
76 
77 	if (idev->scan_timestamp) {
78 		s64 *timestamp = (s64 *)((u8 *)st->buffer +
79 					ALIGN(j, sizeof(s64)));
80 		*timestamp = pf->timestamp;
81 	}
82 
83 	iio_push_to_buffers(indio_dev, (u8 *)st->buffer);
84 
85 	iio_trigger_notify_done(idev->trig);
86 
87 	/* Needed to ACK the DRDY interruption */
88 	at91_adc_readl(st, AT91_ADC_LCDR);
89 
90 	enable_irq(st->irq);
91 
92 	return IRQ_HANDLED;
93 }
94 
95 static irqreturn_t at91_adc_eoc_trigger(int irq, void *private)
96 {
97 	struct iio_dev *idev = private;
98 	struct at91_adc_state *st = iio_priv(idev);
99 	u32 status = at91_adc_readl(st, st->registers->status_register);
100 
101 	if (!(status & st->registers->drdy_mask))
102 		return IRQ_HANDLED;
103 
104 	if (iio_buffer_enabled(idev)) {
105 		disable_irq_nosync(irq);
106 		iio_trigger_poll(idev->trig, iio_get_time_ns());
107 	} else {
108 		st->last_value = at91_adc_readl(st, AT91_ADC_LCDR);
109 		st->done = true;
110 		wake_up_interruptible(&st->wq_data_avail);
111 	}
112 
113 	return IRQ_HANDLED;
114 }
115 
116 static int at91_adc_channel_init(struct iio_dev *idev)
117 {
118 	struct at91_adc_state *st = iio_priv(idev);
119 	struct iio_chan_spec *chan_array, *timestamp;
120 	int bit, idx = 0;
121 
122 	idev->num_channels = bitmap_weight(&st->channels_mask,
123 					   st->num_channels) + 1;
124 
125 	chan_array = devm_kzalloc(&idev->dev,
126 				  ((idev->num_channels + 1) *
127 					sizeof(struct iio_chan_spec)),
128 				  GFP_KERNEL);
129 
130 	if (!chan_array)
131 		return -ENOMEM;
132 
133 	for_each_set_bit(bit, &st->channels_mask, st->num_channels) {
134 		struct iio_chan_spec *chan = chan_array + idx;
135 
136 		chan->type = IIO_VOLTAGE;
137 		chan->indexed = 1;
138 		chan->channel = bit;
139 		chan->scan_index = idx;
140 		chan->scan_type.sign = 'u';
141 		chan->scan_type.realbits = 10;
142 		chan->scan_type.storagebits = 16;
143 		chan->info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT |
144 			IIO_CHAN_INFO_RAW_SEPARATE_BIT;
145 		idx++;
146 	}
147 	timestamp = chan_array + idx;
148 
149 	timestamp->type = IIO_TIMESTAMP;
150 	timestamp->channel = -1;
151 	timestamp->scan_index = idx;
152 	timestamp->scan_type.sign = 's';
153 	timestamp->scan_type.realbits = 64;
154 	timestamp->scan_type.storagebits = 64;
155 
156 	idev->channels = chan_array;
157 	return idev->num_channels;
158 }
159 
160 static u8 at91_adc_get_trigger_value_by_name(struct iio_dev *idev,
161 					     struct at91_adc_trigger *triggers,
162 					     const char *trigger_name)
163 {
164 	struct at91_adc_state *st = iio_priv(idev);
165 	u8 value = 0;
166 	int i;
167 
168 	for (i = 0; i < st->trigger_number; i++) {
169 		char *name = kasprintf(GFP_KERNEL,
170 				"%s-dev%d-%s",
171 				idev->name,
172 				idev->id,
173 				triggers[i].name);
174 		if (!name)
175 			return -ENOMEM;
176 
177 		if (strcmp(trigger_name, name) == 0) {
178 			value = triggers[i].value;
179 			kfree(name);
180 			break;
181 		}
182 
183 		kfree(name);
184 	}
185 
186 	return value;
187 }
188 
189 static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)
190 {
191 	struct iio_dev *idev = trig->private_data;
192 	struct at91_adc_state *st = iio_priv(idev);
193 	struct iio_buffer *buffer = idev->buffer;
194 	struct at91_adc_reg_desc *reg = st->registers;
195 	u32 status = at91_adc_readl(st, reg->trigger_register);
196 	u8 value;
197 	u8 bit;
198 
199 	value = at91_adc_get_trigger_value_by_name(idev,
200 						   st->trigger_list,
201 						   idev->trig->name);
202 	if (value == 0)
203 		return -EINVAL;
204 
205 	if (state) {
206 		st->buffer = kmalloc(idev->scan_bytes, GFP_KERNEL);
207 		if (st->buffer == NULL)
208 			return -ENOMEM;
209 
210 		at91_adc_writel(st, reg->trigger_register,
211 				status | value);
212 
213 		for_each_set_bit(bit, buffer->scan_mask,
214 				 st->num_channels) {
215 			struct iio_chan_spec const *chan = idev->channels + bit;
216 			at91_adc_writel(st, AT91_ADC_CHER,
217 					AT91_ADC_CH(chan->channel));
218 		}
219 
220 		at91_adc_writel(st, AT91_ADC_IER, reg->drdy_mask);
221 
222 	} else {
223 		at91_adc_writel(st, AT91_ADC_IDR, reg->drdy_mask);
224 
225 		at91_adc_writel(st, reg->trigger_register,
226 				status & ~value);
227 
228 		for_each_set_bit(bit, buffer->scan_mask,
229 				 st->num_channels) {
230 			struct iio_chan_spec const *chan = idev->channels + bit;
231 			at91_adc_writel(st, AT91_ADC_CHDR,
232 					AT91_ADC_CH(chan->channel));
233 		}
234 		kfree(st->buffer);
235 	}
236 
237 	return 0;
238 }
239 
240 static const struct iio_trigger_ops at91_adc_trigger_ops = {
241 	.owner = THIS_MODULE,
242 	.set_trigger_state = &at91_adc_configure_trigger,
243 };
244 
245 static struct iio_trigger *at91_adc_allocate_trigger(struct iio_dev *idev,
246 						     struct at91_adc_trigger *trigger)
247 {
248 	struct iio_trigger *trig;
249 	int ret;
250 
251 	trig = iio_trigger_alloc("%s-dev%d-%s", idev->name,
252 				 idev->id, trigger->name);
253 	if (trig == NULL)
254 		return NULL;
255 
256 	trig->dev.parent = idev->dev.parent;
257 	trig->private_data = idev;
258 	trig->ops = &at91_adc_trigger_ops;
259 
260 	ret = iio_trigger_register(trig);
261 	if (ret)
262 		return NULL;
263 
264 	return trig;
265 }
266 
267 static int at91_adc_trigger_init(struct iio_dev *idev)
268 {
269 	struct at91_adc_state *st = iio_priv(idev);
270 	int i, ret;
271 
272 	st->trig = devm_kzalloc(&idev->dev,
273 				st->trigger_number * sizeof(st->trig),
274 				GFP_KERNEL);
275 
276 	if (st->trig == NULL) {
277 		ret = -ENOMEM;
278 		goto error_ret;
279 	}
280 
281 	for (i = 0; i < st->trigger_number; i++) {
282 		if (st->trigger_list[i].is_external && !(st->use_external))
283 			continue;
284 
285 		st->trig[i] = at91_adc_allocate_trigger(idev,
286 							st->trigger_list + i);
287 		if (st->trig[i] == NULL) {
288 			dev_err(&idev->dev,
289 				"Could not allocate trigger %d\n", i);
290 			ret = -ENOMEM;
291 			goto error_trigger;
292 		}
293 	}
294 
295 	return 0;
296 
297 error_trigger:
298 	for (i--; i >= 0; i--) {
299 		iio_trigger_unregister(st->trig[i]);
300 		iio_trigger_free(st->trig[i]);
301 	}
302 error_ret:
303 	return ret;
304 }
305 
306 static void at91_adc_trigger_remove(struct iio_dev *idev)
307 {
308 	struct at91_adc_state *st = iio_priv(idev);
309 	int i;
310 
311 	for (i = 0; i < st->trigger_number; i++) {
312 		iio_trigger_unregister(st->trig[i]);
313 		iio_trigger_free(st->trig[i]);
314 	}
315 }
316 
317 static int at91_adc_buffer_init(struct iio_dev *idev)
318 {
319 	return iio_triggered_buffer_setup(idev, &iio_pollfunc_store_time,
320 		&at91_adc_trigger_handler, NULL);
321 }
322 
323 static void at91_adc_buffer_remove(struct iio_dev *idev)
324 {
325 	iio_triggered_buffer_cleanup(idev);
326 }
327 
328 static int at91_adc_read_raw(struct iio_dev *idev,
329 			     struct iio_chan_spec const *chan,
330 			     int *val, int *val2, long mask)
331 {
332 	struct at91_adc_state *st = iio_priv(idev);
333 	int ret;
334 
335 	switch (mask) {
336 	case IIO_CHAN_INFO_RAW:
337 		mutex_lock(&st->lock);
338 
339 		at91_adc_writel(st, AT91_ADC_CHER,
340 				AT91_ADC_CH(chan->channel));
341 		at91_adc_writel(st, AT91_ADC_IER, st->registers->drdy_mask);
342 		at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_START);
343 
344 		ret = wait_event_interruptible_timeout(st->wq_data_avail,
345 						       st->done,
346 						       msecs_to_jiffies(1000));
347 		if (ret == 0)
348 			ret = -ETIMEDOUT;
349 		if (ret < 0) {
350 			mutex_unlock(&st->lock);
351 			return ret;
352 		}
353 
354 		*val = st->last_value;
355 
356 		at91_adc_writel(st, AT91_ADC_CHDR,
357 				AT91_ADC_CH(chan->channel));
358 		at91_adc_writel(st, AT91_ADC_IDR, st->registers->drdy_mask);
359 
360 		st->last_value = 0;
361 		st->done = false;
362 		mutex_unlock(&st->lock);
363 		return IIO_VAL_INT;
364 
365 	case IIO_CHAN_INFO_SCALE:
366 		*val = (st->vref_mv * 1000) >> chan->scan_type.realbits;
367 		*val2 = 0;
368 		return IIO_VAL_INT_PLUS_MICRO;
369 	default:
370 		break;
371 	}
372 	return -EINVAL;
373 }
374 
375 static int at91_adc_probe_dt(struct at91_adc_state *st,
376 			     struct platform_device *pdev)
377 {
378 	struct iio_dev *idev = iio_priv_to_dev(st);
379 	struct device_node *node = pdev->dev.of_node;
380 	struct device_node *trig_node;
381 	int i = 0, ret;
382 	u32 prop;
383 
384 	if (!node)
385 		return -EINVAL;
386 
387 	st->use_external = of_property_read_bool(node, "atmel,adc-use-external-triggers");
388 
389 	if (of_property_read_u32(node, "atmel,adc-channels-used", &prop)) {
390 		dev_err(&idev->dev, "Missing adc-channels-used property in the DT.\n");
391 		ret = -EINVAL;
392 		goto error_ret;
393 	}
394 	st->channels_mask = prop;
395 
396 	if (of_property_read_u32(node, "atmel,adc-num-channels", &prop)) {
397 		dev_err(&idev->dev, "Missing adc-num-channels property in the DT.\n");
398 		ret = -EINVAL;
399 		goto error_ret;
400 	}
401 	st->num_channels = prop;
402 
403 	if (of_property_read_u32(node, "atmel,adc-startup-time", &prop)) {
404 		dev_err(&idev->dev, "Missing adc-startup-time property in the DT.\n");
405 		ret = -EINVAL;
406 		goto error_ret;
407 	}
408 	st->startup_time = prop;
409 
410 
411 	if (of_property_read_u32(node, "atmel,adc-vref", &prop)) {
412 		dev_err(&idev->dev, "Missing adc-vref property in the DT.\n");
413 		ret = -EINVAL;
414 		goto error_ret;
415 	}
416 	st->vref_mv = prop;
417 
418 	st->registers = devm_kzalloc(&idev->dev,
419 				     sizeof(struct at91_adc_reg_desc),
420 				     GFP_KERNEL);
421 	if (!st->registers) {
422 		dev_err(&idev->dev, "Could not allocate register memory.\n");
423 		ret = -ENOMEM;
424 		goto error_ret;
425 	}
426 
427 	if (of_property_read_u32(node, "atmel,adc-channel-base", &prop)) {
428 		dev_err(&idev->dev, "Missing adc-channel-base property in the DT.\n");
429 		ret = -EINVAL;
430 		goto error_ret;
431 	}
432 	st->registers->channel_base = prop;
433 
434 	if (of_property_read_u32(node, "atmel,adc-drdy-mask", &prop)) {
435 		dev_err(&idev->dev, "Missing adc-drdy-mask property in the DT.\n");
436 		ret = -EINVAL;
437 		goto error_ret;
438 	}
439 	st->registers->drdy_mask = prop;
440 
441 	if (of_property_read_u32(node, "atmel,adc-status-register", &prop)) {
442 		dev_err(&idev->dev, "Missing adc-status-register property in the DT.\n");
443 		ret = -EINVAL;
444 		goto error_ret;
445 	}
446 	st->registers->status_register = prop;
447 
448 	if (of_property_read_u32(node, "atmel,adc-trigger-register", &prop)) {
449 		dev_err(&idev->dev, "Missing adc-trigger-register property in the DT.\n");
450 		ret = -EINVAL;
451 		goto error_ret;
452 	}
453 	st->registers->trigger_register = prop;
454 
455 	st->trigger_number = of_get_child_count(node);
456 	st->trigger_list = devm_kzalloc(&idev->dev, st->trigger_number *
457 					sizeof(struct at91_adc_trigger),
458 					GFP_KERNEL);
459 	if (!st->trigger_list) {
460 		dev_err(&idev->dev, "Could not allocate trigger list memory.\n");
461 		ret = -ENOMEM;
462 		goto error_ret;
463 	}
464 
465 	for_each_child_of_node(node, trig_node) {
466 		struct at91_adc_trigger *trig = st->trigger_list + i;
467 		const char *name;
468 
469 		if (of_property_read_string(trig_node, "trigger-name", &name)) {
470 			dev_err(&idev->dev, "Missing trigger-name property in the DT.\n");
471 			ret = -EINVAL;
472 			goto error_ret;
473 		}
474 	        trig->name = name;
475 
476 		if (of_property_read_u32(trig_node, "trigger-value", &prop)) {
477 			dev_err(&idev->dev, "Missing trigger-value property in the DT.\n");
478 			ret = -EINVAL;
479 			goto error_ret;
480 		}
481 	        trig->value = prop;
482 		trig->is_external = of_property_read_bool(trig_node, "trigger-external");
483 		i++;
484 	}
485 
486 	return 0;
487 
488 error_ret:
489 	return ret;
490 }
491 
492 static int at91_adc_probe_pdata(struct at91_adc_state *st,
493 				struct platform_device *pdev)
494 {
495 	struct at91_adc_data *pdata = pdev->dev.platform_data;
496 
497 	if (!pdata)
498 		return -EINVAL;
499 
500 	st->use_external = pdata->use_external_triggers;
501 	st->vref_mv = pdata->vref;
502 	st->channels_mask = pdata->channels_used;
503 	st->num_channels = pdata->num_channels;
504 	st->startup_time = pdata->startup_time;
505 	st->trigger_number = pdata->trigger_number;
506 	st->trigger_list = pdata->trigger_list;
507 	st->registers = pdata->registers;
508 
509 	return 0;
510 }
511 
512 static const struct iio_info at91_adc_info = {
513 	.driver_module = THIS_MODULE,
514 	.read_raw = &at91_adc_read_raw,
515 };
516 
517 static int __devinit at91_adc_probe(struct platform_device *pdev)
518 {
519 	unsigned int prsc, mstrclk, ticks, adc_clk;
520 	int ret;
521 	struct iio_dev *idev;
522 	struct at91_adc_state *st;
523 	struct resource *res;
524 
525 	idev = iio_device_alloc(sizeof(struct at91_adc_state));
526 	if (idev == NULL) {
527 		ret = -ENOMEM;
528 		goto error_ret;
529 	}
530 
531 	st = iio_priv(idev);
532 
533 	if (pdev->dev.of_node)
534 		ret = at91_adc_probe_dt(st, pdev);
535 	else
536 		ret = at91_adc_probe_pdata(st, pdev);
537 
538 	if (ret) {
539 		dev_err(&pdev->dev, "No platform data available.\n");
540 		ret = -EINVAL;
541 		goto error_free_device;
542 	}
543 
544 	platform_set_drvdata(pdev, idev);
545 
546 	idev->dev.parent = &pdev->dev;
547 	idev->name = dev_name(&pdev->dev);
548 	idev->modes = INDIO_DIRECT_MODE;
549 	idev->info = &at91_adc_info;
550 
551 	st->irq = platform_get_irq(pdev, 0);
552 	if (st->irq < 0) {
553 		dev_err(&pdev->dev, "No IRQ ID is designated\n");
554 		ret = -ENODEV;
555 		goto error_free_device;
556 	}
557 
558 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
559 
560 	st->reg_base = devm_request_and_ioremap(&pdev->dev, res);
561 	if (!st->reg_base) {
562 		ret = -ENOMEM;
563 		goto error_free_device;
564 	}
565 
566 	/*
567 	 * Disable all IRQs before setting up the handler
568 	 */
569 	at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_SWRST);
570 	at91_adc_writel(st, AT91_ADC_IDR, 0xFFFFFFFF);
571 	ret = request_irq(st->irq,
572 			  at91_adc_eoc_trigger,
573 			  0,
574 			  pdev->dev.driver->name,
575 			  idev);
576 	if (ret) {
577 		dev_err(&pdev->dev, "Failed to allocate IRQ.\n");
578 		goto error_free_device;
579 	}
580 
581 	st->clk = devm_clk_get(&pdev->dev, "adc_clk");
582 	if (IS_ERR(st->clk)) {
583 		dev_err(&pdev->dev, "Failed to get the clock.\n");
584 		ret = PTR_ERR(st->clk);
585 		goto error_free_irq;
586 	}
587 
588 	ret = clk_prepare_enable(st->clk);
589 	if (ret) {
590 		dev_err(&pdev->dev,
591 			"Could not prepare or enable the clock.\n");
592 		goto error_free_irq;
593 	}
594 
595 	st->adc_clk = devm_clk_get(&pdev->dev, "adc_op_clk");
596 	if (IS_ERR(st->adc_clk)) {
597 		dev_err(&pdev->dev, "Failed to get the ADC clock.\n");
598 		ret = PTR_ERR(st->adc_clk);
599 		goto error_disable_clk;
600 	}
601 
602 	ret = clk_prepare_enable(st->adc_clk);
603 	if (ret) {
604 		dev_err(&pdev->dev,
605 			"Could not prepare or enable the ADC clock.\n");
606 		goto error_disable_clk;
607 	}
608 
609 	/*
610 	 * Prescaler rate computation using the formula from the Atmel's
611 	 * datasheet : ADC Clock = MCK / ((Prescaler + 1) * 2), ADC Clock being
612 	 * specified by the electrical characteristics of the board.
613 	 */
614 	mstrclk = clk_get_rate(st->clk);
615 	adc_clk = clk_get_rate(st->adc_clk);
616 	prsc = (mstrclk / (2 * adc_clk)) - 1;
617 
618 	if (!st->startup_time) {
619 		dev_err(&pdev->dev, "No startup time available.\n");
620 		ret = -EINVAL;
621 		goto error_disable_adc_clk;
622 	}
623 
624 	/*
625 	 * Number of ticks needed to cover the startup time of the ADC as
626 	 * defined in the electrical characteristics of the board, divided by 8.
627 	 * The formula thus is : Startup Time = (ticks + 1) * 8 / ADC Clock
628 	 */
629 	ticks = round_up((st->startup_time * adc_clk /
630 			  1000000) - 1, 8) / 8;
631 	at91_adc_writel(st, AT91_ADC_MR,
632 			(AT91_ADC_PRESCAL_(prsc) & AT91_ADC_PRESCAL) |
633 			(AT91_ADC_STARTUP_(ticks) & AT91_ADC_STARTUP));
634 
635 	/* Setup the ADC channels available on the board */
636 	ret = at91_adc_channel_init(idev);
637 	if (ret < 0) {
638 		dev_err(&pdev->dev, "Couldn't initialize the channels.\n");
639 		goto error_disable_adc_clk;
640 	}
641 
642 	init_waitqueue_head(&st->wq_data_avail);
643 	mutex_init(&st->lock);
644 
645 	ret = at91_adc_buffer_init(idev);
646 	if (ret < 0) {
647 		dev_err(&pdev->dev, "Couldn't initialize the buffer.\n");
648 		goto error_disable_adc_clk;
649 	}
650 
651 	ret = at91_adc_trigger_init(idev);
652 	if (ret < 0) {
653 		dev_err(&pdev->dev, "Couldn't setup the triggers.\n");
654 		goto error_unregister_buffer;
655 	}
656 
657 	ret = iio_device_register(idev);
658 	if (ret < 0) {
659 		dev_err(&pdev->dev, "Couldn't register the device.\n");
660 		goto error_remove_triggers;
661 	}
662 
663 	return 0;
664 
665 error_remove_triggers:
666 	at91_adc_trigger_remove(idev);
667 error_unregister_buffer:
668 	at91_adc_buffer_remove(idev);
669 error_disable_adc_clk:
670 	clk_disable_unprepare(st->adc_clk);
671 error_disable_clk:
672 	clk_disable_unprepare(st->clk);
673 error_free_irq:
674 	free_irq(st->irq, idev);
675 error_free_device:
676 	iio_device_free(idev);
677 error_ret:
678 	return ret;
679 }
680 
681 static int __devexit at91_adc_remove(struct platform_device *pdev)
682 {
683 	struct iio_dev *idev = platform_get_drvdata(pdev);
684 	struct at91_adc_state *st = iio_priv(idev);
685 
686 	iio_device_unregister(idev);
687 	at91_adc_trigger_remove(idev);
688 	at91_adc_buffer_remove(idev);
689 	clk_disable_unprepare(st->adc_clk);
690 	clk_disable_unprepare(st->clk);
691 	free_irq(st->irq, idev);
692 	iio_device_free(idev);
693 
694 	return 0;
695 }
696 
697 static const struct of_device_id at91_adc_dt_ids[] = {
698 	{ .compatible = "atmel,at91sam9260-adc" },
699 	{},
700 };
701 MODULE_DEVICE_TABLE(of, at91_adc_dt_ids);
702 
703 static struct platform_driver at91_adc_driver = {
704 	.probe = at91_adc_probe,
705 	.remove = __devexit_p(at91_adc_remove),
706 	.driver = {
707 		   .name = "at91_adc",
708 		   .of_match_table = of_match_ptr(at91_adc_dt_ids),
709 	},
710 };
711 
712 module_platform_driver(at91_adc_driver);
713 
714 MODULE_LICENSE("GPL");
715 MODULE_DESCRIPTION("Atmel AT91 ADC Driver");
716 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
717