1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Analog Devices Generic AXI ADC IP core 4 * Link: https://wiki.analog.com/resources/fpga/docs/axi_adc_ip 5 * 6 * Copyright 2012-2020 Analog Devices Inc. 7 */ 8 9 #include <linux/bitfield.h> 10 #include <linux/clk.h> 11 #include <linux/io.h> 12 #include <linux/delay.h> 13 #include <linux/module.h> 14 #include <linux/of.h> 15 #include <linux/platform_device.h> 16 #include <linux/property.h> 17 #include <linux/slab.h> 18 19 #include <linux/iio/iio.h> 20 #include <linux/iio/sysfs.h> 21 #include <linux/iio/buffer.h> 22 #include <linux/iio/buffer-dmaengine.h> 23 24 #include <linux/fpga/adi-axi-common.h> 25 #include <linux/iio/adc/adi-axi-adc.h> 26 27 /* 28 * Register definitions: 29 * https://wiki.analog.com/resources/fpga/docs/axi_adc_ip#register_map 30 */ 31 32 /* ADC controls */ 33 34 #define ADI_AXI_REG_RSTN 0x0040 35 #define ADI_AXI_REG_RSTN_CE_N BIT(2) 36 #define ADI_AXI_REG_RSTN_MMCM_RSTN BIT(1) 37 #define ADI_AXI_REG_RSTN_RSTN BIT(0) 38 39 /* ADC Channel controls */ 40 41 #define ADI_AXI_REG_CHAN_CTRL(c) (0x0400 + (c) * 0x40) 42 #define ADI_AXI_REG_CHAN_CTRL_LB_OWR BIT(11) 43 #define ADI_AXI_REG_CHAN_CTRL_PN_SEL_OWR BIT(10) 44 #define ADI_AXI_REG_CHAN_CTRL_IQCOR_EN BIT(9) 45 #define ADI_AXI_REG_CHAN_CTRL_DCFILT_EN BIT(8) 46 #define ADI_AXI_REG_CHAN_CTRL_FMT_SIGNEXT BIT(6) 47 #define ADI_AXI_REG_CHAN_CTRL_FMT_TYPE BIT(5) 48 #define ADI_AXI_REG_CHAN_CTRL_FMT_EN BIT(4) 49 #define ADI_AXI_REG_CHAN_CTRL_PN_TYPE_OWR BIT(1) 50 #define ADI_AXI_REG_CHAN_CTRL_ENABLE BIT(0) 51 52 #define ADI_AXI_REG_CHAN_CTRL_DEFAULTS \ 53 (ADI_AXI_REG_CHAN_CTRL_FMT_SIGNEXT | \ 54 ADI_AXI_REG_CHAN_CTRL_FMT_EN | \ 55 ADI_AXI_REG_CHAN_CTRL_ENABLE) 56 57 struct adi_axi_adc_core_info { 58 unsigned int version; 59 }; 60 61 struct adi_axi_adc_state { 62 struct mutex lock; 63 64 struct adi_axi_adc_client *client; 65 void __iomem *regs; 66 }; 67 68 struct adi_axi_adc_client { 69 struct list_head entry; 70 struct adi_axi_adc_conv conv; 71 struct adi_axi_adc_state *state; 72 struct device *dev; 73 const struct adi_axi_adc_core_info *info; 74 }; 75 76 static LIST_HEAD(registered_clients); 77 static DEFINE_MUTEX(registered_clients_lock); 78 79 static struct adi_axi_adc_client *conv_to_client(struct adi_axi_adc_conv *conv) 80 { 81 return container_of(conv, struct adi_axi_adc_client, conv); 82 } 83 84 void *adi_axi_adc_conv_priv(struct adi_axi_adc_conv *conv) 85 { 86 struct adi_axi_adc_client *cl = conv_to_client(conv); 87 88 return (char *)cl + ALIGN(sizeof(struct adi_axi_adc_client), 89 IIO_DMA_MINALIGN); 90 } 91 EXPORT_SYMBOL_NS_GPL(adi_axi_adc_conv_priv, IIO_ADI_AXI); 92 93 static void adi_axi_adc_write(struct adi_axi_adc_state *st, 94 unsigned int reg, 95 unsigned int val) 96 { 97 iowrite32(val, st->regs + reg); 98 } 99 100 static unsigned int adi_axi_adc_read(struct adi_axi_adc_state *st, 101 unsigned int reg) 102 { 103 return ioread32(st->regs + reg); 104 } 105 106 static int adi_axi_adc_config_dma_buffer(struct device *dev, 107 struct iio_dev *indio_dev) 108 { 109 const char *dma_name; 110 111 if (!device_property_present(dev, "dmas")) 112 return 0; 113 114 if (device_property_read_string(dev, "dma-names", &dma_name)) 115 dma_name = "rx"; 116 117 return devm_iio_dmaengine_buffer_setup(indio_dev->dev.parent, 118 indio_dev, dma_name); 119 } 120 121 static int adi_axi_adc_read_raw(struct iio_dev *indio_dev, 122 struct iio_chan_spec const *chan, 123 int *val, int *val2, long mask) 124 { 125 struct adi_axi_adc_state *st = iio_priv(indio_dev); 126 struct adi_axi_adc_conv *conv = &st->client->conv; 127 128 if (!conv->read_raw) 129 return -EOPNOTSUPP; 130 131 return conv->read_raw(conv, chan, val, val2, mask); 132 } 133 134 static int adi_axi_adc_write_raw(struct iio_dev *indio_dev, 135 struct iio_chan_spec const *chan, 136 int val, int val2, long mask) 137 { 138 struct adi_axi_adc_state *st = iio_priv(indio_dev); 139 struct adi_axi_adc_conv *conv = &st->client->conv; 140 141 if (!conv->write_raw) 142 return -EOPNOTSUPP; 143 144 return conv->write_raw(conv, chan, val, val2, mask); 145 } 146 147 static int adi_axi_adc_update_scan_mode(struct iio_dev *indio_dev, 148 const unsigned long *scan_mask) 149 { 150 struct adi_axi_adc_state *st = iio_priv(indio_dev); 151 struct adi_axi_adc_conv *conv = &st->client->conv; 152 unsigned int i, ctrl; 153 154 for (i = 0; i < conv->chip_info->num_channels; i++) { 155 ctrl = adi_axi_adc_read(st, ADI_AXI_REG_CHAN_CTRL(i)); 156 157 if (test_bit(i, scan_mask)) 158 ctrl |= ADI_AXI_REG_CHAN_CTRL_ENABLE; 159 else 160 ctrl &= ~ADI_AXI_REG_CHAN_CTRL_ENABLE; 161 162 adi_axi_adc_write(st, ADI_AXI_REG_CHAN_CTRL(i), ctrl); 163 } 164 165 return 0; 166 } 167 168 static struct adi_axi_adc_conv *adi_axi_adc_conv_register(struct device *dev, 169 size_t sizeof_priv) 170 { 171 struct adi_axi_adc_client *cl; 172 size_t alloc_size; 173 174 alloc_size = ALIGN(sizeof(struct adi_axi_adc_client), IIO_DMA_MINALIGN); 175 if (sizeof_priv) 176 alloc_size += ALIGN(sizeof_priv, IIO_DMA_MINALIGN); 177 178 cl = kzalloc(alloc_size, GFP_KERNEL); 179 if (!cl) 180 return ERR_PTR(-ENOMEM); 181 182 mutex_lock(®istered_clients_lock); 183 184 cl->dev = get_device(dev); 185 186 list_add_tail(&cl->entry, ®istered_clients); 187 188 mutex_unlock(®istered_clients_lock); 189 190 return &cl->conv; 191 } 192 193 static void adi_axi_adc_conv_unregister(struct adi_axi_adc_conv *conv) 194 { 195 struct adi_axi_adc_client *cl = conv_to_client(conv); 196 197 mutex_lock(®istered_clients_lock); 198 199 list_del(&cl->entry); 200 put_device(cl->dev); 201 202 mutex_unlock(®istered_clients_lock); 203 204 kfree(cl); 205 } 206 207 static void devm_adi_axi_adc_conv_release(void *conv) 208 { 209 adi_axi_adc_conv_unregister(conv); 210 } 211 212 struct adi_axi_adc_conv *devm_adi_axi_adc_conv_register(struct device *dev, 213 size_t sizeof_priv) 214 { 215 struct adi_axi_adc_conv *conv; 216 int ret; 217 218 conv = adi_axi_adc_conv_register(dev, sizeof_priv); 219 if (IS_ERR(conv)) 220 return conv; 221 222 ret = devm_add_action_or_reset(dev, devm_adi_axi_adc_conv_release, 223 conv); 224 if (ret) 225 return ERR_PTR(ret); 226 227 return conv; 228 } 229 EXPORT_SYMBOL_NS_GPL(devm_adi_axi_adc_conv_register, IIO_ADI_AXI); 230 231 static ssize_t in_voltage_scale_available_show(struct device *dev, 232 struct device_attribute *attr, 233 char *buf) 234 { 235 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 236 struct adi_axi_adc_state *st = iio_priv(indio_dev); 237 struct adi_axi_adc_conv *conv = &st->client->conv; 238 size_t len = 0; 239 int i; 240 241 for (i = 0; i < conv->chip_info->num_scales; i++) { 242 const unsigned int *s = conv->chip_info->scale_table[i]; 243 244 len += scnprintf(buf + len, PAGE_SIZE - len, 245 "%u.%06u ", s[0], s[1]); 246 } 247 buf[len - 1] = '\n'; 248 249 return len; 250 } 251 252 static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0); 253 254 enum { 255 ADI_AXI_ATTR_SCALE_AVAIL, 256 }; 257 258 #define ADI_AXI_ATTR(_en_, _file_) \ 259 [ADI_AXI_ATTR_##_en_] = &iio_dev_attr_##_file_.dev_attr.attr 260 261 static struct attribute *adi_axi_adc_attributes[] = { 262 ADI_AXI_ATTR(SCALE_AVAIL, in_voltage_scale_available), 263 NULL 264 }; 265 266 static umode_t axi_adc_attr_is_visible(struct kobject *kobj, 267 struct attribute *attr, int n) 268 { 269 struct device *dev = kobj_to_dev(kobj); 270 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 271 struct adi_axi_adc_state *st = iio_priv(indio_dev); 272 struct adi_axi_adc_conv *conv = &st->client->conv; 273 274 switch (n) { 275 case ADI_AXI_ATTR_SCALE_AVAIL: 276 if (!conv->chip_info->num_scales) 277 return 0; 278 return attr->mode; 279 default: 280 return attr->mode; 281 } 282 } 283 284 static const struct attribute_group adi_axi_adc_attribute_group = { 285 .attrs = adi_axi_adc_attributes, 286 .is_visible = axi_adc_attr_is_visible, 287 }; 288 289 static const struct iio_info adi_axi_adc_info = { 290 .read_raw = &adi_axi_adc_read_raw, 291 .write_raw = &adi_axi_adc_write_raw, 292 .attrs = &adi_axi_adc_attribute_group, 293 .update_scan_mode = &adi_axi_adc_update_scan_mode, 294 }; 295 296 static const struct adi_axi_adc_core_info adi_axi_adc_10_0_a_info = { 297 .version = ADI_AXI_PCORE_VER(10, 0, 'a'), 298 }; 299 300 static struct adi_axi_adc_client *adi_axi_adc_attach_client(struct device *dev) 301 { 302 const struct adi_axi_adc_core_info *info; 303 struct adi_axi_adc_client *cl; 304 struct device_node *cln; 305 306 info = of_device_get_match_data(dev); 307 if (!info) 308 return ERR_PTR(-ENODEV); 309 310 cln = of_parse_phandle(dev->of_node, "adi,adc-dev", 0); 311 if (!cln) { 312 dev_err(dev, "No 'adi,adc-dev' node defined\n"); 313 return ERR_PTR(-ENODEV); 314 } 315 316 mutex_lock(®istered_clients_lock); 317 318 list_for_each_entry(cl, ®istered_clients, entry) { 319 if (!cl->dev) 320 continue; 321 322 if (cl->dev->of_node != cln) 323 continue; 324 325 if (!try_module_get(cl->dev->driver->owner)) { 326 mutex_unlock(®istered_clients_lock); 327 of_node_put(cln); 328 return ERR_PTR(-ENODEV); 329 } 330 331 get_device(cl->dev); 332 cl->info = info; 333 mutex_unlock(®istered_clients_lock); 334 of_node_put(cln); 335 return cl; 336 } 337 338 mutex_unlock(®istered_clients_lock); 339 of_node_put(cln); 340 341 return ERR_PTR(-EPROBE_DEFER); 342 } 343 344 static int adi_axi_adc_setup_channels(struct device *dev, 345 struct adi_axi_adc_state *st) 346 { 347 struct adi_axi_adc_conv *conv = &st->client->conv; 348 int i, ret; 349 350 if (conv->preenable_setup) { 351 ret = conv->preenable_setup(conv); 352 if (ret) 353 return ret; 354 } 355 356 for (i = 0; i < conv->chip_info->num_channels; i++) { 357 adi_axi_adc_write(st, ADI_AXI_REG_CHAN_CTRL(i), 358 ADI_AXI_REG_CHAN_CTRL_DEFAULTS); 359 } 360 361 return 0; 362 } 363 364 static void axi_adc_reset(struct adi_axi_adc_state *st) 365 { 366 adi_axi_adc_write(st, ADI_AXI_REG_RSTN, 0); 367 mdelay(10); 368 adi_axi_adc_write(st, ADI_AXI_REG_RSTN, ADI_AXI_REG_RSTN_MMCM_RSTN); 369 mdelay(10); 370 adi_axi_adc_write(st, ADI_AXI_REG_RSTN, 371 ADI_AXI_REG_RSTN_RSTN | ADI_AXI_REG_RSTN_MMCM_RSTN); 372 } 373 374 static void adi_axi_adc_cleanup(void *data) 375 { 376 struct adi_axi_adc_client *cl = data; 377 378 put_device(cl->dev); 379 module_put(cl->dev->driver->owner); 380 } 381 382 static int adi_axi_adc_probe(struct platform_device *pdev) 383 { 384 struct adi_axi_adc_conv *conv; 385 struct iio_dev *indio_dev; 386 struct adi_axi_adc_client *cl; 387 struct adi_axi_adc_state *st; 388 unsigned int ver; 389 int ret; 390 391 cl = adi_axi_adc_attach_client(&pdev->dev); 392 if (IS_ERR(cl)) 393 return PTR_ERR(cl); 394 395 ret = devm_add_action_or_reset(&pdev->dev, adi_axi_adc_cleanup, cl); 396 if (ret) 397 return ret; 398 399 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*st)); 400 if (indio_dev == NULL) 401 return -ENOMEM; 402 403 st = iio_priv(indio_dev); 404 st->client = cl; 405 cl->state = st; 406 mutex_init(&st->lock); 407 408 st->regs = devm_platform_ioremap_resource(pdev, 0); 409 if (IS_ERR(st->regs)) 410 return PTR_ERR(st->regs); 411 412 conv = &st->client->conv; 413 414 axi_adc_reset(st); 415 416 ver = adi_axi_adc_read(st, ADI_AXI_REG_VERSION); 417 418 if (cl->info->version > ver) { 419 dev_err(&pdev->dev, 420 "IP core version is too old. Expected %d.%.2d.%c, Reported %d.%.2d.%c\n", 421 ADI_AXI_PCORE_VER_MAJOR(cl->info->version), 422 ADI_AXI_PCORE_VER_MINOR(cl->info->version), 423 ADI_AXI_PCORE_VER_PATCH(cl->info->version), 424 ADI_AXI_PCORE_VER_MAJOR(ver), 425 ADI_AXI_PCORE_VER_MINOR(ver), 426 ADI_AXI_PCORE_VER_PATCH(ver)); 427 return -ENODEV; 428 } 429 430 indio_dev->info = &adi_axi_adc_info; 431 indio_dev->name = "adi-axi-adc"; 432 indio_dev->modes = INDIO_DIRECT_MODE; 433 indio_dev->num_channels = conv->chip_info->num_channels; 434 indio_dev->channels = conv->chip_info->channels; 435 436 ret = adi_axi_adc_config_dma_buffer(&pdev->dev, indio_dev); 437 if (ret) 438 return ret; 439 440 ret = adi_axi_adc_setup_channels(&pdev->dev, st); 441 if (ret) 442 return ret; 443 444 ret = devm_iio_device_register(&pdev->dev, indio_dev); 445 if (ret) 446 return ret; 447 448 dev_info(&pdev->dev, "AXI ADC IP core (%d.%.2d.%c) probed\n", 449 ADI_AXI_PCORE_VER_MAJOR(ver), 450 ADI_AXI_PCORE_VER_MINOR(ver), 451 ADI_AXI_PCORE_VER_PATCH(ver)); 452 453 return 0; 454 } 455 456 /* Match table for of_platform binding */ 457 static const struct of_device_id adi_axi_adc_of_match[] = { 458 { .compatible = "adi,axi-adc-10.0.a", .data = &adi_axi_adc_10_0_a_info }, 459 { /* end of list */ } 460 }; 461 MODULE_DEVICE_TABLE(of, adi_axi_adc_of_match); 462 463 static struct platform_driver adi_axi_adc_driver = { 464 .driver = { 465 .name = KBUILD_MODNAME, 466 .of_match_table = adi_axi_adc_of_match, 467 }, 468 .probe = adi_axi_adc_probe, 469 }; 470 module_platform_driver(adi_axi_adc_driver); 471 472 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); 473 MODULE_DESCRIPTION("Analog Devices Generic AXI ADC IP core driver"); 474 MODULE_LICENSE("GPL v2"); 475