1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * iio/adc/ad799x.c
4 * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc.
5 *
6 * based on iio/adc/max1363
7 * Copyright (C) 2008-2010 Jonathan Cameron
8 *
9 * based on linux/drivers/i2c/chips/max123x
10 * Copyright (C) 2002-2004 Stefan Eletzhofer
11 *
12 * based on linux/drivers/acron/char/pcf8583.c
13 * Copyright (C) 2000 Russell King
14 *
15 * ad799x.c
16 *
17 * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997,
18 * ad7998 and similar chips.
19 */
20
21 #include <linux/interrupt.h>
22 #include <linux/device.h>
23 #include <linux/kernel.h>
24 #include <linux/sysfs.h>
25 #include <linux/i2c.h>
26 #include <linux/regulator/consumer.h>
27 #include <linux/slab.h>
28 #include <linux/types.h>
29 #include <linux/err.h>
30 #include <linux/module.h>
31 #include <linux/mutex.h>
32 #include <linux/bitops.h>
33
34 #include <linux/iio/iio.h>
35 #include <linux/iio/sysfs.h>
36 #include <linux/iio/events.h>
37 #include <linux/iio/buffer.h>
38 #include <linux/iio/trigger_consumer.h>
39 #include <linux/iio/triggered_buffer.h>
40
41 #define AD799X_CHANNEL_SHIFT 4
42
43 /*
44 * AD7991, AD7995 and AD7999 defines
45 */
46
47 #define AD7991_REF_SEL 0x08
48 #define AD7991_FLTR 0x04
49 #define AD7991_BIT_TRIAL_DELAY 0x02
50 #define AD7991_SAMPLE_DELAY 0x01
51
52 /*
53 * AD7992, AD7993, AD7994, AD7997 and AD7998 defines
54 */
55
56 #define AD7998_FLTR BIT(3)
57 #define AD7998_ALERT_EN BIT(2)
58 #define AD7998_BUSY_ALERT BIT(1)
59 #define AD7998_BUSY_ALERT_POL BIT(0)
60
61 #define AD7998_CONV_RES_REG 0x0
62 #define AD7998_ALERT_STAT_REG 0x1
63 #define AD7998_CONF_REG 0x2
64 #define AD7998_CYCLE_TMR_REG 0x3
65
66 #define AD7998_DATALOW_REG(x) ((x) * 3 + 0x4)
67 #define AD7998_DATAHIGH_REG(x) ((x) * 3 + 0x5)
68 #define AD7998_HYST_REG(x) ((x) * 3 + 0x6)
69
70 #define AD7998_CYC_MASK GENMASK(2, 0)
71 #define AD7998_CYC_DIS 0x0
72 #define AD7998_CYC_TCONF_32 0x1
73 #define AD7998_CYC_TCONF_64 0x2
74 #define AD7998_CYC_TCONF_128 0x3
75 #define AD7998_CYC_TCONF_256 0x4
76 #define AD7998_CYC_TCONF_512 0x5
77 #define AD7998_CYC_TCONF_1024 0x6
78 #define AD7998_CYC_TCONF_2048 0x7
79
80 #define AD7998_ALERT_STAT_CLEAR 0xFF
81
82 /*
83 * AD7997 and AD7997 defines
84 */
85
86 #define AD7997_8_READ_SINGLE BIT(7)
87 #define AD7997_8_READ_SEQUENCE (BIT(6) | BIT(5) | BIT(4))
88
89 enum {
90 ad7991,
91 ad7995,
92 ad7999,
93 ad7992,
94 ad7993,
95 ad7994,
96 ad7997,
97 ad7998
98 };
99
100 /**
101 * struct ad799x_chip_config - chip specific information
102 * @channel: channel specification
103 * @default_config: device default configuration
104 * @info: pointer to iio_info struct
105 */
106 struct ad799x_chip_config {
107 const struct iio_chan_spec channel[9];
108 u16 default_config;
109 const struct iio_info *info;
110 };
111
112 /**
113 * struct ad799x_chip_info - chip specific information
114 * @num_channels: number of channels
115 * @noirq_config: device configuration w/o IRQ
116 * @irq_config: device configuration w/IRQ
117 */
118 struct ad799x_chip_info {
119 int num_channels;
120 const struct ad799x_chip_config noirq_config;
121 const struct ad799x_chip_config irq_config;
122 };
123
124 struct ad799x_state {
125 struct i2c_client *client;
126 const struct ad799x_chip_config *chip_config;
127 struct regulator *reg;
128 struct regulator *vref;
129 /* lock to protect against multiple access to the device */
130 struct mutex lock;
131 unsigned int id;
132 u16 config;
133
134 u8 *rx_buf;
135 unsigned int transfer_size;
136 };
137
ad799x_write_config(struct ad799x_state * st,u16 val)138 static int ad799x_write_config(struct ad799x_state *st, u16 val)
139 {
140 switch (st->id) {
141 case ad7997:
142 case ad7998:
143 return i2c_smbus_write_word_swapped(st->client, AD7998_CONF_REG,
144 val);
145 case ad7992:
146 case ad7993:
147 case ad7994:
148 return i2c_smbus_write_byte_data(st->client, AD7998_CONF_REG,
149 val);
150 default:
151 /* Will be written when doing a conversion */
152 st->config = val;
153 return 0;
154 }
155 }
156
ad799x_read_config(struct ad799x_state * st)157 static int ad799x_read_config(struct ad799x_state *st)
158 {
159 switch (st->id) {
160 case ad7997:
161 case ad7998:
162 return i2c_smbus_read_word_swapped(st->client, AD7998_CONF_REG);
163 case ad7992:
164 case ad7993:
165 case ad7994:
166 return i2c_smbus_read_byte_data(st->client, AD7998_CONF_REG);
167 default:
168 /* No readback support */
169 return st->config;
170 }
171 }
172
ad799x_update_config(struct ad799x_state * st,u16 config)173 static int ad799x_update_config(struct ad799x_state *st, u16 config)
174 {
175 int ret;
176
177 ret = ad799x_write_config(st, config);
178 if (ret < 0)
179 return ret;
180 ret = ad799x_read_config(st);
181 if (ret < 0)
182 return ret;
183 st->config = ret;
184
185 return 0;
186 }
187
ad799x_trigger_handler(int irq,void * p)188 static irqreturn_t ad799x_trigger_handler(int irq, void *p)
189 {
190 struct iio_poll_func *pf = p;
191 struct iio_dev *indio_dev = pf->indio_dev;
192 struct ad799x_state *st = iio_priv(indio_dev);
193 int b_sent;
194 u8 cmd;
195
196 switch (st->id) {
197 case ad7991:
198 case ad7995:
199 case ad7999:
200 cmd = st->config |
201 (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT);
202 break;
203 case ad7992:
204 case ad7993:
205 case ad7994:
206 cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) |
207 AD7998_CONV_RES_REG;
208 break;
209 case ad7997:
210 case ad7998:
211 cmd = AD7997_8_READ_SEQUENCE | AD7998_CONV_RES_REG;
212 break;
213 default:
214 cmd = 0;
215 }
216
217 b_sent = i2c_smbus_read_i2c_block_data(st->client,
218 cmd, st->transfer_size, st->rx_buf);
219 if (b_sent < 0)
220 goto out;
221
222 iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
223 iio_get_time_ns(indio_dev));
224 out:
225 iio_trigger_notify_done(indio_dev->trig);
226
227 return IRQ_HANDLED;
228 }
229
ad799x_update_scan_mode(struct iio_dev * indio_dev,const unsigned long * scan_mask)230 static int ad799x_update_scan_mode(struct iio_dev *indio_dev,
231 const unsigned long *scan_mask)
232 {
233 struct ad799x_state *st = iio_priv(indio_dev);
234
235 kfree(st->rx_buf);
236 st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
237 if (!st->rx_buf)
238 return -ENOMEM;
239
240 st->transfer_size = bitmap_weight(scan_mask,
241 iio_get_masklength(indio_dev)) * 2;
242
243 switch (st->id) {
244 case ad7992:
245 case ad7993:
246 case ad7994:
247 case ad7997:
248 case ad7998:
249 st->config &= ~(GENMASK(7, 0) << AD799X_CHANNEL_SHIFT);
250 st->config |= (*scan_mask << AD799X_CHANNEL_SHIFT);
251 return ad799x_write_config(st, st->config);
252 default:
253 return 0;
254 }
255 }
256
ad799x_scan_direct(struct ad799x_state * st,unsigned int ch)257 static int ad799x_scan_direct(struct ad799x_state *st, unsigned int ch)
258 {
259 u8 cmd;
260
261 switch (st->id) {
262 case ad7991:
263 case ad7995:
264 case ad7999:
265 cmd = st->config | (BIT(ch) << AD799X_CHANNEL_SHIFT);
266 break;
267 case ad7992:
268 case ad7993:
269 case ad7994:
270 cmd = BIT(ch) << AD799X_CHANNEL_SHIFT;
271 break;
272 case ad7997:
273 case ad7998:
274 cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE;
275 break;
276 default:
277 return -EINVAL;
278 }
279
280 return i2c_smbus_read_word_swapped(st->client, cmd);
281 }
282
ad799x_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)283 static int ad799x_read_raw(struct iio_dev *indio_dev,
284 struct iio_chan_spec const *chan,
285 int *val,
286 int *val2,
287 long m)
288 {
289 int ret;
290 struct ad799x_state *st = iio_priv(indio_dev);
291
292 switch (m) {
293 case IIO_CHAN_INFO_RAW:
294 ret = iio_device_claim_direct_mode(indio_dev);
295 if (ret)
296 return ret;
297 mutex_lock(&st->lock);
298 ret = ad799x_scan_direct(st, chan->scan_index);
299 mutex_unlock(&st->lock);
300 iio_device_release_direct_mode(indio_dev);
301
302 if (ret < 0)
303 return ret;
304 *val = (ret >> chan->scan_type.shift) &
305 GENMASK(chan->scan_type.realbits - 1, 0);
306 return IIO_VAL_INT;
307 case IIO_CHAN_INFO_SCALE:
308 if (st->vref)
309 ret = regulator_get_voltage(st->vref);
310 else
311 ret = regulator_get_voltage(st->reg);
312
313 if (ret < 0)
314 return ret;
315 *val = ret / 1000;
316 *val2 = chan->scan_type.realbits;
317 return IIO_VAL_FRACTIONAL_LOG2;
318 }
319 return -EINVAL;
320 }
321 static const unsigned int ad7998_frequencies[] = {
322 [AD7998_CYC_DIS] = 0,
323 [AD7998_CYC_TCONF_32] = 15625,
324 [AD7998_CYC_TCONF_64] = 7812,
325 [AD7998_CYC_TCONF_128] = 3906,
326 [AD7998_CYC_TCONF_512] = 976,
327 [AD7998_CYC_TCONF_1024] = 488,
328 [AD7998_CYC_TCONF_2048] = 244,
329 };
330
ad799x_read_frequency(struct device * dev,struct device_attribute * attr,char * buf)331 static ssize_t ad799x_read_frequency(struct device *dev,
332 struct device_attribute *attr,
333 char *buf)
334 {
335 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
336 struct ad799x_state *st = iio_priv(indio_dev);
337
338 int ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
339
340 if (ret < 0)
341 return ret;
342
343 return sprintf(buf, "%u\n", ad7998_frequencies[ret & AD7998_CYC_MASK]);
344 }
345
ad799x_write_frequency(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)346 static ssize_t ad799x_write_frequency(struct device *dev,
347 struct device_attribute *attr,
348 const char *buf,
349 size_t len)
350 {
351 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
352 struct ad799x_state *st = iio_priv(indio_dev);
353
354 long val;
355 int ret, i;
356
357 ret = kstrtol(buf, 10, &val);
358 if (ret)
359 return ret;
360
361 mutex_lock(&st->lock);
362
363 ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
364 if (ret < 0)
365 goto error_ret_mutex;
366 /* Wipe the bits clean */
367 ret &= ~AD7998_CYC_MASK;
368
369 for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++)
370 if (val == ad7998_frequencies[i])
371 break;
372 if (i == ARRAY_SIZE(ad7998_frequencies)) {
373 ret = -EINVAL;
374 goto error_ret_mutex;
375 }
376
377 ret = i2c_smbus_write_byte_data(st->client, AD7998_CYCLE_TMR_REG,
378 ret | i);
379 if (ret < 0)
380 goto error_ret_mutex;
381 ret = len;
382
383 error_ret_mutex:
384 mutex_unlock(&st->lock);
385
386 return ret;
387 }
388
ad799x_read_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)389 static int ad799x_read_event_config(struct iio_dev *indio_dev,
390 const struct iio_chan_spec *chan,
391 enum iio_event_type type,
392 enum iio_event_direction dir)
393 {
394 struct ad799x_state *st = iio_priv(indio_dev);
395
396 if (!(st->config & AD7998_ALERT_EN))
397 return 0;
398
399 if ((st->config >> AD799X_CHANNEL_SHIFT) & BIT(chan->scan_index))
400 return 1;
401
402 return 0;
403 }
404
ad799x_write_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,int state)405 static int ad799x_write_event_config(struct iio_dev *indio_dev,
406 const struct iio_chan_spec *chan,
407 enum iio_event_type type,
408 enum iio_event_direction dir,
409 int state)
410 {
411 struct ad799x_state *st = iio_priv(indio_dev);
412 int ret;
413
414 ret = iio_device_claim_direct_mode(indio_dev);
415 if (ret)
416 return ret;
417
418 mutex_lock(&st->lock);
419
420 if (state)
421 st->config |= BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT;
422 else
423 st->config &= ~(BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT);
424
425 if (st->config >> AD799X_CHANNEL_SHIFT)
426 st->config |= AD7998_ALERT_EN;
427 else
428 st->config &= ~AD7998_ALERT_EN;
429
430 ret = ad799x_write_config(st, st->config);
431 mutex_unlock(&st->lock);
432 iio_device_release_direct_mode(indio_dev);
433 return ret;
434 }
435
ad799x_threshold_reg(const struct iio_chan_spec * chan,enum iio_event_direction dir,enum iio_event_info info)436 static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan,
437 enum iio_event_direction dir,
438 enum iio_event_info info)
439 {
440 switch (info) {
441 case IIO_EV_INFO_VALUE:
442 if (dir == IIO_EV_DIR_FALLING)
443 return AD7998_DATALOW_REG(chan->channel);
444 else
445 return AD7998_DATAHIGH_REG(chan->channel);
446 case IIO_EV_INFO_HYSTERESIS:
447 return AD7998_HYST_REG(chan->channel);
448 default:
449 return -EINVAL;
450 }
451
452 return 0;
453 }
454
ad799x_write_event_value(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)455 static int ad799x_write_event_value(struct iio_dev *indio_dev,
456 const struct iio_chan_spec *chan,
457 enum iio_event_type type,
458 enum iio_event_direction dir,
459 enum iio_event_info info,
460 int val, int val2)
461 {
462 int ret;
463 struct ad799x_state *st = iio_priv(indio_dev);
464
465 if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0))
466 return -EINVAL;
467
468 ret = i2c_smbus_write_word_swapped(st->client,
469 ad799x_threshold_reg(chan, dir, info),
470 val << chan->scan_type.shift);
471
472 return ret;
473 }
474
ad799x_read_event_value(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)475 static int ad799x_read_event_value(struct iio_dev *indio_dev,
476 const struct iio_chan_spec *chan,
477 enum iio_event_type type,
478 enum iio_event_direction dir,
479 enum iio_event_info info,
480 int *val, int *val2)
481 {
482 int ret;
483 struct ad799x_state *st = iio_priv(indio_dev);
484
485 ret = i2c_smbus_read_word_swapped(st->client,
486 ad799x_threshold_reg(chan, dir, info));
487 if (ret < 0)
488 return ret;
489 *val = (ret >> chan->scan_type.shift) &
490 GENMASK(chan->scan_type.realbits - 1, 0);
491
492 return IIO_VAL_INT;
493 }
494
ad799x_event_handler(int irq,void * private)495 static irqreturn_t ad799x_event_handler(int irq, void *private)
496 {
497 struct iio_dev *indio_dev = private;
498 struct ad799x_state *st = iio_priv(private);
499 int i, ret;
500
501 ret = i2c_smbus_read_byte_data(st->client, AD7998_ALERT_STAT_REG);
502 if (ret <= 0)
503 goto done;
504
505 if (i2c_smbus_write_byte_data(st->client, AD7998_ALERT_STAT_REG,
506 AD7998_ALERT_STAT_CLEAR) < 0)
507 goto done;
508
509 for (i = 0; i < 8; i++) {
510 if (ret & BIT(i))
511 iio_push_event(indio_dev,
512 i & 0x1 ?
513 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
514 (i >> 1),
515 IIO_EV_TYPE_THRESH,
516 IIO_EV_DIR_RISING) :
517 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
518 (i >> 1),
519 IIO_EV_TYPE_THRESH,
520 IIO_EV_DIR_FALLING),
521 iio_get_time_ns(indio_dev));
522 }
523
524 done:
525 return IRQ_HANDLED;
526 }
527
528 static IIO_DEV_ATTR_SAMP_FREQ(0644,
529 ad799x_read_frequency,
530 ad799x_write_frequency);
531 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0");
532
533 static struct attribute *ad799x_event_attributes[] = {
534 &iio_dev_attr_sampling_frequency.dev_attr.attr,
535 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
536 NULL,
537 };
538
539 static const struct attribute_group ad799x_event_attrs_group = {
540 .attrs = ad799x_event_attributes,
541 };
542
543 static const struct iio_info ad7991_info = {
544 .read_raw = &ad799x_read_raw,
545 .update_scan_mode = ad799x_update_scan_mode,
546 };
547
548 static const struct iio_info ad7993_4_7_8_noirq_info = {
549 .read_raw = &ad799x_read_raw,
550 .update_scan_mode = ad799x_update_scan_mode,
551 };
552
553 static const struct iio_info ad7993_4_7_8_irq_info = {
554 .read_raw = &ad799x_read_raw,
555 .event_attrs = &ad799x_event_attrs_group,
556 .read_event_config = &ad799x_read_event_config,
557 .write_event_config = &ad799x_write_event_config,
558 .read_event_value = &ad799x_read_event_value,
559 .write_event_value = &ad799x_write_event_value,
560 .update_scan_mode = ad799x_update_scan_mode,
561 };
562
563 static const struct iio_event_spec ad799x_events[] = {
564 {
565 .type = IIO_EV_TYPE_THRESH,
566 .dir = IIO_EV_DIR_RISING,
567 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
568 BIT(IIO_EV_INFO_ENABLE),
569 }, {
570 .type = IIO_EV_TYPE_THRESH,
571 .dir = IIO_EV_DIR_FALLING,
572 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
573 BIT(IIO_EV_INFO_ENABLE),
574 }, {
575 .type = IIO_EV_TYPE_THRESH,
576 .dir = IIO_EV_DIR_EITHER,
577 .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
578 },
579 };
580
581 #define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \
582 .type = IIO_VOLTAGE, \
583 .indexed = 1, \
584 .channel = (_index), \
585 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
586 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
587 .scan_index = (_index), \
588 .scan_type = { \
589 .sign = 'u', \
590 .realbits = (_realbits), \
591 .storagebits = 16, \
592 .shift = 12 - (_realbits), \
593 .endianness = IIO_BE, \
594 }, \
595 .event_spec = _ev_spec, \
596 .num_event_specs = _num_ev_spec, \
597 }
598
599 #define AD799X_CHANNEL(_index, _realbits) \
600 _AD799X_CHANNEL(_index, _realbits, NULL, 0)
601
602 #define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \
603 _AD799X_CHANNEL(_index, _realbits, ad799x_events, \
604 ARRAY_SIZE(ad799x_events))
605
606 static const struct ad799x_chip_info ad799x_chip_info_tbl[] = {
607 [ad7991] = {
608 .num_channels = 5,
609 .noirq_config = {
610 .channel = {
611 AD799X_CHANNEL(0, 12),
612 AD799X_CHANNEL(1, 12),
613 AD799X_CHANNEL(2, 12),
614 AD799X_CHANNEL(3, 12),
615 IIO_CHAN_SOFT_TIMESTAMP(4),
616 },
617 .info = &ad7991_info,
618 },
619 },
620 [ad7995] = {
621 .num_channels = 5,
622 .noirq_config = {
623 .channel = {
624 AD799X_CHANNEL(0, 10),
625 AD799X_CHANNEL(1, 10),
626 AD799X_CHANNEL(2, 10),
627 AD799X_CHANNEL(3, 10),
628 IIO_CHAN_SOFT_TIMESTAMP(4),
629 },
630 .info = &ad7991_info,
631 },
632 },
633 [ad7999] = {
634 .num_channels = 5,
635 .noirq_config = {
636 .channel = {
637 AD799X_CHANNEL(0, 8),
638 AD799X_CHANNEL(1, 8),
639 AD799X_CHANNEL(2, 8),
640 AD799X_CHANNEL(3, 8),
641 IIO_CHAN_SOFT_TIMESTAMP(4),
642 },
643 .info = &ad7991_info,
644 },
645 },
646 [ad7992] = {
647 .num_channels = 3,
648 .noirq_config = {
649 .channel = {
650 AD799X_CHANNEL(0, 12),
651 AD799X_CHANNEL(1, 12),
652 IIO_CHAN_SOFT_TIMESTAMP(3),
653 },
654 .info = &ad7993_4_7_8_noirq_info,
655 },
656 .irq_config = {
657 .channel = {
658 AD799X_CHANNEL_WITH_EVENTS(0, 12),
659 AD799X_CHANNEL_WITH_EVENTS(1, 12),
660 IIO_CHAN_SOFT_TIMESTAMP(3),
661 },
662 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
663 .info = &ad7993_4_7_8_irq_info,
664 },
665 },
666 [ad7993] = {
667 .num_channels = 5,
668 .noirq_config = {
669 .channel = {
670 AD799X_CHANNEL(0, 10),
671 AD799X_CHANNEL(1, 10),
672 AD799X_CHANNEL(2, 10),
673 AD799X_CHANNEL(3, 10),
674 IIO_CHAN_SOFT_TIMESTAMP(4),
675 },
676 .info = &ad7993_4_7_8_noirq_info,
677 },
678 .irq_config = {
679 .channel = {
680 AD799X_CHANNEL_WITH_EVENTS(0, 10),
681 AD799X_CHANNEL_WITH_EVENTS(1, 10),
682 AD799X_CHANNEL_WITH_EVENTS(2, 10),
683 AD799X_CHANNEL_WITH_EVENTS(3, 10),
684 IIO_CHAN_SOFT_TIMESTAMP(4),
685 },
686 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
687 .info = &ad7993_4_7_8_irq_info,
688 },
689 },
690 [ad7994] = {
691 .num_channels = 5,
692 .noirq_config = {
693 .channel = {
694 AD799X_CHANNEL(0, 12),
695 AD799X_CHANNEL(1, 12),
696 AD799X_CHANNEL(2, 12),
697 AD799X_CHANNEL(3, 12),
698 IIO_CHAN_SOFT_TIMESTAMP(4),
699 },
700 .info = &ad7993_4_7_8_noirq_info,
701 },
702 .irq_config = {
703 .channel = {
704 AD799X_CHANNEL_WITH_EVENTS(0, 12),
705 AD799X_CHANNEL_WITH_EVENTS(1, 12),
706 AD799X_CHANNEL_WITH_EVENTS(2, 12),
707 AD799X_CHANNEL_WITH_EVENTS(3, 12),
708 IIO_CHAN_SOFT_TIMESTAMP(4),
709 },
710 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
711 .info = &ad7993_4_7_8_irq_info,
712 },
713 },
714 [ad7997] = {
715 .num_channels = 9,
716 .noirq_config = {
717 .channel = {
718 AD799X_CHANNEL(0, 10),
719 AD799X_CHANNEL(1, 10),
720 AD799X_CHANNEL(2, 10),
721 AD799X_CHANNEL(3, 10),
722 AD799X_CHANNEL(4, 10),
723 AD799X_CHANNEL(5, 10),
724 AD799X_CHANNEL(6, 10),
725 AD799X_CHANNEL(7, 10),
726 IIO_CHAN_SOFT_TIMESTAMP(8),
727 },
728 .info = &ad7993_4_7_8_noirq_info,
729 },
730 .irq_config = {
731 .channel = {
732 AD799X_CHANNEL_WITH_EVENTS(0, 10),
733 AD799X_CHANNEL_WITH_EVENTS(1, 10),
734 AD799X_CHANNEL_WITH_EVENTS(2, 10),
735 AD799X_CHANNEL_WITH_EVENTS(3, 10),
736 AD799X_CHANNEL(4, 10),
737 AD799X_CHANNEL(5, 10),
738 AD799X_CHANNEL(6, 10),
739 AD799X_CHANNEL(7, 10),
740 IIO_CHAN_SOFT_TIMESTAMP(8),
741 },
742 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
743 .info = &ad7993_4_7_8_irq_info,
744 },
745 },
746 [ad7998] = {
747 .num_channels = 9,
748 .noirq_config = {
749 .channel = {
750 AD799X_CHANNEL(0, 12),
751 AD799X_CHANNEL(1, 12),
752 AD799X_CHANNEL(2, 12),
753 AD799X_CHANNEL(3, 12),
754 AD799X_CHANNEL(4, 12),
755 AD799X_CHANNEL(5, 12),
756 AD799X_CHANNEL(6, 12),
757 AD799X_CHANNEL(7, 12),
758 IIO_CHAN_SOFT_TIMESTAMP(8),
759 },
760 .info = &ad7993_4_7_8_noirq_info,
761 },
762 .irq_config = {
763 .channel = {
764 AD799X_CHANNEL_WITH_EVENTS(0, 12),
765 AD799X_CHANNEL_WITH_EVENTS(1, 12),
766 AD799X_CHANNEL_WITH_EVENTS(2, 12),
767 AD799X_CHANNEL_WITH_EVENTS(3, 12),
768 AD799X_CHANNEL(4, 12),
769 AD799X_CHANNEL(5, 12),
770 AD799X_CHANNEL(6, 12),
771 AD799X_CHANNEL(7, 12),
772 IIO_CHAN_SOFT_TIMESTAMP(8),
773 },
774 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
775 .info = &ad7993_4_7_8_irq_info,
776 },
777 },
778 };
779
ad799x_probe(struct i2c_client * client)780 static int ad799x_probe(struct i2c_client *client)
781 {
782 const struct i2c_device_id *id = i2c_client_get_device_id(client);
783 int ret;
784 int extra_config = 0;
785 struct ad799x_state *st;
786 struct iio_dev *indio_dev;
787 const struct ad799x_chip_info *chip_info =
788 &ad799x_chip_info_tbl[id->driver_data];
789
790 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
791 if (indio_dev == NULL)
792 return -ENOMEM;
793
794 st = iio_priv(indio_dev);
795 /* this is only used for device removal purposes */
796 i2c_set_clientdata(client, indio_dev);
797
798 st->id = id->driver_data;
799 if (client->irq > 0 && chip_info->irq_config.info)
800 st->chip_config = &chip_info->irq_config;
801 else
802 st->chip_config = &chip_info->noirq_config;
803
804 /* TODO: Add pdata options for filtering and bit delay */
805
806 st->reg = devm_regulator_get(&client->dev, "vcc");
807 if (IS_ERR(st->reg))
808 return PTR_ERR(st->reg);
809 ret = regulator_enable(st->reg);
810 if (ret)
811 return ret;
812
813 /* check if an external reference is supplied */
814 st->vref = devm_regulator_get_optional(&client->dev, "vref");
815
816 if (IS_ERR(st->vref)) {
817 if (PTR_ERR(st->vref) == -ENODEV) {
818 st->vref = NULL;
819 dev_info(&client->dev, "Using VCC reference voltage\n");
820 } else {
821 ret = PTR_ERR(st->vref);
822 goto error_disable_reg;
823 }
824 }
825
826 if (st->vref) {
827 /*
828 * Use external reference voltage if supported by hardware.
829 * This is optional if voltage / regulator present, use VCC otherwise.
830 */
831 if ((st->id == ad7991) || (st->id == ad7995) || (st->id == ad7999)) {
832 dev_info(&client->dev, "Using external reference voltage\n");
833 extra_config |= AD7991_REF_SEL;
834 ret = regulator_enable(st->vref);
835 if (ret)
836 goto error_disable_reg;
837 } else {
838 st->vref = NULL;
839 dev_warn(&client->dev, "Supplied reference not supported\n");
840 }
841 }
842
843 st->client = client;
844
845 indio_dev->name = id->name;
846 indio_dev->info = st->chip_config->info;
847
848 indio_dev->modes = INDIO_DIRECT_MODE;
849 indio_dev->channels = st->chip_config->channel;
850 indio_dev->num_channels = chip_info->num_channels;
851
852 ret = ad799x_update_config(st, st->chip_config->default_config | extra_config);
853 if (ret)
854 goto error_disable_vref;
855
856 ret = iio_triggered_buffer_setup(indio_dev, NULL,
857 &ad799x_trigger_handler, NULL);
858 if (ret)
859 goto error_disable_vref;
860
861 if (client->irq > 0) {
862 ret = devm_request_threaded_irq(&client->dev,
863 client->irq,
864 NULL,
865 ad799x_event_handler,
866 IRQF_TRIGGER_FALLING |
867 IRQF_ONESHOT,
868 client->name,
869 indio_dev);
870 if (ret)
871 goto error_cleanup_ring;
872 }
873
874 mutex_init(&st->lock);
875
876 ret = iio_device_register(indio_dev);
877 if (ret)
878 goto error_cleanup_ring;
879
880 return 0;
881
882 error_cleanup_ring:
883 iio_triggered_buffer_cleanup(indio_dev);
884 error_disable_vref:
885 if (st->vref)
886 regulator_disable(st->vref);
887 error_disable_reg:
888 regulator_disable(st->reg);
889
890 return ret;
891 }
892
ad799x_remove(struct i2c_client * client)893 static void ad799x_remove(struct i2c_client *client)
894 {
895 struct iio_dev *indio_dev = i2c_get_clientdata(client);
896 struct ad799x_state *st = iio_priv(indio_dev);
897
898 iio_device_unregister(indio_dev);
899
900 iio_triggered_buffer_cleanup(indio_dev);
901 if (st->vref)
902 regulator_disable(st->vref);
903 regulator_disable(st->reg);
904 kfree(st->rx_buf);
905 }
906
ad799x_suspend(struct device * dev)907 static int ad799x_suspend(struct device *dev)
908 {
909 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
910 struct ad799x_state *st = iio_priv(indio_dev);
911
912 if (st->vref)
913 regulator_disable(st->vref);
914 regulator_disable(st->reg);
915
916 return 0;
917 }
918
ad799x_resume(struct device * dev)919 static int ad799x_resume(struct device *dev)
920 {
921 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
922 struct ad799x_state *st = iio_priv(indio_dev);
923 int ret;
924
925 ret = regulator_enable(st->reg);
926 if (ret) {
927 dev_err(dev, "Unable to enable vcc regulator\n");
928 return ret;
929 }
930
931 if (st->vref) {
932 ret = regulator_enable(st->vref);
933 if (ret) {
934 regulator_disable(st->reg);
935 dev_err(dev, "Unable to enable vref regulator\n");
936 return ret;
937 }
938 }
939
940 /* resync config */
941 ret = ad799x_update_config(st, st->config);
942 if (ret) {
943 if (st->vref)
944 regulator_disable(st->vref);
945 regulator_disable(st->reg);
946 return ret;
947 }
948
949 return 0;
950 }
951
952 static DEFINE_SIMPLE_DEV_PM_OPS(ad799x_pm_ops, ad799x_suspend, ad799x_resume);
953
954 static const struct i2c_device_id ad799x_id[] = {
955 { "ad7991", ad7991 },
956 { "ad7995", ad7995 },
957 { "ad7999", ad7999 },
958 { "ad7992", ad7992 },
959 { "ad7993", ad7993 },
960 { "ad7994", ad7994 },
961 { "ad7997", ad7997 },
962 { "ad7998", ad7998 },
963 {}
964 };
965
966 MODULE_DEVICE_TABLE(i2c, ad799x_id);
967
968 static struct i2c_driver ad799x_driver = {
969 .driver = {
970 .name = "ad799x",
971 .pm = pm_sleep_ptr(&ad799x_pm_ops),
972 },
973 .probe = ad799x_probe,
974 .remove = ad799x_remove,
975 .id_table = ad799x_id,
976 };
977 module_i2c_driver(ad799x_driver);
978
979 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
980 MODULE_DESCRIPTION("Analog Devices AD799x ADC");
981 MODULE_LICENSE("GPL v2");
982