1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Analog Devices AD7944/85/86 PulSAR ADC family driver. 4 * 5 * Copyright 2024 Analog Devices, Inc. 6 * Copyright 2024 BayLibre, SAS 7 */ 8 9 #include <linux/bitfield.h> 10 #include <linux/bitops.h> 11 #include <linux/delay.h> 12 #include <linux/device.h> 13 #include <linux/err.h> 14 #include <linux/gpio/consumer.h> 15 #include <linux/module.h> 16 #include <linux/property.h> 17 #include <linux/regulator/consumer.h> 18 #include <linux/spi/spi.h> 19 #include <linux/string_helpers.h> 20 21 #include <linux/iio/iio.h> 22 #include <linux/iio/sysfs.h> 23 #include <linux/iio/trigger_consumer.h> 24 #include <linux/iio/triggered_buffer.h> 25 26 #define AD7944_INTERNAL_REF_MV 4096 27 28 struct ad7944_timing_spec { 29 /* Normal mode max conversion time (t_{CONV}). */ 30 unsigned int conv_ns; 31 /* TURBO mode max conversion time (t_{CONV}). */ 32 unsigned int turbo_conv_ns; 33 }; 34 35 enum ad7944_spi_mode { 36 /* datasheet calls this "4-wire mode" */ 37 AD7944_SPI_MODE_DEFAULT, 38 /* datasheet calls this "3-wire mode" (not related to SPI_3WIRE!) */ 39 AD7944_SPI_MODE_SINGLE, 40 /* datasheet calls this "chain mode" */ 41 AD7944_SPI_MODE_CHAIN, 42 }; 43 44 /* maps adi,spi-mode property value to enum */ 45 static const char * const ad7944_spi_modes[] = { 46 [AD7944_SPI_MODE_DEFAULT] = "", 47 [AD7944_SPI_MODE_SINGLE] = "single", 48 [AD7944_SPI_MODE_CHAIN] = "chain", 49 }; 50 51 struct ad7944_adc { 52 struct spi_device *spi; 53 enum ad7944_spi_mode spi_mode; 54 struct spi_transfer xfers[3]; 55 struct spi_message msg; 56 /* Chip-specific timing specifications. */ 57 const struct ad7944_timing_spec *timing_spec; 58 /* GPIO connected to CNV pin. */ 59 struct gpio_desc *cnv; 60 /* Optional GPIO to enable turbo mode. */ 61 struct gpio_desc *turbo; 62 /* Indicates TURBO is hard-wired to be always enabled. */ 63 bool always_turbo; 64 /* Reference voltage (millivolts). */ 65 unsigned int ref_mv; 66 67 /* 68 * DMA (thus cache coherency maintenance) requires the 69 * transfer buffers to live in their own cache lines. 70 */ 71 struct { 72 union { 73 u16 u16; 74 u32 u32; 75 } raw; 76 u64 timestamp __aligned(8); 77 } sample __aligned(IIO_DMA_MINALIGN); 78 }; 79 80 /* quite time before CNV rising edge */ 81 #define T_QUIET_NS 20 82 83 static const struct ad7944_timing_spec ad7944_timing_spec = { 84 .conv_ns = 420, 85 .turbo_conv_ns = 320, 86 }; 87 88 static const struct ad7944_timing_spec ad7986_timing_spec = { 89 .conv_ns = 500, 90 .turbo_conv_ns = 400, 91 }; 92 93 struct ad7944_chip_info { 94 const char *name; 95 const struct ad7944_timing_spec *timing_spec; 96 const struct iio_chan_spec channels[2]; 97 }; 98 99 /* 100 * AD7944_DEFINE_CHIP_INFO - Define a chip info structure for a specific chip 101 * @_name: The name of the chip 102 * @_ts: The timing specification for the chip 103 * @_bits: The number of bits in the conversion result 104 * @_diff: Whether the chip is true differential or not 105 */ 106 #define AD7944_DEFINE_CHIP_INFO(_name, _ts, _bits, _diff) \ 107 static const struct ad7944_chip_info _name##_chip_info = { \ 108 .name = #_name, \ 109 .timing_spec = &_ts##_timing_spec, \ 110 .channels = { \ 111 { \ 112 .type = IIO_VOLTAGE, \ 113 .indexed = 1, \ 114 .differential = _diff, \ 115 .channel = 0, \ 116 .channel2 = _diff ? 1 : 0, \ 117 .scan_index = 0, \ 118 .scan_type.sign = _diff ? 's' : 'u', \ 119 .scan_type.realbits = _bits, \ 120 .scan_type.storagebits = _bits > 16 ? 32 : 16, \ 121 .scan_type.endianness = IIO_CPU, \ 122 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \ 123 | BIT(IIO_CHAN_INFO_SCALE), \ 124 }, \ 125 IIO_CHAN_SOFT_TIMESTAMP(1), \ 126 }, \ 127 } 128 129 /* pseudo-differential with ground sense */ 130 AD7944_DEFINE_CHIP_INFO(ad7944, ad7944, 14, 0); 131 AD7944_DEFINE_CHIP_INFO(ad7985, ad7944, 16, 0); 132 /* fully differential */ 133 AD7944_DEFINE_CHIP_INFO(ad7986, ad7986, 18, 1); 134 135 static void ad7944_unoptimize_msg(void *msg) 136 { 137 spi_unoptimize_message(msg); 138 } 139 140 static int ad7944_3wire_cs_mode_init_msg(struct device *dev, struct ad7944_adc *adc, 141 const struct iio_chan_spec *chan) 142 { 143 unsigned int t_conv_ns = adc->always_turbo ? adc->timing_spec->turbo_conv_ns 144 : adc->timing_spec->conv_ns; 145 struct spi_transfer *xfers = adc->xfers; 146 int ret; 147 148 /* 149 * NB: can get better performance from some SPI controllers if we use 150 * the same bits_per_word in every transfer. 151 */ 152 xfers[0].bits_per_word = chan->scan_type.realbits; 153 /* 154 * CS is tied to CNV and we need a low to high transition to start the 155 * conversion, so place CNV low for t_QUIET to prepare for this. 156 */ 157 xfers[0].delay.value = T_QUIET_NS; 158 xfers[0].delay.unit = SPI_DELAY_UNIT_NSECS; 159 160 /* 161 * CS has to be high for full conversion time to avoid triggering the 162 * busy indication. 163 */ 164 xfers[1].cs_off = 1; 165 xfers[1].delay.value = t_conv_ns; 166 xfers[1].delay.unit = SPI_DELAY_UNIT_NSECS; 167 xfers[1].bits_per_word = chan->scan_type.realbits; 168 169 /* Then we can read the data during the acquisition phase */ 170 xfers[2].rx_buf = &adc->sample.raw; 171 xfers[2].len = BITS_TO_BYTES(chan->scan_type.storagebits); 172 xfers[2].bits_per_word = chan->scan_type.realbits; 173 174 spi_message_init_with_transfers(&adc->msg, xfers, 3); 175 176 ret = spi_optimize_message(adc->spi, &adc->msg); 177 if (ret) 178 return ret; 179 180 return devm_add_action_or_reset(dev, ad7944_unoptimize_msg, &adc->msg); 181 } 182 183 static int ad7944_4wire_mode_init_msg(struct device *dev, struct ad7944_adc *adc, 184 const struct iio_chan_spec *chan) 185 { 186 unsigned int t_conv_ns = adc->always_turbo ? adc->timing_spec->turbo_conv_ns 187 : adc->timing_spec->conv_ns; 188 struct spi_transfer *xfers = adc->xfers; 189 int ret; 190 191 /* 192 * NB: can get better performance from some SPI controllers if we use 193 * the same bits_per_word in every transfer. 194 */ 195 xfers[0].bits_per_word = chan->scan_type.realbits; 196 /* 197 * CS has to be high for full conversion time to avoid triggering the 198 * busy indication. 199 */ 200 xfers[0].cs_off = 1; 201 xfers[0].delay.value = t_conv_ns; 202 xfers[0].delay.unit = SPI_DELAY_UNIT_NSECS; 203 204 xfers[1].rx_buf = &adc->sample.raw; 205 xfers[1].len = BITS_TO_BYTES(chan->scan_type.storagebits); 206 xfers[1].bits_per_word = chan->scan_type.realbits; 207 208 spi_message_init_with_transfers(&adc->msg, xfers, 2); 209 210 ret = spi_optimize_message(adc->spi, &adc->msg); 211 if (ret) 212 return ret; 213 214 return devm_add_action_or_reset(dev, ad7944_unoptimize_msg, &adc->msg); 215 } 216 217 /** 218 * ad7944_convert_and_acquire - Perform a single conversion and acquisition 219 * @adc: The ADC device structure 220 * @chan: The channel specification 221 * Return: 0 on success, a negative error code on failure 222 * 223 * Perform a conversion and acquisition of a single sample using the 224 * pre-optimized adc->msg. 225 * 226 * Upon successful return adc->sample.raw will contain the conversion result. 227 */ 228 static int ad7944_convert_and_acquire(struct ad7944_adc *adc, 229 const struct iio_chan_spec *chan) 230 { 231 int ret; 232 233 /* 234 * In 4-wire mode, the CNV line is held high for the entire conversion 235 * and acquisition process. In other modes adc->cnv is NULL and is 236 * ignored (CS is wired to CNV in those cases). 237 */ 238 gpiod_set_value_cansleep(adc->cnv, 1); 239 ret = spi_sync(adc->spi, &adc->msg); 240 gpiod_set_value_cansleep(adc->cnv, 0); 241 242 return ret; 243 } 244 245 static int ad7944_single_conversion(struct ad7944_adc *adc, 246 const struct iio_chan_spec *chan, 247 int *val) 248 { 249 int ret; 250 251 ret = ad7944_convert_and_acquire(adc, chan); 252 if (ret) 253 return ret; 254 255 if (chan->scan_type.storagebits > 16) 256 *val = adc->sample.raw.u32; 257 else 258 *val = adc->sample.raw.u16; 259 260 if (chan->scan_type.sign == 's') 261 *val = sign_extend32(*val, chan->scan_type.realbits - 1); 262 263 return IIO_VAL_INT; 264 } 265 266 static int ad7944_read_raw(struct iio_dev *indio_dev, 267 const struct iio_chan_spec *chan, 268 int *val, int *val2, long info) 269 { 270 struct ad7944_adc *adc = iio_priv(indio_dev); 271 int ret; 272 273 switch (info) { 274 case IIO_CHAN_INFO_RAW: 275 ret = iio_device_claim_direct_mode(indio_dev); 276 if (ret) 277 return ret; 278 279 ret = ad7944_single_conversion(adc, chan, val); 280 iio_device_release_direct_mode(indio_dev); 281 return ret; 282 283 case IIO_CHAN_INFO_SCALE: 284 switch (chan->type) { 285 case IIO_VOLTAGE: 286 *val = adc->ref_mv; 287 288 if (chan->scan_type.sign == 's') 289 *val2 = chan->scan_type.realbits - 1; 290 else 291 *val2 = chan->scan_type.realbits; 292 293 return IIO_VAL_FRACTIONAL_LOG2; 294 default: 295 return -EINVAL; 296 } 297 298 default: 299 return -EINVAL; 300 } 301 } 302 303 static const struct iio_info ad7944_iio_info = { 304 .read_raw = &ad7944_read_raw, 305 }; 306 307 static irqreturn_t ad7944_trigger_handler(int irq, void *p) 308 { 309 struct iio_poll_func *pf = p; 310 struct iio_dev *indio_dev = pf->indio_dev; 311 struct ad7944_adc *adc = iio_priv(indio_dev); 312 int ret; 313 314 ret = ad7944_convert_and_acquire(adc, &indio_dev->channels[0]); 315 if (ret) 316 goto out; 317 318 iio_push_to_buffers_with_timestamp(indio_dev, &adc->sample.raw, 319 pf->timestamp); 320 321 out: 322 iio_trigger_notify_done(indio_dev->trig); 323 324 return IRQ_HANDLED; 325 } 326 327 static const char * const ad7944_power_supplies[] = { 328 "avdd", "dvdd", "bvdd", "vio" 329 }; 330 331 static void ad7944_ref_disable(void *ref) 332 { 333 regulator_disable(ref); 334 } 335 336 static int ad7944_probe(struct spi_device *spi) 337 { 338 const struct ad7944_chip_info *chip_info; 339 struct device *dev = &spi->dev; 340 struct iio_dev *indio_dev; 341 struct ad7944_adc *adc; 342 bool have_refin = false; 343 struct regulator *ref; 344 int ret; 345 346 indio_dev = devm_iio_device_alloc(dev, sizeof(*adc)); 347 if (!indio_dev) 348 return -ENOMEM; 349 350 adc = iio_priv(indio_dev); 351 adc->spi = spi; 352 353 chip_info = spi_get_device_match_data(spi); 354 if (!chip_info) 355 return dev_err_probe(dev, -EINVAL, "no chip info\n"); 356 357 adc->timing_spec = chip_info->timing_spec; 358 359 ret = device_property_match_property_string(dev, "adi,spi-mode", 360 ad7944_spi_modes, 361 ARRAY_SIZE(ad7944_spi_modes)); 362 /* absence of adi,spi-mode property means default mode */ 363 if (ret == -EINVAL) 364 adc->spi_mode = AD7944_SPI_MODE_DEFAULT; 365 else if (ret < 0) 366 return dev_err_probe(dev, ret, 367 "getting adi,spi-mode property failed\n"); 368 else 369 adc->spi_mode = ret; 370 371 /* 372 * Some chips use unusual word sizes, so check now instead of waiting 373 * for the first xfer. 374 */ 375 if (!spi_is_bpw_supported(spi, chip_info->channels[0].scan_type.realbits)) 376 return dev_err_probe(dev, -EINVAL, 377 "SPI host does not support %d bits per word\n", 378 chip_info->channels[0].scan_type.realbits); 379 380 ret = devm_regulator_bulk_get_enable(dev, 381 ARRAY_SIZE(ad7944_power_supplies), 382 ad7944_power_supplies); 383 if (ret) 384 return dev_err_probe(dev, ret, 385 "failed to get and enable supplies\n"); 386 387 /* 388 * Sort out what is being used for the reference voltage. Options are: 389 * - internal reference: neither REF or REFIN is connected 390 * - internal reference with external buffer: REF not connected, REFIN 391 * is connected 392 * - external reference: REF is connected, REFIN is not connected 393 */ 394 395 ref = devm_regulator_get_optional(dev, "ref"); 396 if (IS_ERR(ref)) { 397 if (PTR_ERR(ref) != -ENODEV) 398 return dev_err_probe(dev, PTR_ERR(ref), 399 "failed to get REF supply\n"); 400 401 ref = NULL; 402 } 403 404 ret = devm_regulator_get_enable_optional(dev, "refin"); 405 if (ret == 0) 406 have_refin = true; 407 else if (ret != -ENODEV) 408 return dev_err_probe(dev, ret, 409 "failed to get and enable REFIN supply\n"); 410 411 if (have_refin && ref) 412 return dev_err_probe(dev, -EINVAL, 413 "cannot have both refin and ref supplies\n"); 414 415 if (ref) { 416 ret = regulator_enable(ref); 417 if (ret) 418 return dev_err_probe(dev, ret, 419 "failed to enable REF supply\n"); 420 421 ret = devm_add_action_or_reset(dev, ad7944_ref_disable, ref); 422 if (ret) 423 return ret; 424 425 ret = regulator_get_voltage(ref); 426 if (ret < 0) 427 return dev_err_probe(dev, ret, 428 "failed to get REF voltage\n"); 429 430 /* external reference */ 431 adc->ref_mv = ret / 1000; 432 } else { 433 /* internal reference */ 434 adc->ref_mv = AD7944_INTERNAL_REF_MV; 435 } 436 437 adc->cnv = devm_gpiod_get_optional(dev, "cnv", GPIOD_OUT_LOW); 438 if (IS_ERR(adc->cnv)) 439 return dev_err_probe(dev, PTR_ERR(adc->cnv), 440 "failed to get CNV GPIO\n"); 441 442 if (!adc->cnv && adc->spi_mode == AD7944_SPI_MODE_DEFAULT) 443 return dev_err_probe(&spi->dev, -EINVAL, "CNV GPIO is required\n"); 444 if (adc->cnv && adc->spi_mode != AD7944_SPI_MODE_DEFAULT) 445 return dev_err_probe(&spi->dev, -EINVAL, 446 "CNV GPIO in single and chain mode is not currently supported\n"); 447 448 adc->turbo = devm_gpiod_get_optional(dev, "turbo", GPIOD_OUT_LOW); 449 if (IS_ERR(adc->turbo)) 450 return dev_err_probe(dev, PTR_ERR(adc->turbo), 451 "failed to get TURBO GPIO\n"); 452 453 adc->always_turbo = device_property_present(dev, "adi,always-turbo"); 454 455 if (adc->turbo && adc->always_turbo) 456 return dev_err_probe(dev, -EINVAL, 457 "cannot have both turbo-gpios and adi,always-turbo\n"); 458 459 if (adc->spi_mode == AD7944_SPI_MODE_CHAIN && adc->always_turbo) 460 return dev_err_probe(dev, -EINVAL, 461 "cannot have both chain mode and always turbo\n"); 462 463 switch (adc->spi_mode) { 464 case AD7944_SPI_MODE_DEFAULT: 465 ret = ad7944_4wire_mode_init_msg(dev, adc, &chip_info->channels[0]); 466 if (ret) 467 return ret; 468 469 break; 470 case AD7944_SPI_MODE_SINGLE: 471 ret = ad7944_3wire_cs_mode_init_msg(dev, adc, &chip_info->channels[0]); 472 if (ret) 473 return ret; 474 475 break; 476 case AD7944_SPI_MODE_CHAIN: 477 return dev_err_probe(dev, -EINVAL, "chain mode is not implemented\n"); 478 } 479 480 indio_dev->name = chip_info->name; 481 indio_dev->modes = INDIO_DIRECT_MODE; 482 indio_dev->info = &ad7944_iio_info; 483 indio_dev->channels = chip_info->channels; 484 indio_dev->num_channels = ARRAY_SIZE(chip_info->channels); 485 486 ret = devm_iio_triggered_buffer_setup(dev, indio_dev, 487 iio_pollfunc_store_time, 488 ad7944_trigger_handler, NULL); 489 if (ret) 490 return ret; 491 492 return devm_iio_device_register(dev, indio_dev); 493 } 494 495 static const struct of_device_id ad7944_of_match[] = { 496 { .compatible = "adi,ad7944", .data = &ad7944_chip_info }, 497 { .compatible = "adi,ad7985", .data = &ad7985_chip_info }, 498 { .compatible = "adi,ad7986", .data = &ad7986_chip_info }, 499 { } 500 }; 501 MODULE_DEVICE_TABLE(of, ad7944_of_match); 502 503 static const struct spi_device_id ad7944_spi_id[] = { 504 { "ad7944", (kernel_ulong_t)&ad7944_chip_info }, 505 { "ad7985", (kernel_ulong_t)&ad7985_chip_info }, 506 { "ad7986", (kernel_ulong_t)&ad7986_chip_info }, 507 { } 508 509 }; 510 MODULE_DEVICE_TABLE(spi, ad7944_spi_id); 511 512 static struct spi_driver ad7944_driver = { 513 .driver = { 514 .name = "ad7944", 515 .of_match_table = ad7944_of_match, 516 }, 517 .probe = ad7944_probe, 518 .id_table = ad7944_spi_id, 519 }; 520 module_spi_driver(ad7944_driver); 521 522 MODULE_AUTHOR("David Lechner <dlechner@baylibre.com>"); 523 MODULE_DESCRIPTION("Analog Devices AD7944 PulSAR ADC family driver"); 524 MODULE_LICENSE("GPL"); 525