1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * AD7887 SPI ADC driver 4 * 5 * Copyright 2010-2011 Analog Devices Inc. 6 */ 7 8 #include <linux/device.h> 9 #include <linux/kernel.h> 10 #include <linux/slab.h> 11 #include <linux/sysfs.h> 12 #include <linux/spi/spi.h> 13 #include <linux/regulator/consumer.h> 14 #include <linux/err.h> 15 #include <linux/module.h> 16 #include <linux/interrupt.h> 17 #include <linux/bitops.h> 18 19 #include <linux/iio/iio.h> 20 #include <linux/iio/sysfs.h> 21 #include <linux/iio/buffer.h> 22 23 #include <linux/iio/trigger_consumer.h> 24 #include <linux/iio/triggered_buffer.h> 25 26 #include <linux/platform_data/ad7887.h> 27 28 #define AD7887_REF_DIS BIT(5) /* on-chip reference disable */ 29 #define AD7887_DUAL BIT(4) /* dual-channel mode */ 30 #define AD7887_CH_AIN1 BIT(3) /* convert on channel 1, DUAL=1 */ 31 #define AD7887_CH_AIN0 0 /* convert on channel 0, DUAL=0,1 */ 32 #define AD7887_PM_MODE1 0 /* CS based shutdown */ 33 #define AD7887_PM_MODE2 1 /* full on */ 34 #define AD7887_PM_MODE3 2 /* auto shutdown after conversion */ 35 #define AD7887_PM_MODE4 3 /* standby mode */ 36 37 enum ad7887_channels { 38 AD7887_CH0, 39 AD7887_CH0_CH1, 40 AD7887_CH1, 41 }; 42 43 /** 44 * struct ad7887_chip_info - chip specifc information 45 * @int_vref_mv: the internal reference voltage 46 * @channels: channels specification 47 * @num_channels: number of channels 48 * @dual_channels: channels specification in dual mode 49 * @num_dual_channels: number of channels in dual mode 50 */ 51 struct ad7887_chip_info { 52 u16 int_vref_mv; 53 const struct iio_chan_spec *channels; 54 unsigned int num_channels; 55 const struct iio_chan_spec *dual_channels; 56 unsigned int num_dual_channels; 57 }; 58 59 struct ad7887_state { 60 struct spi_device *spi; 61 const struct ad7887_chip_info *chip_info; 62 struct regulator *reg; 63 struct spi_transfer xfer[4]; 64 struct spi_message msg[3]; 65 struct spi_message *ring_msg; 66 unsigned char tx_cmd_buf[4]; 67 68 /* 69 * DMA (thus cache coherency maintenance) requires the 70 * transfer buffers to live in their own cache lines. 71 * Buffer needs to be large enough to hold two 16 bit samples and a 72 * 64 bit aligned 64 bit timestamp. 73 */ 74 unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)] 75 ____cacheline_aligned; 76 }; 77 78 enum ad7887_supported_device_ids { 79 ID_AD7887 80 }; 81 82 static int ad7887_ring_preenable(struct iio_dev *indio_dev) 83 { 84 struct ad7887_state *st = iio_priv(indio_dev); 85 86 /* We know this is a single long so can 'cheat' */ 87 switch (*indio_dev->active_scan_mask) { 88 case (1 << 0): 89 st->ring_msg = &st->msg[AD7887_CH0]; 90 break; 91 case (1 << 1): 92 st->ring_msg = &st->msg[AD7887_CH1]; 93 /* Dummy read: push CH1 setting down to hardware */ 94 spi_sync(st->spi, st->ring_msg); 95 break; 96 case ((1 << 1) | (1 << 0)): 97 st->ring_msg = &st->msg[AD7887_CH0_CH1]; 98 break; 99 } 100 101 return 0; 102 } 103 104 static int ad7887_ring_postdisable(struct iio_dev *indio_dev) 105 { 106 struct ad7887_state *st = iio_priv(indio_dev); 107 108 /* dummy read: restore default CH0 settin */ 109 return spi_sync(st->spi, &st->msg[AD7887_CH0]); 110 } 111 112 /* 113 * ad7887_trigger_handler() bh of trigger launched polling to ring buffer 114 * 115 * Currently there is no option in this driver to disable the saving of 116 * timestamps within the ring. 117 **/ 118 static irqreturn_t ad7887_trigger_handler(int irq, void *p) 119 { 120 struct iio_poll_func *pf = p; 121 struct iio_dev *indio_dev = pf->indio_dev; 122 struct ad7887_state *st = iio_priv(indio_dev); 123 int b_sent; 124 125 b_sent = spi_sync(st->spi, st->ring_msg); 126 if (b_sent) 127 goto done; 128 129 iio_push_to_buffers_with_timestamp(indio_dev, st->data, 130 iio_get_time_ns(indio_dev)); 131 done: 132 iio_trigger_notify_done(indio_dev->trig); 133 134 return IRQ_HANDLED; 135 } 136 137 static const struct iio_buffer_setup_ops ad7887_ring_setup_ops = { 138 .preenable = &ad7887_ring_preenable, 139 .postdisable = &ad7887_ring_postdisable, 140 }; 141 142 static int ad7887_scan_direct(struct ad7887_state *st, unsigned ch) 143 { 144 int ret = spi_sync(st->spi, &st->msg[ch]); 145 if (ret) 146 return ret; 147 148 return (st->data[(ch * 2)] << 8) | st->data[(ch * 2) + 1]; 149 } 150 151 static int ad7887_read_raw(struct iio_dev *indio_dev, 152 struct iio_chan_spec const *chan, 153 int *val, 154 int *val2, 155 long m) 156 { 157 int ret; 158 struct ad7887_state *st = iio_priv(indio_dev); 159 160 switch (m) { 161 case IIO_CHAN_INFO_RAW: 162 ret = iio_device_claim_direct_mode(indio_dev); 163 if (ret) 164 return ret; 165 ret = ad7887_scan_direct(st, chan->address); 166 iio_device_release_direct_mode(indio_dev); 167 168 if (ret < 0) 169 return ret; 170 *val = ret >> chan->scan_type.shift; 171 *val &= GENMASK(chan->scan_type.realbits - 1, 0); 172 return IIO_VAL_INT; 173 case IIO_CHAN_INFO_SCALE: 174 if (st->reg) { 175 *val = regulator_get_voltage(st->reg); 176 if (*val < 0) 177 return *val; 178 *val /= 1000; 179 } else { 180 *val = st->chip_info->int_vref_mv; 181 } 182 183 *val2 = chan->scan_type.realbits; 184 185 return IIO_VAL_FRACTIONAL_LOG2; 186 } 187 return -EINVAL; 188 } 189 190 #define AD7887_CHANNEL(x) { \ 191 .type = IIO_VOLTAGE, \ 192 .indexed = 1, \ 193 .channel = (x), \ 194 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 195 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 196 .address = (x), \ 197 .scan_index = (x), \ 198 .scan_type = { \ 199 .sign = 'u', \ 200 .realbits = 12, \ 201 .storagebits = 16, \ 202 .shift = 0, \ 203 .endianness = IIO_BE, \ 204 }, \ 205 } 206 207 static const struct iio_chan_spec ad7887_channels[] = { 208 AD7887_CHANNEL(0), 209 IIO_CHAN_SOFT_TIMESTAMP(1), 210 }; 211 212 static const struct iio_chan_spec ad7887_dual_channels[] = { 213 AD7887_CHANNEL(0), 214 AD7887_CHANNEL(1), 215 IIO_CHAN_SOFT_TIMESTAMP(2), 216 }; 217 218 static const struct ad7887_chip_info ad7887_chip_info_tbl[] = { 219 /* 220 * More devices added in future 221 */ 222 [ID_AD7887] = { 223 .channels = ad7887_channels, 224 .num_channels = ARRAY_SIZE(ad7887_channels), 225 .dual_channels = ad7887_dual_channels, 226 .num_dual_channels = ARRAY_SIZE(ad7887_dual_channels), 227 .int_vref_mv = 2500, 228 }, 229 }; 230 231 static const struct iio_info ad7887_info = { 232 .read_raw = &ad7887_read_raw, 233 }; 234 235 static void ad7887_reg_disable(void *data) 236 { 237 struct regulator *reg = data; 238 239 regulator_disable(reg); 240 } 241 242 static int ad7887_probe(struct spi_device *spi) 243 { 244 struct ad7887_platform_data *pdata = spi->dev.platform_data; 245 struct ad7887_state *st; 246 struct iio_dev *indio_dev; 247 uint8_t mode; 248 int ret; 249 250 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 251 if (indio_dev == NULL) 252 return -ENOMEM; 253 254 st = iio_priv(indio_dev); 255 256 st->reg = devm_regulator_get_optional(&spi->dev, "vref"); 257 if (IS_ERR(st->reg)) { 258 if (PTR_ERR(st->reg) != -ENODEV) 259 return PTR_ERR(st->reg); 260 261 st->reg = NULL; 262 } 263 264 if (st->reg) { 265 ret = regulator_enable(st->reg); 266 if (ret) 267 return ret; 268 269 ret = devm_add_action_or_reset(&spi->dev, ad7887_reg_disable, st->reg); 270 if (ret) 271 return ret; 272 } 273 274 st->chip_info = 275 &ad7887_chip_info_tbl[spi_get_device_id(spi)->driver_data]; 276 277 spi_set_drvdata(spi, indio_dev); 278 st->spi = spi; 279 280 indio_dev->name = spi_get_device_id(spi)->name; 281 indio_dev->info = &ad7887_info; 282 indio_dev->modes = INDIO_DIRECT_MODE; 283 284 /* Setup default message */ 285 286 mode = AD7887_PM_MODE4; 287 if (!st->reg) 288 mode |= AD7887_REF_DIS; 289 if (pdata && pdata->en_dual) 290 mode |= AD7887_DUAL; 291 292 st->tx_cmd_buf[0] = AD7887_CH_AIN0 | mode; 293 294 st->xfer[0].rx_buf = &st->data[0]; 295 st->xfer[0].tx_buf = &st->tx_cmd_buf[0]; 296 st->xfer[0].len = 2; 297 298 spi_message_init(&st->msg[AD7887_CH0]); 299 spi_message_add_tail(&st->xfer[0], &st->msg[AD7887_CH0]); 300 301 if (pdata && pdata->en_dual) { 302 st->tx_cmd_buf[2] = AD7887_CH_AIN1 | mode; 303 304 st->xfer[1].rx_buf = &st->data[0]; 305 st->xfer[1].tx_buf = &st->tx_cmd_buf[2]; 306 st->xfer[1].len = 2; 307 308 st->xfer[2].rx_buf = &st->data[2]; 309 st->xfer[2].tx_buf = &st->tx_cmd_buf[0]; 310 st->xfer[2].len = 2; 311 312 spi_message_init(&st->msg[AD7887_CH0_CH1]); 313 spi_message_add_tail(&st->xfer[1], &st->msg[AD7887_CH0_CH1]); 314 spi_message_add_tail(&st->xfer[2], &st->msg[AD7887_CH0_CH1]); 315 316 st->xfer[3].rx_buf = &st->data[2]; 317 st->xfer[3].tx_buf = &st->tx_cmd_buf[2]; 318 st->xfer[3].len = 2; 319 320 spi_message_init(&st->msg[AD7887_CH1]); 321 spi_message_add_tail(&st->xfer[3], &st->msg[AD7887_CH1]); 322 323 indio_dev->channels = st->chip_info->dual_channels; 324 indio_dev->num_channels = st->chip_info->num_dual_channels; 325 } else { 326 indio_dev->channels = st->chip_info->channels; 327 indio_dev->num_channels = st->chip_info->num_channels; 328 } 329 330 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, 331 &iio_pollfunc_store_time, 332 &ad7887_trigger_handler, &ad7887_ring_setup_ops); 333 if (ret) 334 return ret; 335 336 return devm_iio_device_register(&spi->dev, indio_dev); 337 } 338 339 static const struct spi_device_id ad7887_id[] = { 340 {"ad7887", ID_AD7887}, 341 {} 342 }; 343 MODULE_DEVICE_TABLE(spi, ad7887_id); 344 345 static struct spi_driver ad7887_driver = { 346 .driver = { 347 .name = "ad7887", 348 }, 349 .probe = ad7887_probe, 350 .id_table = ad7887_id, 351 }; 352 module_spi_driver(ad7887_driver); 353 354 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); 355 MODULE_DESCRIPTION("Analog Devices AD7887 ADC"); 356 MODULE_LICENSE("GPL v2"); 357