1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * AD7887 SPI ADC driver 4 * 5 * Copyright 2010-2011 Analog Devices Inc. 6 */ 7 8 #include <linux/device.h> 9 #include <linux/kernel.h> 10 #include <linux/slab.h> 11 #include <linux/sysfs.h> 12 #include <linux/spi/spi.h> 13 #include <linux/regulator/consumer.h> 14 #include <linux/err.h> 15 #include <linux/module.h> 16 #include <linux/interrupt.h> 17 #include <linux/bitops.h> 18 19 #include <linux/iio/iio.h> 20 #include <linux/iio/sysfs.h> 21 #include <linux/iio/buffer.h> 22 23 #include <linux/iio/trigger_consumer.h> 24 #include <linux/iio/triggered_buffer.h> 25 26 #include <linux/platform_data/ad7887.h> 27 28 #define AD7887_REF_DIS BIT(5) /* on-chip reference disable */ 29 #define AD7887_DUAL BIT(4) /* dual-channel mode */ 30 #define AD7887_CH_AIN1 BIT(3) /* convert on channel 1, DUAL=1 */ 31 #define AD7887_CH_AIN0 0 /* convert on channel 0, DUAL=0,1 */ 32 #define AD7887_PM_MODE1 0 /* CS based shutdown */ 33 #define AD7887_PM_MODE2 1 /* full on */ 34 #define AD7887_PM_MODE3 2 /* auto shutdown after conversion */ 35 #define AD7887_PM_MODE4 3 /* standby mode */ 36 37 enum ad7887_channels { 38 AD7887_CH0, 39 AD7887_CH0_CH1, 40 AD7887_CH1, 41 }; 42 43 /** 44 * struct ad7887_chip_info - chip specifc information 45 * @int_vref_mv: the internal reference voltage 46 * @channel: channel specification 47 */ 48 struct ad7887_chip_info { 49 u16 int_vref_mv; 50 struct iio_chan_spec channel[3]; 51 }; 52 53 struct ad7887_state { 54 struct spi_device *spi; 55 const struct ad7887_chip_info *chip_info; 56 struct regulator *reg; 57 struct spi_transfer xfer[4]; 58 struct spi_message msg[3]; 59 struct spi_message *ring_msg; 60 unsigned char tx_cmd_buf[4]; 61 62 /* 63 * DMA (thus cache coherency maintenance) requires the 64 * transfer buffers to live in their own cache lines. 65 * Buffer needs to be large enough to hold two 16 bit samples and a 66 * 64 bit aligned 64 bit timestamp. 67 */ 68 unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)] 69 ____cacheline_aligned; 70 }; 71 72 enum ad7887_supported_device_ids { 73 ID_AD7887 74 }; 75 76 static int ad7887_ring_preenable(struct iio_dev *indio_dev) 77 { 78 struct ad7887_state *st = iio_priv(indio_dev); 79 80 /* We know this is a single long so can 'cheat' */ 81 switch (*indio_dev->active_scan_mask) { 82 case (1 << 0): 83 st->ring_msg = &st->msg[AD7887_CH0]; 84 break; 85 case (1 << 1): 86 st->ring_msg = &st->msg[AD7887_CH1]; 87 /* Dummy read: push CH1 setting down to hardware */ 88 spi_sync(st->spi, st->ring_msg); 89 break; 90 case ((1 << 1) | (1 << 0)): 91 st->ring_msg = &st->msg[AD7887_CH0_CH1]; 92 break; 93 } 94 95 return 0; 96 } 97 98 static int ad7887_ring_postdisable(struct iio_dev *indio_dev) 99 { 100 struct ad7887_state *st = iio_priv(indio_dev); 101 102 /* dummy read: restore default CH0 settin */ 103 return spi_sync(st->spi, &st->msg[AD7887_CH0]); 104 } 105 106 /** 107 * ad7887_trigger_handler() bh of trigger launched polling to ring buffer 108 * 109 * Currently there is no option in this driver to disable the saving of 110 * timestamps within the ring. 111 **/ 112 static irqreturn_t ad7887_trigger_handler(int irq, void *p) 113 { 114 struct iio_poll_func *pf = p; 115 struct iio_dev *indio_dev = pf->indio_dev; 116 struct ad7887_state *st = iio_priv(indio_dev); 117 int b_sent; 118 119 b_sent = spi_sync(st->spi, st->ring_msg); 120 if (b_sent) 121 goto done; 122 123 iio_push_to_buffers_with_timestamp(indio_dev, st->data, 124 iio_get_time_ns(indio_dev)); 125 done: 126 iio_trigger_notify_done(indio_dev->trig); 127 128 return IRQ_HANDLED; 129 } 130 131 static const struct iio_buffer_setup_ops ad7887_ring_setup_ops = { 132 .preenable = &ad7887_ring_preenable, 133 .postenable = &iio_triggered_buffer_postenable, 134 .predisable = &iio_triggered_buffer_predisable, 135 .postdisable = &ad7887_ring_postdisable, 136 }; 137 138 static int ad7887_scan_direct(struct ad7887_state *st, unsigned ch) 139 { 140 int ret = spi_sync(st->spi, &st->msg[ch]); 141 if (ret) 142 return ret; 143 144 return (st->data[(ch * 2)] << 8) | st->data[(ch * 2) + 1]; 145 } 146 147 static int ad7887_read_raw(struct iio_dev *indio_dev, 148 struct iio_chan_spec const *chan, 149 int *val, 150 int *val2, 151 long m) 152 { 153 int ret; 154 struct ad7887_state *st = iio_priv(indio_dev); 155 156 switch (m) { 157 case IIO_CHAN_INFO_RAW: 158 ret = iio_device_claim_direct_mode(indio_dev); 159 if (ret) 160 return ret; 161 ret = ad7887_scan_direct(st, chan->address); 162 iio_device_release_direct_mode(indio_dev); 163 164 if (ret < 0) 165 return ret; 166 *val = ret >> chan->scan_type.shift; 167 *val &= GENMASK(chan->scan_type.realbits - 1, 0); 168 return IIO_VAL_INT; 169 case IIO_CHAN_INFO_SCALE: 170 if (st->reg) { 171 *val = regulator_get_voltage(st->reg); 172 if (*val < 0) 173 return *val; 174 *val /= 1000; 175 } else { 176 *val = st->chip_info->int_vref_mv; 177 } 178 179 *val2 = chan->scan_type.realbits; 180 181 return IIO_VAL_FRACTIONAL_LOG2; 182 } 183 return -EINVAL; 184 } 185 186 187 static const struct ad7887_chip_info ad7887_chip_info_tbl[] = { 188 /* 189 * More devices added in future 190 */ 191 [ID_AD7887] = { 192 .channel[0] = { 193 .type = IIO_VOLTAGE, 194 .indexed = 1, 195 .channel = 1, 196 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 197 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 198 .address = 1, 199 .scan_index = 1, 200 .scan_type = { 201 .sign = 'u', 202 .realbits = 12, 203 .storagebits = 16, 204 .shift = 0, 205 .endianness = IIO_BE, 206 }, 207 }, 208 .channel[1] = { 209 .type = IIO_VOLTAGE, 210 .indexed = 1, 211 .channel = 0, 212 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 213 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 214 .address = 0, 215 .scan_index = 0, 216 .scan_type = { 217 .sign = 'u', 218 .realbits = 12, 219 .storagebits = 16, 220 .shift = 0, 221 .endianness = IIO_BE, 222 }, 223 }, 224 .channel[2] = IIO_CHAN_SOFT_TIMESTAMP(2), 225 .int_vref_mv = 2500, 226 }, 227 }; 228 229 static const struct iio_info ad7887_info = { 230 .read_raw = &ad7887_read_raw, 231 }; 232 233 static int ad7887_probe(struct spi_device *spi) 234 { 235 struct ad7887_platform_data *pdata = spi->dev.platform_data; 236 struct ad7887_state *st; 237 struct iio_dev *indio_dev; 238 uint8_t mode; 239 int ret; 240 241 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 242 if (indio_dev == NULL) 243 return -ENOMEM; 244 245 st = iio_priv(indio_dev); 246 247 if (!pdata || !pdata->use_onchip_ref) { 248 st->reg = devm_regulator_get(&spi->dev, "vref"); 249 if (IS_ERR(st->reg)) 250 return PTR_ERR(st->reg); 251 252 ret = regulator_enable(st->reg); 253 if (ret) 254 return ret; 255 } 256 257 st->chip_info = 258 &ad7887_chip_info_tbl[spi_get_device_id(spi)->driver_data]; 259 260 spi_set_drvdata(spi, indio_dev); 261 st->spi = spi; 262 263 /* Estabilish that the iio_dev is a child of the spi device */ 264 indio_dev->dev.parent = &spi->dev; 265 indio_dev->dev.of_node = spi->dev.of_node; 266 indio_dev->name = spi_get_device_id(spi)->name; 267 indio_dev->info = &ad7887_info; 268 indio_dev->modes = INDIO_DIRECT_MODE; 269 270 /* Setup default message */ 271 272 mode = AD7887_PM_MODE4; 273 if (!pdata || !pdata->use_onchip_ref) 274 mode |= AD7887_REF_DIS; 275 if (pdata && pdata->en_dual) 276 mode |= AD7887_DUAL; 277 278 st->tx_cmd_buf[0] = AD7887_CH_AIN0 | mode; 279 280 st->xfer[0].rx_buf = &st->data[0]; 281 st->xfer[0].tx_buf = &st->tx_cmd_buf[0]; 282 st->xfer[0].len = 2; 283 284 spi_message_init(&st->msg[AD7887_CH0]); 285 spi_message_add_tail(&st->xfer[0], &st->msg[AD7887_CH0]); 286 287 if (pdata && pdata->en_dual) { 288 st->tx_cmd_buf[2] = AD7887_CH_AIN1 | mode; 289 290 st->xfer[1].rx_buf = &st->data[0]; 291 st->xfer[1].tx_buf = &st->tx_cmd_buf[2]; 292 st->xfer[1].len = 2; 293 294 st->xfer[2].rx_buf = &st->data[2]; 295 st->xfer[2].tx_buf = &st->tx_cmd_buf[0]; 296 st->xfer[2].len = 2; 297 298 spi_message_init(&st->msg[AD7887_CH0_CH1]); 299 spi_message_add_tail(&st->xfer[1], &st->msg[AD7887_CH0_CH1]); 300 spi_message_add_tail(&st->xfer[2], &st->msg[AD7887_CH0_CH1]); 301 302 st->xfer[3].rx_buf = &st->data[2]; 303 st->xfer[3].tx_buf = &st->tx_cmd_buf[2]; 304 st->xfer[3].len = 2; 305 306 spi_message_init(&st->msg[AD7887_CH1]); 307 spi_message_add_tail(&st->xfer[3], &st->msg[AD7887_CH1]); 308 309 indio_dev->channels = st->chip_info->channel; 310 indio_dev->num_channels = 3; 311 } else { 312 indio_dev->channels = &st->chip_info->channel[1]; 313 indio_dev->num_channels = 2; 314 } 315 316 ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time, 317 &ad7887_trigger_handler, &ad7887_ring_setup_ops); 318 if (ret) 319 goto error_disable_reg; 320 321 ret = iio_device_register(indio_dev); 322 if (ret) 323 goto error_unregister_ring; 324 325 return 0; 326 error_unregister_ring: 327 iio_triggered_buffer_cleanup(indio_dev); 328 error_disable_reg: 329 if (st->reg) 330 regulator_disable(st->reg); 331 332 return ret; 333 } 334 335 static int ad7887_remove(struct spi_device *spi) 336 { 337 struct iio_dev *indio_dev = spi_get_drvdata(spi); 338 struct ad7887_state *st = iio_priv(indio_dev); 339 340 iio_device_unregister(indio_dev); 341 iio_triggered_buffer_cleanup(indio_dev); 342 if (st->reg) 343 regulator_disable(st->reg); 344 345 return 0; 346 } 347 348 static const struct spi_device_id ad7887_id[] = { 349 {"ad7887", ID_AD7887}, 350 {} 351 }; 352 MODULE_DEVICE_TABLE(spi, ad7887_id); 353 354 static struct spi_driver ad7887_driver = { 355 .driver = { 356 .name = "ad7887", 357 }, 358 .probe = ad7887_probe, 359 .remove = ad7887_remove, 360 .id_table = ad7887_id, 361 }; 362 module_spi_driver(ad7887_driver); 363 364 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); 365 MODULE_DESCRIPTION("Analog Devices AD7887 ADC"); 366 MODULE_LICENSE("GPL v2"); 367