1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * AD7606 SPI ADC driver 4 * 5 * Copyright 2011 Analog Devices Inc. 6 */ 7 8 #include <linux/delay.h> 9 #include <linux/device.h> 10 #include <linux/err.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/interrupt.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/property.h> 16 #include <linux/regulator/consumer.h> 17 #include <linux/sched.h> 18 #include <linux/slab.h> 19 #include <linux/sysfs.h> 20 #include <linux/util_macros.h> 21 22 #include <linux/iio/buffer.h> 23 #include <linux/iio/iio.h> 24 #include <linux/iio/sysfs.h> 25 #include <linux/iio/trigger.h> 26 #include <linux/iio/triggered_buffer.h> 27 #include <linux/iio/trigger_consumer.h> 28 29 #include "ad7606.h" 30 31 /* 32 * Scales are computed as 5000/32768 and 10000/32768 respectively, 33 * so that when applied to the raw values they provide mV values 34 */ 35 static const unsigned int ad7606_16bit_hw_scale_avail[2] = { 36 152588, 305176 37 }; 38 39 static const unsigned int ad7606_18bit_hw_scale_avail[2] = { 40 38147, 76294 41 }; 42 43 static const unsigned int ad7606c_16bit_single_ended_unipolar_scale_avail[3] = { 44 76294, 152588, 190735, 45 }; 46 47 static const unsigned int ad7606c_16bit_single_ended_bipolar_scale_avail[5] = { 48 76294, 152588, 190735, 305176, 381470 49 }; 50 51 static const unsigned int ad7606c_16bit_differential_bipolar_scale_avail[4] = { 52 152588, 305176, 381470, 610352 53 }; 54 55 static const unsigned int ad7606c_18bit_single_ended_unipolar_scale_avail[3] = { 56 19073, 38147, 47684 57 }; 58 59 static const unsigned int ad7606c_18bit_single_ended_bipolar_scale_avail[5] = { 60 19073, 38147, 47684, 76294, 95367 61 }; 62 63 static const unsigned int ad7606c_18bit_differential_bipolar_scale_avail[4] = { 64 38147, 76294, 95367, 152588 65 }; 66 67 static const unsigned int ad7606_16bit_sw_scale_avail[3] = { 68 76293, 152588, 305176 69 }; 70 71 static const unsigned int ad7606_oversampling_avail[7] = { 72 1, 2, 4, 8, 16, 32, 64, 73 }; 74 75 static const unsigned int ad7616_oversampling_avail[8] = { 76 1, 2, 4, 8, 16, 32, 64, 128, 77 }; 78 79 int ad7606_reset(struct ad7606_state *st) 80 { 81 if (st->gpio_reset) { 82 gpiod_set_value(st->gpio_reset, 1); 83 ndelay(100); /* t_reset >= 100ns */ 84 gpiod_set_value(st->gpio_reset, 0); 85 return 0; 86 } 87 88 return -ENODEV; 89 } 90 EXPORT_SYMBOL_NS_GPL(ad7606_reset, IIO_AD7606); 91 92 static int ad7606_16bit_chan_scale_setup(struct ad7606_state *st, 93 struct iio_chan_spec *chan, int ch) 94 { 95 struct ad7606_chan_scale *cs = &st->chan_scales[ch]; 96 97 if (!st->sw_mode_en) { 98 /* tied to logic low, analog input range is +/- 5V */ 99 cs->range = 0; 100 cs->scale_avail = ad7606_16bit_hw_scale_avail; 101 cs->num_scales = ARRAY_SIZE(ad7606_16bit_hw_scale_avail); 102 return 0; 103 } 104 105 /* Scale of 0.076293 is only available in sw mode */ 106 /* After reset, in software mode, ±10 V is set by default */ 107 cs->range = 2; 108 cs->scale_avail = ad7606_16bit_sw_scale_avail; 109 cs->num_scales = ARRAY_SIZE(ad7606_16bit_sw_scale_avail); 110 111 return 0; 112 } 113 114 static int ad7606_get_chan_config(struct ad7606_state *st, int ch, 115 bool *bipolar, bool *differential) 116 { 117 unsigned int num_channels = st->chip_info->num_channels - 1; 118 struct device *dev = st->dev; 119 int ret; 120 121 *bipolar = false; 122 *differential = false; 123 124 device_for_each_child_node_scoped(dev, child) { 125 u32 pins[2]; 126 int reg; 127 128 ret = fwnode_property_read_u32(child, "reg", ®); 129 if (ret) 130 continue; 131 132 /* channel number (here) is from 1 to num_channels */ 133 if (reg == 0 || reg > num_channels) { 134 dev_warn(dev, 135 "Invalid channel number (ignoring): %d\n", reg); 136 continue; 137 } 138 139 if (reg != (ch + 1)) 140 continue; 141 142 *bipolar = fwnode_property_read_bool(child, "bipolar"); 143 144 ret = fwnode_property_read_u32_array(child, "diff-channels", 145 pins, ARRAY_SIZE(pins)); 146 /* Channel is differential, if pins are the same as 'reg' */ 147 if (ret == 0 && (pins[0] != reg || pins[1] != reg)) { 148 dev_err(dev, 149 "Differential pins must be the same as 'reg'"); 150 return -EINVAL; 151 } 152 153 *differential = (ret == 0); 154 155 if (*differential && !*bipolar) { 156 dev_err(dev, 157 "'bipolar' must be added for diff channel %d\n", 158 reg); 159 return -EINVAL; 160 } 161 162 return 0; 163 } 164 165 return 0; 166 } 167 168 static int ad7606c_18bit_chan_scale_setup(struct ad7606_state *st, 169 struct iio_chan_spec *chan, int ch) 170 { 171 struct ad7606_chan_scale *cs = &st->chan_scales[ch]; 172 bool bipolar, differential; 173 int ret; 174 175 if (!st->sw_mode_en) { 176 cs->range = 0; 177 cs->scale_avail = ad7606_18bit_hw_scale_avail; 178 cs->num_scales = ARRAY_SIZE(ad7606_18bit_hw_scale_avail); 179 return 0; 180 } 181 182 ret = ad7606_get_chan_config(st, ch, &bipolar, &differential); 183 if (ret) 184 return ret; 185 186 if (differential) { 187 cs->scale_avail = ad7606c_18bit_differential_bipolar_scale_avail; 188 cs->num_scales = 189 ARRAY_SIZE(ad7606c_18bit_differential_bipolar_scale_avail); 190 /* Bipolar differential ranges start at 8 (b1000) */ 191 cs->reg_offset = 8; 192 cs->range = 1; 193 chan->differential = 1; 194 chan->channel2 = chan->channel; 195 196 return 0; 197 } 198 199 chan->differential = 0; 200 201 if (bipolar) { 202 cs->scale_avail = ad7606c_18bit_single_ended_bipolar_scale_avail; 203 cs->num_scales = 204 ARRAY_SIZE(ad7606c_18bit_single_ended_bipolar_scale_avail); 205 /* Bipolar single-ended ranges start at 0 (b0000) */ 206 cs->reg_offset = 0; 207 cs->range = 3; 208 chan->scan_type.sign = 's'; 209 210 return 0; 211 } 212 213 cs->scale_avail = ad7606c_18bit_single_ended_unipolar_scale_avail; 214 cs->num_scales = 215 ARRAY_SIZE(ad7606c_18bit_single_ended_unipolar_scale_avail); 216 /* Unipolar single-ended ranges start at 5 (b0101) */ 217 cs->reg_offset = 5; 218 cs->range = 1; 219 chan->scan_type.sign = 'u'; 220 221 return 0; 222 } 223 224 static int ad7606c_16bit_chan_scale_setup(struct ad7606_state *st, 225 struct iio_chan_spec *chan, int ch) 226 { 227 struct ad7606_chan_scale *cs = &st->chan_scales[ch]; 228 bool bipolar, differential; 229 int ret; 230 231 if (!st->sw_mode_en) { 232 cs->range = 0; 233 cs->scale_avail = ad7606_16bit_hw_scale_avail; 234 cs->num_scales = ARRAY_SIZE(ad7606_16bit_hw_scale_avail); 235 return 0; 236 } 237 238 ret = ad7606_get_chan_config(st, ch, &bipolar, &differential); 239 if (ret) 240 return ret; 241 242 if (differential) { 243 cs->scale_avail = ad7606c_16bit_differential_bipolar_scale_avail; 244 cs->num_scales = 245 ARRAY_SIZE(ad7606c_16bit_differential_bipolar_scale_avail); 246 /* Bipolar differential ranges start at 8 (b1000) */ 247 cs->reg_offset = 8; 248 cs->range = 1; 249 chan->differential = 1; 250 chan->channel2 = chan->channel; 251 chan->scan_type.sign = 's'; 252 253 return 0; 254 } 255 256 chan->differential = 0; 257 258 if (bipolar) { 259 cs->scale_avail = ad7606c_16bit_single_ended_bipolar_scale_avail; 260 cs->num_scales = 261 ARRAY_SIZE(ad7606c_16bit_single_ended_bipolar_scale_avail); 262 /* Bipolar single-ended ranges start at 0 (b0000) */ 263 cs->reg_offset = 0; 264 cs->range = 3; 265 chan->scan_type.sign = 's'; 266 267 return 0; 268 } 269 270 cs->scale_avail = ad7606c_16bit_single_ended_unipolar_scale_avail; 271 cs->num_scales = 272 ARRAY_SIZE(ad7606c_16bit_single_ended_unipolar_scale_avail); 273 /* Unipolar single-ended ranges start at 5 (b0101) */ 274 cs->reg_offset = 5; 275 cs->range = 1; 276 chan->scan_type.sign = 'u'; 277 278 return 0; 279 } 280 281 static int ad7606_reg_access(struct iio_dev *indio_dev, 282 unsigned int reg, 283 unsigned int writeval, 284 unsigned int *readval) 285 { 286 struct ad7606_state *st = iio_priv(indio_dev); 287 int ret; 288 289 guard(mutex)(&st->lock); 290 291 if (readval) { 292 ret = st->bops->reg_read(st, reg); 293 if (ret < 0) 294 return ret; 295 *readval = ret; 296 return 0; 297 } else { 298 return st->bops->reg_write(st, reg, writeval); 299 } 300 } 301 302 static int ad7606_read_samples(struct ad7606_state *st) 303 { 304 unsigned int num = st->chip_info->num_channels - 1; 305 306 return st->bops->read_block(st->dev, num, &st->data); 307 } 308 309 static irqreturn_t ad7606_trigger_handler(int irq, void *p) 310 { 311 struct iio_poll_func *pf = p; 312 struct iio_dev *indio_dev = pf->indio_dev; 313 struct ad7606_state *st = iio_priv(indio_dev); 314 int ret; 315 316 guard(mutex)(&st->lock); 317 318 ret = ad7606_read_samples(st); 319 if (ret) 320 goto error_ret; 321 322 iio_push_to_buffers_with_timestamp(indio_dev, &st->data, 323 iio_get_time_ns(indio_dev)); 324 error_ret: 325 iio_trigger_notify_done(indio_dev->trig); 326 /* The rising edge of the CONVST signal starts a new conversion. */ 327 gpiod_set_value(st->gpio_convst, 1); 328 329 return IRQ_HANDLED; 330 } 331 332 static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch, 333 int *val) 334 { 335 struct ad7606_state *st = iio_priv(indio_dev); 336 unsigned int storagebits = st->chip_info->channels[1].scan_type.storagebits; 337 const struct iio_chan_spec *chan; 338 int ret; 339 340 gpiod_set_value(st->gpio_convst, 1); 341 ret = wait_for_completion_timeout(&st->completion, 342 msecs_to_jiffies(1000)); 343 if (!ret) { 344 ret = -ETIMEDOUT; 345 goto error_ret; 346 } 347 348 ret = ad7606_read_samples(st); 349 if (ret) 350 goto error_ret; 351 352 chan = &indio_dev->channels[ch + 1]; 353 if (chan->scan_type.sign == 'u') { 354 if (storagebits > 16) 355 *val = st->data.buf32[ch]; 356 else 357 *val = st->data.buf16[ch]; 358 } else { 359 if (storagebits > 16) 360 *val = sign_extend32(st->data.buf32[ch], 17); 361 else 362 *val = sign_extend32(st->data.buf16[ch], 15); 363 } 364 365 error_ret: 366 gpiod_set_value(st->gpio_convst, 0); 367 368 return ret; 369 } 370 371 static int ad7606_read_raw(struct iio_dev *indio_dev, 372 struct iio_chan_spec const *chan, 373 int *val, 374 int *val2, 375 long m) 376 { 377 int ret, ch = 0; 378 struct ad7606_state *st = iio_priv(indio_dev); 379 struct ad7606_chan_scale *cs; 380 381 switch (m) { 382 case IIO_CHAN_INFO_RAW: 383 iio_device_claim_direct_scoped(return -EBUSY, indio_dev) { 384 ret = ad7606_scan_direct(indio_dev, chan->address, val); 385 if (ret < 0) 386 return ret; 387 return IIO_VAL_INT; 388 } 389 unreachable(); 390 case IIO_CHAN_INFO_SCALE: 391 if (st->sw_mode_en) 392 ch = chan->address; 393 cs = &st->chan_scales[ch]; 394 *val = 0; 395 *val2 = cs->scale_avail[cs->range]; 396 return IIO_VAL_INT_PLUS_MICRO; 397 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 398 *val = st->oversampling; 399 return IIO_VAL_INT; 400 } 401 return -EINVAL; 402 } 403 404 static ssize_t ad7606_show_avail(char *buf, const unsigned int *vals, 405 unsigned int n, bool micros) 406 { 407 size_t len = 0; 408 int i; 409 410 for (i = 0; i < n; i++) { 411 len += scnprintf(buf + len, PAGE_SIZE - len, 412 micros ? "0.%06u " : "%u ", vals[i]); 413 } 414 buf[len - 1] = '\n'; 415 416 return len; 417 } 418 419 static ssize_t in_voltage_scale_available_show(struct device *dev, 420 struct device_attribute *attr, 421 char *buf) 422 { 423 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 424 struct ad7606_state *st = iio_priv(indio_dev); 425 struct ad7606_chan_scale *cs = &st->chan_scales[0]; 426 427 return ad7606_show_avail(buf, cs->scale_avail, cs->num_scales, true); 428 } 429 430 static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0); 431 432 static int ad7606_write_scale_hw(struct iio_dev *indio_dev, int ch, int val) 433 { 434 struct ad7606_state *st = iio_priv(indio_dev); 435 436 gpiod_set_value(st->gpio_range, val); 437 438 return 0; 439 } 440 441 static int ad7606_write_os_hw(struct iio_dev *indio_dev, int val) 442 { 443 struct ad7606_state *st = iio_priv(indio_dev); 444 DECLARE_BITMAP(values, 3); 445 446 values[0] = val & GENMASK(2, 0); 447 448 gpiod_set_array_value(st->gpio_os->ndescs, st->gpio_os->desc, 449 st->gpio_os->info, values); 450 451 /* AD7616 requires a reset to update value */ 452 if (st->chip_info->os_req_reset) 453 ad7606_reset(st); 454 455 return 0; 456 } 457 458 static int ad7606_write_raw(struct iio_dev *indio_dev, 459 struct iio_chan_spec const *chan, 460 int val, 461 int val2, 462 long mask) 463 { 464 struct ad7606_state *st = iio_priv(indio_dev); 465 struct ad7606_chan_scale *cs; 466 int i, ret, ch = 0; 467 468 guard(mutex)(&st->lock); 469 470 switch (mask) { 471 case IIO_CHAN_INFO_SCALE: 472 if (st->sw_mode_en) 473 ch = chan->address; 474 cs = &st->chan_scales[ch]; 475 i = find_closest(val2, cs->scale_avail, cs->num_scales); 476 ret = st->write_scale(indio_dev, ch, i + cs->reg_offset); 477 if (ret < 0) 478 return ret; 479 cs->range = i; 480 481 return 0; 482 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 483 if (val2) 484 return -EINVAL; 485 i = find_closest(val, st->oversampling_avail, 486 st->num_os_ratios); 487 ret = st->write_os(indio_dev, i); 488 if (ret < 0) 489 return ret; 490 491 return 0; 492 default: 493 return -EINVAL; 494 } 495 } 496 497 static ssize_t ad7606_oversampling_ratio_avail(struct device *dev, 498 struct device_attribute *attr, 499 char *buf) 500 { 501 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 502 struct ad7606_state *st = iio_priv(indio_dev); 503 504 return ad7606_show_avail(buf, st->oversampling_avail, 505 st->num_os_ratios, false); 506 } 507 508 static IIO_DEVICE_ATTR(oversampling_ratio_available, 0444, 509 ad7606_oversampling_ratio_avail, NULL, 0); 510 511 static struct attribute *ad7606_attributes_os_and_range[] = { 512 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr, 513 &iio_dev_attr_oversampling_ratio_available.dev_attr.attr, 514 NULL, 515 }; 516 517 static const struct attribute_group ad7606_attribute_group_os_and_range = { 518 .attrs = ad7606_attributes_os_and_range, 519 }; 520 521 static struct attribute *ad7606_attributes_os[] = { 522 &iio_dev_attr_oversampling_ratio_available.dev_attr.attr, 523 NULL, 524 }; 525 526 static const struct attribute_group ad7606_attribute_group_os = { 527 .attrs = ad7606_attributes_os, 528 }; 529 530 static struct attribute *ad7606_attributes_range[] = { 531 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr, 532 NULL, 533 }; 534 535 static const struct attribute_group ad7606_attribute_group_range = { 536 .attrs = ad7606_attributes_range, 537 }; 538 539 static const struct iio_chan_spec ad7605_channels[] = { 540 IIO_CHAN_SOFT_TIMESTAMP(4), 541 AD7605_CHANNEL(0), 542 AD7605_CHANNEL(1), 543 AD7605_CHANNEL(2), 544 AD7605_CHANNEL(3), 545 }; 546 547 static const struct iio_chan_spec ad7606_channels_16bit[] = { 548 IIO_CHAN_SOFT_TIMESTAMP(8), 549 AD7606_CHANNEL(0, 16), 550 AD7606_CHANNEL(1, 16), 551 AD7606_CHANNEL(2, 16), 552 AD7606_CHANNEL(3, 16), 553 AD7606_CHANNEL(4, 16), 554 AD7606_CHANNEL(5, 16), 555 AD7606_CHANNEL(6, 16), 556 AD7606_CHANNEL(7, 16), 557 }; 558 559 static const struct iio_chan_spec ad7606_channels_18bit[] = { 560 IIO_CHAN_SOFT_TIMESTAMP(8), 561 AD7606_CHANNEL(0, 18), 562 AD7606_CHANNEL(1, 18), 563 AD7606_CHANNEL(2, 18), 564 AD7606_CHANNEL(3, 18), 565 AD7606_CHANNEL(4, 18), 566 AD7606_CHANNEL(5, 18), 567 AD7606_CHANNEL(6, 18), 568 AD7606_CHANNEL(7, 18), 569 }; 570 571 /* 572 * The current assumption that this driver makes for AD7616, is that it's 573 * working in Hardware Mode with Serial, Burst and Sequencer modes activated. 574 * To activate them, following pins must be pulled high: 575 * -SER/PAR 576 * -SEQEN 577 * And following pins must be pulled low: 578 * -WR/BURST 579 * -DB4/SER1W 580 */ 581 static const struct iio_chan_spec ad7616_channels[] = { 582 IIO_CHAN_SOFT_TIMESTAMP(16), 583 AD7606_CHANNEL(0, 16), 584 AD7606_CHANNEL(1, 16), 585 AD7606_CHANNEL(2, 16), 586 AD7606_CHANNEL(3, 16), 587 AD7606_CHANNEL(4, 16), 588 AD7606_CHANNEL(5, 16), 589 AD7606_CHANNEL(6, 16), 590 AD7606_CHANNEL(7, 16), 591 AD7606_CHANNEL(8, 16), 592 AD7606_CHANNEL(9, 16), 593 AD7606_CHANNEL(10, 16), 594 AD7606_CHANNEL(11, 16), 595 AD7606_CHANNEL(12, 16), 596 AD7606_CHANNEL(13, 16), 597 AD7606_CHANNEL(14, 16), 598 AD7606_CHANNEL(15, 16), 599 }; 600 601 static const struct ad7606_chip_info ad7606_chip_info_tbl[] = { 602 /* More devices added in future */ 603 [ID_AD7605_4] = { 604 .channels = ad7605_channels, 605 .num_channels = 5, 606 .scale_setup_cb = ad7606_16bit_chan_scale_setup, 607 }, 608 [ID_AD7606_8] = { 609 .channels = ad7606_channels_16bit, 610 .num_channels = 9, 611 .scale_setup_cb = ad7606_16bit_chan_scale_setup, 612 .oversampling_avail = ad7606_oversampling_avail, 613 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), 614 }, 615 [ID_AD7606_6] = { 616 .channels = ad7606_channels_16bit, 617 .num_channels = 7, 618 .scale_setup_cb = ad7606_16bit_chan_scale_setup, 619 .oversampling_avail = ad7606_oversampling_avail, 620 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), 621 }, 622 [ID_AD7606_4] = { 623 .channels = ad7606_channels_16bit, 624 .num_channels = 5, 625 .scale_setup_cb = ad7606_16bit_chan_scale_setup, 626 .oversampling_avail = ad7606_oversampling_avail, 627 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), 628 }, 629 [ID_AD7606B] = { 630 .channels = ad7606_channels_16bit, 631 .num_channels = 9, 632 .scale_setup_cb = ad7606_16bit_chan_scale_setup, 633 .oversampling_avail = ad7606_oversampling_avail, 634 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), 635 }, 636 [ID_AD7606C_16] = { 637 .channels = ad7606_channels_16bit, 638 .num_channels = 9, 639 .scale_setup_cb = ad7606c_16bit_chan_scale_setup, 640 .oversampling_avail = ad7606_oversampling_avail, 641 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), 642 }, 643 [ID_AD7606C_18] = { 644 .channels = ad7606_channels_18bit, 645 .num_channels = 9, 646 .scale_setup_cb = ad7606c_18bit_chan_scale_setup, 647 .oversampling_avail = ad7606_oversampling_avail, 648 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), 649 }, 650 [ID_AD7616] = { 651 .channels = ad7616_channels, 652 .num_channels = 17, 653 .scale_setup_cb = ad7606_16bit_chan_scale_setup, 654 .oversampling_avail = ad7616_oversampling_avail, 655 .oversampling_num = ARRAY_SIZE(ad7616_oversampling_avail), 656 .os_req_reset = true, 657 .init_delay_ms = 15, 658 }, 659 }; 660 661 static int ad7606_request_gpios(struct ad7606_state *st) 662 { 663 struct device *dev = st->dev; 664 665 st->gpio_convst = devm_gpiod_get(dev, "adi,conversion-start", 666 GPIOD_OUT_LOW); 667 if (IS_ERR(st->gpio_convst)) 668 return PTR_ERR(st->gpio_convst); 669 670 st->gpio_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); 671 if (IS_ERR(st->gpio_reset)) 672 return PTR_ERR(st->gpio_reset); 673 674 st->gpio_range = devm_gpiod_get_optional(dev, "adi,range", 675 GPIOD_OUT_LOW); 676 if (IS_ERR(st->gpio_range)) 677 return PTR_ERR(st->gpio_range); 678 679 st->gpio_standby = devm_gpiod_get_optional(dev, "standby", 680 GPIOD_OUT_LOW); 681 if (IS_ERR(st->gpio_standby)) 682 return PTR_ERR(st->gpio_standby); 683 684 st->gpio_frstdata = devm_gpiod_get_optional(dev, "adi,first-data", 685 GPIOD_IN); 686 if (IS_ERR(st->gpio_frstdata)) 687 return PTR_ERR(st->gpio_frstdata); 688 689 if (!st->chip_info->oversampling_num) 690 return 0; 691 692 st->gpio_os = devm_gpiod_get_array_optional(dev, 693 "adi,oversampling-ratio", 694 GPIOD_OUT_LOW); 695 return PTR_ERR_OR_ZERO(st->gpio_os); 696 } 697 698 /* 699 * The BUSY signal indicates when conversions are in progress, so when a rising 700 * edge of CONVST is applied, BUSY goes logic high and transitions low at the 701 * end of the entire conversion process. The falling edge of the BUSY signal 702 * triggers this interrupt. 703 */ 704 static irqreturn_t ad7606_interrupt(int irq, void *dev_id) 705 { 706 struct iio_dev *indio_dev = dev_id; 707 struct ad7606_state *st = iio_priv(indio_dev); 708 709 if (iio_buffer_enabled(indio_dev)) { 710 gpiod_set_value(st->gpio_convst, 0); 711 iio_trigger_poll_nested(st->trig); 712 } else { 713 complete(&st->completion); 714 } 715 716 return IRQ_HANDLED; 717 }; 718 719 static int ad7606_validate_trigger(struct iio_dev *indio_dev, 720 struct iio_trigger *trig) 721 { 722 struct ad7606_state *st = iio_priv(indio_dev); 723 724 if (st->trig != trig) 725 return -EINVAL; 726 727 return 0; 728 } 729 730 static int ad7606_buffer_postenable(struct iio_dev *indio_dev) 731 { 732 struct ad7606_state *st = iio_priv(indio_dev); 733 734 gpiod_set_value(st->gpio_convst, 1); 735 736 return 0; 737 } 738 739 static int ad7606_buffer_predisable(struct iio_dev *indio_dev) 740 { 741 struct ad7606_state *st = iio_priv(indio_dev); 742 743 gpiod_set_value(st->gpio_convst, 0); 744 745 return 0; 746 } 747 748 static int ad7606_read_avail(struct iio_dev *indio_dev, 749 struct iio_chan_spec const *chan, 750 const int **vals, int *type, int *length, 751 long info) 752 { 753 struct ad7606_state *st = iio_priv(indio_dev); 754 struct ad7606_chan_scale *cs; 755 unsigned int ch = 0; 756 757 switch (info) { 758 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 759 *vals = st->oversampling_avail; 760 *length = st->num_os_ratios; 761 *type = IIO_VAL_INT; 762 763 return IIO_AVAIL_LIST; 764 765 case IIO_CHAN_INFO_SCALE: 766 if (st->sw_mode_en) 767 ch = chan->address; 768 769 cs = &st->chan_scales[ch]; 770 *vals = cs->scale_avail_show; 771 *length = cs->num_scales * 2; 772 *type = IIO_VAL_INT_PLUS_MICRO; 773 774 return IIO_AVAIL_LIST; 775 } 776 return -EINVAL; 777 } 778 779 static const struct iio_buffer_setup_ops ad7606_buffer_ops = { 780 .postenable = &ad7606_buffer_postenable, 781 .predisable = &ad7606_buffer_predisable, 782 }; 783 784 static const struct iio_info ad7606_info_no_os_or_range = { 785 .read_raw = &ad7606_read_raw, 786 .validate_trigger = &ad7606_validate_trigger, 787 }; 788 789 static const struct iio_info ad7606_info_os_and_range = { 790 .read_raw = &ad7606_read_raw, 791 .write_raw = &ad7606_write_raw, 792 .attrs = &ad7606_attribute_group_os_and_range, 793 .validate_trigger = &ad7606_validate_trigger, 794 }; 795 796 static const struct iio_info ad7606_info_sw_mode = { 797 .read_raw = &ad7606_read_raw, 798 .write_raw = &ad7606_write_raw, 799 .read_avail = &ad7606_read_avail, 800 .debugfs_reg_access = &ad7606_reg_access, 801 .validate_trigger = &ad7606_validate_trigger, 802 }; 803 804 static const struct iio_info ad7606_info_os = { 805 .read_raw = &ad7606_read_raw, 806 .write_raw = &ad7606_write_raw, 807 .attrs = &ad7606_attribute_group_os, 808 .validate_trigger = &ad7606_validate_trigger, 809 }; 810 811 static const struct iio_info ad7606_info_range = { 812 .read_raw = &ad7606_read_raw, 813 .write_raw = &ad7606_write_raw, 814 .attrs = &ad7606_attribute_group_range, 815 .validate_trigger = &ad7606_validate_trigger, 816 }; 817 818 static const struct iio_trigger_ops ad7606_trigger_ops = { 819 .validate_device = iio_trigger_validate_own_device, 820 }; 821 822 static int ad7606_sw_mode_setup(struct iio_dev *indio_dev, unsigned int id) 823 { 824 struct ad7606_state *st = iio_priv(indio_dev); 825 826 st->sw_mode_en = st->bops->sw_mode_config && 827 device_property_present(st->dev, "adi,sw-mode"); 828 if (!st->sw_mode_en) 829 return 0; 830 831 indio_dev->info = &ad7606_info_sw_mode; 832 833 return st->bops->sw_mode_config(indio_dev); 834 } 835 836 static int ad7606_chan_scales_setup(struct iio_dev *indio_dev) 837 { 838 unsigned int num_channels = indio_dev->num_channels - 1; 839 struct ad7606_state *st = iio_priv(indio_dev); 840 struct iio_chan_spec *chans; 841 size_t size; 842 int ch, ret; 843 844 /* Clone IIO channels, since some may be differential */ 845 size = indio_dev->num_channels * sizeof(*indio_dev->channels); 846 chans = devm_kzalloc(st->dev, size, GFP_KERNEL); 847 if (!chans) 848 return -ENOMEM; 849 850 memcpy(chans, indio_dev->channels, size); 851 indio_dev->channels = chans; 852 853 for (ch = 0; ch < num_channels; ch++) { 854 struct ad7606_chan_scale *cs; 855 int i; 856 857 ret = st->chip_info->scale_setup_cb(st, &chans[ch + 1], ch); 858 if (ret) 859 return ret; 860 861 cs = &st->chan_scales[ch]; 862 863 if (cs->num_scales * 2 > AD760X_MAX_SCALE_SHOW) 864 return dev_err_probe(st->dev, -ERANGE, 865 "Driver error: scale range too big"); 866 867 /* Generate a scale_avail list for showing to userspace */ 868 for (i = 0; i < cs->num_scales; i++) { 869 cs->scale_avail_show[i * 2] = 0; 870 cs->scale_avail_show[i * 2 + 1] = cs->scale_avail[i]; 871 } 872 } 873 874 return 0; 875 } 876 877 int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, 878 const char *name, unsigned int id, 879 const struct ad7606_bus_ops *bops) 880 { 881 struct ad7606_state *st; 882 int ret; 883 struct iio_dev *indio_dev; 884 885 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 886 if (!indio_dev) 887 return -ENOMEM; 888 889 st = iio_priv(indio_dev); 890 dev_set_drvdata(dev, indio_dev); 891 892 st->dev = dev; 893 mutex_init(&st->lock); 894 st->bops = bops; 895 st->base_address = base_address; 896 st->oversampling = 1; 897 898 ret = devm_regulator_get_enable(dev, "avcc"); 899 if (ret) 900 return dev_err_probe(dev, ret, 901 "Failed to enable specified AVcc supply\n"); 902 903 st->chip_info = &ad7606_chip_info_tbl[id]; 904 905 if (st->chip_info->oversampling_num) { 906 st->oversampling_avail = st->chip_info->oversampling_avail; 907 st->num_os_ratios = st->chip_info->oversampling_num; 908 } 909 910 ret = ad7606_request_gpios(st); 911 if (ret) 912 return ret; 913 914 if (st->gpio_os) { 915 if (st->gpio_range) 916 indio_dev->info = &ad7606_info_os_and_range; 917 else 918 indio_dev->info = &ad7606_info_os; 919 } else { 920 if (st->gpio_range) 921 indio_dev->info = &ad7606_info_range; 922 else 923 indio_dev->info = &ad7606_info_no_os_or_range; 924 } 925 indio_dev->modes = INDIO_DIRECT_MODE; 926 indio_dev->name = name; 927 indio_dev->channels = st->chip_info->channels; 928 indio_dev->num_channels = st->chip_info->num_channels; 929 930 init_completion(&st->completion); 931 932 ret = ad7606_reset(st); 933 if (ret) 934 dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n"); 935 936 /* AD7616 requires al least 15ms to reconfigure after a reset */ 937 if (st->chip_info->init_delay_ms) { 938 if (msleep_interruptible(st->chip_info->init_delay_ms)) 939 return -ERESTARTSYS; 940 } 941 942 st->write_scale = ad7606_write_scale_hw; 943 st->write_os = ad7606_write_os_hw; 944 945 ret = ad7606_sw_mode_setup(indio_dev, id); 946 if (ret) 947 return ret; 948 949 ret = ad7606_chan_scales_setup(indio_dev); 950 if (ret) 951 return ret; 952 953 st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d", 954 indio_dev->name, 955 iio_device_id(indio_dev)); 956 if (!st->trig) 957 return -ENOMEM; 958 959 st->trig->ops = &ad7606_trigger_ops; 960 iio_trigger_set_drvdata(st->trig, indio_dev); 961 ret = devm_iio_trigger_register(dev, st->trig); 962 if (ret) 963 return ret; 964 965 indio_dev->trig = iio_trigger_get(st->trig); 966 967 ret = devm_request_threaded_irq(dev, irq, 968 NULL, 969 &ad7606_interrupt, 970 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 971 name, indio_dev); 972 if (ret) 973 return ret; 974 975 ret = devm_iio_triggered_buffer_setup(dev, indio_dev, 976 &iio_pollfunc_store_time, 977 &ad7606_trigger_handler, 978 &ad7606_buffer_ops); 979 if (ret) 980 return ret; 981 982 return devm_iio_device_register(dev, indio_dev); 983 } 984 EXPORT_SYMBOL_NS_GPL(ad7606_probe, IIO_AD7606); 985 986 #ifdef CONFIG_PM_SLEEP 987 988 static int ad7606_suspend(struct device *dev) 989 { 990 struct iio_dev *indio_dev = dev_get_drvdata(dev); 991 struct ad7606_state *st = iio_priv(indio_dev); 992 993 if (st->gpio_standby) { 994 gpiod_set_value(st->gpio_range, 1); 995 gpiod_set_value(st->gpio_standby, 1); 996 } 997 998 return 0; 999 } 1000 1001 static int ad7606_resume(struct device *dev) 1002 { 1003 struct iio_dev *indio_dev = dev_get_drvdata(dev); 1004 struct ad7606_state *st = iio_priv(indio_dev); 1005 1006 if (st->gpio_standby) { 1007 gpiod_set_value(st->gpio_range, st->chan_scales[0].range); 1008 gpiod_set_value(st->gpio_standby, 1); 1009 ad7606_reset(st); 1010 } 1011 1012 return 0; 1013 } 1014 1015 SIMPLE_DEV_PM_OPS(ad7606_pm_ops, ad7606_suspend, ad7606_resume); 1016 EXPORT_SYMBOL_NS_GPL(ad7606_pm_ops, IIO_AD7606); 1017 1018 #endif 1019 1020 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); 1021 MODULE_DESCRIPTION("Analog Devices AD7606 ADC"); 1022 MODULE_LICENSE("GPL v2"); 1023