1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * AD7606 SPI ADC driver 4 * 5 * Copyright 2011 Analog Devices Inc. 6 */ 7 8 #include <linux/delay.h> 9 #include <linux/device.h> 10 #include <linux/err.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/interrupt.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/regulator/consumer.h> 16 #include <linux/sched.h> 17 #include <linux/slab.h> 18 #include <linux/sysfs.h> 19 #include <linux/util_macros.h> 20 21 #include <linux/iio/iio.h> 22 #include <linux/iio/buffer.h> 23 #include <linux/iio/sysfs.h> 24 #include <linux/iio/trigger.h> 25 #include <linux/iio/triggered_buffer.h> 26 #include <linux/iio/trigger_consumer.h> 27 28 #include "ad7606.h" 29 30 /* 31 * Scales are computed as 5000/32768 and 10000/32768 respectively, 32 * so that when applied to the raw values they provide mV values 33 */ 34 static const unsigned int ad7606_scale_avail[2] = { 35 152588, 305176 36 }; 37 38 static const unsigned int ad7606_oversampling_avail[7] = { 39 1, 2, 4, 8, 16, 32, 64, 40 }; 41 42 static const unsigned int ad7616_oversampling_avail[8] = { 43 1, 2, 4, 8, 16, 32, 64, 128, 44 }; 45 46 static int ad7606_reset(struct ad7606_state *st) 47 { 48 if (st->gpio_reset) { 49 gpiod_set_value(st->gpio_reset, 1); 50 ndelay(100); /* t_reset >= 100ns */ 51 gpiod_set_value(st->gpio_reset, 0); 52 return 0; 53 } 54 55 return -ENODEV; 56 } 57 58 static int ad7606_read_samples(struct ad7606_state *st) 59 { 60 unsigned int num = st->chip_info->num_channels; 61 u16 *data = st->data; 62 int ret; 63 64 /* 65 * The frstdata signal is set to high while and after reading the sample 66 * of the first channel and low for all other channels. This can be used 67 * to check that the incoming data is correctly aligned. During normal 68 * operation the data should never become unaligned, but some glitch or 69 * electrostatic discharge might cause an extra read or clock cycle. 70 * Monitoring the frstdata signal allows to recover from such failure 71 * situations. 72 */ 73 74 if (st->gpio_frstdata) { 75 ret = st->bops->read_block(st->dev, 1, data); 76 if (ret) 77 return ret; 78 79 if (!gpiod_get_value(st->gpio_frstdata)) { 80 ad7606_reset(st); 81 return -EIO; 82 } 83 84 data++; 85 num--; 86 } 87 88 return st->bops->read_block(st->dev, num, data); 89 } 90 91 static irqreturn_t ad7606_trigger_handler(int irq, void *p) 92 { 93 struct iio_poll_func *pf = p; 94 struct iio_dev *indio_dev = pf->indio_dev; 95 struct ad7606_state *st = iio_priv(indio_dev); 96 int ret; 97 98 mutex_lock(&st->lock); 99 100 ret = ad7606_read_samples(st); 101 if (ret == 0) 102 iio_push_to_buffers_with_timestamp(indio_dev, st->data, 103 iio_get_time_ns(indio_dev)); 104 105 iio_trigger_notify_done(indio_dev->trig); 106 /* The rising edge of the CONVST signal starts a new conversion. */ 107 gpiod_set_value(st->gpio_convst, 1); 108 109 mutex_unlock(&st->lock); 110 111 return IRQ_HANDLED; 112 } 113 114 static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch) 115 { 116 struct ad7606_state *st = iio_priv(indio_dev); 117 int ret; 118 119 gpiod_set_value(st->gpio_convst, 1); 120 ret = wait_for_completion_timeout(&st->completion, 121 msecs_to_jiffies(1000)); 122 if (!ret) { 123 ret = -ETIMEDOUT; 124 goto error_ret; 125 } 126 127 ret = ad7606_read_samples(st); 128 if (ret == 0) 129 ret = st->data[ch]; 130 131 error_ret: 132 gpiod_set_value(st->gpio_convst, 0); 133 134 return ret; 135 } 136 137 static int ad7606_read_raw(struct iio_dev *indio_dev, 138 struct iio_chan_spec const *chan, 139 int *val, 140 int *val2, 141 long m) 142 { 143 int ret, ch = 0; 144 struct ad7606_state *st = iio_priv(indio_dev); 145 146 switch (m) { 147 case IIO_CHAN_INFO_RAW: 148 ret = iio_device_claim_direct_mode(indio_dev); 149 if (ret) 150 return ret; 151 152 ret = ad7606_scan_direct(indio_dev, chan->address); 153 iio_device_release_direct_mode(indio_dev); 154 155 if (ret < 0) 156 return ret; 157 *val = (short)ret; 158 return IIO_VAL_INT; 159 case IIO_CHAN_INFO_SCALE: 160 if (st->sw_mode_en) 161 ch = chan->address; 162 *val = 0; 163 *val2 = st->scale_avail[st->range[ch]]; 164 return IIO_VAL_INT_PLUS_MICRO; 165 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 166 *val = st->oversampling; 167 return IIO_VAL_INT; 168 } 169 return -EINVAL; 170 } 171 172 static ssize_t ad7606_show_avail(char *buf, const unsigned int *vals, 173 unsigned int n, bool micros) 174 { 175 size_t len = 0; 176 int i; 177 178 for (i = 0; i < n; i++) { 179 len += scnprintf(buf + len, PAGE_SIZE - len, 180 micros ? "0.%06u " : "%u ", vals[i]); 181 } 182 buf[len - 1] = '\n'; 183 184 return len; 185 } 186 187 static ssize_t in_voltage_scale_available_show(struct device *dev, 188 struct device_attribute *attr, 189 char *buf) 190 { 191 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 192 struct ad7606_state *st = iio_priv(indio_dev); 193 194 return ad7606_show_avail(buf, st->scale_avail, st->num_scales, true); 195 } 196 197 static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0); 198 199 static int ad7606_write_scale_hw(struct iio_dev *indio_dev, int ch, int val) 200 { 201 struct ad7606_state *st = iio_priv(indio_dev); 202 203 gpiod_set_value(st->gpio_range, val); 204 205 return 0; 206 } 207 208 static int ad7606_write_os_hw(struct iio_dev *indio_dev, int val) 209 { 210 struct ad7606_state *st = iio_priv(indio_dev); 211 DECLARE_BITMAP(values, 3); 212 213 values[0] = val; 214 215 gpiod_set_array_value(ARRAY_SIZE(values), st->gpio_os->desc, 216 st->gpio_os->info, values); 217 218 /* AD7616 requires a reset to update value */ 219 if (st->chip_info->os_req_reset) 220 ad7606_reset(st); 221 222 return 0; 223 } 224 225 static int ad7606_write_raw(struct iio_dev *indio_dev, 226 struct iio_chan_spec const *chan, 227 int val, 228 int val2, 229 long mask) 230 { 231 struct ad7606_state *st = iio_priv(indio_dev); 232 int i, ret, ch = 0; 233 234 switch (mask) { 235 case IIO_CHAN_INFO_SCALE: 236 mutex_lock(&st->lock); 237 i = find_closest(val2, st->scale_avail, st->num_scales); 238 if (st->sw_mode_en) 239 ch = chan->address; 240 ret = st->write_scale(indio_dev, ch, i); 241 if (ret < 0) { 242 mutex_unlock(&st->lock); 243 return ret; 244 } 245 st->range[ch] = i; 246 mutex_unlock(&st->lock); 247 248 return 0; 249 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 250 if (val2) 251 return -EINVAL; 252 i = find_closest(val, st->oversampling_avail, 253 st->num_os_ratios); 254 mutex_lock(&st->lock); 255 ret = st->write_os(indio_dev, i); 256 if (ret < 0) { 257 mutex_unlock(&st->lock); 258 return ret; 259 } 260 st->oversampling = st->oversampling_avail[i]; 261 mutex_unlock(&st->lock); 262 263 return 0; 264 default: 265 return -EINVAL; 266 } 267 } 268 269 static ssize_t ad7606_oversampling_ratio_avail(struct device *dev, 270 struct device_attribute *attr, 271 char *buf) 272 { 273 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 274 struct ad7606_state *st = iio_priv(indio_dev); 275 276 return ad7606_show_avail(buf, st->oversampling_avail, 277 st->num_os_ratios, false); 278 } 279 280 static IIO_DEVICE_ATTR(oversampling_ratio_available, 0444, 281 ad7606_oversampling_ratio_avail, NULL, 0); 282 283 static struct attribute *ad7606_attributes_os_and_range[] = { 284 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr, 285 &iio_dev_attr_oversampling_ratio_available.dev_attr.attr, 286 NULL, 287 }; 288 289 static const struct attribute_group ad7606_attribute_group_os_and_range = { 290 .attrs = ad7606_attributes_os_and_range, 291 }; 292 293 static struct attribute *ad7606_attributes_os[] = { 294 &iio_dev_attr_oversampling_ratio_available.dev_attr.attr, 295 NULL, 296 }; 297 298 static const struct attribute_group ad7606_attribute_group_os = { 299 .attrs = ad7606_attributes_os, 300 }; 301 302 static struct attribute *ad7606_attributes_range[] = { 303 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr, 304 NULL, 305 }; 306 307 static const struct attribute_group ad7606_attribute_group_range = { 308 .attrs = ad7606_attributes_range, 309 }; 310 311 #define AD760X_CHANNEL(num, mask) { \ 312 .type = IIO_VOLTAGE, \ 313 .indexed = 1, \ 314 .channel = num, \ 315 .address = num, \ 316 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 317 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\ 318 .info_mask_shared_by_all = mask, \ 319 .scan_index = num, \ 320 .scan_type = { \ 321 .sign = 's', \ 322 .realbits = 16, \ 323 .storagebits = 16, \ 324 .endianness = IIO_CPU, \ 325 }, \ 326 } 327 328 #define AD7605_CHANNEL(num) \ 329 AD760X_CHANNEL(num, 0) 330 331 #define AD7606_CHANNEL(num) \ 332 AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO)) 333 334 static const struct iio_chan_spec ad7605_channels[] = { 335 IIO_CHAN_SOFT_TIMESTAMP(4), 336 AD7605_CHANNEL(0), 337 AD7605_CHANNEL(1), 338 AD7605_CHANNEL(2), 339 AD7605_CHANNEL(3), 340 }; 341 342 static const struct iio_chan_spec ad7606_channels[] = { 343 IIO_CHAN_SOFT_TIMESTAMP(8), 344 AD7606_CHANNEL(0), 345 AD7606_CHANNEL(1), 346 AD7606_CHANNEL(2), 347 AD7606_CHANNEL(3), 348 AD7606_CHANNEL(4), 349 AD7606_CHANNEL(5), 350 AD7606_CHANNEL(6), 351 AD7606_CHANNEL(7), 352 }; 353 354 /* 355 * The current assumption that this driver makes for AD7616, is that it's 356 * working in Hardware Mode with Serial, Burst and Sequencer modes activated. 357 * To activate them, following pins must be pulled high: 358 * -SER/PAR 359 * -SEQEN 360 * And following pins must be pulled low: 361 * -WR/BURST 362 * -DB4/SER1W 363 */ 364 static const struct iio_chan_spec ad7616_channels[] = { 365 IIO_CHAN_SOFT_TIMESTAMP(16), 366 AD7606_CHANNEL(0), 367 AD7606_CHANNEL(1), 368 AD7606_CHANNEL(2), 369 AD7606_CHANNEL(3), 370 AD7606_CHANNEL(4), 371 AD7606_CHANNEL(5), 372 AD7606_CHANNEL(6), 373 AD7606_CHANNEL(7), 374 AD7606_CHANNEL(8), 375 AD7606_CHANNEL(9), 376 AD7606_CHANNEL(10), 377 AD7606_CHANNEL(11), 378 AD7606_CHANNEL(12), 379 AD7606_CHANNEL(13), 380 AD7606_CHANNEL(14), 381 AD7606_CHANNEL(15), 382 }; 383 384 static const struct ad7606_chip_info ad7606_chip_info_tbl[] = { 385 /* More devices added in future */ 386 [ID_AD7605_4] = { 387 .channels = ad7605_channels, 388 .num_channels = 5, 389 }, 390 [ID_AD7606_8] = { 391 .channels = ad7606_channels, 392 .num_channels = 9, 393 .oversampling_avail = ad7606_oversampling_avail, 394 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), 395 }, 396 [ID_AD7606_6] = { 397 .channels = ad7606_channels, 398 .num_channels = 7, 399 .oversampling_avail = ad7606_oversampling_avail, 400 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), 401 }, 402 [ID_AD7606_4] = { 403 .channels = ad7606_channels, 404 .num_channels = 5, 405 .oversampling_avail = ad7606_oversampling_avail, 406 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), 407 }, 408 [ID_AD7616] = { 409 .channels = ad7616_channels, 410 .num_channels = 17, 411 .oversampling_avail = ad7616_oversampling_avail, 412 .oversampling_num = ARRAY_SIZE(ad7616_oversampling_avail), 413 .os_req_reset = true, 414 }, 415 }; 416 417 static int ad7606_request_gpios(struct ad7606_state *st) 418 { 419 struct device *dev = st->dev; 420 421 st->gpio_convst = devm_gpiod_get(dev, "adi,conversion-start", 422 GPIOD_OUT_LOW); 423 if (IS_ERR(st->gpio_convst)) 424 return PTR_ERR(st->gpio_convst); 425 426 st->gpio_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); 427 if (IS_ERR(st->gpio_reset)) 428 return PTR_ERR(st->gpio_reset); 429 430 st->gpio_range = devm_gpiod_get_optional(dev, "adi,range", 431 GPIOD_OUT_LOW); 432 if (IS_ERR(st->gpio_range)) 433 return PTR_ERR(st->gpio_range); 434 435 st->gpio_standby = devm_gpiod_get_optional(dev, "standby", 436 GPIOD_OUT_HIGH); 437 if (IS_ERR(st->gpio_standby)) 438 return PTR_ERR(st->gpio_standby); 439 440 st->gpio_frstdata = devm_gpiod_get_optional(dev, "adi,first-data", 441 GPIOD_IN); 442 if (IS_ERR(st->gpio_frstdata)) 443 return PTR_ERR(st->gpio_frstdata); 444 445 if (!st->chip_info->oversampling_num) 446 return 0; 447 448 st->gpio_os = devm_gpiod_get_array_optional(dev, 449 "adi,oversampling-ratio", 450 GPIOD_OUT_LOW); 451 return PTR_ERR_OR_ZERO(st->gpio_os); 452 } 453 454 /* 455 * The BUSY signal indicates when conversions are in progress, so when a rising 456 * edge of CONVST is applied, BUSY goes logic high and transitions low at the 457 * end of the entire conversion process. The falling edge of the BUSY signal 458 * triggers this interrupt. 459 */ 460 static irqreturn_t ad7606_interrupt(int irq, void *dev_id) 461 { 462 struct iio_dev *indio_dev = dev_id; 463 struct ad7606_state *st = iio_priv(indio_dev); 464 465 if (iio_buffer_enabled(indio_dev)) { 466 gpiod_set_value(st->gpio_convst, 0); 467 iio_trigger_poll_chained(st->trig); 468 } else { 469 complete(&st->completion); 470 } 471 472 return IRQ_HANDLED; 473 }; 474 475 static int ad7606_validate_trigger(struct iio_dev *indio_dev, 476 struct iio_trigger *trig) 477 { 478 struct ad7606_state *st = iio_priv(indio_dev); 479 480 if (st->trig != trig) 481 return -EINVAL; 482 483 return 0; 484 } 485 486 static int ad7606_buffer_postenable(struct iio_dev *indio_dev) 487 { 488 struct ad7606_state *st = iio_priv(indio_dev); 489 490 iio_triggered_buffer_postenable(indio_dev); 491 gpiod_set_value(st->gpio_convst, 1); 492 493 return 0; 494 } 495 496 static int ad7606_buffer_predisable(struct iio_dev *indio_dev) 497 { 498 struct ad7606_state *st = iio_priv(indio_dev); 499 500 gpiod_set_value(st->gpio_convst, 0); 501 502 return iio_triggered_buffer_predisable(indio_dev); 503 } 504 505 static const struct iio_buffer_setup_ops ad7606_buffer_ops = { 506 .postenable = &ad7606_buffer_postenable, 507 .predisable = &ad7606_buffer_predisable, 508 }; 509 510 static const struct iio_info ad7606_info_no_os_or_range = { 511 .read_raw = &ad7606_read_raw, 512 .validate_trigger = &ad7606_validate_trigger, 513 }; 514 515 static const struct iio_info ad7606_info_os_and_range = { 516 .read_raw = &ad7606_read_raw, 517 .write_raw = &ad7606_write_raw, 518 .attrs = &ad7606_attribute_group_os_and_range, 519 .validate_trigger = &ad7606_validate_trigger, 520 }; 521 522 static const struct iio_info ad7606_info_os = { 523 .read_raw = &ad7606_read_raw, 524 .write_raw = &ad7606_write_raw, 525 .attrs = &ad7606_attribute_group_os, 526 .validate_trigger = &ad7606_validate_trigger, 527 }; 528 529 static const struct iio_info ad7606_info_range = { 530 .read_raw = &ad7606_read_raw, 531 .write_raw = &ad7606_write_raw, 532 .attrs = &ad7606_attribute_group_range, 533 .validate_trigger = &ad7606_validate_trigger, 534 }; 535 536 static const struct iio_trigger_ops ad7606_trigger_ops = { 537 .validate_device = iio_trigger_validate_own_device, 538 }; 539 540 static void ad7606_regulator_disable(void *data) 541 { 542 struct ad7606_state *st = data; 543 544 regulator_disable(st->reg); 545 } 546 547 int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, 548 const char *name, unsigned int id, 549 const struct ad7606_bus_ops *bops) 550 { 551 struct ad7606_state *st; 552 int ret; 553 struct iio_dev *indio_dev; 554 555 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 556 if (!indio_dev) 557 return -ENOMEM; 558 559 st = iio_priv(indio_dev); 560 dev_set_drvdata(dev, indio_dev); 561 562 st->dev = dev; 563 mutex_init(&st->lock); 564 st->bops = bops; 565 st->base_address = base_address; 566 /* tied to logic low, analog input range is +/- 5V */ 567 st->range[0] = 0; 568 st->oversampling = 1; 569 st->scale_avail = ad7606_scale_avail; 570 st->num_scales = ARRAY_SIZE(ad7606_scale_avail); 571 572 st->reg = devm_regulator_get(dev, "avcc"); 573 if (IS_ERR(st->reg)) 574 return PTR_ERR(st->reg); 575 576 ret = regulator_enable(st->reg); 577 if (ret) { 578 dev_err(dev, "Failed to enable specified AVcc supply\n"); 579 return ret; 580 } 581 582 ret = devm_add_action_or_reset(dev, ad7606_regulator_disable, st); 583 if (ret) 584 return ret; 585 586 st->chip_info = &ad7606_chip_info_tbl[id]; 587 588 if (st->chip_info->oversampling_num) { 589 st->oversampling_avail = st->chip_info->oversampling_avail; 590 st->num_os_ratios = st->chip_info->oversampling_num; 591 } 592 593 ret = ad7606_request_gpios(st); 594 if (ret) 595 return ret; 596 597 indio_dev->dev.parent = dev; 598 if (st->gpio_os) { 599 if (st->gpio_range) 600 indio_dev->info = &ad7606_info_os_and_range; 601 else 602 indio_dev->info = &ad7606_info_os; 603 } else { 604 if (st->gpio_range) 605 indio_dev->info = &ad7606_info_range; 606 else 607 indio_dev->info = &ad7606_info_no_os_or_range; 608 } 609 indio_dev->modes = INDIO_DIRECT_MODE; 610 indio_dev->name = name; 611 indio_dev->channels = st->chip_info->channels; 612 indio_dev->num_channels = st->chip_info->num_channels; 613 614 init_completion(&st->completion); 615 616 ret = ad7606_reset(st); 617 if (ret) 618 dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n"); 619 620 st->write_scale = ad7606_write_scale_hw; 621 st->write_os = ad7606_write_os_hw; 622 623 if (st->chip_info->sw_mode_config) 624 st->sw_mode_en = device_property_present(st->dev, 625 "adi,sw-mode"); 626 627 if (st->sw_mode_en) { 628 /* After reset, in software mode, ±10 V is set by default */ 629 memset32(st->range, 2, ARRAY_SIZE(st->range)); 630 indio_dev->info = &ad7606_info_os_and_range; 631 632 /* 633 * In software mode, the range gpio has no longer its function. 634 * Instead, the scale can be configured individually for each 635 * channel from the range registers. 636 */ 637 if (st->chip_info->write_scale_sw) 638 st->write_scale = st->chip_info->write_scale_sw; 639 640 /* 641 * In software mode, the oversampling is no longer configured 642 * with GPIO pins. Instead, the oversampling can be configured 643 * in configuratiion register. 644 */ 645 if (st->chip_info->write_os_sw) 646 st->write_os = st->chip_info->write_os_sw; 647 648 ret = st->chip_info->sw_mode_config(indio_dev); 649 if (ret < 0) 650 return ret; 651 } 652 653 st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d", 654 indio_dev->name, indio_dev->id); 655 if (!st->trig) 656 return -ENOMEM; 657 658 st->trig->ops = &ad7606_trigger_ops; 659 st->trig->dev.parent = dev; 660 iio_trigger_set_drvdata(st->trig, indio_dev); 661 ret = devm_iio_trigger_register(dev, st->trig); 662 if (ret) 663 return ret; 664 665 indio_dev->trig = iio_trigger_get(st->trig); 666 667 ret = devm_request_threaded_irq(dev, irq, 668 NULL, 669 &ad7606_interrupt, 670 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 671 name, indio_dev); 672 if (ret) 673 return ret; 674 675 ret = devm_iio_triggered_buffer_setup(dev, indio_dev, 676 &iio_pollfunc_store_time, 677 &ad7606_trigger_handler, 678 &ad7606_buffer_ops); 679 if (ret) 680 return ret; 681 682 return devm_iio_device_register(dev, indio_dev); 683 } 684 EXPORT_SYMBOL_GPL(ad7606_probe); 685 686 #ifdef CONFIG_PM_SLEEP 687 688 static int ad7606_suspend(struct device *dev) 689 { 690 struct iio_dev *indio_dev = dev_get_drvdata(dev); 691 struct ad7606_state *st = iio_priv(indio_dev); 692 693 if (st->gpio_standby) { 694 gpiod_set_value(st->gpio_range, 1); 695 gpiod_set_value(st->gpio_standby, 0); 696 } 697 698 return 0; 699 } 700 701 static int ad7606_resume(struct device *dev) 702 { 703 struct iio_dev *indio_dev = dev_get_drvdata(dev); 704 struct ad7606_state *st = iio_priv(indio_dev); 705 706 if (st->gpio_standby) { 707 gpiod_set_value(st->gpio_range, st->range[0]); 708 gpiod_set_value(st->gpio_standby, 1); 709 ad7606_reset(st); 710 } 711 712 return 0; 713 } 714 715 SIMPLE_DEV_PM_OPS(ad7606_pm_ops, ad7606_suspend, ad7606_resume); 716 EXPORT_SYMBOL_GPL(ad7606_pm_ops); 717 718 #endif 719 720 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); 721 MODULE_DESCRIPTION("Analog Devices AD7606 ADC"); 722 MODULE_LICENSE("GPL v2"); 723