xref: /linux/drivers/iio/adc/ad7606.c (revision 62597edf6340191511bdf9a7f64fa315ddc58805)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * AD7606 SPI ADC driver
4  *
5  * Copyright 2011 Analog Devices Inc.
6  */
7 
8 #include <linux/delay.h>
9 #include <linux/device.h>
10 #include <linux/err.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/interrupt.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/property.h>
16 #include <linux/regulator/consumer.h>
17 #include <linux/sched.h>
18 #include <linux/slab.h>
19 #include <linux/sysfs.h>
20 #include <linux/util_macros.h>
21 
22 #include <linux/iio/iio.h>
23 #include <linux/iio/buffer.h>
24 #include <linux/iio/sysfs.h>
25 #include <linux/iio/trigger.h>
26 #include <linux/iio/triggered_buffer.h>
27 #include <linux/iio/trigger_consumer.h>
28 
29 #include "ad7606.h"
30 
31 /*
32  * Scales are computed as 5000/32768 and 10000/32768 respectively,
33  * so that when applied to the raw values they provide mV values
34  */
35 static const unsigned int ad7606_scale_avail[2] = {
36 	152588, 305176
37 };
38 
39 
40 static const unsigned int ad7616_sw_scale_avail[3] = {
41 	76293, 152588, 305176
42 };
43 
44 static const unsigned int ad7606_oversampling_avail[7] = {
45 	1, 2, 4, 8, 16, 32, 64,
46 };
47 
48 static const unsigned int ad7616_oversampling_avail[8] = {
49 	1, 2, 4, 8, 16, 32, 64, 128,
50 };
51 
52 int ad7606_reset(struct ad7606_state *st)
53 {
54 	if (st->gpio_reset) {
55 		gpiod_set_value(st->gpio_reset, 1);
56 		ndelay(100); /* t_reset >= 100ns */
57 		gpiod_set_value(st->gpio_reset, 0);
58 		return 0;
59 	}
60 
61 	return -ENODEV;
62 }
63 EXPORT_SYMBOL_NS_GPL(ad7606_reset, IIO_AD7606);
64 
65 static int ad7606_reg_access(struct iio_dev *indio_dev,
66 			     unsigned int reg,
67 			     unsigned int writeval,
68 			     unsigned int *readval)
69 {
70 	struct ad7606_state *st = iio_priv(indio_dev);
71 	int ret;
72 
73 	mutex_lock(&st->lock);
74 	if (readval) {
75 		ret = st->bops->reg_read(st, reg);
76 		if (ret < 0)
77 			goto err_unlock;
78 		*readval = ret;
79 		ret = 0;
80 	} else {
81 		ret = st->bops->reg_write(st, reg, writeval);
82 	}
83 err_unlock:
84 	mutex_unlock(&st->lock);
85 	return ret;
86 }
87 
88 static int ad7606_read_samples(struct ad7606_state *st)
89 {
90 	unsigned int num = st->chip_info->num_channels - 1;
91 	u16 *data = st->data;
92 
93 	return st->bops->read_block(st->dev, num, data);
94 }
95 
96 static irqreturn_t ad7606_trigger_handler(int irq, void *p)
97 {
98 	struct iio_poll_func *pf = p;
99 	struct iio_dev *indio_dev = pf->indio_dev;
100 	struct ad7606_state *st = iio_priv(indio_dev);
101 	int ret;
102 
103 	mutex_lock(&st->lock);
104 
105 	ret = ad7606_read_samples(st);
106 	if (ret == 0)
107 		iio_push_to_buffers_with_timestamp(indio_dev, st->data,
108 						   iio_get_time_ns(indio_dev));
109 
110 	iio_trigger_notify_done(indio_dev->trig);
111 	/* The rising edge of the CONVST signal starts a new conversion. */
112 	gpiod_set_value(st->gpio_convst, 1);
113 
114 	mutex_unlock(&st->lock);
115 
116 	return IRQ_HANDLED;
117 }
118 
119 static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch)
120 {
121 	struct ad7606_state *st = iio_priv(indio_dev);
122 	int ret;
123 
124 	gpiod_set_value(st->gpio_convst, 1);
125 	ret = wait_for_completion_timeout(&st->completion,
126 					  msecs_to_jiffies(1000));
127 	if (!ret) {
128 		ret = -ETIMEDOUT;
129 		goto error_ret;
130 	}
131 
132 	ret = ad7606_read_samples(st);
133 	if (ret == 0)
134 		ret = st->data[ch];
135 
136 error_ret:
137 	gpiod_set_value(st->gpio_convst, 0);
138 
139 	return ret;
140 }
141 
142 static int ad7606_read_raw(struct iio_dev *indio_dev,
143 			   struct iio_chan_spec const *chan,
144 			   int *val,
145 			   int *val2,
146 			   long m)
147 {
148 	int ret, ch = 0;
149 	struct ad7606_state *st = iio_priv(indio_dev);
150 
151 	switch (m) {
152 	case IIO_CHAN_INFO_RAW:
153 		iio_device_claim_direct_scoped(return -EBUSY, indio_dev) {
154 			ret = ad7606_scan_direct(indio_dev, chan->address);
155 			if (ret < 0)
156 				return ret;
157 			*val = (short) ret;
158 			return IIO_VAL_INT;
159 		}
160 		unreachable();
161 	case IIO_CHAN_INFO_SCALE:
162 		if (st->sw_mode_en)
163 			ch = chan->address;
164 		*val = 0;
165 		*val2 = st->scale_avail[st->range[ch]];
166 		return IIO_VAL_INT_PLUS_MICRO;
167 	case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
168 		*val = st->oversampling;
169 		return IIO_VAL_INT;
170 	}
171 	return -EINVAL;
172 }
173 
174 static ssize_t ad7606_show_avail(char *buf, const unsigned int *vals,
175 				 unsigned int n, bool micros)
176 {
177 	size_t len = 0;
178 	int i;
179 
180 	for (i = 0; i < n; i++) {
181 		len += scnprintf(buf + len, PAGE_SIZE - len,
182 			micros ? "0.%06u " : "%u ", vals[i]);
183 	}
184 	buf[len - 1] = '\n';
185 
186 	return len;
187 }
188 
189 static ssize_t in_voltage_scale_available_show(struct device *dev,
190 					       struct device_attribute *attr,
191 					       char *buf)
192 {
193 	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
194 	struct ad7606_state *st = iio_priv(indio_dev);
195 
196 	return ad7606_show_avail(buf, st->scale_avail, st->num_scales, true);
197 }
198 
199 static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0);
200 
201 static int ad7606_write_scale_hw(struct iio_dev *indio_dev, int ch, int val)
202 {
203 	struct ad7606_state *st = iio_priv(indio_dev);
204 
205 	gpiod_set_value(st->gpio_range, val);
206 
207 	return 0;
208 }
209 
210 static int ad7606_write_os_hw(struct iio_dev *indio_dev, int val)
211 {
212 	struct ad7606_state *st = iio_priv(indio_dev);
213 	DECLARE_BITMAP(values, 3);
214 
215 	values[0] = val;
216 
217 	gpiod_set_array_value(ARRAY_SIZE(values), st->gpio_os->desc,
218 			      st->gpio_os->info, values);
219 
220 	/* AD7616 requires a reset to update value */
221 	if (st->chip_info->os_req_reset)
222 		ad7606_reset(st);
223 
224 	return 0;
225 }
226 
227 static int ad7606_write_raw(struct iio_dev *indio_dev,
228 			    struct iio_chan_spec const *chan,
229 			    int val,
230 			    int val2,
231 			    long mask)
232 {
233 	struct ad7606_state *st = iio_priv(indio_dev);
234 	int i, ret, ch = 0;
235 
236 	switch (mask) {
237 	case IIO_CHAN_INFO_SCALE:
238 		mutex_lock(&st->lock);
239 		i = find_closest(val2, st->scale_avail, st->num_scales);
240 		if (st->sw_mode_en)
241 			ch = chan->address;
242 		ret = st->write_scale(indio_dev, ch, i);
243 		if (ret < 0) {
244 			mutex_unlock(&st->lock);
245 			return ret;
246 		}
247 		st->range[ch] = i;
248 		mutex_unlock(&st->lock);
249 
250 		return 0;
251 	case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
252 		if (val2)
253 			return -EINVAL;
254 		i = find_closest(val, st->oversampling_avail,
255 				 st->num_os_ratios);
256 		mutex_lock(&st->lock);
257 		ret = st->write_os(indio_dev, i);
258 		if (ret < 0) {
259 			mutex_unlock(&st->lock);
260 			return ret;
261 		}
262 		st->oversampling = st->oversampling_avail[i];
263 		mutex_unlock(&st->lock);
264 
265 		return 0;
266 	default:
267 		return -EINVAL;
268 	}
269 }
270 
271 static ssize_t ad7606_oversampling_ratio_avail(struct device *dev,
272 					       struct device_attribute *attr,
273 					       char *buf)
274 {
275 	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
276 	struct ad7606_state *st = iio_priv(indio_dev);
277 
278 	return ad7606_show_avail(buf, st->oversampling_avail,
279 				 st->num_os_ratios, false);
280 }
281 
282 static IIO_DEVICE_ATTR(oversampling_ratio_available, 0444,
283 		       ad7606_oversampling_ratio_avail, NULL, 0);
284 
285 static struct attribute *ad7606_attributes_os_and_range[] = {
286 	&iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
287 	&iio_dev_attr_oversampling_ratio_available.dev_attr.attr,
288 	NULL,
289 };
290 
291 static const struct attribute_group ad7606_attribute_group_os_and_range = {
292 	.attrs = ad7606_attributes_os_and_range,
293 };
294 
295 static struct attribute *ad7606_attributes_os[] = {
296 	&iio_dev_attr_oversampling_ratio_available.dev_attr.attr,
297 	NULL,
298 };
299 
300 static const struct attribute_group ad7606_attribute_group_os = {
301 	.attrs = ad7606_attributes_os,
302 };
303 
304 static struct attribute *ad7606_attributes_range[] = {
305 	&iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
306 	NULL,
307 };
308 
309 static const struct attribute_group ad7606_attribute_group_range = {
310 	.attrs = ad7606_attributes_range,
311 };
312 
313 static const struct iio_chan_spec ad7605_channels[] = {
314 	IIO_CHAN_SOFT_TIMESTAMP(4),
315 	AD7605_CHANNEL(0),
316 	AD7605_CHANNEL(1),
317 	AD7605_CHANNEL(2),
318 	AD7605_CHANNEL(3),
319 };
320 
321 static const struct iio_chan_spec ad7606_channels[] = {
322 	IIO_CHAN_SOFT_TIMESTAMP(8),
323 	AD7606_CHANNEL(0),
324 	AD7606_CHANNEL(1),
325 	AD7606_CHANNEL(2),
326 	AD7606_CHANNEL(3),
327 	AD7606_CHANNEL(4),
328 	AD7606_CHANNEL(5),
329 	AD7606_CHANNEL(6),
330 	AD7606_CHANNEL(7),
331 };
332 
333 /*
334  * The current assumption that this driver makes for AD7616, is that it's
335  * working in Hardware Mode with Serial, Burst and Sequencer modes activated.
336  * To activate them, following pins must be pulled high:
337  *	-SER/PAR
338  *	-SEQEN
339  * And following pins must be pulled low:
340  *	-WR/BURST
341  *	-DB4/SER1W
342  */
343 static const struct iio_chan_spec ad7616_channels[] = {
344 	IIO_CHAN_SOFT_TIMESTAMP(16),
345 	AD7606_CHANNEL(0),
346 	AD7606_CHANNEL(1),
347 	AD7606_CHANNEL(2),
348 	AD7606_CHANNEL(3),
349 	AD7606_CHANNEL(4),
350 	AD7606_CHANNEL(5),
351 	AD7606_CHANNEL(6),
352 	AD7606_CHANNEL(7),
353 	AD7606_CHANNEL(8),
354 	AD7606_CHANNEL(9),
355 	AD7606_CHANNEL(10),
356 	AD7606_CHANNEL(11),
357 	AD7606_CHANNEL(12),
358 	AD7606_CHANNEL(13),
359 	AD7606_CHANNEL(14),
360 	AD7606_CHANNEL(15),
361 };
362 
363 static const struct ad7606_chip_info ad7606_chip_info_tbl[] = {
364 	/* More devices added in future */
365 	[ID_AD7605_4] = {
366 		.channels = ad7605_channels,
367 		.num_channels = 5,
368 	},
369 	[ID_AD7606_8] = {
370 		.channels = ad7606_channels,
371 		.num_channels = 9,
372 		.oversampling_avail = ad7606_oversampling_avail,
373 		.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
374 	},
375 	[ID_AD7606_6] = {
376 		.channels = ad7606_channels,
377 		.num_channels = 7,
378 		.oversampling_avail = ad7606_oversampling_avail,
379 		.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
380 	},
381 	[ID_AD7606_4] = {
382 		.channels = ad7606_channels,
383 		.num_channels = 5,
384 		.oversampling_avail = ad7606_oversampling_avail,
385 		.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
386 	},
387 	[ID_AD7606B] = {
388 		.channels = ad7606_channels,
389 		.num_channels = 9,
390 		.oversampling_avail = ad7606_oversampling_avail,
391 		.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
392 	},
393 	[ID_AD7616] = {
394 		.channels = ad7616_channels,
395 		.num_channels = 17,
396 		.oversampling_avail = ad7616_oversampling_avail,
397 		.oversampling_num = ARRAY_SIZE(ad7616_oversampling_avail),
398 		.os_req_reset = true,
399 		.init_delay_ms = 15,
400 	},
401 };
402 
403 static int ad7606_request_gpios(struct ad7606_state *st)
404 {
405 	struct device *dev = st->dev;
406 
407 	st->gpio_convst = devm_gpiod_get(dev, "adi,conversion-start",
408 					 GPIOD_OUT_LOW);
409 	if (IS_ERR(st->gpio_convst))
410 		return PTR_ERR(st->gpio_convst);
411 
412 	st->gpio_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
413 	if (IS_ERR(st->gpio_reset))
414 		return PTR_ERR(st->gpio_reset);
415 
416 	st->gpio_range = devm_gpiod_get_optional(dev, "adi,range",
417 						 GPIOD_OUT_LOW);
418 	if (IS_ERR(st->gpio_range))
419 		return PTR_ERR(st->gpio_range);
420 
421 	st->gpio_standby = devm_gpiod_get_optional(dev, "standby",
422 						   GPIOD_OUT_HIGH);
423 	if (IS_ERR(st->gpio_standby))
424 		return PTR_ERR(st->gpio_standby);
425 
426 	st->gpio_frstdata = devm_gpiod_get_optional(dev, "adi,first-data",
427 						    GPIOD_IN);
428 	if (IS_ERR(st->gpio_frstdata))
429 		return PTR_ERR(st->gpio_frstdata);
430 
431 	if (!st->chip_info->oversampling_num)
432 		return 0;
433 
434 	st->gpio_os = devm_gpiod_get_array_optional(dev,
435 						    "adi,oversampling-ratio",
436 						    GPIOD_OUT_LOW);
437 	return PTR_ERR_OR_ZERO(st->gpio_os);
438 }
439 
440 /*
441  * The BUSY signal indicates when conversions are in progress, so when a rising
442  * edge of CONVST is applied, BUSY goes logic high and transitions low at the
443  * end of the entire conversion process. The falling edge of the BUSY signal
444  * triggers this interrupt.
445  */
446 static irqreturn_t ad7606_interrupt(int irq, void *dev_id)
447 {
448 	struct iio_dev *indio_dev = dev_id;
449 	struct ad7606_state *st = iio_priv(indio_dev);
450 
451 	if (iio_buffer_enabled(indio_dev)) {
452 		gpiod_set_value(st->gpio_convst, 0);
453 		iio_trigger_poll_nested(st->trig);
454 	} else {
455 		complete(&st->completion);
456 	}
457 
458 	return IRQ_HANDLED;
459 };
460 
461 static int ad7606_validate_trigger(struct iio_dev *indio_dev,
462 				   struct iio_trigger *trig)
463 {
464 	struct ad7606_state *st = iio_priv(indio_dev);
465 
466 	if (st->trig != trig)
467 		return -EINVAL;
468 
469 	return 0;
470 }
471 
472 static int ad7606_buffer_postenable(struct iio_dev *indio_dev)
473 {
474 	struct ad7606_state *st = iio_priv(indio_dev);
475 
476 	gpiod_set_value(st->gpio_convst, 1);
477 
478 	return 0;
479 }
480 
481 static int ad7606_buffer_predisable(struct iio_dev *indio_dev)
482 {
483 	struct ad7606_state *st = iio_priv(indio_dev);
484 
485 	gpiod_set_value(st->gpio_convst, 0);
486 
487 	return 0;
488 }
489 
490 static const struct iio_buffer_setup_ops ad7606_buffer_ops = {
491 	.postenable = &ad7606_buffer_postenable,
492 	.predisable = &ad7606_buffer_predisable,
493 };
494 
495 static const struct iio_info ad7606_info_no_os_or_range = {
496 	.read_raw = &ad7606_read_raw,
497 	.validate_trigger = &ad7606_validate_trigger,
498 };
499 
500 static const struct iio_info ad7606_info_os_and_range = {
501 	.read_raw = &ad7606_read_raw,
502 	.write_raw = &ad7606_write_raw,
503 	.attrs = &ad7606_attribute_group_os_and_range,
504 	.validate_trigger = &ad7606_validate_trigger,
505 };
506 
507 static const struct iio_info ad7606_info_os_range_and_debug = {
508 	.read_raw = &ad7606_read_raw,
509 	.write_raw = &ad7606_write_raw,
510 	.debugfs_reg_access = &ad7606_reg_access,
511 	.attrs = &ad7606_attribute_group_os_and_range,
512 	.validate_trigger = &ad7606_validate_trigger,
513 };
514 
515 static const struct iio_info ad7606_info_os = {
516 	.read_raw = &ad7606_read_raw,
517 	.write_raw = &ad7606_write_raw,
518 	.attrs = &ad7606_attribute_group_os,
519 	.validate_trigger = &ad7606_validate_trigger,
520 };
521 
522 static const struct iio_info ad7606_info_range = {
523 	.read_raw = &ad7606_read_raw,
524 	.write_raw = &ad7606_write_raw,
525 	.attrs = &ad7606_attribute_group_range,
526 	.validate_trigger = &ad7606_validate_trigger,
527 };
528 
529 static const struct iio_trigger_ops ad7606_trigger_ops = {
530 	.validate_device = iio_trigger_validate_own_device,
531 };
532 
533 int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
534 		 const char *name, unsigned int id,
535 		 const struct ad7606_bus_ops *bops)
536 {
537 	struct ad7606_state *st;
538 	int ret;
539 	struct iio_dev *indio_dev;
540 
541 	indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
542 	if (!indio_dev)
543 		return -ENOMEM;
544 
545 	st = iio_priv(indio_dev);
546 	dev_set_drvdata(dev, indio_dev);
547 
548 	st->dev = dev;
549 	mutex_init(&st->lock);
550 	st->bops = bops;
551 	st->base_address = base_address;
552 	/* tied to logic low, analog input range is +/- 5V */
553 	st->range[0] = 0;
554 	st->oversampling = 1;
555 	st->scale_avail = ad7606_scale_avail;
556 	st->num_scales = ARRAY_SIZE(ad7606_scale_avail);
557 
558 	ret = devm_regulator_get_enable(dev, "avcc");
559 	if (ret)
560 		return dev_err_probe(dev, ret,
561 				     "Failed to enable specified AVcc supply\n");
562 
563 	st->chip_info = &ad7606_chip_info_tbl[id];
564 
565 	if (st->chip_info->oversampling_num) {
566 		st->oversampling_avail = st->chip_info->oversampling_avail;
567 		st->num_os_ratios = st->chip_info->oversampling_num;
568 	}
569 
570 	ret = ad7606_request_gpios(st);
571 	if (ret)
572 		return ret;
573 
574 	if (st->gpio_os) {
575 		if (st->gpio_range)
576 			indio_dev->info = &ad7606_info_os_and_range;
577 		else
578 			indio_dev->info = &ad7606_info_os;
579 	} else {
580 		if (st->gpio_range)
581 			indio_dev->info = &ad7606_info_range;
582 		else
583 			indio_dev->info = &ad7606_info_no_os_or_range;
584 	}
585 	indio_dev->modes = INDIO_DIRECT_MODE;
586 	indio_dev->name = name;
587 	indio_dev->channels = st->chip_info->channels;
588 	indio_dev->num_channels = st->chip_info->num_channels;
589 
590 	init_completion(&st->completion);
591 
592 	ret = ad7606_reset(st);
593 	if (ret)
594 		dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n");
595 
596 	/* AD7616 requires al least 15ms to reconfigure after a reset */
597 	if (st->chip_info->init_delay_ms) {
598 		if (msleep_interruptible(st->chip_info->init_delay_ms))
599 			return -ERESTARTSYS;
600 	}
601 
602 	st->write_scale = ad7606_write_scale_hw;
603 	st->write_os = ad7606_write_os_hw;
604 
605 	if (st->bops->sw_mode_config)
606 		st->sw_mode_en = device_property_present(st->dev,
607 							 "adi,sw-mode");
608 
609 	if (st->sw_mode_en) {
610 		/* Scale of 0.076293 is only available in sw mode */
611 		st->scale_avail = ad7616_sw_scale_avail;
612 		st->num_scales = ARRAY_SIZE(ad7616_sw_scale_avail);
613 
614 		/* After reset, in software mode, ±10 V is set by default */
615 		memset32(st->range, 2, ARRAY_SIZE(st->range));
616 		indio_dev->info = &ad7606_info_os_range_and_debug;
617 
618 		ret = st->bops->sw_mode_config(indio_dev);
619 		if (ret < 0)
620 			return ret;
621 	}
622 
623 	st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
624 					  indio_dev->name,
625 					  iio_device_id(indio_dev));
626 	if (!st->trig)
627 		return -ENOMEM;
628 
629 	st->trig->ops = &ad7606_trigger_ops;
630 	iio_trigger_set_drvdata(st->trig, indio_dev);
631 	ret = devm_iio_trigger_register(dev, st->trig);
632 	if (ret)
633 		return ret;
634 
635 	indio_dev->trig = iio_trigger_get(st->trig);
636 
637 	ret = devm_request_threaded_irq(dev, irq,
638 					NULL,
639 					&ad7606_interrupt,
640 					IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
641 					name, indio_dev);
642 	if (ret)
643 		return ret;
644 
645 	ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
646 					      &iio_pollfunc_store_time,
647 					      &ad7606_trigger_handler,
648 					      &ad7606_buffer_ops);
649 	if (ret)
650 		return ret;
651 
652 	return devm_iio_device_register(dev, indio_dev);
653 }
654 EXPORT_SYMBOL_NS_GPL(ad7606_probe, IIO_AD7606);
655 
656 #ifdef CONFIG_PM_SLEEP
657 
658 static int ad7606_suspend(struct device *dev)
659 {
660 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
661 	struct ad7606_state *st = iio_priv(indio_dev);
662 
663 	if (st->gpio_standby) {
664 		gpiod_set_value(st->gpio_range, 1);
665 		gpiod_set_value(st->gpio_standby, 0);
666 	}
667 
668 	return 0;
669 }
670 
671 static int ad7606_resume(struct device *dev)
672 {
673 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
674 	struct ad7606_state *st = iio_priv(indio_dev);
675 
676 	if (st->gpio_standby) {
677 		gpiod_set_value(st->gpio_range, st->range[0]);
678 		gpiod_set_value(st->gpio_standby, 1);
679 		ad7606_reset(st);
680 	}
681 
682 	return 0;
683 }
684 
685 SIMPLE_DEV_PM_OPS(ad7606_pm_ops, ad7606_suspend, ad7606_resume);
686 EXPORT_SYMBOL_NS_GPL(ad7606_pm_ops, IIO_AD7606);
687 
688 #endif
689 
690 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
691 MODULE_DESCRIPTION("Analog Devices AD7606 ADC");
692 MODULE_LICENSE("GPL v2");
693