1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Analog Devices AD7466/7/8 AD7476/5/7/8 (A) SPI ADC driver 4 * TI ADC081S/ADC101S/ADC121S 8/10/12-bit SPI ADC driver 5 * 6 * Copyright 2010 Analog Devices Inc. 7 */ 8 9 #include <linux/bitops.h> 10 #include <linux/device.h> 11 #include <linux/kernel.h> 12 #include <linux/slab.h> 13 #include <linux/sysfs.h> 14 #include <linux/spi/spi.h> 15 #include <linux/regulator/consumer.h> 16 #include <linux/gpio/consumer.h> 17 #include <linux/err.h> 18 #include <linux/module.h> 19 #include <linux/bitops.h> 20 #include <linux/delay.h> 21 22 #include <linux/iio/iio.h> 23 #include <linux/iio/sysfs.h> 24 #include <linux/iio/buffer.h> 25 #include <linux/iio/trigger_consumer.h> 26 #include <linux/iio/triggered_buffer.h> 27 28 struct ad7476_state; 29 30 struct ad7476_chip_info { 31 unsigned int int_vref_mv; 32 struct iio_chan_spec channel[2]; 33 void (*reset)(struct ad7476_state *); 34 void (*conversion_pre_op)(struct ad7476_state *st); 35 void (*conversion_post_op)(struct ad7476_state *st); 36 bool has_vref; 37 bool has_vdrive; 38 bool convstart_required; 39 }; 40 41 struct ad7476_state { 42 struct spi_device *spi; 43 const struct ad7476_chip_info *chip_info; 44 struct gpio_desc *convst_gpio; 45 struct spi_transfer xfer; 46 struct spi_message msg; 47 struct iio_chan_spec channel[2]; 48 int scale_mv; 49 /* 50 * DMA (thus cache coherency maintenance) may require the 51 * transfer buffers to live in their own cache lines. 52 * Make the buffer large enough for one 16 bit sample and one 64 bit 53 * aligned 64 bit timestamp. 54 */ 55 unsigned char data[ALIGN(2, sizeof(s64)) + sizeof(s64)] __aligned(IIO_DMA_MINALIGN); 56 }; 57 58 static void ad7091_convst(struct ad7476_state *st) 59 { 60 if (!st->convst_gpio) 61 return; 62 63 gpiod_set_value_cansleep(st->convst_gpio, 0); 64 udelay(1); /* CONVST pulse width: 10 ns min */ 65 gpiod_set_value_cansleep(st->convst_gpio, 1); 66 udelay(1); /* Conversion time: 650 ns max */ 67 } 68 69 static void bd79105_convst_disable(struct ad7476_state *st) 70 { 71 gpiod_set_value_cansleep(st->convst_gpio, 0); 72 } 73 74 static void bd79105_convst_enable(struct ad7476_state *st) 75 { 76 gpiod_set_value_cansleep(st->convst_gpio, 1); 77 /* Worst case, 2790 ns required for conversion */ 78 ndelay(2790); 79 } 80 81 static irqreturn_t ad7476_trigger_handler(int irq, void *p) 82 { 83 struct iio_poll_func *pf = p; 84 struct iio_dev *indio_dev = pf->indio_dev; 85 struct ad7476_state *st = iio_priv(indio_dev); 86 int b_sent; 87 88 if (st->chip_info->conversion_pre_op) 89 st->chip_info->conversion_pre_op(st); 90 91 b_sent = spi_sync(st->spi, &st->msg); 92 if (b_sent < 0) 93 goto done; 94 95 iio_push_to_buffers_with_ts(indio_dev, st->data, sizeof(st->data), 96 iio_get_time_ns(indio_dev)); 97 done: 98 if (st->chip_info->conversion_post_op) 99 st->chip_info->conversion_post_op(st); 100 iio_trigger_notify_done(indio_dev->trig); 101 102 return IRQ_HANDLED; 103 } 104 105 static void ad7091_reset(struct ad7476_state *st) 106 { 107 /* Any transfers with 8 scl cycles will reset the device */ 108 spi_read(st->spi, st->data, 1); 109 } 110 111 static int ad7476_scan_direct(struct ad7476_state *st) 112 { 113 int ret; 114 115 if (st->chip_info->conversion_pre_op) 116 st->chip_info->conversion_pre_op(st); 117 118 ret = spi_sync(st->spi, &st->msg); 119 if (ret) 120 return ret; 121 122 if (st->chip_info->conversion_post_op) 123 st->chip_info->conversion_post_op(st); 124 125 return be16_to_cpup((__be16 *)st->data); 126 } 127 128 static int ad7476_read_raw(struct iio_dev *indio_dev, 129 struct iio_chan_spec const *chan, 130 int *val, 131 int *val2, 132 long m) 133 { 134 int ret; 135 struct ad7476_state *st = iio_priv(indio_dev); 136 137 switch (m) { 138 case IIO_CHAN_INFO_RAW: 139 if (!iio_device_claim_direct(indio_dev)) 140 return -EBUSY; 141 ret = ad7476_scan_direct(st); 142 iio_device_release_direct(indio_dev); 143 144 if (ret < 0) 145 return ret; 146 *val = (ret >> chan->scan_type.shift) & 147 GENMASK(chan->scan_type.realbits - 1, 0); 148 return IIO_VAL_INT; 149 case IIO_CHAN_INFO_SCALE: 150 *val = st->scale_mv; 151 *val2 = chan->scan_type.realbits; 152 return IIO_VAL_FRACTIONAL_LOG2; 153 } 154 return -EINVAL; 155 } 156 157 #define _AD7476_CHAN(bits, _shift, _info_mask_sep) \ 158 { \ 159 .type = IIO_VOLTAGE, \ 160 .indexed = 1, \ 161 .info_mask_separate = _info_mask_sep, \ 162 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 163 .scan_type = { \ 164 .sign = 'u', \ 165 .realbits = (bits), \ 166 .storagebits = 16, \ 167 .shift = (_shift), \ 168 .endianness = IIO_BE, \ 169 }, \ 170 } 171 172 #define ADC081S_CHAN(bits) _AD7476_CHAN((bits), 12 - (bits), \ 173 BIT(IIO_CHAN_INFO_RAW)) 174 #define AD7476_CHAN(bits) _AD7476_CHAN((bits), 13 - (bits), \ 175 BIT(IIO_CHAN_INFO_RAW)) 176 #define AD7940_CHAN(bits) _AD7476_CHAN((bits), 15 - (bits), \ 177 BIT(IIO_CHAN_INFO_RAW)) 178 #define AD7091R_CHAN(bits) _AD7476_CHAN((bits), 16 - (bits), 0) 179 #define ADS786X_CHAN(bits) _AD7476_CHAN((bits), 12 - (bits), \ 180 BIT(IIO_CHAN_INFO_RAW)) 181 182 static const struct ad7476_chip_info ad7091_chip_info = { 183 .channel[0] = AD7091R_CHAN(12), 184 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 185 .conversion_pre_op = ad7091_convst, 186 .reset = ad7091_reset, 187 }; 188 189 static const struct ad7476_chip_info ad7091r_chip_info = { 190 .channel[0] = AD7091R_CHAN(12), 191 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 192 .conversion_pre_op = ad7091_convst, 193 .int_vref_mv = 2500, 194 .has_vref = true, 195 .reset = ad7091_reset, 196 }; 197 198 static const struct ad7476_chip_info ad7273_chip_info = { 199 .channel[0] = AD7940_CHAN(10), 200 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 201 .has_vref = true, 202 }; 203 204 static const struct ad7476_chip_info ad7274_chip_info = { 205 .channel[0] = AD7940_CHAN(12), 206 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 207 .has_vref = true, 208 }; 209 210 static const struct ad7476_chip_info ad7276_chip_info = { 211 .channel[0] = AD7940_CHAN(12), 212 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 213 }; 214 215 static const struct ad7476_chip_info ad7277_chip_info = { 216 .channel[0] = AD7940_CHAN(10), 217 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 218 }; 219 220 static const struct ad7476_chip_info ad7278_chip_info = { 221 .channel[0] = AD7940_CHAN(8), 222 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 223 }; 224 225 static const struct ad7476_chip_info ad7466_chip_info = { 226 .channel[0] = AD7476_CHAN(12), 227 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 228 }; 229 230 static const struct ad7476_chip_info ad7467_chip_info = { 231 .channel[0] = AD7476_CHAN(10), 232 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 233 }; 234 235 static const struct ad7476_chip_info ad7468_chip_info = { 236 .channel[0] = AD7476_CHAN(8), 237 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 238 }; 239 240 static const struct ad7476_chip_info ad7475_chip_info = { 241 .channel[0] = AD7476_CHAN(12), 242 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 243 .has_vref = true, 244 .has_vdrive = true, 245 }; 246 247 static const struct ad7476_chip_info ad7495_chip_info = { 248 .channel[0] = AD7476_CHAN(12), 249 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 250 .int_vref_mv = 2500, 251 .has_vdrive = true, 252 }; 253 254 static const struct ad7476_chip_info ad7940_chip_info = { 255 .channel[0] = AD7940_CHAN(14), 256 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 257 }; 258 259 static const struct ad7476_chip_info adc081s_chip_info = { 260 .channel[0] = ADC081S_CHAN(8), 261 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 262 }; 263 264 static const struct ad7476_chip_info adc101s_chip_info = { 265 .channel[0] = ADC081S_CHAN(10), 266 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 267 }; 268 269 static const struct ad7476_chip_info adc121s_chip_info = { 270 .channel[0] = ADC081S_CHAN(12), 271 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 272 }; 273 274 static const struct ad7476_chip_info ads7866_chip_info = { 275 .channel[0] = ADS786X_CHAN(12), 276 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 277 }; 278 279 static const struct ad7476_chip_info ads7867_chip_info = { 280 .channel[0] = ADS786X_CHAN(10), 281 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 282 }; 283 284 static const struct ad7476_chip_info ads7868_chip_info = { 285 .channel[0] = ADS786X_CHAN(8), 286 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 287 }; 288 289 static const struct ad7476_chip_info ltc2314_14_chip_info = { 290 .channel[0] = AD7940_CHAN(14), 291 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 292 .has_vref = true, 293 }; 294 295 static const struct ad7476_chip_info bd79105_chip_info = { 296 .channel[0] = AD7091R_CHAN(16), 297 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 298 /* 299 * The BD79105 starts ADC data conversion when the CONVSTART line is 300 * set HIGH. The CONVSTART must be kept HIGH until the data has been 301 * read from the ADC. 302 */ 303 .conversion_pre_op = bd79105_convst_enable, 304 .conversion_post_op = bd79105_convst_disable, 305 /* BD79105 won't do conversion without convstart */ 306 .convstart_required = true, 307 .has_vref = true, 308 .has_vdrive = true, 309 }; 310 311 static const struct iio_info ad7476_info = { 312 .read_raw = &ad7476_read_raw, 313 }; 314 315 static int ad7476_probe(struct spi_device *spi) 316 { 317 struct ad7476_state *st; 318 struct iio_dev *indio_dev; 319 unsigned int i; 320 int ret; 321 322 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 323 if (!indio_dev) 324 return -ENOMEM; 325 326 st = iio_priv(indio_dev); 327 328 st->chip_info = spi_get_device_match_data(spi); 329 if (!st->chip_info) 330 return -ENODEV; 331 332 /* Use VCC for reference voltage if vref / internal vref aren't used */ 333 if (!st->chip_info->int_vref_mv && !st->chip_info->has_vref) { 334 ret = devm_regulator_get_enable_read_voltage(&spi->dev, "vcc"); 335 if (ret < 0) 336 return ret; 337 st->scale_mv = ret / 1000; 338 } else { 339 ret = devm_regulator_get_enable(&spi->dev, "vcc"); 340 if (ret < 0) 341 return ret; 342 } 343 344 if (st->chip_info->has_vref) { 345 ret = devm_regulator_get_enable_read_voltage(&spi->dev, "vref"); 346 if (ret < 0) { 347 /* Vref is optional if a device has an internal reference */ 348 if (!st->chip_info->int_vref_mv || ret != -ENODEV) 349 return ret; 350 } else { 351 st->scale_mv = ret / 1000; 352 } 353 } 354 355 if (!st->scale_mv) 356 st->scale_mv = st->chip_info->int_vref_mv; 357 358 if (st->chip_info->has_vdrive) { 359 ret = devm_regulator_get_enable(&spi->dev, "vdrive"); 360 if (ret) 361 return ret; 362 } 363 364 st->convst_gpio = devm_gpiod_get_optional(&spi->dev, 365 "adi,conversion-start", 366 GPIOD_OUT_LOW); 367 if (IS_ERR(st->convst_gpio)) 368 return PTR_ERR(st->convst_gpio); 369 370 if (st->chip_info->convstart_required && !st->convst_gpio) 371 return dev_err_probe(&spi->dev, -EINVAL, "No convstart GPIO\n"); 372 373 /* 374 * This will never happen. Unless someone changes the channel specs 375 * in this driver. And if someone does, without changing the loop 376 * below, then we'd better immediately produce a big fat error, before 377 * the change proceeds from that developer's table. 378 */ 379 static_assert(ARRAY_SIZE(st->channel) == ARRAY_SIZE(st->chip_info->channel)); 380 for (i = 0; i < ARRAY_SIZE(st->channel); i++) { 381 st->channel[i] = st->chip_info->channel[i]; 382 if (st->convst_gpio) 383 __set_bit(IIO_CHAN_INFO_RAW, 384 &st->channel[i].info_mask_separate); 385 } 386 387 st->spi = spi; 388 389 indio_dev->name = spi_get_device_id(spi)->name; 390 indio_dev->modes = INDIO_DIRECT_MODE; 391 indio_dev->channels = st->channel; 392 indio_dev->num_channels = ARRAY_SIZE(st->channel); 393 indio_dev->info = &ad7476_info; 394 395 /* Setup default message */ 396 397 st->xfer.rx_buf = &st->data; 398 st->xfer.len = indio_dev->channels[0].scan_type.storagebits / 8; 399 400 spi_message_init(&st->msg); 401 spi_message_add_tail(&st->xfer, &st->msg); 402 403 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, NULL, 404 &ad7476_trigger_handler, NULL); 405 if (ret) 406 return ret; 407 408 if (st->chip_info->reset) 409 st->chip_info->reset(st); 410 411 return devm_iio_device_register(&spi->dev, indio_dev); 412 } 413 414 static const struct spi_device_id ad7476_id[] = { 415 { "ad7091", (kernel_ulong_t)&ad7091_chip_info }, 416 { "ad7091r", (kernel_ulong_t)&ad7091r_chip_info }, 417 { "ad7273", (kernel_ulong_t)&ad7273_chip_info }, 418 { "ad7274", (kernel_ulong_t)&ad7274_chip_info }, 419 { "ad7276", (kernel_ulong_t)&ad7276_chip_info }, 420 { "ad7277", (kernel_ulong_t)&ad7277_chip_info }, 421 { "ad7278", (kernel_ulong_t)&ad7278_chip_info }, 422 { "ad7466", (kernel_ulong_t)&ad7466_chip_info }, 423 { "ad7467", (kernel_ulong_t)&ad7467_chip_info }, 424 { "ad7468", (kernel_ulong_t)&ad7468_chip_info }, 425 { "ad7475", (kernel_ulong_t)&ad7475_chip_info }, 426 { "ad7476", (kernel_ulong_t)&ad7466_chip_info }, 427 { "ad7476a", (kernel_ulong_t)&ad7466_chip_info }, 428 { "ad7477", (kernel_ulong_t)&ad7467_chip_info }, 429 { "ad7477a", (kernel_ulong_t)&ad7467_chip_info }, 430 { "ad7478", (kernel_ulong_t)&ad7468_chip_info }, 431 { "ad7478a", (kernel_ulong_t)&ad7468_chip_info }, 432 { "ad7495", (kernel_ulong_t)&ad7495_chip_info }, 433 { "ad7910", (kernel_ulong_t)&ad7467_chip_info }, 434 { "ad7920", (kernel_ulong_t)&ad7466_chip_info }, 435 { "ad7940", (kernel_ulong_t)&ad7940_chip_info }, 436 { "adc081s", (kernel_ulong_t)&adc081s_chip_info }, 437 { "adc101s", (kernel_ulong_t)&adc101s_chip_info }, 438 { "adc121s", (kernel_ulong_t)&adc121s_chip_info }, 439 { "ads7866", (kernel_ulong_t)&ads7866_chip_info }, 440 { "ads7867", (kernel_ulong_t)&ads7867_chip_info }, 441 { "ads7868", (kernel_ulong_t)&ads7868_chip_info }, 442 { "bd79105", (kernel_ulong_t)&bd79105_chip_info }, 443 /* 444 * The ROHM BU79100G is identical to the TI's ADS7866 from the software 445 * point of view. The binding document mandates the ADS7866 to be 446 * marked as a fallback for the BU79100G, but we still need the SPI ID 447 * here to make the module loading work. 448 */ 449 { "bu79100g", (kernel_ulong_t)&ads7866_chip_info }, 450 { "ltc2314-14", (kernel_ulong_t)<c2314_14_chip_info }, 451 { } 452 }; 453 MODULE_DEVICE_TABLE(spi, ad7476_id); 454 455 static struct spi_driver ad7476_driver = { 456 .driver = { 457 .name = "ad7476", 458 }, 459 .probe = ad7476_probe, 460 .id_table = ad7476_id, 461 }; 462 module_spi_driver(ad7476_driver); 463 464 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); 465 MODULE_DESCRIPTION("Analog Devices AD7476 and similar 1-channel ADCs"); 466 MODULE_LICENSE("GPL v2"); 467