1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Analog Devices AD7292 SPI ADC driver 4 * 5 * Copyright 2019 Analog Devices Inc. 6 */ 7 8 #include <linux/bitfield.h> 9 #include <linux/device.h> 10 #include <linux/module.h> 11 #include <linux/mod_devicetable.h> 12 #include <linux/property.h> 13 #include <linux/regulator/consumer.h> 14 #include <linux/spi/spi.h> 15 16 #include <linux/iio/iio.h> 17 18 #define ADI_VENDOR_ID 0x0018 19 20 /* AD7292 registers definition */ 21 #define AD7292_REG_VENDOR_ID 0x00 22 #define AD7292_REG_CONF_BANK 0x05 23 #define AD7292_REG_CONV_COMM 0x0E 24 #define AD7292_REG_ADC_CH(x) (0x10 + (x)) 25 26 /* AD7292 configuration bank subregisters definition */ 27 #define AD7292_BANK_REG_VIN_RNG0 0x10 28 #define AD7292_BANK_REG_VIN_RNG1 0x11 29 #define AD7292_BANK_REG_SAMP_MODE 0x12 30 31 #define AD7292_RD_FLAG_MSK(x) (BIT(7) | ((x) & 0x3F)) 32 33 /* AD7292_REG_ADC_CONVERSION */ 34 #define AD7292_ADC_DATA_MASK GENMASK(15, 6) 35 #define AD7292_ADC_DATA(x) FIELD_GET(AD7292_ADC_DATA_MASK, x) 36 37 /* AD7292_CHANNEL_SAMPLING_MODE */ 38 #define AD7292_CH_SAMP_MODE(reg, ch) (((reg) >> 8) & BIT(ch)) 39 40 /* AD7292_CHANNEL_VIN_RANGE */ 41 #define AD7292_CH_VIN_RANGE(reg, ch) ((reg) & BIT(ch)) 42 43 #define AD7292_VOLTAGE_CHAN(_chan) \ 44 { \ 45 .type = IIO_VOLTAGE, \ 46 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 47 BIT(IIO_CHAN_INFO_SCALE), \ 48 .indexed = 1, \ 49 .channel = _chan, \ 50 } 51 52 static const struct iio_chan_spec ad7292_channels[] = { 53 AD7292_VOLTAGE_CHAN(0), 54 AD7292_VOLTAGE_CHAN(1), 55 AD7292_VOLTAGE_CHAN(2), 56 AD7292_VOLTAGE_CHAN(3), 57 AD7292_VOLTAGE_CHAN(4), 58 AD7292_VOLTAGE_CHAN(5), 59 AD7292_VOLTAGE_CHAN(6), 60 AD7292_VOLTAGE_CHAN(7) 61 }; 62 63 static const struct iio_chan_spec ad7292_channels_diff[] = { 64 { 65 .type = IIO_VOLTAGE, 66 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 67 .indexed = 1, 68 .differential = 1, 69 .channel = 0, 70 .channel2 = 1, 71 }, 72 AD7292_VOLTAGE_CHAN(2), 73 AD7292_VOLTAGE_CHAN(3), 74 AD7292_VOLTAGE_CHAN(4), 75 AD7292_VOLTAGE_CHAN(5), 76 AD7292_VOLTAGE_CHAN(6), 77 AD7292_VOLTAGE_CHAN(7) 78 }; 79 80 struct ad7292_state { 81 struct spi_device *spi; 82 struct regulator *reg; 83 unsigned short vref_mv; 84 85 __be16 d16 __aligned(IIO_DMA_MINALIGN); 86 u8 d8[2]; 87 }; 88 89 static int ad7292_spi_reg_read(struct ad7292_state *st, unsigned int addr) 90 { 91 int ret; 92 93 st->d8[0] = AD7292_RD_FLAG_MSK(addr); 94 95 ret = spi_write_then_read(st->spi, st->d8, 1, &st->d16, 2); 96 if (ret < 0) 97 return ret; 98 99 return be16_to_cpu(st->d16); 100 } 101 102 static int ad7292_spi_subreg_read(struct ad7292_state *st, unsigned int addr, 103 unsigned int sub_addr, unsigned int len) 104 { 105 unsigned int shift = 16 - (8 * len); 106 int ret; 107 108 st->d8[0] = AD7292_RD_FLAG_MSK(addr); 109 st->d8[1] = sub_addr; 110 111 ret = spi_write_then_read(st->spi, st->d8, 2, &st->d16, len); 112 if (ret < 0) 113 return ret; 114 115 return (be16_to_cpu(st->d16) >> shift); 116 } 117 118 static int ad7292_single_conversion(struct ad7292_state *st, 119 unsigned int chan_addr) 120 { 121 int ret; 122 123 struct spi_transfer t[] = { 124 { 125 .tx_buf = &st->d8, 126 .len = 4, 127 .delay = { 128 .value = 6, 129 .unit = SPI_DELAY_UNIT_USECS 130 }, 131 }, { 132 .rx_buf = &st->d16, 133 .len = 2, 134 }, 135 }; 136 137 st->d8[0] = chan_addr; 138 st->d8[1] = AD7292_RD_FLAG_MSK(AD7292_REG_CONV_COMM); 139 140 ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t)); 141 142 if (ret < 0) 143 return ret; 144 145 return be16_to_cpu(st->d16); 146 } 147 148 static int ad7292_vin_range_multiplier(struct ad7292_state *st, int channel) 149 { 150 int samp_mode, range0, range1, factor = 1; 151 152 /* 153 * Every AD7292 ADC channel may have its input range adjusted according 154 * to the settings at the ADC sampling mode and VIN range subregisters. 155 * For a given channel, the minimum input range is equal to Vref, and it 156 * may be increased by a multiplier factor of 2 or 4 according to the 157 * following rule: 158 * If channel is being sampled with respect to AGND: 159 * factor = 4 if VIN range0 and VIN range1 equal 0 160 * factor = 2 if only one of VIN ranges equal 1 161 * factor = 1 if both VIN range0 and VIN range1 equal 1 162 * If channel is being sampled with respect to AVDD: 163 * factor = 4 if VIN range0 and VIN range1 equal 0 164 * Behavior is undefined if any of VIN range doesn't equal 0 165 */ 166 167 samp_mode = ad7292_spi_subreg_read(st, AD7292_REG_CONF_BANK, 168 AD7292_BANK_REG_SAMP_MODE, 2); 169 170 if (samp_mode < 0) 171 return samp_mode; 172 173 range0 = ad7292_spi_subreg_read(st, AD7292_REG_CONF_BANK, 174 AD7292_BANK_REG_VIN_RNG0, 2); 175 176 if (range0 < 0) 177 return range0; 178 179 range1 = ad7292_spi_subreg_read(st, AD7292_REG_CONF_BANK, 180 AD7292_BANK_REG_VIN_RNG1, 2); 181 182 if (range1 < 0) 183 return range1; 184 185 if (AD7292_CH_SAMP_MODE(samp_mode, channel)) { 186 /* Sampling with respect to AGND */ 187 if (!AD7292_CH_VIN_RANGE(range0, channel)) 188 factor *= 2; 189 190 if (!AD7292_CH_VIN_RANGE(range1, channel)) 191 factor *= 2; 192 193 } else { 194 /* Sampling with respect to AVDD */ 195 if (AD7292_CH_VIN_RANGE(range0, channel) || 196 AD7292_CH_VIN_RANGE(range1, channel)) 197 return -EPERM; 198 199 factor = 4; 200 } 201 202 return factor; 203 } 204 205 static int ad7292_read_raw(struct iio_dev *indio_dev, 206 const struct iio_chan_spec *chan, 207 int *val, int *val2, long info) 208 { 209 struct ad7292_state *st = iio_priv(indio_dev); 210 unsigned int ch_addr; 211 int ret; 212 213 switch (info) { 214 case IIO_CHAN_INFO_RAW: 215 ch_addr = AD7292_REG_ADC_CH(chan->channel); 216 ret = ad7292_single_conversion(st, ch_addr); 217 if (ret < 0) 218 return ret; 219 220 *val = AD7292_ADC_DATA(ret); 221 222 return IIO_VAL_INT; 223 case IIO_CHAN_INFO_SCALE: 224 /* 225 * To convert a raw value to standard units, the IIO defines 226 * this formula: Scaled value = (raw + offset) * scale. 227 * For the scale to be a correct multiplier for (raw + offset), 228 * it must be calculated as the input range divided by the 229 * number of possible distinct input values. Given the ADC data 230 * is 10 bit long, it may assume 2^10 distinct values. 231 * Hence, scale = range / 2^10. The IIO_VAL_FRACTIONAL_LOG2 232 * return type indicates to the IIO API to divide *val by 2 to 233 * the power of *val2 when returning from read_raw. 234 */ 235 236 ret = ad7292_vin_range_multiplier(st, chan->channel); 237 if (ret < 0) 238 return ret; 239 240 *val = st->vref_mv * ret; 241 *val2 = 10; 242 return IIO_VAL_FRACTIONAL_LOG2; 243 default: 244 break; 245 } 246 return -EINVAL; 247 } 248 249 static const struct iio_info ad7292_info = { 250 .read_raw = ad7292_read_raw, 251 }; 252 253 static void ad7292_regulator_disable(void *data) 254 { 255 struct ad7292_state *st = data; 256 257 regulator_disable(st->reg); 258 } 259 260 static int ad7292_probe(struct spi_device *spi) 261 { 262 struct ad7292_state *st; 263 struct iio_dev *indio_dev; 264 bool diff_channels = false; 265 int ret; 266 267 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 268 if (!indio_dev) 269 return -ENOMEM; 270 271 st = iio_priv(indio_dev); 272 st->spi = spi; 273 274 ret = ad7292_spi_reg_read(st, AD7292_REG_VENDOR_ID); 275 if (ret != ADI_VENDOR_ID) { 276 dev_err(&spi->dev, "Wrong vendor id 0x%x\n", ret); 277 return -EINVAL; 278 } 279 280 st->reg = devm_regulator_get_optional(&spi->dev, "vref"); 281 if (!IS_ERR(st->reg)) { 282 ret = regulator_enable(st->reg); 283 if (ret) { 284 dev_err(&spi->dev, 285 "Failed to enable external vref supply\n"); 286 return ret; 287 } 288 289 ret = devm_add_action_or_reset(&spi->dev, 290 ad7292_regulator_disable, st); 291 if (ret) 292 return ret; 293 294 ret = regulator_get_voltage(st->reg); 295 if (ret < 0) 296 return ret; 297 298 st->vref_mv = ret / 1000; 299 } else { 300 /* Use the internal voltage reference. */ 301 st->vref_mv = 1250; 302 } 303 304 indio_dev->name = spi_get_device_id(spi)->name; 305 indio_dev->modes = INDIO_DIRECT_MODE; 306 indio_dev->info = &ad7292_info; 307 308 device_for_each_child_node_scoped(&spi->dev, child) { 309 diff_channels = fwnode_property_read_bool(child, 310 "diff-channels"); 311 if (diff_channels) 312 break; 313 } 314 315 if (diff_channels) { 316 indio_dev->num_channels = ARRAY_SIZE(ad7292_channels_diff); 317 indio_dev->channels = ad7292_channels_diff; 318 } else { 319 indio_dev->num_channels = ARRAY_SIZE(ad7292_channels); 320 indio_dev->channels = ad7292_channels; 321 } 322 323 return devm_iio_device_register(&spi->dev, indio_dev); 324 } 325 326 static const struct spi_device_id ad7292_id_table[] = { 327 { "ad7292", 0 }, 328 {} 329 }; 330 MODULE_DEVICE_TABLE(spi, ad7292_id_table); 331 332 static const struct of_device_id ad7292_of_match[] = { 333 { .compatible = "adi,ad7292" }, 334 { }, 335 }; 336 MODULE_DEVICE_TABLE(of, ad7292_of_match); 337 338 static struct spi_driver ad7292_driver = { 339 .driver = { 340 .name = "ad7292", 341 .of_match_table = ad7292_of_match, 342 }, 343 .probe = ad7292_probe, 344 .id_table = ad7292_id_table, 345 }; 346 module_spi_driver(ad7292_driver); 347 348 MODULE_AUTHOR("Marcelo Schmitt <marcelo.schmitt1@gmail.com>"); 349 MODULE_DESCRIPTION("Analog Devices AD7292 ADC driver"); 350 MODULE_LICENSE("GPL v2"); 351