xref: /linux/drivers/iio/adc/ad7266.c (revision fa8a4d3659d0c1ad73d5f59b2e0a6d408de5b317)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * AD7266/65 SPI ADC driver
4  *
5  * Copyright 2012 Analog Devices Inc.
6  */
7 
8 #include <linux/device.h>
9 #include <linux/kernel.h>
10 #include <linux/slab.h>
11 #include <linux/spi/spi.h>
12 #include <linux/regulator/consumer.h>
13 #include <linux/err.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/module.h>
16 
17 #include <linux/interrupt.h>
18 
19 #include <linux/iio/iio.h>
20 #include <linux/iio/buffer.h>
21 #include <linux/iio/trigger_consumer.h>
22 #include <linux/iio/triggered_buffer.h>
23 
24 #include <linux/platform_data/ad7266.h>
25 
26 #define AD7266_INTERNAL_REF_MV	2500
27 
28 struct ad7266_state {
29 	struct spi_device	*spi;
30 	unsigned long		vref_mv;
31 
32 	struct spi_transfer	single_xfer[3];
33 	struct spi_message	single_msg;
34 
35 	enum ad7266_range	range;
36 	enum ad7266_mode	mode;
37 	bool			fixed_addr;
38 	struct gpio_desc	*gpios[3];
39 
40 	/*
41 	 * DMA (thus cache coherency maintenance) may require the
42 	 * transfer buffers to live in their own cache lines.
43 	 * The buffer needs to be large enough to hold two samples (4 bytes) and
44 	 * the naturally aligned timestamp (8 bytes).
45 	 */
46 	struct {
47 		__be16 sample[2];
48 		s64 timestamp;
49 	} data __aligned(IIO_DMA_MINALIGN);
50 };
51 
52 static int ad7266_wakeup(struct ad7266_state *st)
53 {
54 	/* Any read with >= 2 bytes will wake the device */
55 	return spi_read(st->spi, &st->data.sample[0], 2);
56 }
57 
58 static int ad7266_powerdown(struct ad7266_state *st)
59 {
60 	/* Any read with < 2 bytes will powerdown the device */
61 	return spi_read(st->spi, &st->data.sample[0], 1);
62 }
63 
64 static int ad7266_preenable(struct iio_dev *indio_dev)
65 {
66 	struct ad7266_state *st = iio_priv(indio_dev);
67 	return ad7266_wakeup(st);
68 }
69 
70 static int ad7266_postdisable(struct iio_dev *indio_dev)
71 {
72 	struct ad7266_state *st = iio_priv(indio_dev);
73 	return ad7266_powerdown(st);
74 }
75 
76 static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = {
77 	.preenable = &ad7266_preenable,
78 	.postdisable = &ad7266_postdisable,
79 };
80 
81 static irqreturn_t ad7266_trigger_handler(int irq, void *p)
82 {
83 	struct iio_poll_func *pf = p;
84 	struct iio_dev *indio_dev = pf->indio_dev;
85 	struct ad7266_state *st = iio_priv(indio_dev);
86 	int ret;
87 
88 	ret = spi_read(st->spi, st->data.sample, 4);
89 	if (ret == 0) {
90 		iio_push_to_buffers_with_timestamp(indio_dev, &st->data,
91 			    pf->timestamp);
92 	}
93 
94 	iio_trigger_notify_done(indio_dev->trig);
95 
96 	return IRQ_HANDLED;
97 }
98 
99 static void ad7266_select_input(struct ad7266_state *st, unsigned int nr)
100 {
101 	unsigned int i;
102 
103 	if (st->fixed_addr)
104 		return;
105 
106 	switch (st->mode) {
107 	case AD7266_MODE_SINGLE_ENDED:
108 		nr >>= 1;
109 		break;
110 	case AD7266_MODE_PSEUDO_DIFF:
111 		nr |= 1;
112 		break;
113 	case AD7266_MODE_DIFF:
114 		nr &= ~1;
115 		break;
116 	}
117 
118 	for (i = 0; i < 3; ++i)
119 		gpiod_set_value(st->gpios[i], (bool)(nr & BIT(i)));
120 }
121 
122 static int ad7266_update_scan_mode(struct iio_dev *indio_dev,
123 	const unsigned long *scan_mask)
124 {
125 	struct ad7266_state *st = iio_priv(indio_dev);
126 	unsigned int nr = find_first_bit(scan_mask, indio_dev->masklength);
127 
128 	ad7266_select_input(st, nr);
129 
130 	return 0;
131 }
132 
133 static int ad7266_read_single(struct ad7266_state *st, int *val,
134 	unsigned int address)
135 {
136 	int ret;
137 
138 	ad7266_select_input(st, address);
139 
140 	ret = spi_sync(st->spi, &st->single_msg);
141 	*val = be16_to_cpu(st->data.sample[address % 2]);
142 
143 	return ret;
144 }
145 
146 static int ad7266_read_raw(struct iio_dev *indio_dev,
147 	struct iio_chan_spec const *chan, int *val, int *val2, long m)
148 {
149 	struct ad7266_state *st = iio_priv(indio_dev);
150 	unsigned long scale_mv;
151 	int ret;
152 
153 	switch (m) {
154 	case IIO_CHAN_INFO_RAW:
155 		ret = iio_device_claim_direct_mode(indio_dev);
156 		if (ret)
157 			return ret;
158 		ret = ad7266_read_single(st, val, chan->address);
159 		iio_device_release_direct_mode(indio_dev);
160 
161 		if (ret < 0)
162 			return ret;
163 		*val = (*val >> 2) & 0xfff;
164 		if (chan->scan_type.sign == 's')
165 			*val = sign_extend32(*val,
166 					     chan->scan_type.realbits - 1);
167 
168 		return IIO_VAL_INT;
169 	case IIO_CHAN_INFO_SCALE:
170 		scale_mv = st->vref_mv;
171 		if (st->mode == AD7266_MODE_DIFF)
172 			scale_mv *= 2;
173 		if (st->range == AD7266_RANGE_2VREF)
174 			scale_mv *= 2;
175 
176 		*val = scale_mv;
177 		*val2 = chan->scan_type.realbits;
178 		return IIO_VAL_FRACTIONAL_LOG2;
179 	case IIO_CHAN_INFO_OFFSET:
180 		if (st->range == AD7266_RANGE_2VREF &&
181 			st->mode != AD7266_MODE_DIFF)
182 			*val = 2048;
183 		else
184 			*val = 0;
185 		return IIO_VAL_INT;
186 	}
187 	return -EINVAL;
188 }
189 
190 #define AD7266_CHAN(_chan, _sign) {			\
191 	.type = IIO_VOLTAGE,				\
192 	.indexed = 1,					\
193 	.channel = (_chan),				\
194 	.address = (_chan),				\
195 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
196 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
197 		| BIT(IIO_CHAN_INFO_OFFSET),			\
198 	.scan_index = (_chan),				\
199 	.scan_type = {					\
200 		.sign = (_sign),			\
201 		.realbits = 12,				\
202 		.storagebits = 16,			\
203 		.shift = 2,				\
204 		.endianness = IIO_BE,			\
205 	},						\
206 }
207 
208 #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS(_name, _sign) \
209 const struct iio_chan_spec ad7266_channels_##_name[] = { \
210 	AD7266_CHAN(0, (_sign)), \
211 	AD7266_CHAN(1, (_sign)), \
212 	AD7266_CHAN(2, (_sign)), \
213 	AD7266_CHAN(3, (_sign)), \
214 	AD7266_CHAN(4, (_sign)), \
215 	AD7266_CHAN(5, (_sign)), \
216 	AD7266_CHAN(6, (_sign)), \
217 	AD7266_CHAN(7, (_sign)), \
218 	AD7266_CHAN(8, (_sign)), \
219 	AD7266_CHAN(9, (_sign)), \
220 	AD7266_CHAN(10, (_sign)), \
221 	AD7266_CHAN(11, (_sign)), \
222 	IIO_CHAN_SOFT_TIMESTAMP(13), \
223 }
224 
225 #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(_name, _sign) \
226 const struct iio_chan_spec ad7266_channels_##_name##_fixed[] = { \
227 	AD7266_CHAN(0, (_sign)), \
228 	AD7266_CHAN(1, (_sign)), \
229 	IIO_CHAN_SOFT_TIMESTAMP(2), \
230 }
231 
232 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(u, 'u');
233 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(s, 's');
234 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(u, 'u');
235 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(s, 's');
236 
237 #define AD7266_CHAN_DIFF(_chan, _sign) {			\
238 	.type = IIO_VOLTAGE,				\
239 	.indexed = 1,					\
240 	.channel = (_chan) * 2,				\
241 	.channel2 = (_chan) * 2 + 1,			\
242 	.address = (_chan),				\
243 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
244 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE)	\
245 		| BIT(IIO_CHAN_INFO_OFFSET),			\
246 	.scan_index = (_chan),				\
247 	.scan_type = {					\
248 		.sign = _sign,			\
249 		.realbits = 12,				\
250 		.storagebits = 16,			\
251 		.shift = 2,				\
252 		.endianness = IIO_BE,			\
253 	},						\
254 	.differential = 1,				\
255 }
256 
257 #define AD7266_DECLARE_DIFF_CHANNELS(_name, _sign) \
258 const struct iio_chan_spec ad7266_channels_diff_##_name[] = { \
259 	AD7266_CHAN_DIFF(0, (_sign)), \
260 	AD7266_CHAN_DIFF(1, (_sign)), \
261 	AD7266_CHAN_DIFF(2, (_sign)), \
262 	AD7266_CHAN_DIFF(3, (_sign)), \
263 	AD7266_CHAN_DIFF(4, (_sign)), \
264 	AD7266_CHAN_DIFF(5, (_sign)), \
265 	IIO_CHAN_SOFT_TIMESTAMP(6), \
266 }
267 
268 static AD7266_DECLARE_DIFF_CHANNELS(s, 's');
269 static AD7266_DECLARE_DIFF_CHANNELS(u, 'u');
270 
271 #define AD7266_DECLARE_DIFF_CHANNELS_FIXED(_name, _sign) \
272 const struct iio_chan_spec ad7266_channels_diff_fixed_##_name[] = { \
273 	AD7266_CHAN_DIFF(0, (_sign)), \
274 	AD7266_CHAN_DIFF(1, (_sign)), \
275 	IIO_CHAN_SOFT_TIMESTAMP(2), \
276 }
277 
278 static AD7266_DECLARE_DIFF_CHANNELS_FIXED(s, 's');
279 static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u');
280 
281 static const struct iio_info ad7266_info = {
282 	.read_raw = &ad7266_read_raw,
283 	.update_scan_mode = &ad7266_update_scan_mode,
284 };
285 
286 static const unsigned long ad7266_available_scan_masks[] = {
287 	0x003,
288 	0x00c,
289 	0x030,
290 	0x0c0,
291 	0x300,
292 	0xc00,
293 	0x000,
294 };
295 
296 static const unsigned long ad7266_available_scan_masks_diff[] = {
297 	0x003,
298 	0x00c,
299 	0x030,
300 	0x000,
301 };
302 
303 static const unsigned long ad7266_available_scan_masks_fixed[] = {
304 	0x003,
305 	0x000,
306 };
307 
308 struct ad7266_chan_info {
309 	const struct iio_chan_spec *channels;
310 	unsigned int num_channels;
311 	const unsigned long *scan_masks;
312 };
313 
314 #define AD7266_CHAN_INFO_INDEX(_differential, _signed, _fixed) \
315 	(((_differential) << 2) | ((_signed) << 1) | ((_fixed) << 0))
316 
317 static const struct ad7266_chan_info ad7266_chan_infos[] = {
318 	[AD7266_CHAN_INFO_INDEX(0, 0, 0)] = {
319 		.channels = ad7266_channels_u,
320 		.num_channels = ARRAY_SIZE(ad7266_channels_u),
321 		.scan_masks = ad7266_available_scan_masks,
322 	},
323 	[AD7266_CHAN_INFO_INDEX(0, 0, 1)] = {
324 		.channels = ad7266_channels_u_fixed,
325 		.num_channels = ARRAY_SIZE(ad7266_channels_u_fixed),
326 		.scan_masks = ad7266_available_scan_masks_fixed,
327 	},
328 	[AD7266_CHAN_INFO_INDEX(0, 1, 0)] = {
329 		.channels = ad7266_channels_s,
330 		.num_channels = ARRAY_SIZE(ad7266_channels_s),
331 		.scan_masks = ad7266_available_scan_masks,
332 	},
333 	[AD7266_CHAN_INFO_INDEX(0, 1, 1)] = {
334 		.channels = ad7266_channels_s_fixed,
335 		.num_channels = ARRAY_SIZE(ad7266_channels_s_fixed),
336 		.scan_masks = ad7266_available_scan_masks_fixed,
337 	},
338 	[AD7266_CHAN_INFO_INDEX(1, 0, 0)] = {
339 		.channels = ad7266_channels_diff_u,
340 		.num_channels = ARRAY_SIZE(ad7266_channels_diff_u),
341 		.scan_masks = ad7266_available_scan_masks_diff,
342 	},
343 	[AD7266_CHAN_INFO_INDEX(1, 0, 1)] = {
344 		.channels = ad7266_channels_diff_fixed_u,
345 		.num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_u),
346 		.scan_masks = ad7266_available_scan_masks_fixed,
347 	},
348 	[AD7266_CHAN_INFO_INDEX(1, 1, 0)] = {
349 		.channels = ad7266_channels_diff_s,
350 		.num_channels = ARRAY_SIZE(ad7266_channels_diff_s),
351 		.scan_masks = ad7266_available_scan_masks_diff,
352 	},
353 	[AD7266_CHAN_INFO_INDEX(1, 1, 1)] = {
354 		.channels = ad7266_channels_diff_fixed_s,
355 		.num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_s),
356 		.scan_masks = ad7266_available_scan_masks_fixed,
357 	},
358 };
359 
360 static void ad7266_init_channels(struct iio_dev *indio_dev)
361 {
362 	struct ad7266_state *st = iio_priv(indio_dev);
363 	bool is_differential, is_signed;
364 	const struct ad7266_chan_info *chan_info;
365 	int i;
366 
367 	is_differential = st->mode != AD7266_MODE_SINGLE_ENDED;
368 	is_signed = (st->range == AD7266_RANGE_2VREF) |
369 		    (st->mode == AD7266_MODE_DIFF);
370 
371 	i = AD7266_CHAN_INFO_INDEX(is_differential, is_signed, st->fixed_addr);
372 	chan_info = &ad7266_chan_infos[i];
373 
374 	indio_dev->channels = chan_info->channels;
375 	indio_dev->num_channels = chan_info->num_channels;
376 	indio_dev->available_scan_masks = chan_info->scan_masks;
377 }
378 
379 static const char * const ad7266_gpio_labels[] = {
380 	"ad0", "ad1", "ad2",
381 };
382 
383 static int ad7266_probe(struct spi_device *spi)
384 {
385 	struct ad7266_platform_data *pdata = spi->dev.platform_data;
386 	struct iio_dev *indio_dev;
387 	struct ad7266_state *st;
388 	unsigned int i;
389 	int ret;
390 
391 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
392 	if (indio_dev == NULL)
393 		return -ENOMEM;
394 
395 	st = iio_priv(indio_dev);
396 
397 	ret = devm_regulator_get_enable_read_voltage(&spi->dev, "vref");
398 	if (ret < 0 && ret != -ENODEV)
399 		return ret;
400 
401 	st->vref_mv = ret == -ENODEV ? AD7266_INTERNAL_REF_MV : ret / 1000;
402 
403 	if (pdata) {
404 		st->fixed_addr = pdata->fixed_addr;
405 		st->mode = pdata->mode;
406 		st->range = pdata->range;
407 
408 		if (!st->fixed_addr) {
409 			for (i = 0; i < ARRAY_SIZE(st->gpios); ++i) {
410 				st->gpios[i] = devm_gpiod_get(&spi->dev,
411 						      ad7266_gpio_labels[i],
412 						      GPIOD_OUT_LOW);
413 				if (IS_ERR(st->gpios[i])) {
414 					ret = PTR_ERR(st->gpios[i]);
415 					return ret;
416 				}
417 			}
418 		}
419 	} else {
420 		st->fixed_addr = true;
421 		st->range = AD7266_RANGE_VREF;
422 		st->mode = AD7266_MODE_DIFF;
423 	}
424 
425 	st->spi = spi;
426 
427 	indio_dev->name = spi_get_device_id(spi)->name;
428 	indio_dev->modes = INDIO_DIRECT_MODE;
429 	indio_dev->info = &ad7266_info;
430 
431 	ad7266_init_channels(indio_dev);
432 
433 	/* wakeup */
434 	st->single_xfer[0].rx_buf = &st->data.sample[0];
435 	st->single_xfer[0].len = 2;
436 	st->single_xfer[0].cs_change = 1;
437 	/* conversion */
438 	st->single_xfer[1].rx_buf = st->data.sample;
439 	st->single_xfer[1].len = 4;
440 	st->single_xfer[1].cs_change = 1;
441 	/* powerdown */
442 	st->single_xfer[2].tx_buf = &st->data.sample[0];
443 	st->single_xfer[2].len = 1;
444 
445 	spi_message_init(&st->single_msg);
446 	spi_message_add_tail(&st->single_xfer[0], &st->single_msg);
447 	spi_message_add_tail(&st->single_xfer[1], &st->single_msg);
448 	spi_message_add_tail(&st->single_xfer[2], &st->single_msg);
449 
450 	ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, &iio_pollfunc_store_time,
451 		&ad7266_trigger_handler, &iio_triggered_buffer_setup_ops);
452 	if (ret)
453 		return ret;
454 
455 	return devm_iio_device_register(&spi->dev, indio_dev);
456 }
457 
458 static const struct spi_device_id ad7266_id[] = {
459 	{"ad7265", 0},
460 	{"ad7266", 0},
461 	{ }
462 };
463 MODULE_DEVICE_TABLE(spi, ad7266_id);
464 
465 static struct spi_driver ad7266_driver = {
466 	.driver = {
467 		.name	= "ad7266",
468 	},
469 	.probe		= ad7266_probe,
470 	.id_table	= ad7266_id,
471 };
472 module_spi_driver(ad7266_driver);
473 
474 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
475 MODULE_DESCRIPTION("Analog Devices AD7266/65 ADC");
476 MODULE_LICENSE("GPL v2");
477