1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * AD7091RX Analog to Digital converter driver 4 * 5 * Copyright 2014-2019 Analog Devices Inc. 6 */ 7 8 #include <linux/bitops.h> 9 #include <linux/bitfield.h> 10 #include <linux/cleanup.h> 11 #include <linux/iio/events.h> 12 #include <linux/iio/iio.h> 13 #include <linux/interrupt.h> 14 #include <linux/module.h> 15 #include <linux/regmap.h> 16 #include <linux/regulator/consumer.h> 17 18 #include "ad7091r-base.h" 19 20 const struct iio_event_spec ad7091r_events[] = { 21 { 22 .type = IIO_EV_TYPE_THRESH, 23 .dir = IIO_EV_DIR_RISING, 24 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 25 BIT(IIO_EV_INFO_ENABLE), 26 }, 27 { 28 .type = IIO_EV_TYPE_THRESH, 29 .dir = IIO_EV_DIR_FALLING, 30 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 31 BIT(IIO_EV_INFO_ENABLE), 32 }, 33 { 34 .type = IIO_EV_TYPE_THRESH, 35 .dir = IIO_EV_DIR_EITHER, 36 .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS), 37 }, 38 }; 39 EXPORT_SYMBOL_NS_GPL(ad7091r_events, "IIO_AD7091R"); 40 41 static int ad7091r_set_channel(struct ad7091r_state *st, unsigned int channel) 42 { 43 unsigned int dummy; 44 int ret; 45 46 /* AD7091R_REG_CHANNEL specified which channels to be converted */ 47 ret = regmap_write(st->map, AD7091R_REG_CHANNEL, 48 BIT(channel) | (BIT(channel) << 8)); 49 if (ret) 50 return ret; 51 52 /* 53 * There is a latency of one conversion before the channel conversion 54 * sequence is updated 55 */ 56 return regmap_read(st->map, AD7091R_REG_RESULT, &dummy); 57 } 58 59 static int ad7091r_read_one(struct iio_dev *iio_dev, 60 unsigned int channel, unsigned int *read_val) 61 { 62 struct ad7091r_state *st = iio_priv(iio_dev); 63 unsigned int val; 64 int ret; 65 66 ret = ad7091r_set_channel(st, channel); 67 if (ret) 68 return ret; 69 70 ret = regmap_read(st->map, AD7091R_REG_RESULT, &val); 71 if (ret) 72 return ret; 73 74 if (st->chip_info->reg_result_chan_id(val) != channel) 75 return -EIO; 76 77 *read_val = AD7091R_REG_RESULT_CONV_RESULT(val); 78 79 return 0; 80 } 81 82 static int ad7091r_read_raw(struct iio_dev *iio_dev, 83 struct iio_chan_spec const *chan, 84 int *val, int *val2, long m) 85 { 86 struct ad7091r_state *st = iio_priv(iio_dev); 87 unsigned int read_val; 88 int ret; 89 90 guard(mutex)(&st->lock); 91 92 switch (m) { 93 case IIO_CHAN_INFO_RAW: 94 if (st->mode != AD7091R_MODE_COMMAND) 95 return -EBUSY; 96 97 ret = ad7091r_read_one(iio_dev, chan->channel, &read_val); 98 if (ret) 99 return ret; 100 101 *val = read_val; 102 return IIO_VAL_INT; 103 104 case IIO_CHAN_INFO_SCALE: 105 if (st->vref) { 106 ret = regulator_get_voltage(st->vref); 107 if (ret < 0) 108 return ret; 109 110 *val = ret / 1000; 111 } else { 112 *val = st->chip_info->vref_mV; 113 } 114 115 *val2 = chan->scan_type.realbits; 116 return IIO_VAL_FRACTIONAL_LOG2; 117 118 default: 119 return -EINVAL; 120 } 121 } 122 123 static int ad7091r_read_event_config(struct iio_dev *indio_dev, 124 const struct iio_chan_spec *chan, 125 enum iio_event_type type, 126 enum iio_event_direction dir) 127 { 128 struct ad7091r_state *st = iio_priv(indio_dev); 129 int val, ret; 130 131 switch (dir) { 132 case IIO_EV_DIR_RISING: 133 ret = regmap_read(st->map, 134 AD7091R_REG_CH_HIGH_LIMIT(chan->channel), 135 &val); 136 if (ret) 137 return ret; 138 return val != AD7091R_HIGH_LIMIT; 139 case IIO_EV_DIR_FALLING: 140 ret = regmap_read(st->map, 141 AD7091R_REG_CH_LOW_LIMIT(chan->channel), 142 &val); 143 if (ret) 144 return ret; 145 return val != AD7091R_LOW_LIMIT; 146 default: 147 return -EINVAL; 148 } 149 } 150 151 static int ad7091r_write_event_config(struct iio_dev *indio_dev, 152 const struct iio_chan_spec *chan, 153 enum iio_event_type type, 154 enum iio_event_direction dir, 155 bool state) 156 { 157 struct ad7091r_state *st = iio_priv(indio_dev); 158 159 if (state) { 160 return regmap_set_bits(st->map, AD7091R_REG_CONF, 161 AD7091R_REG_CONF_ALERT_EN); 162 } else { 163 /* 164 * Set thresholds either to 0 or to 2^12 - 1 as appropriate to 165 * prevent alerts and thus disable event generation. 166 */ 167 switch (dir) { 168 case IIO_EV_DIR_RISING: 169 return regmap_write(st->map, 170 AD7091R_REG_CH_HIGH_LIMIT(chan->channel), 171 AD7091R_HIGH_LIMIT); 172 case IIO_EV_DIR_FALLING: 173 return regmap_write(st->map, 174 AD7091R_REG_CH_LOW_LIMIT(chan->channel), 175 AD7091R_LOW_LIMIT); 176 default: 177 return -EINVAL; 178 } 179 } 180 } 181 182 static int ad7091r_read_event_value(struct iio_dev *indio_dev, 183 const struct iio_chan_spec *chan, 184 enum iio_event_type type, 185 enum iio_event_direction dir, 186 enum iio_event_info info, int *val, int *val2) 187 { 188 struct ad7091r_state *st = iio_priv(indio_dev); 189 int ret; 190 191 switch (info) { 192 case IIO_EV_INFO_VALUE: 193 switch (dir) { 194 case IIO_EV_DIR_RISING: 195 ret = regmap_read(st->map, 196 AD7091R_REG_CH_HIGH_LIMIT(chan->channel), 197 val); 198 if (ret) 199 return ret; 200 return IIO_VAL_INT; 201 case IIO_EV_DIR_FALLING: 202 ret = regmap_read(st->map, 203 AD7091R_REG_CH_LOW_LIMIT(chan->channel), 204 val); 205 if (ret) 206 return ret; 207 return IIO_VAL_INT; 208 default: 209 return -EINVAL; 210 } 211 case IIO_EV_INFO_HYSTERESIS: 212 ret = regmap_read(st->map, 213 AD7091R_REG_CH_HYSTERESIS(chan->channel), 214 val); 215 if (ret) 216 return ret; 217 return IIO_VAL_INT; 218 default: 219 return -EINVAL; 220 } 221 } 222 223 static int ad7091r_write_event_value(struct iio_dev *indio_dev, 224 const struct iio_chan_spec *chan, 225 enum iio_event_type type, 226 enum iio_event_direction dir, 227 enum iio_event_info info, int val, int val2) 228 { 229 struct ad7091r_state *st = iio_priv(indio_dev); 230 231 switch (info) { 232 case IIO_EV_INFO_VALUE: 233 switch (dir) { 234 case IIO_EV_DIR_RISING: 235 return regmap_write(st->map, 236 AD7091R_REG_CH_HIGH_LIMIT(chan->channel), 237 val); 238 case IIO_EV_DIR_FALLING: 239 return regmap_write(st->map, 240 AD7091R_REG_CH_LOW_LIMIT(chan->channel), 241 val); 242 default: 243 return -EINVAL; 244 } 245 case IIO_EV_INFO_HYSTERESIS: 246 return regmap_write(st->map, 247 AD7091R_REG_CH_HYSTERESIS(chan->channel), 248 val); 249 default: 250 return -EINVAL; 251 } 252 } 253 254 static const struct iio_info ad7091r_info = { 255 .read_raw = ad7091r_read_raw, 256 .read_event_config = &ad7091r_read_event_config, 257 .write_event_config = &ad7091r_write_event_config, 258 .read_event_value = &ad7091r_read_event_value, 259 .write_event_value = &ad7091r_write_event_value, 260 }; 261 262 static irqreturn_t ad7091r_event_handler(int irq, void *private) 263 { 264 struct iio_dev *iio_dev = private; 265 struct ad7091r_state *st = iio_priv(iio_dev); 266 unsigned int i, read_val; 267 int ret; 268 s64 timestamp = iio_get_time_ns(iio_dev); 269 270 ret = regmap_read(st->map, AD7091R_REG_ALERT, &read_val); 271 if (ret) 272 return IRQ_HANDLED; 273 274 for (i = 0; i < st->chip_info->num_channels; i++) { 275 if (read_val & BIT(i * 2)) 276 iio_push_event(iio_dev, 277 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, i, 278 IIO_EV_TYPE_THRESH, 279 IIO_EV_DIR_RISING), timestamp); 280 if (read_val & BIT(i * 2 + 1)) 281 iio_push_event(iio_dev, 282 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, i, 283 IIO_EV_TYPE_THRESH, 284 IIO_EV_DIR_FALLING), timestamp); 285 } 286 287 return IRQ_HANDLED; 288 } 289 290 static void ad7091r_remove(void *data) 291 { 292 struct ad7091r_state *st = data; 293 294 regulator_disable(st->vref); 295 } 296 297 int ad7091r_probe(struct device *dev, const struct ad7091r_init_info *init_info, 298 int irq) 299 { 300 struct iio_dev *iio_dev; 301 struct ad7091r_state *st; 302 int ret; 303 304 iio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 305 if (!iio_dev) 306 return -ENOMEM; 307 308 st = iio_priv(iio_dev); 309 st->dev = dev; 310 init_info->init_adc_regmap(st, init_info->regmap_config); 311 if (IS_ERR(st->map)) 312 return dev_err_probe(st->dev, PTR_ERR(st->map), 313 "Error initializing regmap\n"); 314 315 iio_dev->info = &ad7091r_info; 316 iio_dev->modes = INDIO_DIRECT_MODE; 317 318 if (init_info->setup) { 319 ret = init_info->setup(st); 320 if (ret < 0) 321 return ret; 322 } 323 324 if (irq) { 325 st->chip_info = init_info->info_irq; 326 ret = regmap_update_bits(st->map, AD7091R_REG_CONF, 327 AD7091R_REG_CONF_ALERT_EN, BIT(4)); 328 if (ret) 329 return ret; 330 331 ret = devm_request_threaded_irq(dev, irq, NULL, 332 ad7091r_event_handler, 333 IRQF_TRIGGER_FALLING | 334 IRQF_ONESHOT, 335 st->chip_info->name, iio_dev); 336 if (ret) 337 return ret; 338 } else { 339 st->chip_info = init_info->info_no_irq; 340 } 341 342 iio_dev->name = st->chip_info->name; 343 iio_dev->num_channels = st->chip_info->num_channels; 344 iio_dev->channels = st->chip_info->channels; 345 346 st->vref = devm_regulator_get_optional(dev, "vref"); 347 if (IS_ERR(st->vref)) { 348 if (PTR_ERR(st->vref) == -EPROBE_DEFER) 349 return -EPROBE_DEFER; 350 351 st->vref = NULL; 352 /* Enable internal vref */ 353 ret = regmap_set_bits(st->map, AD7091R_REG_CONF, 354 AD7091R_REG_CONF_INT_VREF); 355 if (ret) 356 return dev_err_probe(st->dev, ret, 357 "Error on enable internal reference\n"); 358 } else { 359 ret = regulator_enable(st->vref); 360 if (ret) 361 return ret; 362 ret = devm_add_action_or_reset(dev, ad7091r_remove, st); 363 if (ret) 364 return ret; 365 } 366 367 /* Use command mode by default to convert only desired channels*/ 368 ret = st->chip_info->set_mode(st, AD7091R_MODE_COMMAND); 369 if (ret) 370 return ret; 371 372 return devm_iio_device_register(dev, iio_dev); 373 } 374 EXPORT_SYMBOL_NS_GPL(ad7091r_probe, "IIO_AD7091R"); 375 376 bool ad7091r_writeable_reg(struct device *dev, unsigned int reg) 377 { 378 switch (reg) { 379 case AD7091R_REG_RESULT: 380 case AD7091R_REG_ALERT: 381 return false; 382 default: 383 return true; 384 } 385 } 386 EXPORT_SYMBOL_NS_GPL(ad7091r_writeable_reg, "IIO_AD7091R"); 387 388 bool ad7091r_volatile_reg(struct device *dev, unsigned int reg) 389 { 390 switch (reg) { 391 case AD7091R_REG_RESULT: 392 case AD7091R_REG_ALERT: 393 return true; 394 default: 395 return false; 396 } 397 } 398 EXPORT_SYMBOL_NS_GPL(ad7091r_volatile_reg, "IIO_AD7091R"); 399 400 MODULE_AUTHOR("Beniamin Bia <beniamin.bia@analog.com>"); 401 MODULE_DESCRIPTION("Analog Devices AD7091Rx multi-channel converters"); 402 MODULE_LICENSE("GPL v2"); 403