1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * KXCJK-1013 3-axis accelerometer driver 4 * Copyright (c) 2014, Intel Corporation. 5 */ 6 7 #include <linux/i2c.h> 8 #include <linux/interrupt.h> 9 #include <linux/delay.h> 10 #include <linux/bitops.h> 11 #include <linux/mod_devicetable.h> 12 #include <linux/module.h> 13 #include <linux/slab.h> 14 #include <linux/string.h> 15 #include <linux/types.h> 16 #include <linux/acpi.h> 17 #include <linux/pm.h> 18 #include <linux/pm_runtime.h> 19 #include <linux/regulator/consumer.h> 20 #include <linux/iio/iio.h> 21 #include <linux/iio/sysfs.h> 22 #include <linux/iio/buffer.h> 23 #include <linux/iio/trigger.h> 24 #include <linux/iio/events.h> 25 #include <linux/iio/trigger_consumer.h> 26 #include <linux/iio/triggered_buffer.h> 27 #include <linux/iio/accel/kxcjk_1013.h> 28 29 #define KXCJK1013_DRV_NAME "kxcjk1013" 30 #define KXCJK1013_IRQ_NAME "kxcjk1013_event" 31 32 #define KXTF9_REG_HP_XOUT_L 0x00 33 #define KXTF9_REG_HP_XOUT_H 0x01 34 #define KXTF9_REG_HP_YOUT_L 0x02 35 #define KXTF9_REG_HP_YOUT_H 0x03 36 #define KXTF9_REG_HP_ZOUT_L 0x04 37 #define KXTF9_REG_HP_ZOUT_H 0x05 38 39 #define KXCJK1013_REG_XOUT_L 0x06 40 /* 41 * From low byte X axis register, all the other addresses of Y and Z can be 42 * obtained by just applying axis offset. The following axis defines are just 43 * provide clarity, but not used. 44 */ 45 #define KXCJK1013_REG_XOUT_H 0x07 46 #define KXCJK1013_REG_YOUT_L 0x08 47 #define KXCJK1013_REG_YOUT_H 0x09 48 #define KXCJK1013_REG_ZOUT_L 0x0A 49 #define KXCJK1013_REG_ZOUT_H 0x0B 50 51 #define KXCJK1013_REG_DCST_RESP 0x0C 52 #define KXCJK1013_REG_WHO_AM_I 0x0F 53 #define KXTF9_REG_TILT_POS_CUR 0x10 54 #define KXTF9_REG_TILT_POS_PREV 0x11 55 #define KXTF9_REG_INT_SRC1 0x15 56 #define KXTF9_REG_INT_SRC2 0x16 57 #define KXCJK1013_REG_INT_SRC1 0x16 58 #define KXCJK1013_REG_INT_SRC2 0x17 59 #define KXCJK1013_REG_STATUS_REG 0x18 60 #define KXCJK1013_REG_INT_REL 0x1A 61 #define KXCJK1013_REG_CTRL1 0x1B 62 #define KXTF9_REG_CTRL2 0x1C 63 #define KXTF9_REG_CTRL3 0x1D 64 #define KXCJK1013_REG_CTRL2 0x1D 65 #define KXCJK1013_REG_INT_CTRL1 0x1E 66 #define KXCJK1013_REG_INT_CTRL2 0x1F 67 #define KXTF9_REG_INT_CTRL3 0x20 68 #define KXCJK1013_REG_DATA_CTRL 0x21 69 #define KXTF9_REG_TILT_TIMER 0x28 70 #define KXCJK1013_REG_WAKE_TIMER 0x29 71 #define KXTF9_REG_TDT_TIMER 0x2B 72 #define KXTF9_REG_TDT_THRESH_H 0x2C 73 #define KXTF9_REG_TDT_THRESH_L 0x2D 74 #define KXTF9_REG_TDT_TAP_TIMER 0x2E 75 #define KXTF9_REG_TDT_TOTAL_TIMER 0x2F 76 #define KXTF9_REG_TDT_LATENCY_TIMER 0x30 77 #define KXTF9_REG_TDT_WINDOW_TIMER 0x31 78 #define KXCJK1013_REG_SELF_TEST 0x3A 79 #define KXTF9_REG_WAKE_THRESH 0x5A 80 #define KXTF9_REG_TILT_ANGLE 0x5C 81 #define KXTF9_REG_HYST_SET 0x5F 82 #define KXCJK1013_REG_WAKE_THRES 0x6A 83 84 /* Everything up to 0x11 is equal to KXCJK1013/KXTF9 above */ 85 #define KX023_REG_INS1 0x12 86 #define KX023_REG_INS2 0x13 87 #define KX023_REG_INS3 0x14 88 #define KX023_REG_STAT 0x15 89 #define KX023_REG_INT_REL 0x17 90 #define KX023_REG_CNTL1 0x18 91 #define KX023_REG_CNTL2 0x19 92 #define KX023_REG_CNTL3 0x1A 93 #define KX023_REG_ODCNTL 0x1B 94 #define KX023_REG_INC1 0x1C 95 #define KX023_REG_INC2 0x1D 96 #define KX023_REG_INC3 0x1E 97 #define KX023_REG_INC4 0x1F 98 #define KX023_REG_INC5 0x20 99 #define KX023_REG_INC6 0x21 100 #define KX023_REG_TILT_TIMER 0x22 101 #define KX023_REG_WUFC 0x23 102 #define KX023_REG_TDTRC 0x24 103 #define KX023_REG_TDTC 0x25 104 #define KX023_REG_TTH 0x26 105 #define KX023_REG_TTL 0x27 106 #define KX023_REG_FTD 0x28 107 #define KX023_REG_STD 0x29 108 #define KX023_REG_TLT 0x2A 109 #define KX023_REG_TWS 0x2B 110 #define KX023_REG_ATH 0x30 111 #define KX023_REG_TILT_ANGLE_LL 0x32 112 #define KX023_REG_TILT_ANGLE_HL 0x33 113 #define KX023_REG_HYST_SET 0x34 114 #define KX023_REG_LP_CNTL 0x35 115 #define KX023_REG_BUF_CNTL1 0x3A 116 #define KX023_REG_BUF_CNTL2 0x3B 117 #define KX023_REG_BUF_STATUS_1 0x3C 118 #define KX023_REG_BUF_STATUS_2 0x3D 119 #define KX023_REG_BUF_CLEAR 0x3E 120 #define KX023_REG_BUF_READ 0x3F 121 #define KX023_REG_SELF_TEST 0x60 122 123 #define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7) 124 #define KXCJK1013_REG_CTRL1_BIT_RES BIT(6) 125 #define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5) 126 #define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4) 127 #define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3) 128 #define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1) 129 130 #define KXCJK1013_REG_INT_CTRL1_BIT_IEU BIT(2) /* KXTF9 */ 131 #define KXCJK1013_REG_INT_CTRL1_BIT_IEL BIT(3) 132 #define KXCJK1013_REG_INT_CTRL1_BIT_IEA BIT(4) 133 #define KXCJK1013_REG_INT_CTRL1_BIT_IEN BIT(5) 134 135 #define KXTF9_REG_TILT_BIT_LEFT_EDGE BIT(5) 136 #define KXTF9_REG_TILT_BIT_RIGHT_EDGE BIT(4) 137 #define KXTF9_REG_TILT_BIT_LOWER_EDGE BIT(3) 138 #define KXTF9_REG_TILT_BIT_UPPER_EDGE BIT(2) 139 #define KXTF9_REG_TILT_BIT_FACE_DOWN BIT(1) 140 #define KXTF9_REG_TILT_BIT_FACE_UP BIT(0) 141 142 #define KXCJK1013_DATA_MASK_12_BIT 0x0FFF 143 #define KXCJK1013_MAX_STARTUP_TIME_US 100000 144 145 #define KXCJK1013_SLEEP_DELAY_MS 2000 146 147 #define KXCJK1013_REG_INT_SRC1_BIT_TPS BIT(0) /* KXTF9 */ 148 #define KXCJK1013_REG_INT_SRC1_BIT_WUFS BIT(1) 149 #define KXCJK1013_REG_INT_SRC1_MASK_TDTS (BIT(2) | BIT(3)) /* KXTF9 */ 150 #define KXCJK1013_REG_INT_SRC1_TAP_NONE 0 151 #define KXCJK1013_REG_INT_SRC1_TAP_SINGLE BIT(2) 152 #define KXCJK1013_REG_INT_SRC1_TAP_DOUBLE BIT(3) 153 #define KXCJK1013_REG_INT_SRC1_BIT_DRDY BIT(4) 154 155 /* KXCJK: INT_SOURCE2: motion detect, KXTF9: INT_SRC_REG1: tap detect */ 156 #define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0) 157 #define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1) 158 #define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2) 159 #define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3) 160 #define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4) 161 #define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5) 162 163 /* KX023 interrupt routing to INT1. INT2 can be configured with INC6 */ 164 #define KX023_REG_INC4_BFI1 BIT(6) 165 #define KX023_REG_INC4_WMI1 BIT(5) 166 #define KX023_REG_INC4_DRDY1 BIT(4) 167 #define KX023_REG_INC4_TDTI1 BIT(2) 168 #define KX023_REG_INC4_WUFI1 BIT(1) 169 #define KX023_REG_INC4_TPI1 BIT(0) 170 171 #define KXCJK1013_DEFAULT_WAKE_THRES 1 172 173 /* Refer to section 4 of the specification */ 174 struct kx_odr_start_up_time { 175 int odr_bits; 176 int usec; 177 }; 178 179 /* KXCJK-1013 */ 180 static const struct kx_odr_start_up_time kxcjk1013_odr_start_up_times[] = { 181 { 0x08, 100000 }, 182 { 0x09, 100000 }, 183 { 0x0A, 100000 }, 184 { 0x0B, 100000 }, 185 { 0x00, 80000 }, 186 { 0x01, 41000 }, 187 { 0x02, 21000 }, 188 { 0x03, 11000 }, 189 { 0x04, 6400 }, 190 { 0x05, 3900 }, 191 { 0x06, 2700 }, 192 { 0x07, 2100 }, 193 { } 194 }; 195 196 /* KXCTJ2-1009 */ 197 static const struct kx_odr_start_up_time kxtj21009_odr_start_up_times[] = { 198 { 0x08, 1240000 }, 199 { 0x09, 621000 }, 200 { 0x0A, 309000 }, 201 { 0x0B, 151000 }, 202 { 0x00, 80000 }, 203 { 0x01, 41000 }, 204 { 0x02, 21000 }, 205 { 0x03, 11000 }, 206 { 0x04, 6000 }, 207 { 0x05, 4000 }, 208 { 0x06, 3000 }, 209 { 0x07, 2000 }, 210 { } 211 }; 212 213 /* KXTF9 */ 214 static const struct kx_odr_start_up_time kxtf9_odr_start_up_times[] = { 215 { 0x01, 81000 }, 216 { 0x02, 41000 }, 217 { 0x03, 21000 }, 218 { 0x04, 11000 }, 219 { 0x05, 5100 }, 220 { 0x06, 2700 }, 221 { } 222 }; 223 224 /* KX023-1025 */ 225 static const struct kx_odr_start_up_time kx0231025_odr_start_up_times[] = { 226 /* First 4 are not in datasheet, taken from KXCTJ2-1009 */ 227 { 0x08, 1240000 }, 228 { 0x09, 621000 }, 229 { 0x0A, 309000 }, 230 { 0x0B, 151000 }, 231 { 0x00, 81000 }, 232 { 0x01, 40000 }, 233 { 0x02, 22000 }, 234 { 0x03, 12000 }, 235 { 0x04, 7000 }, 236 { 0x05, 4400 }, 237 { 0x06, 3000 }, 238 { 0x07, 3000 }, 239 { } 240 }; 241 242 enum kx_acpi_type { 243 ACPI_GENERIC, 244 ACPI_SMO8500, 245 ACPI_KIOX010A, 246 }; 247 248 struct kx_chipset_regs { 249 u8 int_src1; 250 u8 int_src2; 251 u8 int_rel; 252 u8 ctrl1; 253 u8 wuf_ctrl; 254 u8 int_ctrl1; 255 u8 data_ctrl; 256 u8 wake_timer; 257 u8 wake_thres; 258 }; 259 260 static const struct kx_chipset_regs kxcjk1013_regs = { 261 .int_src1 = KXCJK1013_REG_INT_SRC1, 262 .int_src2 = KXCJK1013_REG_INT_SRC2, 263 .int_rel = KXCJK1013_REG_INT_REL, 264 .ctrl1 = KXCJK1013_REG_CTRL1, 265 .wuf_ctrl = KXCJK1013_REG_CTRL2, 266 .int_ctrl1 = KXCJK1013_REG_INT_CTRL1, 267 .data_ctrl = KXCJK1013_REG_DATA_CTRL, 268 .wake_timer = KXCJK1013_REG_WAKE_TIMER, 269 .wake_thres = KXCJK1013_REG_WAKE_THRES, 270 }; 271 272 static const struct kx_chipset_regs kxtf9_regs = { 273 /* .int_src1 was moved to INT_SRC2 on KXTF9 */ 274 .int_src1 = KXTF9_REG_INT_SRC2, 275 /* .int_src2 is not available */ 276 .int_rel = KXCJK1013_REG_INT_REL, 277 .ctrl1 = KXCJK1013_REG_CTRL1, 278 .wuf_ctrl = KXTF9_REG_CTRL3, 279 .int_ctrl1 = KXCJK1013_REG_INT_CTRL1, 280 .data_ctrl = KXCJK1013_REG_DATA_CTRL, 281 .wake_timer = KXCJK1013_REG_WAKE_TIMER, 282 .wake_thres = KXTF9_REG_WAKE_THRESH, 283 }; 284 285 /* The registers have totally different names but the bits are compatible */ 286 static const struct kx_chipset_regs kx0231025_regs = { 287 .int_src1 = KX023_REG_INS2, 288 .int_src2 = KX023_REG_INS3, 289 .int_rel = KX023_REG_INT_REL, 290 .ctrl1 = KX023_REG_CNTL1, 291 .wuf_ctrl = KX023_REG_CNTL3, 292 .int_ctrl1 = KX023_REG_INC1, 293 .data_ctrl = KX023_REG_ODCNTL, 294 .wake_timer = KX023_REG_WUFC, 295 .wake_thres = KX023_REG_ATH, 296 }; 297 298 struct kx_chipset_info { 299 const struct kx_chipset_regs *regs; 300 const struct kx_odr_start_up_time *times; 301 enum kx_acpi_type acpi_type; 302 }; 303 304 static const struct kx_chipset_info kxcjk1013_info = { 305 .regs = &kxcjk1013_regs, 306 .times = pm_ptr(kxcjk1013_odr_start_up_times), 307 }; 308 309 static const struct kx_chipset_info kxcj91008_info = { 310 .regs = &kxcjk1013_regs, 311 .times = pm_ptr(kxcjk1013_odr_start_up_times), 312 }; 313 314 static const struct kx_chipset_info kxcj91008_kiox010a_info = { 315 .regs = &kxcjk1013_regs, 316 .times = pm_ptr(kxcjk1013_odr_start_up_times), 317 .acpi_type = ACPI_KIOX010A, 318 }; 319 320 static const struct kx_chipset_info kxcj91008_kiox020a_info = { 321 .regs = &kxcjk1013_regs, 322 .times = pm_ptr(kxcjk1013_odr_start_up_times), 323 .acpi_type = ACPI_GENERIC, 324 }; 325 326 static const struct kx_chipset_info kxcj91008_smo8500_info = { 327 .regs = &kxcjk1013_regs, 328 .times = pm_ptr(kxcjk1013_odr_start_up_times), 329 .acpi_type = ACPI_SMO8500, 330 }; 331 332 static const struct kx_chipset_info kxtj21009_info = { 333 .regs = &kxcjk1013_regs, 334 .times = pm_ptr(kxtj21009_odr_start_up_times), 335 }; 336 337 static const struct kx_chipset_info kxtf9_info = { 338 .regs = &kxtf9_regs, 339 .times = pm_ptr(kxtf9_odr_start_up_times), 340 }; 341 342 static const struct kx_chipset_info kx0231025_info = { 343 .regs = &kx0231025_regs, 344 .times = pm_ptr(kx0231025_odr_start_up_times), 345 }; 346 347 enum kxcjk1013_axis { 348 AXIS_X, 349 AXIS_Y, 350 AXIS_Z, 351 AXIS_MAX 352 }; 353 354 struct kxcjk1013_data { 355 struct i2c_client *client; 356 struct iio_trigger *dready_trig; 357 struct iio_trigger *motion_trig; 358 struct iio_mount_matrix orientation; 359 struct mutex mutex; 360 /* Ensure timestamp naturally aligned */ 361 struct { 362 s16 chans[AXIS_MAX]; 363 aligned_s64 timestamp; 364 } scan; 365 u8 odr_bits; 366 u8 range; 367 int wake_thres; 368 int wake_dur; 369 bool active_high_intr; 370 bool dready_trigger_on; 371 int ev_enable_state; 372 bool motion_trigger_on; 373 int64_t timestamp; 374 const struct kx_chipset_info *info; 375 }; 376 377 enum kxcjk1013_mode { 378 STANDBY, 379 OPERATION, 380 }; 381 382 enum kxcjk1013_range { 383 KXCJK1013_RANGE_2G, 384 KXCJK1013_RANGE_4G, 385 KXCJK1013_RANGE_8G, 386 }; 387 388 struct kx_odr_map { 389 int val; 390 int val2; 391 int odr_bits; 392 int wuf_bits; 393 }; 394 395 static const struct kx_odr_map samp_freq_table[] = { 396 { 0, 781000, 0x08, 0x00 }, 397 { 1, 563000, 0x09, 0x01 }, 398 { 3, 125000, 0x0A, 0x02 }, 399 { 6, 250000, 0x0B, 0x03 }, 400 { 12, 500000, 0x00, 0x04 }, 401 { 25, 0, 0x01, 0x05 }, 402 { 50, 0, 0x02, 0x06 }, 403 { 100, 0, 0x03, 0x06 }, 404 { 200, 0, 0x04, 0x06 }, 405 { 400, 0, 0x05, 0x06 }, 406 { 800, 0, 0x06, 0x06 }, 407 { 1600, 0, 0x07, 0x06 }, 408 }; 409 410 static const char *const kxcjk1013_samp_freq_avail = 411 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600"; 412 413 static const struct kx_odr_map kxtf9_samp_freq_table[] = { 414 { 25, 0, 0x01, 0x00 }, 415 { 50, 0, 0x02, 0x01 }, 416 { 100, 0, 0x03, 0x01 }, 417 { 200, 0, 0x04, 0x01 }, 418 { 400, 0, 0x05, 0x01 }, 419 { 800, 0, 0x06, 0x01 }, 420 }; 421 422 static const char *const kxtf9_samp_freq_avail = 423 "25 50 100 200 400 800"; 424 425 static const struct { 426 u16 scale; 427 u8 gsel_0; 428 u8 gsel_1; 429 } KXCJK1013_scale_table[] = { {9582, 0, 0}, 430 {19163, 1, 0}, 431 {38326, 0, 1} }; 432 433 #ifdef CONFIG_ACPI 434 enum kiox010a_fn_index { 435 KIOX010A_SET_LAPTOP_MODE = 1, 436 KIOX010A_SET_TABLET_MODE = 2, 437 }; 438 439 static int kiox010a_dsm(struct device *dev, int fn_index) 440 { 441 acpi_handle handle = ACPI_HANDLE(dev); 442 guid_t kiox010a_dsm_guid; 443 union acpi_object *obj; 444 445 if (!handle) 446 return -ENODEV; 447 448 guid_parse("1f339696-d475-4e26-8cad-2e9f8e6d7a91", &kiox010a_dsm_guid); 449 450 obj = acpi_evaluate_dsm(handle, &kiox010a_dsm_guid, 1, fn_index, NULL); 451 if (!obj) 452 return -EIO; 453 454 ACPI_FREE(obj); 455 return 0; 456 } 457 458 #endif 459 460 static int kxcjk1013_set_mode(struct kxcjk1013_data *data, 461 enum kxcjk1013_mode mode) 462 { 463 const struct kx_chipset_regs *regs = data->info->regs; 464 int ret; 465 466 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); 467 if (ret < 0) { 468 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 469 return ret; 470 } 471 472 if (mode == STANDBY) 473 ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1; 474 else 475 ret |= KXCJK1013_REG_CTRL1_BIT_PC1; 476 477 ret = i2c_smbus_write_byte_data(data->client, regs->ctrl1, ret); 478 if (ret < 0) { 479 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 480 return ret; 481 } 482 483 return 0; 484 } 485 486 static int kxcjk1013_get_mode(struct kxcjk1013_data *data, 487 enum kxcjk1013_mode *mode) 488 { 489 const struct kx_chipset_regs *regs = data->info->regs; 490 int ret; 491 492 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); 493 if (ret < 0) { 494 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 495 return ret; 496 } 497 498 if (ret & KXCJK1013_REG_CTRL1_BIT_PC1) 499 *mode = OPERATION; 500 else 501 *mode = STANDBY; 502 503 return 0; 504 } 505 506 static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index) 507 { 508 const struct kx_chipset_regs *regs = data->info->regs; 509 int ret; 510 511 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); 512 if (ret < 0) { 513 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 514 return ret; 515 } 516 517 ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 | 518 KXCJK1013_REG_CTRL1_BIT_GSEL1); 519 ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3); 520 ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4); 521 522 ret = i2c_smbus_write_byte_data(data->client, regs->ctrl1, ret); 523 if (ret < 0) { 524 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 525 return ret; 526 } 527 528 data->range = range_index; 529 530 return 0; 531 } 532 533 static int kxcjk1013_chip_init(struct kxcjk1013_data *data) 534 { 535 const struct kx_chipset_regs *regs = data->info->regs; 536 int ret; 537 538 #ifdef CONFIG_ACPI 539 if (data->info->acpi_type == ACPI_KIOX010A) { 540 /* Make sure the kbd and touchpad on 2-in-1s using 2 KXCJ91008-s work */ 541 kiox010a_dsm(&data->client->dev, KIOX010A_SET_LAPTOP_MODE); 542 } 543 #endif 544 545 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I); 546 if (ret < 0) { 547 dev_err(&data->client->dev, "Error reading who_am_i\n"); 548 return ret; 549 } 550 551 dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret); 552 553 ret = kxcjk1013_set_mode(data, STANDBY); 554 if (ret < 0) 555 return ret; 556 557 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); 558 if (ret < 0) { 559 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 560 return ret; 561 } 562 563 /* Set 12 bit mode */ 564 ret |= KXCJK1013_REG_CTRL1_BIT_RES; 565 566 ret = i2c_smbus_write_byte_data(data->client, regs->ctrl1, ret); 567 if (ret < 0) { 568 dev_err(&data->client->dev, "Error reading reg_ctrl\n"); 569 return ret; 570 } 571 572 /* Setting range to 4G */ 573 ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G); 574 if (ret < 0) 575 return ret; 576 577 ret = i2c_smbus_read_byte_data(data->client, regs->data_ctrl); 578 if (ret < 0) { 579 dev_err(&data->client->dev, "Error reading reg_data_ctrl\n"); 580 return ret; 581 } 582 583 data->odr_bits = ret; 584 585 /* Set up INT polarity */ 586 ret = i2c_smbus_read_byte_data(data->client, regs->int_ctrl1); 587 if (ret < 0) { 588 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 589 return ret; 590 } 591 592 if (data->active_high_intr) 593 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEA; 594 else 595 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEA; 596 597 ret = i2c_smbus_write_byte_data(data->client, regs->int_ctrl1, ret); 598 if (ret < 0) { 599 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 600 return ret; 601 } 602 603 /* On KX023, route all used interrupts to INT1 for now */ 604 if (data->info == &kx0231025_info && data->client->irq > 0) { 605 ret = i2c_smbus_write_byte_data(data->client, KX023_REG_INC4, 606 KX023_REG_INC4_DRDY1 | 607 KX023_REG_INC4_WUFI1); 608 if (ret < 0) { 609 dev_err(&data->client->dev, "Error writing reg_inc4\n"); 610 return ret; 611 } 612 } 613 614 ret = kxcjk1013_set_mode(data, OPERATION); 615 if (ret < 0) 616 return ret; 617 618 data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES; 619 620 return 0; 621 } 622 623 static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data) 624 { 625 const struct kx_odr_start_up_time *times; 626 627 for (times = data->info->times; times->usec; times++) { 628 if (times->odr_bits == data->odr_bits) 629 return times->usec; 630 } 631 632 return KXCJK1013_MAX_STARTUP_TIME_US; 633 } 634 635 static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on) 636 { 637 #ifdef CONFIG_PM 638 int ret; 639 640 if (on) 641 ret = pm_runtime_resume_and_get(&data->client->dev); 642 else { 643 pm_runtime_mark_last_busy(&data->client->dev); 644 ret = pm_runtime_put_autosuspend(&data->client->dev); 645 } 646 if (ret < 0) { 647 dev_err(&data->client->dev, 648 "Failed: %s for %d\n", __func__, on); 649 return ret; 650 } 651 #endif 652 653 return 0; 654 } 655 656 static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data) 657 { 658 const struct kx_chipset_regs *regs = data->info->regs; 659 int ret; 660 661 ret = i2c_smbus_write_byte_data(data->client, regs->wake_timer, data->wake_dur); 662 if (ret < 0) { 663 dev_err(&data->client->dev, 664 "Error writing reg_wake_timer\n"); 665 return ret; 666 } 667 668 ret = i2c_smbus_write_byte_data(data->client, regs->wake_thres, data->wake_thres); 669 if (ret < 0) { 670 dev_err(&data->client->dev, "Error writing reg_wake_thres\n"); 671 return ret; 672 } 673 674 return 0; 675 } 676 677 static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data, 678 bool status) 679 { 680 const struct kx_chipset_regs *regs = data->info->regs; 681 int ret; 682 enum kxcjk1013_mode store_mode; 683 684 ret = kxcjk1013_get_mode(data, &store_mode); 685 if (ret < 0) 686 return ret; 687 688 /* This is requirement by spec to change state to STANDBY */ 689 ret = kxcjk1013_set_mode(data, STANDBY); 690 if (ret < 0) 691 return ret; 692 693 ret = kxcjk1013_chip_update_thresholds(data); 694 if (ret < 0) 695 return ret; 696 697 ret = i2c_smbus_read_byte_data(data->client, regs->int_ctrl1); 698 if (ret < 0) { 699 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 700 return ret; 701 } 702 703 if (status) 704 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN; 705 else 706 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN; 707 708 ret = i2c_smbus_write_byte_data(data->client, regs->int_ctrl1, ret); 709 if (ret < 0) { 710 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 711 return ret; 712 } 713 714 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); 715 if (ret < 0) { 716 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 717 return ret; 718 } 719 720 if (status) 721 ret |= KXCJK1013_REG_CTRL1_BIT_WUFE; 722 else 723 ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE; 724 725 ret = i2c_smbus_write_byte_data(data->client, regs->ctrl1, ret); 726 if (ret < 0) { 727 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 728 return ret; 729 } 730 731 if (store_mode == OPERATION) { 732 ret = kxcjk1013_set_mode(data, OPERATION); 733 if (ret < 0) 734 return ret; 735 } 736 737 return 0; 738 } 739 740 static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data, 741 bool status) 742 { 743 const struct kx_chipset_regs *regs = data->info->regs; 744 int ret; 745 enum kxcjk1013_mode store_mode; 746 747 ret = kxcjk1013_get_mode(data, &store_mode); 748 if (ret < 0) 749 return ret; 750 751 /* This is requirement by spec to change state to STANDBY */ 752 ret = kxcjk1013_set_mode(data, STANDBY); 753 if (ret < 0) 754 return ret; 755 756 ret = i2c_smbus_read_byte_data(data->client, regs->int_ctrl1); 757 if (ret < 0) { 758 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 759 return ret; 760 } 761 762 if (status) 763 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN; 764 else 765 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN; 766 767 ret = i2c_smbus_write_byte_data(data->client, regs->int_ctrl1, ret); 768 if (ret < 0) { 769 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 770 return ret; 771 } 772 773 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); 774 if (ret < 0) { 775 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 776 return ret; 777 } 778 779 if (status) 780 ret |= KXCJK1013_REG_CTRL1_BIT_DRDY; 781 else 782 ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY; 783 784 ret = i2c_smbus_write_byte_data(data->client, regs->ctrl1, ret); 785 if (ret < 0) { 786 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 787 return ret; 788 } 789 790 if (store_mode == OPERATION) { 791 ret = kxcjk1013_set_mode(data, OPERATION); 792 if (ret < 0) 793 return ret; 794 } 795 796 return 0; 797 } 798 799 static const struct kx_odr_map *kxcjk1013_find_odr_value( 800 const struct kx_odr_map *map, size_t map_size, int val, int val2) 801 { 802 int i; 803 804 for (i = 0; i < map_size; ++i) { 805 if (map[i].val == val && map[i].val2 == val2) 806 return &map[i]; 807 } 808 809 return ERR_PTR(-EINVAL); 810 } 811 812 static int kxcjk1013_convert_odr_value(const struct kx_odr_map *map, 813 size_t map_size, int odr_bits, 814 int *val, int *val2) 815 { 816 int i; 817 818 for (i = 0; i < map_size; ++i) { 819 if (map[i].odr_bits == odr_bits) { 820 *val = map[i].val; 821 *val2 = map[i].val2; 822 return IIO_VAL_INT_PLUS_MICRO; 823 } 824 } 825 826 return -EINVAL; 827 } 828 829 static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2) 830 { 831 const struct kx_chipset_regs *regs = data->info->regs; 832 int ret; 833 enum kxcjk1013_mode store_mode; 834 const struct kx_odr_map *odr_setting; 835 836 ret = kxcjk1013_get_mode(data, &store_mode); 837 if (ret < 0) 838 return ret; 839 840 if (data->info == &kxtf9_info) 841 odr_setting = kxcjk1013_find_odr_value(kxtf9_samp_freq_table, 842 ARRAY_SIZE(kxtf9_samp_freq_table), 843 val, val2); 844 else 845 odr_setting = kxcjk1013_find_odr_value(samp_freq_table, 846 ARRAY_SIZE(samp_freq_table), 847 val, val2); 848 849 if (IS_ERR(odr_setting)) 850 return PTR_ERR(odr_setting); 851 852 /* To change ODR, the chip must be set to STANDBY as per spec */ 853 ret = kxcjk1013_set_mode(data, STANDBY); 854 if (ret < 0) 855 return ret; 856 857 ret = i2c_smbus_write_byte_data(data->client, regs->data_ctrl, 858 odr_setting->odr_bits); 859 if (ret < 0) { 860 dev_err(&data->client->dev, "Error writing data_ctrl\n"); 861 return ret; 862 } 863 864 data->odr_bits = odr_setting->odr_bits; 865 866 ret = i2c_smbus_write_byte_data(data->client, regs->wuf_ctrl, 867 odr_setting->wuf_bits); 868 if (ret < 0) { 869 dev_err(&data->client->dev, "Error writing reg_ctrl2\n"); 870 return ret; 871 } 872 873 if (store_mode == OPERATION) { 874 ret = kxcjk1013_set_mode(data, OPERATION); 875 if (ret < 0) 876 return ret; 877 } 878 879 return 0; 880 } 881 882 static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2) 883 { 884 if (data->info == &kxtf9_info) 885 return kxcjk1013_convert_odr_value(kxtf9_samp_freq_table, 886 ARRAY_SIZE(kxtf9_samp_freq_table), 887 data->odr_bits, val, val2); 888 else 889 return kxcjk1013_convert_odr_value(samp_freq_table, 890 ARRAY_SIZE(samp_freq_table), 891 data->odr_bits, val, val2); 892 } 893 894 static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis) 895 { 896 u8 reg = KXCJK1013_REG_XOUT_L + axis * 2; 897 int ret; 898 899 ret = i2c_smbus_read_word_data(data->client, reg); 900 if (ret < 0) { 901 dev_err(&data->client->dev, 902 "failed to read accel_%c registers\n", 'x' + axis); 903 return ret; 904 } 905 906 return ret; 907 } 908 909 static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val) 910 { 911 int ret, i; 912 enum kxcjk1013_mode store_mode; 913 914 for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) { 915 if (KXCJK1013_scale_table[i].scale == val) { 916 ret = kxcjk1013_get_mode(data, &store_mode); 917 if (ret < 0) 918 return ret; 919 920 ret = kxcjk1013_set_mode(data, STANDBY); 921 if (ret < 0) 922 return ret; 923 924 ret = kxcjk1013_set_range(data, i); 925 if (ret < 0) 926 return ret; 927 928 if (store_mode == OPERATION) { 929 ret = kxcjk1013_set_mode(data, OPERATION); 930 if (ret) 931 return ret; 932 } 933 934 return 0; 935 } 936 } 937 938 return -EINVAL; 939 } 940 941 static int kxcjk1013_read_raw(struct iio_dev *indio_dev, 942 struct iio_chan_spec const *chan, int *val, 943 int *val2, long mask) 944 { 945 struct kxcjk1013_data *data = iio_priv(indio_dev); 946 int ret; 947 948 switch (mask) { 949 case IIO_CHAN_INFO_RAW: 950 mutex_lock(&data->mutex); 951 if (iio_buffer_enabled(indio_dev)) 952 ret = -EBUSY; 953 else { 954 ret = kxcjk1013_set_power_state(data, true); 955 if (ret < 0) { 956 mutex_unlock(&data->mutex); 957 return ret; 958 } 959 ret = kxcjk1013_get_acc_reg(data, chan->scan_index); 960 if (ret < 0) { 961 kxcjk1013_set_power_state(data, false); 962 mutex_unlock(&data->mutex); 963 return ret; 964 } 965 *val = sign_extend32(ret >> chan->scan_type.shift, 966 chan->scan_type.realbits - 1); 967 ret = kxcjk1013_set_power_state(data, false); 968 } 969 mutex_unlock(&data->mutex); 970 971 if (ret < 0) 972 return ret; 973 974 return IIO_VAL_INT; 975 976 case IIO_CHAN_INFO_SCALE: 977 *val = 0; 978 *val2 = KXCJK1013_scale_table[data->range].scale; 979 return IIO_VAL_INT_PLUS_MICRO; 980 981 case IIO_CHAN_INFO_SAMP_FREQ: 982 mutex_lock(&data->mutex); 983 ret = kxcjk1013_get_odr(data, val, val2); 984 mutex_unlock(&data->mutex); 985 return ret; 986 987 default: 988 return -EINVAL; 989 } 990 } 991 992 static int kxcjk1013_write_raw(struct iio_dev *indio_dev, 993 struct iio_chan_spec const *chan, int val, 994 int val2, long mask) 995 { 996 struct kxcjk1013_data *data = iio_priv(indio_dev); 997 int ret; 998 999 switch (mask) { 1000 case IIO_CHAN_INFO_SAMP_FREQ: 1001 mutex_lock(&data->mutex); 1002 ret = kxcjk1013_set_odr(data, val, val2); 1003 mutex_unlock(&data->mutex); 1004 break; 1005 case IIO_CHAN_INFO_SCALE: 1006 if (val) 1007 return -EINVAL; 1008 1009 mutex_lock(&data->mutex); 1010 ret = kxcjk1013_set_scale(data, val2); 1011 mutex_unlock(&data->mutex); 1012 break; 1013 default: 1014 ret = -EINVAL; 1015 } 1016 1017 return ret; 1018 } 1019 1020 static int kxcjk1013_read_event(struct iio_dev *indio_dev, 1021 const struct iio_chan_spec *chan, 1022 enum iio_event_type type, 1023 enum iio_event_direction dir, 1024 enum iio_event_info info, 1025 int *val, int *val2) 1026 { 1027 struct kxcjk1013_data *data = iio_priv(indio_dev); 1028 1029 *val2 = 0; 1030 switch (info) { 1031 case IIO_EV_INFO_VALUE: 1032 *val = data->wake_thres; 1033 break; 1034 case IIO_EV_INFO_PERIOD: 1035 *val = data->wake_dur; 1036 break; 1037 default: 1038 return -EINVAL; 1039 } 1040 1041 return IIO_VAL_INT; 1042 } 1043 1044 static int kxcjk1013_write_event(struct iio_dev *indio_dev, 1045 const struct iio_chan_spec *chan, 1046 enum iio_event_type type, 1047 enum iio_event_direction dir, 1048 enum iio_event_info info, 1049 int val, int val2) 1050 { 1051 struct kxcjk1013_data *data = iio_priv(indio_dev); 1052 1053 if (data->ev_enable_state) 1054 return -EBUSY; 1055 1056 switch (info) { 1057 case IIO_EV_INFO_VALUE: 1058 data->wake_thres = val; 1059 break; 1060 case IIO_EV_INFO_PERIOD: 1061 data->wake_dur = val; 1062 break; 1063 default: 1064 return -EINVAL; 1065 } 1066 1067 return 0; 1068 } 1069 1070 static int kxcjk1013_read_event_config(struct iio_dev *indio_dev, 1071 const struct iio_chan_spec *chan, 1072 enum iio_event_type type, 1073 enum iio_event_direction dir) 1074 { 1075 struct kxcjk1013_data *data = iio_priv(indio_dev); 1076 1077 return data->ev_enable_state; 1078 } 1079 1080 static int kxcjk1013_write_event_config(struct iio_dev *indio_dev, 1081 const struct iio_chan_spec *chan, 1082 enum iio_event_type type, 1083 enum iio_event_direction dir, 1084 bool state) 1085 { 1086 struct kxcjk1013_data *data = iio_priv(indio_dev); 1087 int ret; 1088 1089 if (state && data->ev_enable_state) 1090 return 0; 1091 1092 mutex_lock(&data->mutex); 1093 1094 if (!state && data->motion_trigger_on) { 1095 data->ev_enable_state = 0; 1096 mutex_unlock(&data->mutex); 1097 return 0; 1098 } 1099 1100 /* 1101 * We will expect the enable and disable to do operation in 1102 * reverse order. This will happen here anyway as our 1103 * resume operation uses sync mode runtime pm calls, the 1104 * suspend operation will be delayed by autosuspend delay 1105 * So the disable operation will still happen in reverse of 1106 * enable operation. When runtime pm is disabled the mode 1107 * is always on so sequence doesn't matter 1108 */ 1109 ret = kxcjk1013_set_power_state(data, state); 1110 if (ret < 0) { 1111 mutex_unlock(&data->mutex); 1112 return ret; 1113 } 1114 1115 ret = kxcjk1013_setup_any_motion_interrupt(data, state); 1116 if (ret < 0) { 1117 kxcjk1013_set_power_state(data, false); 1118 data->ev_enable_state = 0; 1119 mutex_unlock(&data->mutex); 1120 return ret; 1121 } 1122 1123 data->ev_enable_state = state; 1124 mutex_unlock(&data->mutex); 1125 1126 return 0; 1127 } 1128 1129 static int kxcjk1013_buffer_preenable(struct iio_dev *indio_dev) 1130 { 1131 struct kxcjk1013_data *data = iio_priv(indio_dev); 1132 1133 return kxcjk1013_set_power_state(data, true); 1134 } 1135 1136 static int kxcjk1013_buffer_postdisable(struct iio_dev *indio_dev) 1137 { 1138 struct kxcjk1013_data *data = iio_priv(indio_dev); 1139 1140 return kxcjk1013_set_power_state(data, false); 1141 } 1142 1143 static ssize_t kxcjk1013_get_samp_freq_avail(struct device *dev, 1144 struct device_attribute *attr, 1145 char *buf) 1146 { 1147 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 1148 struct kxcjk1013_data *data = iio_priv(indio_dev); 1149 const char *str; 1150 1151 if (data->info == &kxtf9_info) 1152 str = kxtf9_samp_freq_avail; 1153 else 1154 str = kxcjk1013_samp_freq_avail; 1155 1156 return sprintf(buf, "%s\n", str); 1157 } 1158 1159 static IIO_DEVICE_ATTR(in_accel_sampling_frequency_available, S_IRUGO, 1160 kxcjk1013_get_samp_freq_avail, NULL, 0); 1161 1162 static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326"); 1163 1164 static struct attribute *kxcjk1013_attributes[] = { 1165 &iio_dev_attr_in_accel_sampling_frequency_available.dev_attr.attr, 1166 &iio_const_attr_in_accel_scale_available.dev_attr.attr, 1167 NULL, 1168 }; 1169 1170 static const struct attribute_group kxcjk1013_attrs_group = { 1171 .attrs = kxcjk1013_attributes, 1172 }; 1173 1174 static const struct iio_event_spec kxcjk1013_event = { 1175 .type = IIO_EV_TYPE_THRESH, 1176 .dir = IIO_EV_DIR_EITHER, 1177 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 1178 BIT(IIO_EV_INFO_ENABLE) | 1179 BIT(IIO_EV_INFO_PERIOD) 1180 }; 1181 1182 static const struct iio_mount_matrix * 1183 kxcjk1013_get_mount_matrix(const struct iio_dev *indio_dev, 1184 const struct iio_chan_spec *chan) 1185 { 1186 struct kxcjk1013_data *data = iio_priv(indio_dev); 1187 1188 return &data->orientation; 1189 } 1190 1191 static const struct iio_chan_spec_ext_info kxcjk1013_ext_info[] = { 1192 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, kxcjk1013_get_mount_matrix), 1193 { } 1194 }; 1195 1196 #define KXCJK1013_CHANNEL(_axis) { \ 1197 .type = IIO_ACCEL, \ 1198 .modified = 1, \ 1199 .channel2 = IIO_MOD_##_axis, \ 1200 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 1201 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 1202 BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 1203 .scan_index = AXIS_##_axis, \ 1204 .scan_type = { \ 1205 .sign = 's', \ 1206 .realbits = 12, \ 1207 .storagebits = 16, \ 1208 .shift = 4, \ 1209 .endianness = IIO_LE, \ 1210 }, \ 1211 .event_spec = &kxcjk1013_event, \ 1212 .ext_info = kxcjk1013_ext_info, \ 1213 .num_event_specs = 1 \ 1214 } 1215 1216 static const struct iio_chan_spec kxcjk1013_channels[] = { 1217 KXCJK1013_CHANNEL(X), 1218 KXCJK1013_CHANNEL(Y), 1219 KXCJK1013_CHANNEL(Z), 1220 IIO_CHAN_SOFT_TIMESTAMP(3), 1221 }; 1222 1223 static const struct iio_buffer_setup_ops kxcjk1013_buffer_setup_ops = { 1224 .preenable = kxcjk1013_buffer_preenable, 1225 .postdisable = kxcjk1013_buffer_postdisable, 1226 }; 1227 1228 static const struct iio_info kxcjk1013_iio_info = { 1229 .attrs = &kxcjk1013_attrs_group, 1230 .read_raw = kxcjk1013_read_raw, 1231 .write_raw = kxcjk1013_write_raw, 1232 .read_event_value = kxcjk1013_read_event, 1233 .write_event_value = kxcjk1013_write_event, 1234 .write_event_config = kxcjk1013_write_event_config, 1235 .read_event_config = kxcjk1013_read_event_config, 1236 }; 1237 1238 static const unsigned long kxcjk1013_scan_masks[] = {0x7, 0}; 1239 1240 static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p) 1241 { 1242 struct iio_poll_func *pf = p; 1243 struct iio_dev *indio_dev = pf->indio_dev; 1244 struct kxcjk1013_data *data = iio_priv(indio_dev); 1245 int ret; 1246 1247 mutex_lock(&data->mutex); 1248 ret = i2c_smbus_read_i2c_block_data_or_emulated(data->client, 1249 KXCJK1013_REG_XOUT_L, 1250 AXIS_MAX * 2, 1251 (u8 *)data->scan.chans); 1252 mutex_unlock(&data->mutex); 1253 if (ret < 0) 1254 goto err; 1255 1256 iio_push_to_buffers_with_timestamp(indio_dev, &data->scan, 1257 data->timestamp); 1258 err: 1259 iio_trigger_notify_done(indio_dev->trig); 1260 1261 return IRQ_HANDLED; 1262 } 1263 1264 static void kxcjk1013_trig_reen(struct iio_trigger *trig) 1265 { 1266 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 1267 struct kxcjk1013_data *data = iio_priv(indio_dev); 1268 const struct kx_chipset_regs *regs = data->info->regs; 1269 int ret; 1270 1271 ret = i2c_smbus_read_byte_data(data->client, regs->int_rel); 1272 if (ret < 0) 1273 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 1274 } 1275 1276 static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig, 1277 bool state) 1278 { 1279 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 1280 struct kxcjk1013_data *data = iio_priv(indio_dev); 1281 int ret; 1282 1283 mutex_lock(&data->mutex); 1284 1285 if (!state && data->ev_enable_state && data->motion_trigger_on) { 1286 data->motion_trigger_on = false; 1287 mutex_unlock(&data->mutex); 1288 return 0; 1289 } 1290 1291 ret = kxcjk1013_set_power_state(data, state); 1292 if (ret < 0) { 1293 mutex_unlock(&data->mutex); 1294 return ret; 1295 } 1296 if (data->motion_trig == trig) 1297 ret = kxcjk1013_setup_any_motion_interrupt(data, state); 1298 else 1299 ret = kxcjk1013_setup_new_data_interrupt(data, state); 1300 if (ret < 0) { 1301 kxcjk1013_set_power_state(data, false); 1302 mutex_unlock(&data->mutex); 1303 return ret; 1304 } 1305 if (data->motion_trig == trig) 1306 data->motion_trigger_on = state; 1307 else 1308 data->dready_trigger_on = state; 1309 1310 mutex_unlock(&data->mutex); 1311 1312 return 0; 1313 } 1314 1315 static const struct iio_trigger_ops kxcjk1013_trigger_ops = { 1316 .set_trigger_state = kxcjk1013_data_rdy_trigger_set_state, 1317 .reenable = kxcjk1013_trig_reen, 1318 }; 1319 1320 static void kxcjk1013_report_motion_event(struct iio_dev *indio_dev) 1321 { 1322 struct kxcjk1013_data *data = iio_priv(indio_dev); 1323 const struct kx_chipset_regs *regs = data->info->regs; 1324 1325 int ret = i2c_smbus_read_byte_data(data->client, regs->int_src2); 1326 if (ret < 0) { 1327 dev_err(&data->client->dev, "Error reading reg_int_src2\n"); 1328 return; 1329 } 1330 1331 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN) 1332 iio_push_event(indio_dev, 1333 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1334 0, 1335 IIO_MOD_X, 1336 IIO_EV_TYPE_THRESH, 1337 IIO_EV_DIR_FALLING), 1338 data->timestamp); 1339 1340 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP) 1341 iio_push_event(indio_dev, 1342 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1343 0, 1344 IIO_MOD_X, 1345 IIO_EV_TYPE_THRESH, 1346 IIO_EV_DIR_RISING), 1347 data->timestamp); 1348 1349 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN) 1350 iio_push_event(indio_dev, 1351 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1352 0, 1353 IIO_MOD_Y, 1354 IIO_EV_TYPE_THRESH, 1355 IIO_EV_DIR_FALLING), 1356 data->timestamp); 1357 1358 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP) 1359 iio_push_event(indio_dev, 1360 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1361 0, 1362 IIO_MOD_Y, 1363 IIO_EV_TYPE_THRESH, 1364 IIO_EV_DIR_RISING), 1365 data->timestamp); 1366 1367 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN) 1368 iio_push_event(indio_dev, 1369 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1370 0, 1371 IIO_MOD_Z, 1372 IIO_EV_TYPE_THRESH, 1373 IIO_EV_DIR_FALLING), 1374 data->timestamp); 1375 1376 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP) 1377 iio_push_event(indio_dev, 1378 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1379 0, 1380 IIO_MOD_Z, 1381 IIO_EV_TYPE_THRESH, 1382 IIO_EV_DIR_RISING), 1383 data->timestamp); 1384 } 1385 1386 static irqreturn_t kxcjk1013_event_handler(int irq, void *private) 1387 { 1388 struct iio_dev *indio_dev = private; 1389 struct kxcjk1013_data *data = iio_priv(indio_dev); 1390 const struct kx_chipset_regs *regs = data->info->regs; 1391 int ret; 1392 1393 ret = i2c_smbus_read_byte_data(data->client, regs->int_src1); 1394 if (ret < 0) { 1395 dev_err(&data->client->dev, "Error reading reg_int_src1\n"); 1396 goto ack_intr; 1397 } 1398 1399 if (ret & KXCJK1013_REG_INT_SRC1_BIT_WUFS) { 1400 if (data->info == &kxtf9_info) 1401 iio_push_event(indio_dev, 1402 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1403 0, 1404 IIO_MOD_X_AND_Y_AND_Z, 1405 IIO_EV_TYPE_THRESH, 1406 IIO_EV_DIR_RISING), 1407 data->timestamp); 1408 else 1409 kxcjk1013_report_motion_event(indio_dev); 1410 } 1411 1412 ack_intr: 1413 if (data->dready_trigger_on) 1414 return IRQ_HANDLED; 1415 1416 ret = i2c_smbus_read_byte_data(data->client, regs->int_rel); 1417 if (ret < 0) 1418 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 1419 1420 return IRQ_HANDLED; 1421 } 1422 1423 static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private) 1424 { 1425 struct iio_dev *indio_dev = private; 1426 struct kxcjk1013_data *data = iio_priv(indio_dev); 1427 1428 data->timestamp = iio_get_time_ns(indio_dev); 1429 1430 if (data->dready_trigger_on) 1431 iio_trigger_poll(data->dready_trig); 1432 else if (data->motion_trigger_on) 1433 iio_trigger_poll(data->motion_trig); 1434 1435 if (data->ev_enable_state) 1436 return IRQ_WAKE_THREAD; 1437 else 1438 return IRQ_HANDLED; 1439 } 1440 1441 static int kxcjk1013_probe(struct i2c_client *client) 1442 { 1443 const struct i2c_device_id *id = i2c_client_get_device_id(client); 1444 static const char * const regulator_names[] = { "vdd", "vddio" }; 1445 struct kxcjk1013_data *data; 1446 struct iio_dev *indio_dev; 1447 struct kxcjk_1013_platform_data *pdata; 1448 const void *ddata = NULL; 1449 const char *name; 1450 int ret; 1451 1452 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 1453 if (!indio_dev) 1454 return -ENOMEM; 1455 1456 data = iio_priv(indio_dev); 1457 i2c_set_clientdata(client, indio_dev); 1458 data->client = client; 1459 1460 pdata = dev_get_platdata(&client->dev); 1461 if (pdata) { 1462 data->active_high_intr = pdata->active_high_intr; 1463 data->orientation = pdata->orientation; 1464 } else { 1465 data->active_high_intr = true; /* default polarity */ 1466 1467 if (!iio_read_acpi_mount_matrix(&client->dev, &data->orientation, "ROTM")) { 1468 ret = iio_read_mount_matrix(&client->dev, &data->orientation); 1469 if (ret) 1470 return ret; 1471 } 1472 1473 } 1474 1475 ret = devm_regulator_bulk_get_enable(&client->dev, 1476 ARRAY_SIZE(regulator_names), 1477 regulator_names); 1478 if (ret) 1479 return dev_err_probe(&client->dev, ret, "Failed to get regulators\n"); 1480 1481 /* 1482 * A typical delay of 10ms is required for powering up 1483 * according to the data sheets of supported chips. 1484 * Hence double that to play safe. 1485 */ 1486 msleep(20); 1487 1488 if (id) { 1489 name = id->name; 1490 data->info = (const struct kx_chipset_info *)(id->driver_data); 1491 } else { 1492 name = iio_get_acpi_device_name_and_data(&client->dev, &ddata); 1493 data->info = ddata; 1494 if (data->info == &kxcj91008_kiox010a_info) 1495 indio_dev->label = "accel-display"; 1496 else if (data->info == &kxcj91008_kiox020a_info) 1497 indio_dev->label = "accel-base"; 1498 } 1499 if (!name) 1500 return -ENODEV; 1501 1502 ret = kxcjk1013_chip_init(data); 1503 if (ret < 0) 1504 return ret; 1505 1506 mutex_init(&data->mutex); 1507 1508 indio_dev->channels = kxcjk1013_channels; 1509 indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels); 1510 indio_dev->available_scan_masks = kxcjk1013_scan_masks; 1511 indio_dev->name = name; 1512 indio_dev->modes = INDIO_DIRECT_MODE; 1513 indio_dev->info = &kxcjk1013_iio_info; 1514 1515 if (client->irq > 0 && data->info->acpi_type != ACPI_SMO8500) { 1516 ret = devm_request_threaded_irq(&client->dev, client->irq, 1517 kxcjk1013_data_rdy_trig_poll, 1518 kxcjk1013_event_handler, 1519 IRQF_TRIGGER_RISING, 1520 KXCJK1013_IRQ_NAME, 1521 indio_dev); 1522 if (ret) 1523 goto err_poweroff; 1524 1525 data->dready_trig = devm_iio_trigger_alloc(&client->dev, 1526 "%s-dev%d", 1527 indio_dev->name, 1528 iio_device_id(indio_dev)); 1529 if (!data->dready_trig) { 1530 ret = -ENOMEM; 1531 goto err_poweroff; 1532 } 1533 1534 data->motion_trig = devm_iio_trigger_alloc(&client->dev, 1535 "%s-any-motion-dev%d", 1536 indio_dev->name, 1537 iio_device_id(indio_dev)); 1538 if (!data->motion_trig) { 1539 ret = -ENOMEM; 1540 goto err_poweroff; 1541 } 1542 1543 data->dready_trig->ops = &kxcjk1013_trigger_ops; 1544 iio_trigger_set_drvdata(data->dready_trig, indio_dev); 1545 ret = iio_trigger_register(data->dready_trig); 1546 if (ret) 1547 goto err_poweroff; 1548 1549 indio_dev->trig = iio_trigger_get(data->dready_trig); 1550 1551 data->motion_trig->ops = &kxcjk1013_trigger_ops; 1552 iio_trigger_set_drvdata(data->motion_trig, indio_dev); 1553 ret = iio_trigger_register(data->motion_trig); 1554 if (ret) { 1555 data->motion_trig = NULL; 1556 goto err_trigger_unregister; 1557 } 1558 } 1559 1560 ret = iio_triggered_buffer_setup(indio_dev, 1561 &iio_pollfunc_store_time, 1562 kxcjk1013_trigger_handler, 1563 &kxcjk1013_buffer_setup_ops); 1564 if (ret < 0) { 1565 dev_err(&client->dev, "iio triggered buffer setup failed\n"); 1566 goto err_trigger_unregister; 1567 } 1568 1569 ret = pm_runtime_set_active(&client->dev); 1570 if (ret) 1571 goto err_buffer_cleanup; 1572 1573 pm_runtime_enable(&client->dev); 1574 pm_runtime_set_autosuspend_delay(&client->dev, 1575 KXCJK1013_SLEEP_DELAY_MS); 1576 pm_runtime_use_autosuspend(&client->dev); 1577 1578 ret = iio_device_register(indio_dev); 1579 if (ret < 0) { 1580 dev_err(&client->dev, "unable to register iio device\n"); 1581 goto err_pm_cleanup; 1582 } 1583 1584 return 0; 1585 1586 err_pm_cleanup: 1587 pm_runtime_dont_use_autosuspend(&client->dev); 1588 pm_runtime_disable(&client->dev); 1589 err_buffer_cleanup: 1590 iio_triggered_buffer_cleanup(indio_dev); 1591 err_trigger_unregister: 1592 if (data->dready_trig) 1593 iio_trigger_unregister(data->dready_trig); 1594 if (data->motion_trig) 1595 iio_trigger_unregister(data->motion_trig); 1596 err_poweroff: 1597 kxcjk1013_set_mode(data, STANDBY); 1598 1599 return ret; 1600 } 1601 1602 static void kxcjk1013_remove(struct i2c_client *client) 1603 { 1604 struct iio_dev *indio_dev = i2c_get_clientdata(client); 1605 struct kxcjk1013_data *data = iio_priv(indio_dev); 1606 1607 iio_device_unregister(indio_dev); 1608 1609 pm_runtime_disable(&client->dev); 1610 pm_runtime_set_suspended(&client->dev); 1611 1612 iio_triggered_buffer_cleanup(indio_dev); 1613 if (data->dready_trig) { 1614 iio_trigger_unregister(data->dready_trig); 1615 iio_trigger_unregister(data->motion_trig); 1616 } 1617 1618 mutex_lock(&data->mutex); 1619 kxcjk1013_set_mode(data, STANDBY); 1620 mutex_unlock(&data->mutex); 1621 } 1622 1623 static int kxcjk1013_suspend(struct device *dev) 1624 { 1625 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1626 struct kxcjk1013_data *data = iio_priv(indio_dev); 1627 int ret; 1628 1629 mutex_lock(&data->mutex); 1630 ret = kxcjk1013_set_mode(data, STANDBY); 1631 mutex_unlock(&data->mutex); 1632 1633 return ret; 1634 } 1635 1636 static int kxcjk1013_resume(struct device *dev) 1637 { 1638 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1639 struct kxcjk1013_data *data = iio_priv(indio_dev); 1640 int ret = 0; 1641 1642 mutex_lock(&data->mutex); 1643 ret = kxcjk1013_set_mode(data, OPERATION); 1644 if (ret == 0) 1645 ret = kxcjk1013_set_range(data, data->range); 1646 mutex_unlock(&data->mutex); 1647 1648 return ret; 1649 } 1650 1651 static int kxcjk1013_runtime_suspend(struct device *dev) 1652 { 1653 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1654 struct kxcjk1013_data *data = iio_priv(indio_dev); 1655 int ret; 1656 1657 ret = kxcjk1013_set_mode(data, STANDBY); 1658 if (ret < 0) { 1659 dev_err(&data->client->dev, "powering off device failed\n"); 1660 return -EAGAIN; 1661 } 1662 return 0; 1663 } 1664 1665 static int kxcjk1013_runtime_resume(struct device *dev) 1666 { 1667 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1668 struct kxcjk1013_data *data = iio_priv(indio_dev); 1669 int ret; 1670 int sleep_val; 1671 1672 ret = kxcjk1013_set_mode(data, OPERATION); 1673 if (ret < 0) 1674 return ret; 1675 1676 sleep_val = kxcjk1013_get_startup_times(data); 1677 if (sleep_val < 20000) 1678 usleep_range(sleep_val, 20000); 1679 else 1680 msleep_interruptible(sleep_val/1000); 1681 1682 return 0; 1683 } 1684 1685 static const struct dev_pm_ops kxcjk1013_pm_ops = { 1686 SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume) 1687 RUNTIME_PM_OPS(kxcjk1013_runtime_suspend, kxcjk1013_runtime_resume, NULL) 1688 }; 1689 1690 static const struct i2c_device_id kxcjk1013_id[] = { 1691 { "kxcjk1013", (kernel_ulong_t)&kxcjk1013_info }, 1692 { "kxcj91008", (kernel_ulong_t)&kxcj91008_info }, 1693 { "kxtj21009", (kernel_ulong_t)&kxtj21009_info }, 1694 { "kxtf9", (kernel_ulong_t)&kxtf9_info }, 1695 { "kx023-1025", (kernel_ulong_t)&kx0231025_info }, 1696 { } 1697 }; 1698 MODULE_DEVICE_TABLE(i2c, kxcjk1013_id); 1699 1700 static const struct of_device_id kxcjk1013_of_match[] = { 1701 { .compatible = "kionix,kxcjk1013", &kxcjk1013_info }, 1702 { .compatible = "kionix,kxcj91008", &kxcj91008_info }, 1703 { .compatible = "kionix,kxtj21009", &kxtj21009_info }, 1704 { .compatible = "kionix,kxtf9", &kxtf9_info }, 1705 { .compatible = "kionix,kx023-1025", &kx0231025_info }, 1706 { } 1707 }; 1708 MODULE_DEVICE_TABLE(of, kxcjk1013_of_match); 1709 1710 static const struct acpi_device_id kx_acpi_match[] = { 1711 { "KIOX0008", (kernel_ulong_t)&kxcj91008_info }, 1712 { "KIOX0009", (kernel_ulong_t)&kxtj21009_info }, 1713 { "KIOX000A", (kernel_ulong_t)&kxcj91008_info }, 1714 /* KXCJ91008 in the display of a yoga 2-in-1 */ 1715 { "KIOX010A", (kernel_ulong_t)&kxcj91008_kiox010a_info }, 1716 /* KXCJ91008 in the base of a yoga 2-in-1 */ 1717 { "KIOX020A", (kernel_ulong_t)&kxcj91008_kiox020a_info }, 1718 { "KXCJ1008", (kernel_ulong_t)&kxcj91008_info }, 1719 { "KXCJ1013", (kernel_ulong_t)&kxcjk1013_info }, 1720 { "KXCJ9000", (kernel_ulong_t)&kxcj91008_info }, 1721 { "KXJ2109", (kernel_ulong_t)&kxtj21009_info }, 1722 { "KXTJ1009", (kernel_ulong_t)&kxtj21009_info }, 1723 { "SMO8500", (kernel_ulong_t)&kxcj91008_smo8500_info }, 1724 { } 1725 }; 1726 MODULE_DEVICE_TABLE(acpi, kx_acpi_match); 1727 1728 static struct i2c_driver kxcjk1013_driver = { 1729 .driver = { 1730 .name = KXCJK1013_DRV_NAME, 1731 .acpi_match_table = kx_acpi_match, 1732 .of_match_table = kxcjk1013_of_match, 1733 .pm = pm_ptr(&kxcjk1013_pm_ops), 1734 }, 1735 .probe = kxcjk1013_probe, 1736 .remove = kxcjk1013_remove, 1737 .id_table = kxcjk1013_id, 1738 }; 1739 module_i2c_driver(kxcjk1013_driver); 1740 1741 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>"); 1742 MODULE_LICENSE("GPL v2"); 1743 MODULE_DESCRIPTION("KXCJK1013 accelerometer driver"); 1744