1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * KXCJK-1013 3-axis accelerometer driver 4 * Copyright (c) 2014, Intel Corporation. 5 */ 6 7 #include <linux/module.h> 8 #include <linux/i2c.h> 9 #include <linux/interrupt.h> 10 #include <linux/delay.h> 11 #include <linux/bitops.h> 12 #include <linux/slab.h> 13 #include <linux/string.h> 14 #include <linux/acpi.h> 15 #include <linux/pm.h> 16 #include <linux/pm_runtime.h> 17 #include <linux/regulator/consumer.h> 18 #include <linux/iio/iio.h> 19 #include <linux/iio/sysfs.h> 20 #include <linux/iio/buffer.h> 21 #include <linux/iio/trigger.h> 22 #include <linux/iio/events.h> 23 #include <linux/iio/trigger_consumer.h> 24 #include <linux/iio/triggered_buffer.h> 25 #include <linux/iio/accel/kxcjk_1013.h> 26 27 #define KXCJK1013_DRV_NAME "kxcjk1013" 28 #define KXCJK1013_IRQ_NAME "kxcjk1013_event" 29 30 #define KXTF9_REG_HP_XOUT_L 0x00 31 #define KXTF9_REG_HP_XOUT_H 0x01 32 #define KXTF9_REG_HP_YOUT_L 0x02 33 #define KXTF9_REG_HP_YOUT_H 0x03 34 #define KXTF9_REG_HP_ZOUT_L 0x04 35 #define KXTF9_REG_HP_ZOUT_H 0x05 36 37 #define KXCJK1013_REG_XOUT_L 0x06 38 /* 39 * From low byte X axis register, all the other addresses of Y and Z can be 40 * obtained by just applying axis offset. The following axis defines are just 41 * provide clarity, but not used. 42 */ 43 #define KXCJK1013_REG_XOUT_H 0x07 44 #define KXCJK1013_REG_YOUT_L 0x08 45 #define KXCJK1013_REG_YOUT_H 0x09 46 #define KXCJK1013_REG_ZOUT_L 0x0A 47 #define KXCJK1013_REG_ZOUT_H 0x0B 48 49 #define KXCJK1013_REG_DCST_RESP 0x0C 50 #define KXCJK1013_REG_WHO_AM_I 0x0F 51 #define KXTF9_REG_TILT_POS_CUR 0x10 52 #define KXTF9_REG_TILT_POS_PREV 0x11 53 #define KXTF9_REG_INT_SRC1 0x15 54 #define KXTF9_REG_INT_SRC2 0x16 55 #define KXCJK1013_REG_INT_SRC1 0x16 56 #define KXCJK1013_REG_INT_SRC2 0x17 57 #define KXCJK1013_REG_STATUS_REG 0x18 58 #define KXCJK1013_REG_INT_REL 0x1A 59 #define KXCJK1013_REG_CTRL1 0x1B 60 #define KXTF9_REG_CTRL2 0x1C 61 #define KXTF9_REG_CTRL3 0x1D 62 #define KXCJK1013_REG_CTRL2 0x1D 63 #define KXCJK1013_REG_INT_CTRL1 0x1E 64 #define KXCJK1013_REG_INT_CTRL2 0x1F 65 #define KXTF9_REG_INT_CTRL3 0x20 66 #define KXCJK1013_REG_DATA_CTRL 0x21 67 #define KXTF9_REG_TILT_TIMER 0x28 68 #define KXCJK1013_REG_WAKE_TIMER 0x29 69 #define KXTF9_REG_TDT_TIMER 0x2B 70 #define KXTF9_REG_TDT_THRESH_H 0x2C 71 #define KXTF9_REG_TDT_THRESH_L 0x2D 72 #define KXTF9_REG_TDT_TAP_TIMER 0x2E 73 #define KXTF9_REG_TDT_TOTAL_TIMER 0x2F 74 #define KXTF9_REG_TDT_LATENCY_TIMER 0x30 75 #define KXTF9_REG_TDT_WINDOW_TIMER 0x31 76 #define KXCJK1013_REG_SELF_TEST 0x3A 77 #define KXTF9_REG_WAKE_THRESH 0x5A 78 #define KXTF9_REG_TILT_ANGLE 0x5C 79 #define KXTF9_REG_HYST_SET 0x5F 80 #define KXCJK1013_REG_WAKE_THRES 0x6A 81 82 /* Everything up to 0x11 is equal to KXCJK1013/KXTF9 above */ 83 #define KX023_REG_INS1 0x12 84 #define KX023_REG_INS2 0x13 85 #define KX023_REG_INS3 0x14 86 #define KX023_REG_STAT 0x15 87 #define KX023_REG_INT_REL 0x17 88 #define KX023_REG_CNTL1 0x18 89 #define KX023_REG_CNTL2 0x19 90 #define KX023_REG_CNTL3 0x1A 91 #define KX023_REG_ODCNTL 0x1B 92 #define KX023_REG_INC1 0x1C 93 #define KX023_REG_INC2 0x1D 94 #define KX023_REG_INC3 0x1E 95 #define KX023_REG_INC4 0x1F 96 #define KX023_REG_INC5 0x20 97 #define KX023_REG_INC6 0x21 98 #define KX023_REG_TILT_TIMER 0x22 99 #define KX023_REG_WUFC 0x23 100 #define KX023_REG_TDTRC 0x24 101 #define KX023_REG_TDTC 0x25 102 #define KX023_REG_TTH 0x26 103 #define KX023_REG_TTL 0x27 104 #define KX023_REG_FTD 0x28 105 #define KX023_REG_STD 0x29 106 #define KX023_REG_TLT 0x2A 107 #define KX023_REG_TWS 0x2B 108 #define KX023_REG_ATH 0x30 109 #define KX023_REG_TILT_ANGLE_LL 0x32 110 #define KX023_REG_TILT_ANGLE_HL 0x33 111 #define KX023_REG_HYST_SET 0x34 112 #define KX023_REG_LP_CNTL 0x35 113 #define KX023_REG_BUF_CNTL1 0x3A 114 #define KX023_REG_BUF_CNTL2 0x3B 115 #define KX023_REG_BUF_STATUS_1 0x3C 116 #define KX023_REG_BUF_STATUS_2 0x3D 117 #define KX023_REG_BUF_CLEAR 0x3E 118 #define KX023_REG_BUF_READ 0x3F 119 #define KX023_REG_SELF_TEST 0x60 120 121 #define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7) 122 #define KXCJK1013_REG_CTRL1_BIT_RES BIT(6) 123 #define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5) 124 #define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4) 125 #define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3) 126 #define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1) 127 128 #define KXCJK1013_REG_INT_CTRL1_BIT_IEU BIT(2) /* KXTF9 */ 129 #define KXCJK1013_REG_INT_CTRL1_BIT_IEL BIT(3) 130 #define KXCJK1013_REG_INT_CTRL1_BIT_IEA BIT(4) 131 #define KXCJK1013_REG_INT_CTRL1_BIT_IEN BIT(5) 132 133 #define KXTF9_REG_TILT_BIT_LEFT_EDGE BIT(5) 134 #define KXTF9_REG_TILT_BIT_RIGHT_EDGE BIT(4) 135 #define KXTF9_REG_TILT_BIT_LOWER_EDGE BIT(3) 136 #define KXTF9_REG_TILT_BIT_UPPER_EDGE BIT(2) 137 #define KXTF9_REG_TILT_BIT_FACE_DOWN BIT(1) 138 #define KXTF9_REG_TILT_BIT_FACE_UP BIT(0) 139 140 #define KXCJK1013_DATA_MASK_12_BIT 0x0FFF 141 #define KXCJK1013_MAX_STARTUP_TIME_US 100000 142 143 #define KXCJK1013_SLEEP_DELAY_MS 2000 144 145 #define KXCJK1013_REG_INT_SRC1_BIT_TPS BIT(0) /* KXTF9 */ 146 #define KXCJK1013_REG_INT_SRC1_BIT_WUFS BIT(1) 147 #define KXCJK1013_REG_INT_SRC1_MASK_TDTS (BIT(2) | BIT(3)) /* KXTF9 */ 148 #define KXCJK1013_REG_INT_SRC1_TAP_NONE 0 149 #define KXCJK1013_REG_INT_SRC1_TAP_SINGLE BIT(2) 150 #define KXCJK1013_REG_INT_SRC1_TAP_DOUBLE BIT(3) 151 #define KXCJK1013_REG_INT_SRC1_BIT_DRDY BIT(4) 152 153 /* KXCJK: INT_SOURCE2: motion detect, KXTF9: INT_SRC_REG1: tap detect */ 154 #define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0) 155 #define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1) 156 #define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2) 157 #define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3) 158 #define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4) 159 #define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5) 160 161 /* KX023 interrupt routing to INT1. INT2 can be configured with INC6 */ 162 #define KX023_REG_INC4_BFI1 BIT(6) 163 #define KX023_REG_INC4_WMI1 BIT(5) 164 #define KX023_REG_INC4_DRDY1 BIT(4) 165 #define KX023_REG_INC4_TDTI1 BIT(2) 166 #define KX023_REG_INC4_WUFI1 BIT(1) 167 #define KX023_REG_INC4_TPI1 BIT(0) 168 169 #define KXCJK1013_DEFAULT_WAKE_THRES 1 170 171 enum kx_chipset { 172 KXCJK1013, 173 KXCJ91008, 174 KXTJ21009, 175 KXTF9, 176 KX0221020, 177 KX0231025, 178 KX_MAX_CHIPS /* this must be last */ 179 }; 180 181 enum kx_acpi_type { 182 ACPI_GENERIC, 183 ACPI_SMO8500, 184 ACPI_KIOX010A, 185 }; 186 187 struct kx_chipset_regs { 188 u8 int_src1; 189 u8 int_src2; 190 u8 int_rel; 191 u8 ctrl1; 192 u8 wuf_ctrl; 193 u8 int_ctrl1; 194 u8 data_ctrl; 195 u8 wake_timer; 196 u8 wake_thres; 197 }; 198 199 static const struct kx_chipset_regs kxcjk1013_regs = { 200 .int_src1 = KXCJK1013_REG_INT_SRC1, 201 .int_src2 = KXCJK1013_REG_INT_SRC2, 202 .int_rel = KXCJK1013_REG_INT_REL, 203 .ctrl1 = KXCJK1013_REG_CTRL1, 204 .wuf_ctrl = KXCJK1013_REG_CTRL2, 205 .int_ctrl1 = KXCJK1013_REG_INT_CTRL1, 206 .data_ctrl = KXCJK1013_REG_DATA_CTRL, 207 .wake_timer = KXCJK1013_REG_WAKE_TIMER, 208 .wake_thres = KXCJK1013_REG_WAKE_THRES, 209 }; 210 211 static const struct kx_chipset_regs kxtf9_regs = { 212 /* .int_src1 was moved to INT_SRC2 on KXTF9 */ 213 .int_src1 = KXTF9_REG_INT_SRC2, 214 /* .int_src2 is not available */ 215 .int_rel = KXCJK1013_REG_INT_REL, 216 .ctrl1 = KXCJK1013_REG_CTRL1, 217 .wuf_ctrl = KXTF9_REG_CTRL3, 218 .int_ctrl1 = KXCJK1013_REG_INT_CTRL1, 219 .data_ctrl = KXCJK1013_REG_DATA_CTRL, 220 .wake_timer = KXCJK1013_REG_WAKE_TIMER, 221 .wake_thres = KXTF9_REG_WAKE_THRESH, 222 }; 223 224 /* The registers have totally different names but the bits are compatible */ 225 static const struct kx_chipset_regs kx0231025_regs = { 226 .int_src1 = KX023_REG_INS2, 227 .int_src2 = KX023_REG_INS3, 228 .int_rel = KX023_REG_INT_REL, 229 .ctrl1 = KX023_REG_CNTL1, 230 .wuf_ctrl = KX023_REG_CNTL3, 231 .int_ctrl1 = KX023_REG_INC1, 232 .data_ctrl = KX023_REG_ODCNTL, 233 .wake_timer = KX023_REG_WUFC, 234 .wake_thres = KX023_REG_ATH, 235 }; 236 237 enum kxcjk1013_axis { 238 AXIS_X, 239 AXIS_Y, 240 AXIS_Z, 241 AXIS_MAX 242 }; 243 244 struct kxcjk1013_data { 245 struct i2c_client *client; 246 struct iio_trigger *dready_trig; 247 struct iio_trigger *motion_trig; 248 struct iio_mount_matrix orientation; 249 struct mutex mutex; 250 /* Ensure timestamp naturally aligned */ 251 struct { 252 s16 chans[AXIS_MAX]; 253 s64 timestamp __aligned(8); 254 } scan; 255 u8 odr_bits; 256 u8 range; 257 int wake_thres; 258 int wake_dur; 259 bool active_high_intr; 260 bool dready_trigger_on; 261 int ev_enable_state; 262 bool motion_trigger_on; 263 int64_t timestamp; 264 enum kx_chipset chipset; 265 enum kx_acpi_type acpi_type; 266 const struct kx_chipset_regs *regs; 267 }; 268 269 enum kxcjk1013_mode { 270 STANDBY, 271 OPERATION, 272 }; 273 274 enum kxcjk1013_range { 275 KXCJK1013_RANGE_2G, 276 KXCJK1013_RANGE_4G, 277 KXCJK1013_RANGE_8G, 278 }; 279 280 struct kx_odr_map { 281 int val; 282 int val2; 283 int odr_bits; 284 int wuf_bits; 285 }; 286 287 static const struct kx_odr_map samp_freq_table[] = { 288 { 0, 781000, 0x08, 0x00 }, 289 { 1, 563000, 0x09, 0x01 }, 290 { 3, 125000, 0x0A, 0x02 }, 291 { 6, 250000, 0x0B, 0x03 }, 292 { 12, 500000, 0x00, 0x04 }, 293 { 25, 0, 0x01, 0x05 }, 294 { 50, 0, 0x02, 0x06 }, 295 { 100, 0, 0x03, 0x06 }, 296 { 200, 0, 0x04, 0x06 }, 297 { 400, 0, 0x05, 0x06 }, 298 { 800, 0, 0x06, 0x06 }, 299 { 1600, 0, 0x07, 0x06 }, 300 }; 301 302 static const char *const kxcjk1013_samp_freq_avail = 303 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600"; 304 305 static const struct kx_odr_map kxtf9_samp_freq_table[] = { 306 { 25, 0, 0x01, 0x00 }, 307 { 50, 0, 0x02, 0x01 }, 308 { 100, 0, 0x03, 0x01 }, 309 { 200, 0, 0x04, 0x01 }, 310 { 400, 0, 0x05, 0x01 }, 311 { 800, 0, 0x06, 0x01 }, 312 }; 313 314 static const char *const kxtf9_samp_freq_avail = 315 "25 50 100 200 400 800"; 316 317 /* Refer to section 4 of the specification */ 318 static __maybe_unused const struct { 319 int odr_bits; 320 int usec; 321 } odr_start_up_times[KX_MAX_CHIPS][12] = { 322 /* KXCJK-1013 */ 323 { 324 {0x08, 100000}, 325 {0x09, 100000}, 326 {0x0A, 100000}, 327 {0x0B, 100000}, 328 {0, 80000}, 329 {0x01, 41000}, 330 {0x02, 21000}, 331 {0x03, 11000}, 332 {0x04, 6400}, 333 {0x05, 3900}, 334 {0x06, 2700}, 335 {0x07, 2100}, 336 }, 337 /* KXCJ9-1008 */ 338 { 339 {0x08, 100000}, 340 {0x09, 100000}, 341 {0x0A, 100000}, 342 {0x0B, 100000}, 343 {0, 80000}, 344 {0x01, 41000}, 345 {0x02, 21000}, 346 {0x03, 11000}, 347 {0x04, 6400}, 348 {0x05, 3900}, 349 {0x06, 2700}, 350 {0x07, 2100}, 351 }, 352 /* KXCTJ2-1009 */ 353 { 354 {0x08, 1240000}, 355 {0x09, 621000}, 356 {0x0A, 309000}, 357 {0x0B, 151000}, 358 {0, 80000}, 359 {0x01, 41000}, 360 {0x02, 21000}, 361 {0x03, 11000}, 362 {0x04, 6000}, 363 {0x05, 4000}, 364 {0x06, 3000}, 365 {0x07, 2000}, 366 }, 367 /* KXTF9 */ 368 { 369 {0x01, 81000}, 370 {0x02, 41000}, 371 {0x03, 21000}, 372 {0x04, 11000}, 373 {0x05, 5100}, 374 {0x06, 2700}, 375 }, 376 /* KX023-1025 */ 377 { 378 /* First 4 are not in datasheet, taken from KXCTJ2-1009 */ 379 {0x08, 1240000}, 380 {0x09, 621000}, 381 {0x0A, 309000}, 382 {0x0B, 151000}, 383 {0, 81000}, 384 {0x01, 40000}, 385 {0x02, 22000}, 386 {0x03, 12000}, 387 {0x04, 7000}, 388 {0x05, 4400}, 389 {0x06, 3000}, 390 {0x07, 3000}, 391 }, 392 }; 393 394 static const struct { 395 u16 scale; 396 u8 gsel_0; 397 u8 gsel_1; 398 } KXCJK1013_scale_table[] = { {9582, 0, 0}, 399 {19163, 1, 0}, 400 {38326, 0, 1} }; 401 402 #ifdef CONFIG_ACPI 403 enum kiox010a_fn_index { 404 KIOX010A_SET_LAPTOP_MODE = 1, 405 KIOX010A_SET_TABLET_MODE = 2, 406 }; 407 408 static int kiox010a_dsm(struct device *dev, int fn_index) 409 { 410 acpi_handle handle = ACPI_HANDLE(dev); 411 guid_t kiox010a_dsm_guid; 412 union acpi_object *obj; 413 414 if (!handle) 415 return -ENODEV; 416 417 guid_parse("1f339696-d475-4e26-8cad-2e9f8e6d7a91", &kiox010a_dsm_guid); 418 419 obj = acpi_evaluate_dsm(handle, &kiox010a_dsm_guid, 1, fn_index, NULL); 420 if (!obj) 421 return -EIO; 422 423 ACPI_FREE(obj); 424 return 0; 425 } 426 427 static const struct acpi_device_id kx_acpi_match[] = { 428 {"KXCJ1013", KXCJK1013}, 429 {"KXCJ1008", KXCJ91008}, 430 {"KXCJ9000", KXCJ91008}, 431 {"KIOX0008", KXCJ91008}, 432 {"KIOX0009", KXTJ21009}, 433 {"KIOX000A", KXCJ91008}, 434 {"KIOX010A", KXCJ91008}, /* KXCJ91008 in the display of a yoga 2-in-1 */ 435 {"KIOX020A", KXCJ91008}, /* KXCJ91008 in the base of a yoga 2-in-1 */ 436 {"KXTJ1009", KXTJ21009}, 437 {"KXJ2109", KXTJ21009}, 438 {"SMO8500", KXCJ91008}, 439 { } 440 }; 441 MODULE_DEVICE_TABLE(acpi, kx_acpi_match); 442 443 #endif 444 445 static int kxcjk1013_set_mode(struct kxcjk1013_data *data, 446 enum kxcjk1013_mode mode) 447 { 448 int ret; 449 450 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 451 if (ret < 0) { 452 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 453 return ret; 454 } 455 456 if (mode == STANDBY) 457 ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1; 458 else 459 ret |= KXCJK1013_REG_CTRL1_BIT_PC1; 460 461 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 462 if (ret < 0) { 463 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 464 return ret; 465 } 466 467 return 0; 468 } 469 470 static int kxcjk1013_get_mode(struct kxcjk1013_data *data, 471 enum kxcjk1013_mode *mode) 472 { 473 int ret; 474 475 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 476 if (ret < 0) { 477 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 478 return ret; 479 } 480 481 if (ret & KXCJK1013_REG_CTRL1_BIT_PC1) 482 *mode = OPERATION; 483 else 484 *mode = STANDBY; 485 486 return 0; 487 } 488 489 static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index) 490 { 491 int ret; 492 493 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 494 if (ret < 0) { 495 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 496 return ret; 497 } 498 499 ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 | 500 KXCJK1013_REG_CTRL1_BIT_GSEL1); 501 ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3); 502 ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4); 503 504 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 505 if (ret < 0) { 506 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 507 return ret; 508 } 509 510 data->range = range_index; 511 512 return 0; 513 } 514 515 static int kxcjk1013_chip_init(struct kxcjk1013_data *data) 516 { 517 int ret; 518 519 #ifdef CONFIG_ACPI 520 if (data->acpi_type == ACPI_KIOX010A) { 521 /* Make sure the kbd and touchpad on 2-in-1s using 2 KXCJ91008-s work */ 522 kiox010a_dsm(&data->client->dev, KIOX010A_SET_LAPTOP_MODE); 523 } 524 #endif 525 526 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I); 527 if (ret < 0) { 528 dev_err(&data->client->dev, "Error reading who_am_i\n"); 529 return ret; 530 } 531 532 dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret); 533 534 ret = kxcjk1013_set_mode(data, STANDBY); 535 if (ret < 0) 536 return ret; 537 538 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 539 if (ret < 0) { 540 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 541 return ret; 542 } 543 544 /* Set 12 bit mode */ 545 ret |= KXCJK1013_REG_CTRL1_BIT_RES; 546 547 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 548 if (ret < 0) { 549 dev_err(&data->client->dev, "Error reading reg_ctrl\n"); 550 return ret; 551 } 552 553 /* Setting range to 4G */ 554 ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G); 555 if (ret < 0) 556 return ret; 557 558 ret = i2c_smbus_read_byte_data(data->client, data->regs->data_ctrl); 559 if (ret < 0) { 560 dev_err(&data->client->dev, "Error reading reg_data_ctrl\n"); 561 return ret; 562 } 563 564 data->odr_bits = ret; 565 566 /* Set up INT polarity */ 567 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1); 568 if (ret < 0) { 569 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 570 return ret; 571 } 572 573 if (data->active_high_intr) 574 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEA; 575 else 576 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEA; 577 578 ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret); 579 if (ret < 0) { 580 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 581 return ret; 582 } 583 584 /* On KX023 and KX022, route all used interrupts to INT1 for now */ 585 if ((data->chipset == KX0231025 || data->chipset == KX0221020) && data->client->irq > 0) { 586 ret = i2c_smbus_write_byte_data(data->client, KX023_REG_INC4, 587 KX023_REG_INC4_DRDY1 | 588 KX023_REG_INC4_WUFI1); 589 if (ret < 0) { 590 dev_err(&data->client->dev, "Error writing reg_inc4\n"); 591 return ret; 592 } 593 } 594 595 ret = kxcjk1013_set_mode(data, OPERATION); 596 if (ret < 0) 597 return ret; 598 599 data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES; 600 601 return 0; 602 } 603 604 #ifdef CONFIG_PM 605 static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data) 606 { 607 int i; 608 int idx = data->chipset; 609 610 for (i = 0; i < ARRAY_SIZE(odr_start_up_times[idx]); ++i) { 611 if (odr_start_up_times[idx][i].odr_bits == data->odr_bits) 612 return odr_start_up_times[idx][i].usec; 613 } 614 615 return KXCJK1013_MAX_STARTUP_TIME_US; 616 } 617 #endif 618 619 static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on) 620 { 621 #ifdef CONFIG_PM 622 int ret; 623 624 if (on) 625 ret = pm_runtime_resume_and_get(&data->client->dev); 626 else { 627 pm_runtime_mark_last_busy(&data->client->dev); 628 ret = pm_runtime_put_autosuspend(&data->client->dev); 629 } 630 if (ret < 0) { 631 dev_err(&data->client->dev, 632 "Failed: %s for %d\n", __func__, on); 633 return ret; 634 } 635 #endif 636 637 return 0; 638 } 639 640 static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data) 641 { 642 int ret; 643 644 ret = i2c_smbus_write_byte_data(data->client, data->regs->wake_timer, 645 data->wake_dur); 646 if (ret < 0) { 647 dev_err(&data->client->dev, 648 "Error writing reg_wake_timer\n"); 649 return ret; 650 } 651 652 ret = i2c_smbus_write_byte_data(data->client, data->regs->wake_thres, 653 data->wake_thres); 654 if (ret < 0) { 655 dev_err(&data->client->dev, "Error writing reg_wake_thres\n"); 656 return ret; 657 } 658 659 return 0; 660 } 661 662 static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data, 663 bool status) 664 { 665 int ret; 666 enum kxcjk1013_mode store_mode; 667 668 ret = kxcjk1013_get_mode(data, &store_mode); 669 if (ret < 0) 670 return ret; 671 672 /* This is requirement by spec to change state to STANDBY */ 673 ret = kxcjk1013_set_mode(data, STANDBY); 674 if (ret < 0) 675 return ret; 676 677 ret = kxcjk1013_chip_update_thresholds(data); 678 if (ret < 0) 679 return ret; 680 681 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1); 682 if (ret < 0) { 683 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 684 return ret; 685 } 686 687 if (status) 688 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN; 689 else 690 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN; 691 692 ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret); 693 if (ret < 0) { 694 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 695 return ret; 696 } 697 698 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 699 if (ret < 0) { 700 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 701 return ret; 702 } 703 704 if (status) 705 ret |= KXCJK1013_REG_CTRL1_BIT_WUFE; 706 else 707 ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE; 708 709 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 710 if (ret < 0) { 711 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 712 return ret; 713 } 714 715 if (store_mode == OPERATION) { 716 ret = kxcjk1013_set_mode(data, OPERATION); 717 if (ret < 0) 718 return ret; 719 } 720 721 return 0; 722 } 723 724 static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data, 725 bool status) 726 { 727 int ret; 728 enum kxcjk1013_mode store_mode; 729 730 ret = kxcjk1013_get_mode(data, &store_mode); 731 if (ret < 0) 732 return ret; 733 734 /* This is requirement by spec to change state to STANDBY */ 735 ret = kxcjk1013_set_mode(data, STANDBY); 736 if (ret < 0) 737 return ret; 738 739 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1); 740 if (ret < 0) { 741 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 742 return ret; 743 } 744 745 if (status) 746 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN; 747 else 748 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN; 749 750 ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret); 751 if (ret < 0) { 752 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 753 return ret; 754 } 755 756 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 757 if (ret < 0) { 758 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 759 return ret; 760 } 761 762 if (status) 763 ret |= KXCJK1013_REG_CTRL1_BIT_DRDY; 764 else 765 ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY; 766 767 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 768 if (ret < 0) { 769 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 770 return ret; 771 } 772 773 if (store_mode == OPERATION) { 774 ret = kxcjk1013_set_mode(data, OPERATION); 775 if (ret < 0) 776 return ret; 777 } 778 779 return 0; 780 } 781 782 static const struct kx_odr_map *kxcjk1013_find_odr_value( 783 const struct kx_odr_map *map, size_t map_size, int val, int val2) 784 { 785 int i; 786 787 for (i = 0; i < map_size; ++i) { 788 if (map[i].val == val && map[i].val2 == val2) 789 return &map[i]; 790 } 791 792 return ERR_PTR(-EINVAL); 793 } 794 795 static int kxcjk1013_convert_odr_value(const struct kx_odr_map *map, 796 size_t map_size, int odr_bits, 797 int *val, int *val2) 798 { 799 int i; 800 801 for (i = 0; i < map_size; ++i) { 802 if (map[i].odr_bits == odr_bits) { 803 *val = map[i].val; 804 *val2 = map[i].val2; 805 return IIO_VAL_INT_PLUS_MICRO; 806 } 807 } 808 809 return -EINVAL; 810 } 811 812 static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2) 813 { 814 int ret; 815 enum kxcjk1013_mode store_mode; 816 const struct kx_odr_map *odr_setting; 817 818 ret = kxcjk1013_get_mode(data, &store_mode); 819 if (ret < 0) 820 return ret; 821 822 if (data->chipset == KXTF9) 823 odr_setting = kxcjk1013_find_odr_value(kxtf9_samp_freq_table, 824 ARRAY_SIZE(kxtf9_samp_freq_table), 825 val, val2); 826 else 827 odr_setting = kxcjk1013_find_odr_value(samp_freq_table, 828 ARRAY_SIZE(samp_freq_table), 829 val, val2); 830 831 if (IS_ERR(odr_setting)) 832 return PTR_ERR(odr_setting); 833 834 /* To change ODR, the chip must be set to STANDBY as per spec */ 835 ret = kxcjk1013_set_mode(data, STANDBY); 836 if (ret < 0) 837 return ret; 838 839 ret = i2c_smbus_write_byte_data(data->client, data->regs->data_ctrl, 840 odr_setting->odr_bits); 841 if (ret < 0) { 842 dev_err(&data->client->dev, "Error writing data_ctrl\n"); 843 return ret; 844 } 845 846 data->odr_bits = odr_setting->odr_bits; 847 848 ret = i2c_smbus_write_byte_data(data->client, data->regs->wuf_ctrl, 849 odr_setting->wuf_bits); 850 if (ret < 0) { 851 dev_err(&data->client->dev, "Error writing reg_ctrl2\n"); 852 return ret; 853 } 854 855 if (store_mode == OPERATION) { 856 ret = kxcjk1013_set_mode(data, OPERATION); 857 if (ret < 0) 858 return ret; 859 } 860 861 return 0; 862 } 863 864 static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2) 865 { 866 if (data->chipset == KXTF9) 867 return kxcjk1013_convert_odr_value(kxtf9_samp_freq_table, 868 ARRAY_SIZE(kxtf9_samp_freq_table), 869 data->odr_bits, val, val2); 870 else 871 return kxcjk1013_convert_odr_value(samp_freq_table, 872 ARRAY_SIZE(samp_freq_table), 873 data->odr_bits, val, val2); 874 } 875 876 static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis) 877 { 878 u8 reg = KXCJK1013_REG_XOUT_L + axis * 2; 879 int ret; 880 881 ret = i2c_smbus_read_word_data(data->client, reg); 882 if (ret < 0) { 883 dev_err(&data->client->dev, 884 "failed to read accel_%c registers\n", 'x' + axis); 885 return ret; 886 } 887 888 return ret; 889 } 890 891 static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val) 892 { 893 int ret, i; 894 enum kxcjk1013_mode store_mode; 895 896 for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) { 897 if (KXCJK1013_scale_table[i].scale == val) { 898 ret = kxcjk1013_get_mode(data, &store_mode); 899 if (ret < 0) 900 return ret; 901 902 ret = kxcjk1013_set_mode(data, STANDBY); 903 if (ret < 0) 904 return ret; 905 906 ret = kxcjk1013_set_range(data, i); 907 if (ret < 0) 908 return ret; 909 910 if (store_mode == OPERATION) { 911 ret = kxcjk1013_set_mode(data, OPERATION); 912 if (ret) 913 return ret; 914 } 915 916 return 0; 917 } 918 } 919 920 return -EINVAL; 921 } 922 923 static int kxcjk1013_read_raw(struct iio_dev *indio_dev, 924 struct iio_chan_spec const *chan, int *val, 925 int *val2, long mask) 926 { 927 struct kxcjk1013_data *data = iio_priv(indio_dev); 928 int ret; 929 930 switch (mask) { 931 case IIO_CHAN_INFO_RAW: 932 mutex_lock(&data->mutex); 933 if (iio_buffer_enabled(indio_dev)) 934 ret = -EBUSY; 935 else { 936 ret = kxcjk1013_set_power_state(data, true); 937 if (ret < 0) { 938 mutex_unlock(&data->mutex); 939 return ret; 940 } 941 ret = kxcjk1013_get_acc_reg(data, chan->scan_index); 942 if (ret < 0) { 943 kxcjk1013_set_power_state(data, false); 944 mutex_unlock(&data->mutex); 945 return ret; 946 } 947 *val = sign_extend32(ret >> chan->scan_type.shift, 948 chan->scan_type.realbits - 1); 949 ret = kxcjk1013_set_power_state(data, false); 950 } 951 mutex_unlock(&data->mutex); 952 953 if (ret < 0) 954 return ret; 955 956 return IIO_VAL_INT; 957 958 case IIO_CHAN_INFO_SCALE: 959 *val = 0; 960 *val2 = KXCJK1013_scale_table[data->range].scale; 961 return IIO_VAL_INT_PLUS_MICRO; 962 963 case IIO_CHAN_INFO_SAMP_FREQ: 964 mutex_lock(&data->mutex); 965 ret = kxcjk1013_get_odr(data, val, val2); 966 mutex_unlock(&data->mutex); 967 return ret; 968 969 default: 970 return -EINVAL; 971 } 972 } 973 974 static int kxcjk1013_write_raw(struct iio_dev *indio_dev, 975 struct iio_chan_spec const *chan, int val, 976 int val2, long mask) 977 { 978 struct kxcjk1013_data *data = iio_priv(indio_dev); 979 int ret; 980 981 switch (mask) { 982 case IIO_CHAN_INFO_SAMP_FREQ: 983 mutex_lock(&data->mutex); 984 ret = kxcjk1013_set_odr(data, val, val2); 985 mutex_unlock(&data->mutex); 986 break; 987 case IIO_CHAN_INFO_SCALE: 988 if (val) 989 return -EINVAL; 990 991 mutex_lock(&data->mutex); 992 ret = kxcjk1013_set_scale(data, val2); 993 mutex_unlock(&data->mutex); 994 break; 995 default: 996 ret = -EINVAL; 997 } 998 999 return ret; 1000 } 1001 1002 static int kxcjk1013_read_event(struct iio_dev *indio_dev, 1003 const struct iio_chan_spec *chan, 1004 enum iio_event_type type, 1005 enum iio_event_direction dir, 1006 enum iio_event_info info, 1007 int *val, int *val2) 1008 { 1009 struct kxcjk1013_data *data = iio_priv(indio_dev); 1010 1011 *val2 = 0; 1012 switch (info) { 1013 case IIO_EV_INFO_VALUE: 1014 *val = data->wake_thres; 1015 break; 1016 case IIO_EV_INFO_PERIOD: 1017 *val = data->wake_dur; 1018 break; 1019 default: 1020 return -EINVAL; 1021 } 1022 1023 return IIO_VAL_INT; 1024 } 1025 1026 static int kxcjk1013_write_event(struct iio_dev *indio_dev, 1027 const struct iio_chan_spec *chan, 1028 enum iio_event_type type, 1029 enum iio_event_direction dir, 1030 enum iio_event_info info, 1031 int val, int val2) 1032 { 1033 struct kxcjk1013_data *data = iio_priv(indio_dev); 1034 1035 if (data->ev_enable_state) 1036 return -EBUSY; 1037 1038 switch (info) { 1039 case IIO_EV_INFO_VALUE: 1040 data->wake_thres = val; 1041 break; 1042 case IIO_EV_INFO_PERIOD: 1043 data->wake_dur = val; 1044 break; 1045 default: 1046 return -EINVAL; 1047 } 1048 1049 return 0; 1050 } 1051 1052 static int kxcjk1013_read_event_config(struct iio_dev *indio_dev, 1053 const struct iio_chan_spec *chan, 1054 enum iio_event_type type, 1055 enum iio_event_direction dir) 1056 { 1057 struct kxcjk1013_data *data = iio_priv(indio_dev); 1058 1059 return data->ev_enable_state; 1060 } 1061 1062 static int kxcjk1013_write_event_config(struct iio_dev *indio_dev, 1063 const struct iio_chan_spec *chan, 1064 enum iio_event_type type, 1065 enum iio_event_direction dir, 1066 int state) 1067 { 1068 struct kxcjk1013_data *data = iio_priv(indio_dev); 1069 int ret; 1070 1071 if (state && data->ev_enable_state) 1072 return 0; 1073 1074 mutex_lock(&data->mutex); 1075 1076 if (!state && data->motion_trigger_on) { 1077 data->ev_enable_state = 0; 1078 mutex_unlock(&data->mutex); 1079 return 0; 1080 } 1081 1082 /* 1083 * We will expect the enable and disable to do operation in 1084 * reverse order. This will happen here anyway as our 1085 * resume operation uses sync mode runtime pm calls, the 1086 * suspend operation will be delayed by autosuspend delay 1087 * So the disable operation will still happen in reverse of 1088 * enable operation. When runtime pm is disabled the mode 1089 * is always on so sequence doesn't matter 1090 */ 1091 ret = kxcjk1013_set_power_state(data, state); 1092 if (ret < 0) { 1093 mutex_unlock(&data->mutex); 1094 return ret; 1095 } 1096 1097 ret = kxcjk1013_setup_any_motion_interrupt(data, state); 1098 if (ret < 0) { 1099 kxcjk1013_set_power_state(data, false); 1100 data->ev_enable_state = 0; 1101 mutex_unlock(&data->mutex); 1102 return ret; 1103 } 1104 1105 data->ev_enable_state = state; 1106 mutex_unlock(&data->mutex); 1107 1108 return 0; 1109 } 1110 1111 static int kxcjk1013_buffer_preenable(struct iio_dev *indio_dev) 1112 { 1113 struct kxcjk1013_data *data = iio_priv(indio_dev); 1114 1115 return kxcjk1013_set_power_state(data, true); 1116 } 1117 1118 static int kxcjk1013_buffer_postdisable(struct iio_dev *indio_dev) 1119 { 1120 struct kxcjk1013_data *data = iio_priv(indio_dev); 1121 1122 return kxcjk1013_set_power_state(data, false); 1123 } 1124 1125 static ssize_t kxcjk1013_get_samp_freq_avail(struct device *dev, 1126 struct device_attribute *attr, 1127 char *buf) 1128 { 1129 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 1130 struct kxcjk1013_data *data = iio_priv(indio_dev); 1131 const char *str; 1132 1133 if (data->chipset == KXTF9) 1134 str = kxtf9_samp_freq_avail; 1135 else 1136 str = kxcjk1013_samp_freq_avail; 1137 1138 return sprintf(buf, "%s\n", str); 1139 } 1140 1141 static IIO_DEVICE_ATTR(in_accel_sampling_frequency_available, S_IRUGO, 1142 kxcjk1013_get_samp_freq_avail, NULL, 0); 1143 1144 static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326"); 1145 1146 static struct attribute *kxcjk1013_attributes[] = { 1147 &iio_dev_attr_in_accel_sampling_frequency_available.dev_attr.attr, 1148 &iio_const_attr_in_accel_scale_available.dev_attr.attr, 1149 NULL, 1150 }; 1151 1152 static const struct attribute_group kxcjk1013_attrs_group = { 1153 .attrs = kxcjk1013_attributes, 1154 }; 1155 1156 static const struct iio_event_spec kxcjk1013_event = { 1157 .type = IIO_EV_TYPE_THRESH, 1158 .dir = IIO_EV_DIR_EITHER, 1159 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 1160 BIT(IIO_EV_INFO_ENABLE) | 1161 BIT(IIO_EV_INFO_PERIOD) 1162 }; 1163 1164 static const struct iio_mount_matrix * 1165 kxcjk1013_get_mount_matrix(const struct iio_dev *indio_dev, 1166 const struct iio_chan_spec *chan) 1167 { 1168 struct kxcjk1013_data *data = iio_priv(indio_dev); 1169 1170 return &data->orientation; 1171 } 1172 1173 static const struct iio_chan_spec_ext_info kxcjk1013_ext_info[] = { 1174 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, kxcjk1013_get_mount_matrix), 1175 { } 1176 }; 1177 1178 #define KXCJK1013_CHANNEL(_axis) { \ 1179 .type = IIO_ACCEL, \ 1180 .modified = 1, \ 1181 .channel2 = IIO_MOD_##_axis, \ 1182 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 1183 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 1184 BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 1185 .scan_index = AXIS_##_axis, \ 1186 .scan_type = { \ 1187 .sign = 's', \ 1188 .realbits = 12, \ 1189 .storagebits = 16, \ 1190 .shift = 4, \ 1191 .endianness = IIO_LE, \ 1192 }, \ 1193 .event_spec = &kxcjk1013_event, \ 1194 .ext_info = kxcjk1013_ext_info, \ 1195 .num_event_specs = 1 \ 1196 } 1197 1198 static const struct iio_chan_spec kxcjk1013_channels[] = { 1199 KXCJK1013_CHANNEL(X), 1200 KXCJK1013_CHANNEL(Y), 1201 KXCJK1013_CHANNEL(Z), 1202 IIO_CHAN_SOFT_TIMESTAMP(3), 1203 }; 1204 1205 static const struct iio_buffer_setup_ops kxcjk1013_buffer_setup_ops = { 1206 .preenable = kxcjk1013_buffer_preenable, 1207 .postdisable = kxcjk1013_buffer_postdisable, 1208 }; 1209 1210 static const struct iio_info kxcjk1013_info = { 1211 .attrs = &kxcjk1013_attrs_group, 1212 .read_raw = kxcjk1013_read_raw, 1213 .write_raw = kxcjk1013_write_raw, 1214 .read_event_value = kxcjk1013_read_event, 1215 .write_event_value = kxcjk1013_write_event, 1216 .write_event_config = kxcjk1013_write_event_config, 1217 .read_event_config = kxcjk1013_read_event_config, 1218 }; 1219 1220 static const unsigned long kxcjk1013_scan_masks[] = {0x7, 0}; 1221 1222 static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p) 1223 { 1224 struct iio_poll_func *pf = p; 1225 struct iio_dev *indio_dev = pf->indio_dev; 1226 struct kxcjk1013_data *data = iio_priv(indio_dev); 1227 int ret; 1228 1229 mutex_lock(&data->mutex); 1230 ret = i2c_smbus_read_i2c_block_data_or_emulated(data->client, 1231 KXCJK1013_REG_XOUT_L, 1232 AXIS_MAX * 2, 1233 (u8 *)data->scan.chans); 1234 mutex_unlock(&data->mutex); 1235 if (ret < 0) 1236 goto err; 1237 1238 iio_push_to_buffers_with_timestamp(indio_dev, &data->scan, 1239 data->timestamp); 1240 err: 1241 iio_trigger_notify_done(indio_dev->trig); 1242 1243 return IRQ_HANDLED; 1244 } 1245 1246 static void kxcjk1013_trig_reen(struct iio_trigger *trig) 1247 { 1248 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 1249 struct kxcjk1013_data *data = iio_priv(indio_dev); 1250 int ret; 1251 1252 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_rel); 1253 if (ret < 0) 1254 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 1255 } 1256 1257 static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig, 1258 bool state) 1259 { 1260 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 1261 struct kxcjk1013_data *data = iio_priv(indio_dev); 1262 int ret; 1263 1264 mutex_lock(&data->mutex); 1265 1266 if (!state && data->ev_enable_state && data->motion_trigger_on) { 1267 data->motion_trigger_on = false; 1268 mutex_unlock(&data->mutex); 1269 return 0; 1270 } 1271 1272 ret = kxcjk1013_set_power_state(data, state); 1273 if (ret < 0) { 1274 mutex_unlock(&data->mutex); 1275 return ret; 1276 } 1277 if (data->motion_trig == trig) 1278 ret = kxcjk1013_setup_any_motion_interrupt(data, state); 1279 else 1280 ret = kxcjk1013_setup_new_data_interrupt(data, state); 1281 if (ret < 0) { 1282 kxcjk1013_set_power_state(data, false); 1283 mutex_unlock(&data->mutex); 1284 return ret; 1285 } 1286 if (data->motion_trig == trig) 1287 data->motion_trigger_on = state; 1288 else 1289 data->dready_trigger_on = state; 1290 1291 mutex_unlock(&data->mutex); 1292 1293 return 0; 1294 } 1295 1296 static const struct iio_trigger_ops kxcjk1013_trigger_ops = { 1297 .set_trigger_state = kxcjk1013_data_rdy_trigger_set_state, 1298 .reenable = kxcjk1013_trig_reen, 1299 }; 1300 1301 static void kxcjk1013_report_motion_event(struct iio_dev *indio_dev) 1302 { 1303 struct kxcjk1013_data *data = iio_priv(indio_dev); 1304 1305 int ret = i2c_smbus_read_byte_data(data->client, data->regs->int_src2); 1306 if (ret < 0) { 1307 dev_err(&data->client->dev, "Error reading reg_int_src2\n"); 1308 return; 1309 } 1310 1311 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN) 1312 iio_push_event(indio_dev, 1313 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1314 0, 1315 IIO_MOD_X, 1316 IIO_EV_TYPE_THRESH, 1317 IIO_EV_DIR_FALLING), 1318 data->timestamp); 1319 1320 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP) 1321 iio_push_event(indio_dev, 1322 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1323 0, 1324 IIO_MOD_X, 1325 IIO_EV_TYPE_THRESH, 1326 IIO_EV_DIR_RISING), 1327 data->timestamp); 1328 1329 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN) 1330 iio_push_event(indio_dev, 1331 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1332 0, 1333 IIO_MOD_Y, 1334 IIO_EV_TYPE_THRESH, 1335 IIO_EV_DIR_FALLING), 1336 data->timestamp); 1337 1338 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP) 1339 iio_push_event(indio_dev, 1340 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1341 0, 1342 IIO_MOD_Y, 1343 IIO_EV_TYPE_THRESH, 1344 IIO_EV_DIR_RISING), 1345 data->timestamp); 1346 1347 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN) 1348 iio_push_event(indio_dev, 1349 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1350 0, 1351 IIO_MOD_Z, 1352 IIO_EV_TYPE_THRESH, 1353 IIO_EV_DIR_FALLING), 1354 data->timestamp); 1355 1356 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP) 1357 iio_push_event(indio_dev, 1358 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1359 0, 1360 IIO_MOD_Z, 1361 IIO_EV_TYPE_THRESH, 1362 IIO_EV_DIR_RISING), 1363 data->timestamp); 1364 } 1365 1366 static irqreturn_t kxcjk1013_event_handler(int irq, void *private) 1367 { 1368 struct iio_dev *indio_dev = private; 1369 struct kxcjk1013_data *data = iio_priv(indio_dev); 1370 int ret; 1371 1372 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_src1); 1373 if (ret < 0) { 1374 dev_err(&data->client->dev, "Error reading reg_int_src1\n"); 1375 goto ack_intr; 1376 } 1377 1378 if (ret & KXCJK1013_REG_INT_SRC1_BIT_WUFS) { 1379 if (data->chipset == KXTF9) 1380 iio_push_event(indio_dev, 1381 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1382 0, 1383 IIO_MOD_X_AND_Y_AND_Z, 1384 IIO_EV_TYPE_THRESH, 1385 IIO_EV_DIR_RISING), 1386 data->timestamp); 1387 else 1388 kxcjk1013_report_motion_event(indio_dev); 1389 } 1390 1391 ack_intr: 1392 if (data->dready_trigger_on) 1393 return IRQ_HANDLED; 1394 1395 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_rel); 1396 if (ret < 0) 1397 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 1398 1399 return IRQ_HANDLED; 1400 } 1401 1402 static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private) 1403 { 1404 struct iio_dev *indio_dev = private; 1405 struct kxcjk1013_data *data = iio_priv(indio_dev); 1406 1407 data->timestamp = iio_get_time_ns(indio_dev); 1408 1409 if (data->dready_trigger_on) 1410 iio_trigger_poll(data->dready_trig); 1411 else if (data->motion_trigger_on) 1412 iio_trigger_poll(data->motion_trig); 1413 1414 if (data->ev_enable_state) 1415 return IRQ_WAKE_THREAD; 1416 else 1417 return IRQ_HANDLED; 1418 } 1419 1420 static const char *kxcjk1013_match_acpi_device(struct device *dev, 1421 enum kx_chipset *chipset, 1422 enum kx_acpi_type *acpi_type, 1423 const char **label) 1424 { 1425 const struct acpi_device_id *id; 1426 1427 id = acpi_match_device(dev->driver->acpi_match_table, dev); 1428 if (!id) 1429 return NULL; 1430 1431 if (strcmp(id->id, "SMO8500") == 0) { 1432 *acpi_type = ACPI_SMO8500; 1433 } else if (strcmp(id->id, "KIOX010A") == 0) { 1434 *acpi_type = ACPI_KIOX010A; 1435 *label = "accel-display"; 1436 } else if (strcmp(id->id, "KIOX020A") == 0) { 1437 *label = "accel-base"; 1438 } 1439 1440 *chipset = (enum kx_chipset)id->driver_data; 1441 1442 return dev_name(dev); 1443 } 1444 1445 static int kxcjk1013_probe(struct i2c_client *client) 1446 { 1447 const struct i2c_device_id *id = i2c_client_get_device_id(client); 1448 static const char * const regulator_names[] = { "vdd", "vddio" }; 1449 struct kxcjk1013_data *data; 1450 struct iio_dev *indio_dev; 1451 struct kxcjk_1013_platform_data *pdata; 1452 const char *name; 1453 int ret; 1454 1455 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 1456 if (!indio_dev) 1457 return -ENOMEM; 1458 1459 data = iio_priv(indio_dev); 1460 i2c_set_clientdata(client, indio_dev); 1461 data->client = client; 1462 1463 pdata = dev_get_platdata(&client->dev); 1464 if (pdata) { 1465 data->active_high_intr = pdata->active_high_intr; 1466 data->orientation = pdata->orientation; 1467 } else { 1468 data->active_high_intr = true; /* default polarity */ 1469 1470 if (!iio_read_acpi_mount_matrix(&client->dev, &data->orientation, "ROTM")) { 1471 ret = iio_read_mount_matrix(&client->dev, &data->orientation); 1472 if (ret) 1473 return ret; 1474 } 1475 1476 } 1477 1478 ret = devm_regulator_bulk_get_enable(&client->dev, 1479 ARRAY_SIZE(regulator_names), 1480 regulator_names); 1481 if (ret) 1482 return dev_err_probe(&client->dev, ret, "Failed to get regulators\n"); 1483 1484 /* 1485 * A typical delay of 10ms is required for powering up 1486 * according to the data sheets of supported chips. 1487 * Hence double that to play safe. 1488 */ 1489 msleep(20); 1490 1491 if (id) { 1492 data->chipset = (enum kx_chipset)(id->driver_data); 1493 name = id->name; 1494 } else if (ACPI_HANDLE(&client->dev)) { 1495 name = kxcjk1013_match_acpi_device(&client->dev, 1496 &data->chipset, 1497 &data->acpi_type, 1498 &indio_dev->label); 1499 } else 1500 return -ENODEV; 1501 1502 switch (data->chipset) { 1503 case KXCJK1013: 1504 case KXCJ91008: 1505 case KXTJ21009: 1506 data->regs = &kxcjk1013_regs; 1507 break; 1508 case KXTF9: 1509 data->regs = &kxtf9_regs; 1510 break; 1511 case KX0221020: 1512 case KX0231025: 1513 data->regs = &kx0231025_regs; 1514 break; 1515 default: 1516 return -EINVAL; 1517 } 1518 1519 ret = kxcjk1013_chip_init(data); 1520 if (ret < 0) 1521 return ret; 1522 1523 mutex_init(&data->mutex); 1524 1525 indio_dev->channels = kxcjk1013_channels; 1526 indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels); 1527 indio_dev->available_scan_masks = kxcjk1013_scan_masks; 1528 indio_dev->name = name; 1529 indio_dev->modes = INDIO_DIRECT_MODE; 1530 indio_dev->info = &kxcjk1013_info; 1531 1532 if (client->irq > 0 && data->acpi_type != ACPI_SMO8500) { 1533 ret = devm_request_threaded_irq(&client->dev, client->irq, 1534 kxcjk1013_data_rdy_trig_poll, 1535 kxcjk1013_event_handler, 1536 IRQF_TRIGGER_RISING, 1537 KXCJK1013_IRQ_NAME, 1538 indio_dev); 1539 if (ret) 1540 goto err_poweroff; 1541 1542 data->dready_trig = devm_iio_trigger_alloc(&client->dev, 1543 "%s-dev%d", 1544 indio_dev->name, 1545 iio_device_id(indio_dev)); 1546 if (!data->dready_trig) { 1547 ret = -ENOMEM; 1548 goto err_poweroff; 1549 } 1550 1551 data->motion_trig = devm_iio_trigger_alloc(&client->dev, 1552 "%s-any-motion-dev%d", 1553 indio_dev->name, 1554 iio_device_id(indio_dev)); 1555 if (!data->motion_trig) { 1556 ret = -ENOMEM; 1557 goto err_poweroff; 1558 } 1559 1560 data->dready_trig->ops = &kxcjk1013_trigger_ops; 1561 iio_trigger_set_drvdata(data->dready_trig, indio_dev); 1562 ret = iio_trigger_register(data->dready_trig); 1563 if (ret) 1564 goto err_poweroff; 1565 1566 indio_dev->trig = iio_trigger_get(data->dready_trig); 1567 1568 data->motion_trig->ops = &kxcjk1013_trigger_ops; 1569 iio_trigger_set_drvdata(data->motion_trig, indio_dev); 1570 ret = iio_trigger_register(data->motion_trig); 1571 if (ret) { 1572 data->motion_trig = NULL; 1573 goto err_trigger_unregister; 1574 } 1575 } 1576 1577 ret = iio_triggered_buffer_setup(indio_dev, 1578 &iio_pollfunc_store_time, 1579 kxcjk1013_trigger_handler, 1580 &kxcjk1013_buffer_setup_ops); 1581 if (ret < 0) { 1582 dev_err(&client->dev, "iio triggered buffer setup failed\n"); 1583 goto err_trigger_unregister; 1584 } 1585 1586 ret = pm_runtime_set_active(&client->dev); 1587 if (ret) 1588 goto err_buffer_cleanup; 1589 1590 pm_runtime_enable(&client->dev); 1591 pm_runtime_set_autosuspend_delay(&client->dev, 1592 KXCJK1013_SLEEP_DELAY_MS); 1593 pm_runtime_use_autosuspend(&client->dev); 1594 1595 ret = iio_device_register(indio_dev); 1596 if (ret < 0) { 1597 dev_err(&client->dev, "unable to register iio device\n"); 1598 goto err_pm_cleanup; 1599 } 1600 1601 return 0; 1602 1603 err_pm_cleanup: 1604 pm_runtime_dont_use_autosuspend(&client->dev); 1605 pm_runtime_disable(&client->dev); 1606 err_buffer_cleanup: 1607 iio_triggered_buffer_cleanup(indio_dev); 1608 err_trigger_unregister: 1609 if (data->dready_trig) 1610 iio_trigger_unregister(data->dready_trig); 1611 if (data->motion_trig) 1612 iio_trigger_unregister(data->motion_trig); 1613 err_poweroff: 1614 kxcjk1013_set_mode(data, STANDBY); 1615 1616 return ret; 1617 } 1618 1619 static void kxcjk1013_remove(struct i2c_client *client) 1620 { 1621 struct iio_dev *indio_dev = i2c_get_clientdata(client); 1622 struct kxcjk1013_data *data = iio_priv(indio_dev); 1623 1624 iio_device_unregister(indio_dev); 1625 1626 pm_runtime_disable(&client->dev); 1627 pm_runtime_set_suspended(&client->dev); 1628 1629 iio_triggered_buffer_cleanup(indio_dev); 1630 if (data->dready_trig) { 1631 iio_trigger_unregister(data->dready_trig); 1632 iio_trigger_unregister(data->motion_trig); 1633 } 1634 1635 mutex_lock(&data->mutex); 1636 kxcjk1013_set_mode(data, STANDBY); 1637 mutex_unlock(&data->mutex); 1638 } 1639 1640 #ifdef CONFIG_PM_SLEEP 1641 static int kxcjk1013_suspend(struct device *dev) 1642 { 1643 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1644 struct kxcjk1013_data *data = iio_priv(indio_dev); 1645 int ret; 1646 1647 mutex_lock(&data->mutex); 1648 ret = kxcjk1013_set_mode(data, STANDBY); 1649 mutex_unlock(&data->mutex); 1650 1651 return ret; 1652 } 1653 1654 static int kxcjk1013_resume(struct device *dev) 1655 { 1656 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1657 struct kxcjk1013_data *data = iio_priv(indio_dev); 1658 int ret = 0; 1659 1660 mutex_lock(&data->mutex); 1661 ret = kxcjk1013_set_mode(data, OPERATION); 1662 if (ret == 0) 1663 ret = kxcjk1013_set_range(data, data->range); 1664 mutex_unlock(&data->mutex); 1665 1666 return ret; 1667 } 1668 #endif 1669 1670 #ifdef CONFIG_PM 1671 static int kxcjk1013_runtime_suspend(struct device *dev) 1672 { 1673 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1674 struct kxcjk1013_data *data = iio_priv(indio_dev); 1675 int ret; 1676 1677 ret = kxcjk1013_set_mode(data, STANDBY); 1678 if (ret < 0) { 1679 dev_err(&data->client->dev, "powering off device failed\n"); 1680 return -EAGAIN; 1681 } 1682 return 0; 1683 } 1684 1685 static int kxcjk1013_runtime_resume(struct device *dev) 1686 { 1687 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1688 struct kxcjk1013_data *data = iio_priv(indio_dev); 1689 int ret; 1690 int sleep_val; 1691 1692 ret = kxcjk1013_set_mode(data, OPERATION); 1693 if (ret < 0) 1694 return ret; 1695 1696 sleep_val = kxcjk1013_get_startup_times(data); 1697 if (sleep_val < 20000) 1698 usleep_range(sleep_val, 20000); 1699 else 1700 msleep_interruptible(sleep_val/1000); 1701 1702 return 0; 1703 } 1704 #endif 1705 1706 static const struct dev_pm_ops kxcjk1013_pm_ops = { 1707 SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume) 1708 SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend, 1709 kxcjk1013_runtime_resume, NULL) 1710 }; 1711 1712 static const struct i2c_device_id kxcjk1013_id[] = { 1713 {"kxcjk1013", KXCJK1013}, 1714 {"kxcj91008", KXCJ91008}, 1715 {"kxtj21009", KXTJ21009}, 1716 {"kxtf9", KXTF9}, 1717 {"kx022-1020", KX0221020}, 1718 {"kx023-1025", KX0231025}, 1719 {"SMO8500", KXCJ91008}, 1720 {} 1721 }; 1722 1723 MODULE_DEVICE_TABLE(i2c, kxcjk1013_id); 1724 1725 static const struct of_device_id kxcjk1013_of_match[] = { 1726 { .compatible = "kionix,kxcjk1013", }, 1727 { .compatible = "kionix,kxcj91008", }, 1728 { .compatible = "kionix,kxtj21009", }, 1729 { .compatible = "kionix,kxtf9", }, 1730 { .compatible = "kionix,kx022-1020", }, 1731 { .compatible = "kionix,kx023-1025", }, 1732 { } 1733 }; 1734 MODULE_DEVICE_TABLE(of, kxcjk1013_of_match); 1735 1736 static struct i2c_driver kxcjk1013_driver = { 1737 .driver = { 1738 .name = KXCJK1013_DRV_NAME, 1739 .acpi_match_table = ACPI_PTR(kx_acpi_match), 1740 .of_match_table = kxcjk1013_of_match, 1741 .pm = &kxcjk1013_pm_ops, 1742 }, 1743 .probe = kxcjk1013_probe, 1744 .remove = kxcjk1013_remove, 1745 .id_table = kxcjk1013_id, 1746 }; 1747 module_i2c_driver(kxcjk1013_driver); 1748 1749 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>"); 1750 MODULE_LICENSE("GPL v2"); 1751 MODULE_DESCRIPTION("KXCJK1013 accelerometer driver"); 1752