1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * KXCJK-1013 3-axis accelerometer driver 4 * Copyright (c) 2014, Intel Corporation. 5 */ 6 7 #include <linux/i2c.h> 8 #include <linux/interrupt.h> 9 #include <linux/delay.h> 10 #include <linux/bitops.h> 11 #include <linux/mod_devicetable.h> 12 #include <linux/module.h> 13 #include <linux/slab.h> 14 #include <linux/string.h> 15 #include <linux/types.h> 16 #include <linux/acpi.h> 17 #include <linux/pm.h> 18 #include <linux/pm_runtime.h> 19 #include <linux/regulator/consumer.h> 20 #include <linux/iio/iio.h> 21 #include <linux/iio/sysfs.h> 22 #include <linux/iio/buffer.h> 23 #include <linux/iio/trigger.h> 24 #include <linux/iio/events.h> 25 #include <linux/iio/trigger_consumer.h> 26 #include <linux/iio/triggered_buffer.h> 27 #include <linux/iio/accel/kxcjk_1013.h> 28 29 #define KXTF9_REG_HP_XOUT_L 0x00 30 #define KXTF9_REG_HP_XOUT_H 0x01 31 #define KXTF9_REG_HP_YOUT_L 0x02 32 #define KXTF9_REG_HP_YOUT_H 0x03 33 #define KXTF9_REG_HP_ZOUT_L 0x04 34 #define KXTF9_REG_HP_ZOUT_H 0x05 35 36 #define KXCJK1013_REG_XOUT_L 0x06 37 /* 38 * From low byte X axis register, all the other addresses of Y and Z can be 39 * obtained by just applying axis offset. The following axis defines are just 40 * provide clarity, but not used. 41 */ 42 #define KXCJK1013_REG_XOUT_H 0x07 43 #define KXCJK1013_REG_YOUT_L 0x08 44 #define KXCJK1013_REG_YOUT_H 0x09 45 #define KXCJK1013_REG_ZOUT_L 0x0A 46 #define KXCJK1013_REG_ZOUT_H 0x0B 47 48 #define KXCJK1013_REG_DCST_RESP 0x0C 49 #define KXCJK1013_REG_WHO_AM_I 0x0F 50 #define KXTF9_REG_TILT_POS_CUR 0x10 51 #define KXTF9_REG_TILT_POS_PREV 0x11 52 #define KXTF9_REG_INT_SRC1 0x15 53 #define KXTF9_REG_INT_SRC2 0x16 54 #define KXCJK1013_REG_INT_SRC1 0x16 55 #define KXCJK1013_REG_INT_SRC2 0x17 56 #define KXCJK1013_REG_STATUS_REG 0x18 57 #define KXCJK1013_REG_INT_REL 0x1A 58 #define KXCJK1013_REG_CTRL1 0x1B 59 #define KXTF9_REG_CTRL2 0x1C 60 #define KXTF9_REG_CTRL3 0x1D 61 #define KXCJK1013_REG_CTRL2 0x1D 62 #define KXCJK1013_REG_INT_CTRL1 0x1E 63 #define KXCJK1013_REG_INT_CTRL2 0x1F 64 #define KXTF9_REG_INT_CTRL3 0x20 65 #define KXCJK1013_REG_DATA_CTRL 0x21 66 #define KXTF9_REG_TILT_TIMER 0x28 67 #define KXCJK1013_REG_WAKE_TIMER 0x29 68 #define KXTF9_REG_TDT_TIMER 0x2B 69 #define KXTF9_REG_TDT_THRESH_H 0x2C 70 #define KXTF9_REG_TDT_THRESH_L 0x2D 71 #define KXTF9_REG_TDT_TAP_TIMER 0x2E 72 #define KXTF9_REG_TDT_TOTAL_TIMER 0x2F 73 #define KXTF9_REG_TDT_LATENCY_TIMER 0x30 74 #define KXTF9_REG_TDT_WINDOW_TIMER 0x31 75 #define KXCJK1013_REG_SELF_TEST 0x3A 76 #define KXTF9_REG_WAKE_THRESH 0x5A 77 #define KXTF9_REG_TILT_ANGLE 0x5C 78 #define KXTF9_REG_HYST_SET 0x5F 79 #define KXCJK1013_REG_WAKE_THRES 0x6A 80 81 /* Everything up to 0x11 is equal to KXCJK1013/KXTF9 above */ 82 #define KX023_REG_INS1 0x12 83 #define KX023_REG_INS2 0x13 84 #define KX023_REG_INS3 0x14 85 #define KX023_REG_STAT 0x15 86 #define KX023_REG_INT_REL 0x17 87 #define KX023_REG_CNTL1 0x18 88 #define KX023_REG_CNTL2 0x19 89 #define KX023_REG_CNTL3 0x1A 90 #define KX023_REG_ODCNTL 0x1B 91 #define KX023_REG_INC1 0x1C 92 #define KX023_REG_INC2 0x1D 93 #define KX023_REG_INC3 0x1E 94 #define KX023_REG_INC4 0x1F 95 #define KX023_REG_INC5 0x20 96 #define KX023_REG_INC6 0x21 97 #define KX023_REG_TILT_TIMER 0x22 98 #define KX023_REG_WUFC 0x23 99 #define KX023_REG_TDTRC 0x24 100 #define KX023_REG_TDTC 0x25 101 #define KX023_REG_TTH 0x26 102 #define KX023_REG_TTL 0x27 103 #define KX023_REG_FTD 0x28 104 #define KX023_REG_STD 0x29 105 #define KX023_REG_TLT 0x2A 106 #define KX023_REG_TWS 0x2B 107 #define KX023_REG_ATH 0x30 108 #define KX023_REG_TILT_ANGLE_LL 0x32 109 #define KX023_REG_TILT_ANGLE_HL 0x33 110 #define KX023_REG_HYST_SET 0x34 111 #define KX023_REG_LP_CNTL 0x35 112 #define KX023_REG_BUF_CNTL1 0x3A 113 #define KX023_REG_BUF_CNTL2 0x3B 114 #define KX023_REG_BUF_STATUS_1 0x3C 115 #define KX023_REG_BUF_STATUS_2 0x3D 116 #define KX023_REG_BUF_CLEAR 0x3E 117 #define KX023_REG_BUF_READ 0x3F 118 #define KX023_REG_SELF_TEST 0x60 119 120 #define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7) 121 #define KXCJK1013_REG_CTRL1_BIT_RES BIT(6) 122 #define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5) 123 #define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4) 124 #define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3) 125 #define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1) 126 127 #define KXCJK1013_REG_INT_CTRL1_BIT_IEU BIT(2) /* KXTF9 */ 128 #define KXCJK1013_REG_INT_CTRL1_BIT_IEL BIT(3) 129 #define KXCJK1013_REG_INT_CTRL1_BIT_IEA BIT(4) 130 #define KXCJK1013_REG_INT_CTRL1_BIT_IEN BIT(5) 131 132 #define KXTF9_REG_TILT_BIT_LEFT_EDGE BIT(5) 133 #define KXTF9_REG_TILT_BIT_RIGHT_EDGE BIT(4) 134 #define KXTF9_REG_TILT_BIT_LOWER_EDGE BIT(3) 135 #define KXTF9_REG_TILT_BIT_UPPER_EDGE BIT(2) 136 #define KXTF9_REG_TILT_BIT_FACE_DOWN BIT(1) 137 #define KXTF9_REG_TILT_BIT_FACE_UP BIT(0) 138 139 #define KXCJK1013_DATA_MASK_12_BIT 0x0FFF 140 #define KXCJK1013_MAX_STARTUP_TIME_US 100000 141 142 #define KXCJK1013_SLEEP_DELAY_MS 2000 143 144 #define KXCJK1013_REG_INT_SRC1_BIT_TPS BIT(0) /* KXTF9 */ 145 #define KXCJK1013_REG_INT_SRC1_BIT_WUFS BIT(1) 146 #define KXCJK1013_REG_INT_SRC1_MASK_TDTS (BIT(2) | BIT(3)) /* KXTF9 */ 147 #define KXCJK1013_REG_INT_SRC1_TAP_NONE 0 148 #define KXCJK1013_REG_INT_SRC1_TAP_SINGLE BIT(2) 149 #define KXCJK1013_REG_INT_SRC1_TAP_DOUBLE BIT(3) 150 #define KXCJK1013_REG_INT_SRC1_BIT_DRDY BIT(4) 151 152 /* KXCJK: INT_SOURCE2: motion detect, KXTF9: INT_SRC_REG1: tap detect */ 153 #define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0) 154 #define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1) 155 #define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2) 156 #define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3) 157 #define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4) 158 #define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5) 159 160 /* KX023 interrupt routing to INT1. INT2 can be configured with INC6 */ 161 #define KX023_REG_INC4_BFI1 BIT(6) 162 #define KX023_REG_INC4_WMI1 BIT(5) 163 #define KX023_REG_INC4_DRDY1 BIT(4) 164 #define KX023_REG_INC4_TDTI1 BIT(2) 165 #define KX023_REG_INC4_WUFI1 BIT(1) 166 #define KX023_REG_INC4_TPI1 BIT(0) 167 168 #define KXCJK1013_DEFAULT_WAKE_THRES 1 169 170 /* Refer to section 4 of the specification */ 171 struct kx_odr_start_up_time { 172 int odr_bits; 173 int usec; 174 }; 175 176 /* KXCJK-1013 */ 177 static const struct kx_odr_start_up_time kxcjk1013_odr_start_up_times[] = { 178 { 0x08, 100000 }, 179 { 0x09, 100000 }, 180 { 0x0A, 100000 }, 181 { 0x0B, 100000 }, 182 { 0x00, 80000 }, 183 { 0x01, 41000 }, 184 { 0x02, 21000 }, 185 { 0x03, 11000 }, 186 { 0x04, 6400 }, 187 { 0x05, 3900 }, 188 { 0x06, 2700 }, 189 { 0x07, 2100 }, 190 { } 191 }; 192 193 /* KXCTJ2-1009 */ 194 static const struct kx_odr_start_up_time kxtj21009_odr_start_up_times[] = { 195 { 0x08, 1240000 }, 196 { 0x09, 621000 }, 197 { 0x0A, 309000 }, 198 { 0x0B, 151000 }, 199 { 0x00, 80000 }, 200 { 0x01, 41000 }, 201 { 0x02, 21000 }, 202 { 0x03, 11000 }, 203 { 0x04, 6000 }, 204 { 0x05, 4000 }, 205 { 0x06, 3000 }, 206 { 0x07, 2000 }, 207 { } 208 }; 209 210 /* KXTF9 */ 211 static const struct kx_odr_start_up_time kxtf9_odr_start_up_times[] = { 212 { 0x01, 81000 }, 213 { 0x02, 41000 }, 214 { 0x03, 21000 }, 215 { 0x04, 11000 }, 216 { 0x05, 5100 }, 217 { 0x06, 2700 }, 218 { } 219 }; 220 221 /* KX023-1025 */ 222 static const struct kx_odr_start_up_time kx0231025_odr_start_up_times[] = { 223 /* First 4 are not in datasheet, taken from KXCTJ2-1009 */ 224 { 0x08, 1240000 }, 225 { 0x09, 621000 }, 226 { 0x0A, 309000 }, 227 { 0x0B, 151000 }, 228 { 0x00, 81000 }, 229 { 0x01, 40000 }, 230 { 0x02, 22000 }, 231 { 0x03, 12000 }, 232 { 0x04, 7000 }, 233 { 0x05, 4400 }, 234 { 0x06, 3000 }, 235 { 0x07, 3000 }, 236 { } 237 }; 238 239 enum kx_acpi_type { 240 ACPI_GENERIC, 241 ACPI_SMO8500, 242 ACPI_KIOX010A, 243 }; 244 245 struct kx_chipset_regs { 246 u8 int_src1; 247 u8 int_src2; 248 u8 int_rel; 249 u8 ctrl1; 250 u8 wuf_ctrl; 251 u8 int_ctrl1; 252 u8 data_ctrl; 253 u8 wake_timer; 254 u8 wake_thres; 255 }; 256 257 static const struct kx_chipset_regs kxcjk1013_regs = { 258 .int_src1 = KXCJK1013_REG_INT_SRC1, 259 .int_src2 = KXCJK1013_REG_INT_SRC2, 260 .int_rel = KXCJK1013_REG_INT_REL, 261 .ctrl1 = KXCJK1013_REG_CTRL1, 262 .wuf_ctrl = KXCJK1013_REG_CTRL2, 263 .int_ctrl1 = KXCJK1013_REG_INT_CTRL1, 264 .data_ctrl = KXCJK1013_REG_DATA_CTRL, 265 .wake_timer = KXCJK1013_REG_WAKE_TIMER, 266 .wake_thres = KXCJK1013_REG_WAKE_THRES, 267 }; 268 269 static const struct kx_chipset_regs kxtf9_regs = { 270 /* .int_src1 was moved to INT_SRC2 on KXTF9 */ 271 .int_src1 = KXTF9_REG_INT_SRC2, 272 /* .int_src2 is not available */ 273 .int_rel = KXCJK1013_REG_INT_REL, 274 .ctrl1 = KXCJK1013_REG_CTRL1, 275 .wuf_ctrl = KXTF9_REG_CTRL3, 276 .int_ctrl1 = KXCJK1013_REG_INT_CTRL1, 277 .data_ctrl = KXCJK1013_REG_DATA_CTRL, 278 .wake_timer = KXCJK1013_REG_WAKE_TIMER, 279 .wake_thres = KXTF9_REG_WAKE_THRESH, 280 }; 281 282 /* The registers have totally different names but the bits are compatible */ 283 static const struct kx_chipset_regs kx0231025_regs = { 284 .int_src1 = KX023_REG_INS2, 285 .int_src2 = KX023_REG_INS3, 286 .int_rel = KX023_REG_INT_REL, 287 .ctrl1 = KX023_REG_CNTL1, 288 .wuf_ctrl = KX023_REG_CNTL3, 289 .int_ctrl1 = KX023_REG_INC1, 290 .data_ctrl = KX023_REG_ODCNTL, 291 .wake_timer = KX023_REG_WUFC, 292 .wake_thres = KX023_REG_ATH, 293 }; 294 295 struct kx_chipset_info { 296 const struct kx_chipset_regs *regs; 297 const struct kx_odr_start_up_time *times; 298 enum kx_acpi_type acpi_type; 299 }; 300 301 static const struct kx_chipset_info kxcjk1013_info = { 302 .regs = &kxcjk1013_regs, 303 .times = pm_ptr(kxcjk1013_odr_start_up_times), 304 }; 305 306 static const struct kx_chipset_info kxcj91008_info = { 307 .regs = &kxcjk1013_regs, 308 .times = pm_ptr(kxcjk1013_odr_start_up_times), 309 }; 310 311 static const struct kx_chipset_info kxcj91008_kiox010a_info = { 312 .regs = &kxcjk1013_regs, 313 .times = pm_ptr(kxcjk1013_odr_start_up_times), 314 .acpi_type = ACPI_KIOX010A, 315 }; 316 317 static const struct kx_chipset_info kxcj91008_kiox020a_info = { 318 .regs = &kxcjk1013_regs, 319 .times = pm_ptr(kxcjk1013_odr_start_up_times), 320 .acpi_type = ACPI_GENERIC, 321 }; 322 323 static const struct kx_chipset_info kxcj91008_smo8500_info = { 324 .regs = &kxcjk1013_regs, 325 .times = pm_ptr(kxcjk1013_odr_start_up_times), 326 .acpi_type = ACPI_SMO8500, 327 }; 328 329 static const struct kx_chipset_info kxtj21009_info = { 330 .regs = &kxcjk1013_regs, 331 .times = pm_ptr(kxtj21009_odr_start_up_times), 332 }; 333 334 static const struct kx_chipset_info kxtf9_info = { 335 .regs = &kxtf9_regs, 336 .times = pm_ptr(kxtf9_odr_start_up_times), 337 }; 338 339 static const struct kx_chipset_info kx0231025_info = { 340 .regs = &kx0231025_regs, 341 .times = pm_ptr(kx0231025_odr_start_up_times), 342 }; 343 344 enum kxcjk1013_axis { 345 AXIS_X, 346 AXIS_Y, 347 AXIS_Z, 348 AXIS_MAX 349 }; 350 351 struct kxcjk1013_data { 352 struct i2c_client *client; 353 struct iio_trigger *dready_trig; 354 struct iio_trigger *motion_trig; 355 struct iio_mount_matrix orientation; 356 struct mutex mutex; 357 /* Ensure timestamp naturally aligned */ 358 struct { 359 s16 chans[AXIS_MAX]; 360 aligned_s64 timestamp; 361 } scan; 362 u8 odr_bits; 363 u8 range; 364 int wake_thres; 365 int wake_dur; 366 bool active_high_intr; 367 bool dready_trigger_on; 368 int ev_enable_state; 369 bool motion_trigger_on; 370 int64_t timestamp; 371 const struct kx_chipset_info *info; 372 }; 373 374 enum kxcjk1013_mode { 375 STANDBY, 376 OPERATION, 377 }; 378 379 enum kxcjk1013_range { 380 KXCJK1013_RANGE_2G, 381 KXCJK1013_RANGE_4G, 382 KXCJK1013_RANGE_8G, 383 }; 384 385 struct kx_odr_map { 386 int val; 387 int val2; 388 int odr_bits; 389 int wuf_bits; 390 }; 391 392 static const struct kx_odr_map samp_freq_table[] = { 393 { 0, 781000, 0x08, 0x00 }, 394 { 1, 563000, 0x09, 0x01 }, 395 { 3, 125000, 0x0A, 0x02 }, 396 { 6, 250000, 0x0B, 0x03 }, 397 { 12, 500000, 0x00, 0x04 }, 398 { 25, 0, 0x01, 0x05 }, 399 { 50, 0, 0x02, 0x06 }, 400 { 100, 0, 0x03, 0x06 }, 401 { 200, 0, 0x04, 0x06 }, 402 { 400, 0, 0x05, 0x06 }, 403 { 800, 0, 0x06, 0x06 }, 404 { 1600, 0, 0x07, 0x06 }, 405 }; 406 407 static const char *const kxcjk1013_samp_freq_avail = 408 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600"; 409 410 static const struct kx_odr_map kxtf9_samp_freq_table[] = { 411 { 25, 0, 0x01, 0x00 }, 412 { 50, 0, 0x02, 0x01 }, 413 { 100, 0, 0x03, 0x01 }, 414 { 200, 0, 0x04, 0x01 }, 415 { 400, 0, 0x05, 0x01 }, 416 { 800, 0, 0x06, 0x01 }, 417 }; 418 419 static const char *const kxtf9_samp_freq_avail = 420 "25 50 100 200 400 800"; 421 422 static const struct { 423 u16 scale; 424 u8 gsel_0; 425 u8 gsel_1; 426 } KXCJK1013_scale_table[] = { {9582, 0, 0}, 427 {19163, 1, 0}, 428 {38326, 0, 1} }; 429 430 #ifdef CONFIG_ACPI 431 enum kiox010a_fn_index { 432 KIOX010A_SET_LAPTOP_MODE = 1, 433 KIOX010A_SET_TABLET_MODE = 2, 434 }; 435 436 static int kiox010a_dsm(struct device *dev, int fn_index) 437 { 438 acpi_handle handle = ACPI_HANDLE(dev); 439 guid_t kiox010a_dsm_guid; 440 union acpi_object *obj; 441 442 if (!handle) 443 return -ENODEV; 444 445 guid_parse("1f339696-d475-4e26-8cad-2e9f8e6d7a91", &kiox010a_dsm_guid); 446 447 obj = acpi_evaluate_dsm(handle, &kiox010a_dsm_guid, 1, fn_index, NULL); 448 if (!obj) 449 return -EIO; 450 451 ACPI_FREE(obj); 452 return 0; 453 } 454 455 #endif 456 457 static int kxcjk1013_set_mode(struct kxcjk1013_data *data, 458 enum kxcjk1013_mode mode) 459 { 460 const struct kx_chipset_regs *regs = data->info->regs; 461 int ret; 462 463 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); 464 if (ret < 0) { 465 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 466 return ret; 467 } 468 469 if (mode == STANDBY) 470 ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1; 471 else 472 ret |= KXCJK1013_REG_CTRL1_BIT_PC1; 473 474 ret = i2c_smbus_write_byte_data(data->client, regs->ctrl1, ret); 475 if (ret < 0) { 476 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 477 return ret; 478 } 479 480 return 0; 481 } 482 483 static int kxcjk1013_get_mode(struct kxcjk1013_data *data, 484 enum kxcjk1013_mode *mode) 485 { 486 const struct kx_chipset_regs *regs = data->info->regs; 487 int ret; 488 489 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); 490 if (ret < 0) { 491 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 492 return ret; 493 } 494 495 if (ret & KXCJK1013_REG_CTRL1_BIT_PC1) 496 *mode = OPERATION; 497 else 498 *mode = STANDBY; 499 500 return 0; 501 } 502 503 static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index) 504 { 505 const struct kx_chipset_regs *regs = data->info->regs; 506 int ret; 507 508 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); 509 if (ret < 0) { 510 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 511 return ret; 512 } 513 514 ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 | 515 KXCJK1013_REG_CTRL1_BIT_GSEL1); 516 ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3); 517 ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4); 518 519 ret = i2c_smbus_write_byte_data(data->client, regs->ctrl1, ret); 520 if (ret < 0) { 521 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 522 return ret; 523 } 524 525 data->range = range_index; 526 527 return 0; 528 } 529 530 static int kxcjk1013_chip_init(struct kxcjk1013_data *data) 531 { 532 const struct kx_chipset_regs *regs = data->info->regs; 533 int ret; 534 535 #ifdef CONFIG_ACPI 536 if (data->info->acpi_type == ACPI_KIOX010A) { 537 /* Make sure the kbd and touchpad on 2-in-1s using 2 KXCJ91008-s work */ 538 kiox010a_dsm(&data->client->dev, KIOX010A_SET_LAPTOP_MODE); 539 } 540 #endif 541 542 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I); 543 if (ret < 0) { 544 dev_err(&data->client->dev, "Error reading who_am_i\n"); 545 return ret; 546 } 547 548 dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret); 549 550 ret = kxcjk1013_set_mode(data, STANDBY); 551 if (ret < 0) 552 return ret; 553 554 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); 555 if (ret < 0) { 556 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 557 return ret; 558 } 559 560 /* Set 12 bit mode */ 561 ret |= KXCJK1013_REG_CTRL1_BIT_RES; 562 563 ret = i2c_smbus_write_byte_data(data->client, regs->ctrl1, ret); 564 if (ret < 0) { 565 dev_err(&data->client->dev, "Error reading reg_ctrl\n"); 566 return ret; 567 } 568 569 /* Setting range to 4G */ 570 ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G); 571 if (ret < 0) 572 return ret; 573 574 ret = i2c_smbus_read_byte_data(data->client, regs->data_ctrl); 575 if (ret < 0) { 576 dev_err(&data->client->dev, "Error reading reg_data_ctrl\n"); 577 return ret; 578 } 579 580 data->odr_bits = ret; 581 582 /* Set up INT polarity */ 583 ret = i2c_smbus_read_byte_data(data->client, regs->int_ctrl1); 584 if (ret < 0) { 585 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 586 return ret; 587 } 588 589 if (data->active_high_intr) 590 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEA; 591 else 592 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEA; 593 594 ret = i2c_smbus_write_byte_data(data->client, regs->int_ctrl1, ret); 595 if (ret < 0) { 596 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 597 return ret; 598 } 599 600 /* On KX023, route all used interrupts to INT1 for now */ 601 if (data->info == &kx0231025_info && data->client->irq > 0) { 602 ret = i2c_smbus_write_byte_data(data->client, KX023_REG_INC4, 603 KX023_REG_INC4_DRDY1 | 604 KX023_REG_INC4_WUFI1); 605 if (ret < 0) { 606 dev_err(&data->client->dev, "Error writing reg_inc4\n"); 607 return ret; 608 } 609 } 610 611 ret = kxcjk1013_set_mode(data, OPERATION); 612 if (ret < 0) 613 return ret; 614 615 data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES; 616 617 return 0; 618 } 619 620 static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data) 621 { 622 const struct kx_odr_start_up_time *times; 623 624 for (times = data->info->times; times->usec; times++) { 625 if (times->odr_bits == data->odr_bits) 626 return times->usec; 627 } 628 629 return KXCJK1013_MAX_STARTUP_TIME_US; 630 } 631 632 static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on) 633 { 634 #ifdef CONFIG_PM 635 int ret; 636 637 if (on) 638 ret = pm_runtime_resume_and_get(&data->client->dev); 639 else { 640 pm_runtime_mark_last_busy(&data->client->dev); 641 ret = pm_runtime_put_autosuspend(&data->client->dev); 642 } 643 if (ret < 0) { 644 dev_err(&data->client->dev, 645 "Failed: %s for %d\n", __func__, on); 646 return ret; 647 } 648 #endif 649 650 return 0; 651 } 652 653 static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data) 654 { 655 const struct kx_chipset_regs *regs = data->info->regs; 656 int ret; 657 658 ret = i2c_smbus_write_byte_data(data->client, regs->wake_timer, data->wake_dur); 659 if (ret < 0) { 660 dev_err(&data->client->dev, 661 "Error writing reg_wake_timer\n"); 662 return ret; 663 } 664 665 ret = i2c_smbus_write_byte_data(data->client, regs->wake_thres, data->wake_thres); 666 if (ret < 0) { 667 dev_err(&data->client->dev, "Error writing reg_wake_thres\n"); 668 return ret; 669 } 670 671 return 0; 672 } 673 674 static int kxcjk1013_setup_interrupt(struct kxcjk1013_data *data, 675 bool status, bool is_new_data) 676 { 677 const struct kx_chipset_regs *regs = data->info->regs; 678 int ret; 679 enum kxcjk1013_mode store_mode; 680 681 ret = kxcjk1013_get_mode(data, &store_mode); 682 if (ret < 0) 683 return ret; 684 685 /* This is requirement by spec to change state to STANDBY */ 686 ret = kxcjk1013_set_mode(data, STANDBY); 687 if (ret < 0) 688 return ret; 689 690 if (is_new_data == true) { 691 ret = kxcjk1013_chip_update_thresholds(data); 692 if (ret < 0) 693 return ret; 694 } 695 696 ret = i2c_smbus_read_byte_data(data->client, regs->int_ctrl1); 697 if (ret < 0) { 698 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 699 return ret; 700 } 701 702 if (status) 703 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN; 704 else 705 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN; 706 707 ret = i2c_smbus_write_byte_data(data->client, regs->int_ctrl1, ret); 708 if (ret < 0) { 709 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 710 return ret; 711 } 712 713 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); 714 if (ret < 0) { 715 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 716 return ret; 717 } 718 719 if (is_new_data) { 720 if (status) 721 ret |= KXCJK1013_REG_CTRL1_BIT_DRDY; 722 else 723 ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY; 724 } else { 725 if (status) 726 ret |= KXCJK1013_REG_CTRL1_BIT_WUFE; 727 else 728 ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE; 729 } 730 731 ret = i2c_smbus_write_byte_data(data->client, regs->ctrl1, ret); 732 if (ret < 0) { 733 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 734 return ret; 735 } 736 737 if (store_mode == OPERATION) { 738 ret = kxcjk1013_set_mode(data, OPERATION); 739 if (ret < 0) 740 return ret; 741 } 742 743 return 0; 744 } 745 746 static const struct kx_odr_map *kxcjk1013_find_odr_value( 747 const struct kx_odr_map *map, size_t map_size, int val, int val2) 748 { 749 int i; 750 751 for (i = 0; i < map_size; ++i) { 752 if (map[i].val == val && map[i].val2 == val2) 753 return &map[i]; 754 } 755 756 return ERR_PTR(-EINVAL); 757 } 758 759 static int kxcjk1013_convert_odr_value(const struct kx_odr_map *map, 760 size_t map_size, int odr_bits, 761 int *val, int *val2) 762 { 763 int i; 764 765 for (i = 0; i < map_size; ++i) { 766 if (map[i].odr_bits == odr_bits) { 767 *val = map[i].val; 768 *val2 = map[i].val2; 769 return IIO_VAL_INT_PLUS_MICRO; 770 } 771 } 772 773 return -EINVAL; 774 } 775 776 static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2) 777 { 778 const struct kx_chipset_regs *regs = data->info->regs; 779 int ret; 780 enum kxcjk1013_mode store_mode; 781 const struct kx_odr_map *odr_setting; 782 783 ret = kxcjk1013_get_mode(data, &store_mode); 784 if (ret < 0) 785 return ret; 786 787 if (data->info == &kxtf9_info) 788 odr_setting = kxcjk1013_find_odr_value(kxtf9_samp_freq_table, 789 ARRAY_SIZE(kxtf9_samp_freq_table), 790 val, val2); 791 else 792 odr_setting = kxcjk1013_find_odr_value(samp_freq_table, 793 ARRAY_SIZE(samp_freq_table), 794 val, val2); 795 796 if (IS_ERR(odr_setting)) 797 return PTR_ERR(odr_setting); 798 799 /* To change ODR, the chip must be set to STANDBY as per spec */ 800 ret = kxcjk1013_set_mode(data, STANDBY); 801 if (ret < 0) 802 return ret; 803 804 ret = i2c_smbus_write_byte_data(data->client, regs->data_ctrl, 805 odr_setting->odr_bits); 806 if (ret < 0) { 807 dev_err(&data->client->dev, "Error writing data_ctrl\n"); 808 return ret; 809 } 810 811 data->odr_bits = odr_setting->odr_bits; 812 813 ret = i2c_smbus_write_byte_data(data->client, regs->wuf_ctrl, 814 odr_setting->wuf_bits); 815 if (ret < 0) { 816 dev_err(&data->client->dev, "Error writing reg_ctrl2\n"); 817 return ret; 818 } 819 820 if (store_mode == OPERATION) { 821 ret = kxcjk1013_set_mode(data, OPERATION); 822 if (ret < 0) 823 return ret; 824 } 825 826 return 0; 827 } 828 829 static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2) 830 { 831 if (data->info == &kxtf9_info) 832 return kxcjk1013_convert_odr_value(kxtf9_samp_freq_table, 833 ARRAY_SIZE(kxtf9_samp_freq_table), 834 data->odr_bits, val, val2); 835 else 836 return kxcjk1013_convert_odr_value(samp_freq_table, 837 ARRAY_SIZE(samp_freq_table), 838 data->odr_bits, val, val2); 839 } 840 841 static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis) 842 { 843 u8 reg = KXCJK1013_REG_XOUT_L + axis * 2; 844 int ret; 845 846 ret = i2c_smbus_read_word_data(data->client, reg); 847 if (ret < 0) { 848 dev_err(&data->client->dev, 849 "failed to read accel_%c registers\n", 'x' + axis); 850 return ret; 851 } 852 853 return ret; 854 } 855 856 static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val) 857 { 858 int ret, i; 859 enum kxcjk1013_mode store_mode; 860 861 for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) { 862 if (KXCJK1013_scale_table[i].scale == val) { 863 ret = kxcjk1013_get_mode(data, &store_mode); 864 if (ret < 0) 865 return ret; 866 867 ret = kxcjk1013_set_mode(data, STANDBY); 868 if (ret < 0) 869 return ret; 870 871 ret = kxcjk1013_set_range(data, i); 872 if (ret < 0) 873 return ret; 874 875 if (store_mode == OPERATION) { 876 ret = kxcjk1013_set_mode(data, OPERATION); 877 if (ret) 878 return ret; 879 } 880 881 return 0; 882 } 883 } 884 885 return -EINVAL; 886 } 887 888 static int kxcjk1013_read_raw(struct iio_dev *indio_dev, 889 struct iio_chan_spec const *chan, int *val, 890 int *val2, long mask) 891 { 892 struct kxcjk1013_data *data = iio_priv(indio_dev); 893 int ret; 894 895 switch (mask) { 896 case IIO_CHAN_INFO_RAW: 897 mutex_lock(&data->mutex); 898 if (iio_buffer_enabled(indio_dev)) 899 ret = -EBUSY; 900 else { 901 ret = kxcjk1013_set_power_state(data, true); 902 if (ret < 0) { 903 mutex_unlock(&data->mutex); 904 return ret; 905 } 906 ret = kxcjk1013_get_acc_reg(data, chan->scan_index); 907 if (ret < 0) { 908 kxcjk1013_set_power_state(data, false); 909 mutex_unlock(&data->mutex); 910 return ret; 911 } 912 *val = sign_extend32(ret >> chan->scan_type.shift, 913 chan->scan_type.realbits - 1); 914 ret = kxcjk1013_set_power_state(data, false); 915 } 916 mutex_unlock(&data->mutex); 917 918 if (ret < 0) 919 return ret; 920 921 return IIO_VAL_INT; 922 923 case IIO_CHAN_INFO_SCALE: 924 *val = 0; 925 *val2 = KXCJK1013_scale_table[data->range].scale; 926 return IIO_VAL_INT_PLUS_MICRO; 927 928 case IIO_CHAN_INFO_SAMP_FREQ: 929 mutex_lock(&data->mutex); 930 ret = kxcjk1013_get_odr(data, val, val2); 931 mutex_unlock(&data->mutex); 932 return ret; 933 934 default: 935 return -EINVAL; 936 } 937 } 938 939 static int kxcjk1013_write_raw(struct iio_dev *indio_dev, 940 struct iio_chan_spec const *chan, int val, 941 int val2, long mask) 942 { 943 struct kxcjk1013_data *data = iio_priv(indio_dev); 944 int ret; 945 946 switch (mask) { 947 case IIO_CHAN_INFO_SAMP_FREQ: 948 mutex_lock(&data->mutex); 949 ret = kxcjk1013_set_odr(data, val, val2); 950 mutex_unlock(&data->mutex); 951 break; 952 case IIO_CHAN_INFO_SCALE: 953 if (val) 954 return -EINVAL; 955 956 mutex_lock(&data->mutex); 957 ret = kxcjk1013_set_scale(data, val2); 958 mutex_unlock(&data->mutex); 959 break; 960 default: 961 ret = -EINVAL; 962 } 963 964 return ret; 965 } 966 967 static int kxcjk1013_read_event(struct iio_dev *indio_dev, 968 const struct iio_chan_spec *chan, 969 enum iio_event_type type, 970 enum iio_event_direction dir, 971 enum iio_event_info info, 972 int *val, int *val2) 973 { 974 struct kxcjk1013_data *data = iio_priv(indio_dev); 975 976 *val2 = 0; 977 switch (info) { 978 case IIO_EV_INFO_VALUE: 979 *val = data->wake_thres; 980 break; 981 case IIO_EV_INFO_PERIOD: 982 *val = data->wake_dur; 983 break; 984 default: 985 return -EINVAL; 986 } 987 988 return IIO_VAL_INT; 989 } 990 991 static int kxcjk1013_write_event(struct iio_dev *indio_dev, 992 const struct iio_chan_spec *chan, 993 enum iio_event_type type, 994 enum iio_event_direction dir, 995 enum iio_event_info info, 996 int val, int val2) 997 { 998 struct kxcjk1013_data *data = iio_priv(indio_dev); 999 1000 if (data->ev_enable_state) 1001 return -EBUSY; 1002 1003 switch (info) { 1004 case IIO_EV_INFO_VALUE: 1005 data->wake_thres = val; 1006 break; 1007 case IIO_EV_INFO_PERIOD: 1008 data->wake_dur = val; 1009 break; 1010 default: 1011 return -EINVAL; 1012 } 1013 1014 return 0; 1015 } 1016 1017 static int kxcjk1013_read_event_config(struct iio_dev *indio_dev, 1018 const struct iio_chan_spec *chan, 1019 enum iio_event_type type, 1020 enum iio_event_direction dir) 1021 { 1022 struct kxcjk1013_data *data = iio_priv(indio_dev); 1023 1024 return data->ev_enable_state; 1025 } 1026 1027 static int kxcjk1013_write_event_config(struct iio_dev *indio_dev, 1028 const struct iio_chan_spec *chan, 1029 enum iio_event_type type, 1030 enum iio_event_direction dir, 1031 bool state) 1032 { 1033 struct kxcjk1013_data *data = iio_priv(indio_dev); 1034 int ret; 1035 1036 if (state && data->ev_enable_state) 1037 return 0; 1038 1039 mutex_lock(&data->mutex); 1040 1041 if (!state && data->motion_trigger_on) { 1042 data->ev_enable_state = 0; 1043 mutex_unlock(&data->mutex); 1044 return 0; 1045 } 1046 1047 /* 1048 * We will expect the enable and disable to do operation in 1049 * reverse order. This will happen here anyway as our 1050 * resume operation uses sync mode runtime pm calls, the 1051 * suspend operation will be delayed by autosuspend delay 1052 * So the disable operation will still happen in reverse of 1053 * enable operation. When runtime pm is disabled the mode 1054 * is always on so sequence doesn't matter 1055 */ 1056 ret = kxcjk1013_set_power_state(data, state); 1057 if (ret < 0) { 1058 mutex_unlock(&data->mutex); 1059 return ret; 1060 } 1061 1062 ret = kxcjk1013_setup_interrupt(data, state, false); 1063 if (ret < 0) { 1064 kxcjk1013_set_power_state(data, false); 1065 data->ev_enable_state = 0; 1066 mutex_unlock(&data->mutex); 1067 return ret; 1068 } 1069 1070 data->ev_enable_state = state; 1071 mutex_unlock(&data->mutex); 1072 1073 return 0; 1074 } 1075 1076 static int kxcjk1013_buffer_preenable(struct iio_dev *indio_dev) 1077 { 1078 struct kxcjk1013_data *data = iio_priv(indio_dev); 1079 1080 return kxcjk1013_set_power_state(data, true); 1081 } 1082 1083 static int kxcjk1013_buffer_postdisable(struct iio_dev *indio_dev) 1084 { 1085 struct kxcjk1013_data *data = iio_priv(indio_dev); 1086 1087 return kxcjk1013_set_power_state(data, false); 1088 } 1089 1090 static ssize_t kxcjk1013_get_samp_freq_avail(struct device *dev, 1091 struct device_attribute *attr, 1092 char *buf) 1093 { 1094 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 1095 struct kxcjk1013_data *data = iio_priv(indio_dev); 1096 const char *str; 1097 1098 if (data->info == &kxtf9_info) 1099 str = kxtf9_samp_freq_avail; 1100 else 1101 str = kxcjk1013_samp_freq_avail; 1102 1103 return sprintf(buf, "%s\n", str); 1104 } 1105 1106 static IIO_DEVICE_ATTR(in_accel_sampling_frequency_available, S_IRUGO, 1107 kxcjk1013_get_samp_freq_avail, NULL, 0); 1108 1109 static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326"); 1110 1111 static struct attribute *kxcjk1013_attributes[] = { 1112 &iio_dev_attr_in_accel_sampling_frequency_available.dev_attr.attr, 1113 &iio_const_attr_in_accel_scale_available.dev_attr.attr, 1114 NULL, 1115 }; 1116 1117 static const struct attribute_group kxcjk1013_attrs_group = { 1118 .attrs = kxcjk1013_attributes, 1119 }; 1120 1121 static const struct iio_event_spec kxcjk1013_event = { 1122 .type = IIO_EV_TYPE_THRESH, 1123 .dir = IIO_EV_DIR_EITHER, 1124 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 1125 BIT(IIO_EV_INFO_ENABLE) | 1126 BIT(IIO_EV_INFO_PERIOD) 1127 }; 1128 1129 static const struct iio_mount_matrix * 1130 kxcjk1013_get_mount_matrix(const struct iio_dev *indio_dev, 1131 const struct iio_chan_spec *chan) 1132 { 1133 struct kxcjk1013_data *data = iio_priv(indio_dev); 1134 1135 return &data->orientation; 1136 } 1137 1138 static const struct iio_chan_spec_ext_info kxcjk1013_ext_info[] = { 1139 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, kxcjk1013_get_mount_matrix), 1140 { } 1141 }; 1142 1143 #define KXCJK1013_CHANNEL(_axis) { \ 1144 .type = IIO_ACCEL, \ 1145 .modified = 1, \ 1146 .channel2 = IIO_MOD_##_axis, \ 1147 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 1148 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 1149 BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 1150 .scan_index = AXIS_##_axis, \ 1151 .scan_type = { \ 1152 .sign = 's', \ 1153 .realbits = 12, \ 1154 .storagebits = 16, \ 1155 .shift = 4, \ 1156 .endianness = IIO_LE, \ 1157 }, \ 1158 .event_spec = &kxcjk1013_event, \ 1159 .ext_info = kxcjk1013_ext_info, \ 1160 .num_event_specs = 1 \ 1161 } 1162 1163 static const struct iio_chan_spec kxcjk1013_channels[] = { 1164 KXCJK1013_CHANNEL(X), 1165 KXCJK1013_CHANNEL(Y), 1166 KXCJK1013_CHANNEL(Z), 1167 IIO_CHAN_SOFT_TIMESTAMP(3), 1168 }; 1169 1170 static const struct iio_buffer_setup_ops kxcjk1013_buffer_setup_ops = { 1171 .preenable = kxcjk1013_buffer_preenable, 1172 .postdisable = kxcjk1013_buffer_postdisable, 1173 }; 1174 1175 static const struct iio_info kxcjk1013_iio_info = { 1176 .attrs = &kxcjk1013_attrs_group, 1177 .read_raw = kxcjk1013_read_raw, 1178 .write_raw = kxcjk1013_write_raw, 1179 .read_event_value = kxcjk1013_read_event, 1180 .write_event_value = kxcjk1013_write_event, 1181 .write_event_config = kxcjk1013_write_event_config, 1182 .read_event_config = kxcjk1013_read_event_config, 1183 }; 1184 1185 static const unsigned long kxcjk1013_scan_masks[] = {0x7, 0}; 1186 1187 static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p) 1188 { 1189 struct iio_poll_func *pf = p; 1190 struct iio_dev *indio_dev = pf->indio_dev; 1191 struct kxcjk1013_data *data = iio_priv(indio_dev); 1192 int ret; 1193 1194 mutex_lock(&data->mutex); 1195 ret = i2c_smbus_read_i2c_block_data_or_emulated(data->client, 1196 KXCJK1013_REG_XOUT_L, 1197 AXIS_MAX * 2, 1198 (u8 *)data->scan.chans); 1199 mutex_unlock(&data->mutex); 1200 if (ret < 0) 1201 goto err; 1202 1203 iio_push_to_buffers_with_ts(indio_dev, &data->scan, sizeof(data->scan), 1204 data->timestamp); 1205 err: 1206 iio_trigger_notify_done(indio_dev->trig); 1207 1208 return IRQ_HANDLED; 1209 } 1210 1211 static void kxcjk1013_trig_reen(struct iio_trigger *trig) 1212 { 1213 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 1214 struct kxcjk1013_data *data = iio_priv(indio_dev); 1215 const struct kx_chipset_regs *regs = data->info->regs; 1216 int ret; 1217 1218 ret = i2c_smbus_read_byte_data(data->client, regs->int_rel); 1219 if (ret < 0) 1220 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 1221 } 1222 1223 static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig, 1224 bool state) 1225 { 1226 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 1227 struct kxcjk1013_data *data = iio_priv(indio_dev); 1228 int ret; 1229 1230 mutex_lock(&data->mutex); 1231 1232 if (!state && data->ev_enable_state && data->motion_trigger_on) { 1233 data->motion_trigger_on = false; 1234 mutex_unlock(&data->mutex); 1235 return 0; 1236 } 1237 1238 ret = kxcjk1013_set_power_state(data, state); 1239 if (ret < 0) { 1240 mutex_unlock(&data->mutex); 1241 return ret; 1242 } 1243 ret = kxcjk1013_setup_interrupt(data, state, data->motion_trig != trig); 1244 if (ret < 0) { 1245 kxcjk1013_set_power_state(data, false); 1246 mutex_unlock(&data->mutex); 1247 return ret; 1248 } 1249 if (data->motion_trig == trig) 1250 data->motion_trigger_on = state; 1251 else 1252 data->dready_trigger_on = state; 1253 1254 mutex_unlock(&data->mutex); 1255 1256 return 0; 1257 } 1258 1259 static const struct iio_trigger_ops kxcjk1013_trigger_ops = { 1260 .set_trigger_state = kxcjk1013_data_rdy_trigger_set_state, 1261 .reenable = kxcjk1013_trig_reen, 1262 }; 1263 1264 static void kxcjk1013_report_motion_event(struct iio_dev *indio_dev) 1265 { 1266 struct kxcjk1013_data *data = iio_priv(indio_dev); 1267 const struct kx_chipset_regs *regs = data->info->regs; 1268 1269 int ret = i2c_smbus_read_byte_data(data->client, regs->int_src2); 1270 if (ret < 0) { 1271 dev_err(&data->client->dev, "Error reading reg_int_src2\n"); 1272 return; 1273 } 1274 1275 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN) 1276 iio_push_event(indio_dev, 1277 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1278 0, 1279 IIO_MOD_X, 1280 IIO_EV_TYPE_THRESH, 1281 IIO_EV_DIR_FALLING), 1282 data->timestamp); 1283 1284 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP) 1285 iio_push_event(indio_dev, 1286 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1287 0, 1288 IIO_MOD_X, 1289 IIO_EV_TYPE_THRESH, 1290 IIO_EV_DIR_RISING), 1291 data->timestamp); 1292 1293 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN) 1294 iio_push_event(indio_dev, 1295 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1296 0, 1297 IIO_MOD_Y, 1298 IIO_EV_TYPE_THRESH, 1299 IIO_EV_DIR_FALLING), 1300 data->timestamp); 1301 1302 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP) 1303 iio_push_event(indio_dev, 1304 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1305 0, 1306 IIO_MOD_Y, 1307 IIO_EV_TYPE_THRESH, 1308 IIO_EV_DIR_RISING), 1309 data->timestamp); 1310 1311 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN) 1312 iio_push_event(indio_dev, 1313 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1314 0, 1315 IIO_MOD_Z, 1316 IIO_EV_TYPE_THRESH, 1317 IIO_EV_DIR_FALLING), 1318 data->timestamp); 1319 1320 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP) 1321 iio_push_event(indio_dev, 1322 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1323 0, 1324 IIO_MOD_Z, 1325 IIO_EV_TYPE_THRESH, 1326 IIO_EV_DIR_RISING), 1327 data->timestamp); 1328 } 1329 1330 static irqreturn_t kxcjk1013_event_handler(int irq, void *private) 1331 { 1332 struct iio_dev *indio_dev = private; 1333 struct kxcjk1013_data *data = iio_priv(indio_dev); 1334 const struct kx_chipset_regs *regs = data->info->regs; 1335 int ret; 1336 1337 ret = i2c_smbus_read_byte_data(data->client, regs->int_src1); 1338 if (ret < 0) { 1339 dev_err(&data->client->dev, "Error reading reg_int_src1\n"); 1340 goto ack_intr; 1341 } 1342 1343 if (ret & KXCJK1013_REG_INT_SRC1_BIT_WUFS) { 1344 if (data->info == &kxtf9_info) 1345 iio_push_event(indio_dev, 1346 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1347 0, 1348 IIO_MOD_X_AND_Y_AND_Z, 1349 IIO_EV_TYPE_THRESH, 1350 IIO_EV_DIR_RISING), 1351 data->timestamp); 1352 else 1353 kxcjk1013_report_motion_event(indio_dev); 1354 } 1355 1356 ack_intr: 1357 if (data->dready_trigger_on) 1358 return IRQ_HANDLED; 1359 1360 ret = i2c_smbus_read_byte_data(data->client, regs->int_rel); 1361 if (ret < 0) 1362 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 1363 1364 return IRQ_HANDLED; 1365 } 1366 1367 static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private) 1368 { 1369 struct iio_dev *indio_dev = private; 1370 struct kxcjk1013_data *data = iio_priv(indio_dev); 1371 1372 data->timestamp = iio_get_time_ns(indio_dev); 1373 1374 if (data->dready_trigger_on) 1375 iio_trigger_poll(data->dready_trig); 1376 else if (data->motion_trigger_on) 1377 iio_trigger_poll(data->motion_trig); 1378 1379 if (data->ev_enable_state) 1380 return IRQ_WAKE_THREAD; 1381 else 1382 return IRQ_HANDLED; 1383 } 1384 1385 static int kxcjk1013_probe(struct i2c_client *client) 1386 { 1387 const struct i2c_device_id *id = i2c_client_get_device_id(client); 1388 static const char * const regulator_names[] = { "vdd", "vddio" }; 1389 struct kxcjk1013_data *data; 1390 struct iio_dev *indio_dev; 1391 struct kxcjk_1013_platform_data *pdata; 1392 const void *ddata = NULL; 1393 const char *name; 1394 int ret; 1395 1396 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 1397 if (!indio_dev) 1398 return -ENOMEM; 1399 1400 data = iio_priv(indio_dev); 1401 i2c_set_clientdata(client, indio_dev); 1402 data->client = client; 1403 1404 pdata = dev_get_platdata(&client->dev); 1405 if (pdata) { 1406 data->active_high_intr = pdata->active_high_intr; 1407 data->orientation = pdata->orientation; 1408 } else { 1409 data->active_high_intr = true; /* default polarity */ 1410 1411 if (!iio_read_acpi_mount_matrix(&client->dev, &data->orientation, "ROTM")) { 1412 ret = iio_read_mount_matrix(&client->dev, &data->orientation); 1413 if (ret) 1414 return ret; 1415 } 1416 1417 } 1418 1419 ret = devm_regulator_bulk_get_enable(&client->dev, 1420 ARRAY_SIZE(regulator_names), 1421 regulator_names); 1422 if (ret) 1423 return dev_err_probe(&client->dev, ret, "Failed to get regulators\n"); 1424 1425 /* 1426 * A typical delay of 10ms is required for powering up 1427 * according to the data sheets of supported chips. 1428 * Hence double that to play safe. 1429 */ 1430 msleep(20); 1431 1432 if (id) { 1433 name = id->name; 1434 data->info = (const struct kx_chipset_info *)(id->driver_data); 1435 } else { 1436 name = iio_get_acpi_device_name_and_data(&client->dev, &ddata); 1437 data->info = ddata; 1438 if (data->info == &kxcj91008_kiox010a_info) 1439 indio_dev->label = "accel-display"; 1440 else if (data->info == &kxcj91008_kiox020a_info) 1441 indio_dev->label = "accel-base"; 1442 } 1443 if (!name) 1444 return -ENODEV; 1445 1446 ret = kxcjk1013_chip_init(data); 1447 if (ret < 0) 1448 return ret; 1449 1450 mutex_init(&data->mutex); 1451 1452 indio_dev->channels = kxcjk1013_channels; 1453 indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels); 1454 indio_dev->available_scan_masks = kxcjk1013_scan_masks; 1455 indio_dev->name = name; 1456 indio_dev->modes = INDIO_DIRECT_MODE; 1457 indio_dev->info = &kxcjk1013_iio_info; 1458 1459 if (client->irq > 0 && data->info->acpi_type != ACPI_SMO8500) { 1460 ret = devm_request_threaded_irq(&client->dev, client->irq, 1461 kxcjk1013_data_rdy_trig_poll, 1462 kxcjk1013_event_handler, 1463 IRQF_TRIGGER_RISING, 1464 "kxcjk1013_event", 1465 indio_dev); 1466 if (ret) 1467 goto err_poweroff; 1468 1469 data->dready_trig = devm_iio_trigger_alloc(&client->dev, 1470 "%s-dev%d", 1471 indio_dev->name, 1472 iio_device_id(indio_dev)); 1473 if (!data->dready_trig) { 1474 ret = -ENOMEM; 1475 goto err_poweroff; 1476 } 1477 1478 data->motion_trig = devm_iio_trigger_alloc(&client->dev, 1479 "%s-any-motion-dev%d", 1480 indio_dev->name, 1481 iio_device_id(indio_dev)); 1482 if (!data->motion_trig) { 1483 ret = -ENOMEM; 1484 goto err_poweroff; 1485 } 1486 1487 data->dready_trig->ops = &kxcjk1013_trigger_ops; 1488 iio_trigger_set_drvdata(data->dready_trig, indio_dev); 1489 ret = iio_trigger_register(data->dready_trig); 1490 if (ret) 1491 goto err_poweroff; 1492 1493 indio_dev->trig = iio_trigger_get(data->dready_trig); 1494 1495 data->motion_trig->ops = &kxcjk1013_trigger_ops; 1496 iio_trigger_set_drvdata(data->motion_trig, indio_dev); 1497 ret = iio_trigger_register(data->motion_trig); 1498 if (ret) { 1499 data->motion_trig = NULL; 1500 goto err_trigger_unregister; 1501 } 1502 } 1503 1504 ret = iio_triggered_buffer_setup(indio_dev, 1505 &iio_pollfunc_store_time, 1506 kxcjk1013_trigger_handler, 1507 &kxcjk1013_buffer_setup_ops); 1508 if (ret < 0) { 1509 dev_err(&client->dev, "iio triggered buffer setup failed\n"); 1510 goto err_trigger_unregister; 1511 } 1512 1513 ret = pm_runtime_set_active(&client->dev); 1514 if (ret) 1515 goto err_buffer_cleanup; 1516 1517 pm_runtime_enable(&client->dev); 1518 pm_runtime_set_autosuspend_delay(&client->dev, 1519 KXCJK1013_SLEEP_DELAY_MS); 1520 pm_runtime_use_autosuspend(&client->dev); 1521 1522 ret = iio_device_register(indio_dev); 1523 if (ret < 0) { 1524 dev_err(&client->dev, "unable to register iio device\n"); 1525 goto err_pm_cleanup; 1526 } 1527 1528 return 0; 1529 1530 err_pm_cleanup: 1531 pm_runtime_dont_use_autosuspend(&client->dev); 1532 pm_runtime_disable(&client->dev); 1533 err_buffer_cleanup: 1534 iio_triggered_buffer_cleanup(indio_dev); 1535 err_trigger_unregister: 1536 if (data->dready_trig) 1537 iio_trigger_unregister(data->dready_trig); 1538 if (data->motion_trig) 1539 iio_trigger_unregister(data->motion_trig); 1540 err_poweroff: 1541 kxcjk1013_set_mode(data, STANDBY); 1542 1543 return ret; 1544 } 1545 1546 static void kxcjk1013_remove(struct i2c_client *client) 1547 { 1548 struct iio_dev *indio_dev = i2c_get_clientdata(client); 1549 struct kxcjk1013_data *data = iio_priv(indio_dev); 1550 1551 iio_device_unregister(indio_dev); 1552 1553 pm_runtime_disable(&client->dev); 1554 pm_runtime_set_suspended(&client->dev); 1555 1556 iio_triggered_buffer_cleanup(indio_dev); 1557 if (data->dready_trig) { 1558 iio_trigger_unregister(data->dready_trig); 1559 iio_trigger_unregister(data->motion_trig); 1560 } 1561 1562 mutex_lock(&data->mutex); 1563 kxcjk1013_set_mode(data, STANDBY); 1564 mutex_unlock(&data->mutex); 1565 } 1566 1567 static int kxcjk1013_suspend(struct device *dev) 1568 { 1569 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1570 struct kxcjk1013_data *data = iio_priv(indio_dev); 1571 int ret; 1572 1573 mutex_lock(&data->mutex); 1574 ret = kxcjk1013_set_mode(data, STANDBY); 1575 mutex_unlock(&data->mutex); 1576 1577 return ret; 1578 } 1579 1580 static int kxcjk1013_resume(struct device *dev) 1581 { 1582 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1583 struct kxcjk1013_data *data = iio_priv(indio_dev); 1584 int ret = 0; 1585 1586 mutex_lock(&data->mutex); 1587 ret = kxcjk1013_set_mode(data, OPERATION); 1588 if (ret == 0) 1589 ret = kxcjk1013_set_range(data, data->range); 1590 mutex_unlock(&data->mutex); 1591 1592 return ret; 1593 } 1594 1595 static int kxcjk1013_runtime_suspend(struct device *dev) 1596 { 1597 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1598 struct kxcjk1013_data *data = iio_priv(indio_dev); 1599 int ret; 1600 1601 ret = kxcjk1013_set_mode(data, STANDBY); 1602 if (ret < 0) { 1603 dev_err(&data->client->dev, "powering off device failed\n"); 1604 return -EAGAIN; 1605 } 1606 return 0; 1607 } 1608 1609 static int kxcjk1013_runtime_resume(struct device *dev) 1610 { 1611 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1612 struct kxcjk1013_data *data = iio_priv(indio_dev); 1613 int ret; 1614 int sleep_val; 1615 1616 ret = kxcjk1013_set_mode(data, OPERATION); 1617 if (ret < 0) 1618 return ret; 1619 1620 sleep_val = kxcjk1013_get_startup_times(data); 1621 if (sleep_val < 20000) 1622 usleep_range(sleep_val, 20000); 1623 else 1624 msleep_interruptible(sleep_val/1000); 1625 1626 return 0; 1627 } 1628 1629 static const struct dev_pm_ops kxcjk1013_pm_ops = { 1630 SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume) 1631 RUNTIME_PM_OPS(kxcjk1013_runtime_suspend, kxcjk1013_runtime_resume, NULL) 1632 }; 1633 1634 static const struct i2c_device_id kxcjk1013_id[] = { 1635 { "kxcjk1013", (kernel_ulong_t)&kxcjk1013_info }, 1636 { "kxcj91008", (kernel_ulong_t)&kxcj91008_info }, 1637 { "kxtj21009", (kernel_ulong_t)&kxtj21009_info }, 1638 { "kxtf9", (kernel_ulong_t)&kxtf9_info }, 1639 { "kx023-1025", (kernel_ulong_t)&kx0231025_info }, 1640 { } 1641 }; 1642 MODULE_DEVICE_TABLE(i2c, kxcjk1013_id); 1643 1644 static const struct of_device_id kxcjk1013_of_match[] = { 1645 { .compatible = "kionix,kxcjk1013", &kxcjk1013_info }, 1646 { .compatible = "kionix,kxcj91008", &kxcj91008_info }, 1647 { .compatible = "kionix,kxtj21009", &kxtj21009_info }, 1648 { .compatible = "kionix,kxtf9", &kxtf9_info }, 1649 { .compatible = "kionix,kx023-1025", &kx0231025_info }, 1650 { } 1651 }; 1652 MODULE_DEVICE_TABLE(of, kxcjk1013_of_match); 1653 1654 static const struct acpi_device_id kx_acpi_match[] = { 1655 { "KIOX0008", (kernel_ulong_t)&kxcj91008_info }, 1656 { "KIOX0009", (kernel_ulong_t)&kxtj21009_info }, 1657 { "KIOX000A", (kernel_ulong_t)&kxcj91008_info }, 1658 /* KXCJ91008 in the display of a yoga 2-in-1 */ 1659 { "KIOX010A", (kernel_ulong_t)&kxcj91008_kiox010a_info }, 1660 /* KXCJ91008 in the base of a yoga 2-in-1 */ 1661 { "KIOX020A", (kernel_ulong_t)&kxcj91008_kiox020a_info }, 1662 { "KXCJ1008", (kernel_ulong_t)&kxcj91008_info }, 1663 { "KXCJ1013", (kernel_ulong_t)&kxcjk1013_info }, 1664 { "KXCJ9000", (kernel_ulong_t)&kxcj91008_info }, 1665 { "KXJ2109", (kernel_ulong_t)&kxtj21009_info }, 1666 { "KXTJ1009", (kernel_ulong_t)&kxtj21009_info }, 1667 { "SMO8500", (kernel_ulong_t)&kxcj91008_smo8500_info }, 1668 { } 1669 }; 1670 MODULE_DEVICE_TABLE(acpi, kx_acpi_match); 1671 1672 static struct i2c_driver kxcjk1013_driver = { 1673 .driver = { 1674 .name = "kxcjk1013", 1675 .acpi_match_table = kx_acpi_match, 1676 .of_match_table = kxcjk1013_of_match, 1677 .pm = pm_ptr(&kxcjk1013_pm_ops), 1678 }, 1679 .probe = kxcjk1013_probe, 1680 .remove = kxcjk1013_remove, 1681 .id_table = kxcjk1013_id, 1682 }; 1683 module_i2c_driver(kxcjk1013_driver); 1684 1685 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>"); 1686 MODULE_LICENSE("GPL v2"); 1687 MODULE_DESCRIPTION("KXCJK1013 accelerometer driver"); 1688