1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * KXCJK-1013 3-axis accelerometer driver 4 * Copyright (c) 2014, Intel Corporation. 5 */ 6 7 #include <linux/module.h> 8 #include <linux/i2c.h> 9 #include <linux/interrupt.h> 10 #include <linux/delay.h> 11 #include <linux/bitops.h> 12 #include <linux/slab.h> 13 #include <linux/string.h> 14 #include <linux/acpi.h> 15 #include <linux/pm.h> 16 #include <linux/pm_runtime.h> 17 #include <linux/regulator/consumer.h> 18 #include <linux/iio/iio.h> 19 #include <linux/iio/sysfs.h> 20 #include <linux/iio/buffer.h> 21 #include <linux/iio/trigger.h> 22 #include <linux/iio/events.h> 23 #include <linux/iio/trigger_consumer.h> 24 #include <linux/iio/triggered_buffer.h> 25 #include <linux/iio/accel/kxcjk_1013.h> 26 27 #define KXCJK1013_DRV_NAME "kxcjk1013" 28 #define KXCJK1013_IRQ_NAME "kxcjk1013_event" 29 30 #define KXTF9_REG_HP_XOUT_L 0x00 31 #define KXTF9_REG_HP_XOUT_H 0x01 32 #define KXTF9_REG_HP_YOUT_L 0x02 33 #define KXTF9_REG_HP_YOUT_H 0x03 34 #define KXTF9_REG_HP_ZOUT_L 0x04 35 #define KXTF9_REG_HP_ZOUT_H 0x05 36 37 #define KXCJK1013_REG_XOUT_L 0x06 38 /* 39 * From low byte X axis register, all the other addresses of Y and Z can be 40 * obtained by just applying axis offset. The following axis defines are just 41 * provide clarity, but not used. 42 */ 43 #define KXCJK1013_REG_XOUT_H 0x07 44 #define KXCJK1013_REG_YOUT_L 0x08 45 #define KXCJK1013_REG_YOUT_H 0x09 46 #define KXCJK1013_REG_ZOUT_L 0x0A 47 #define KXCJK1013_REG_ZOUT_H 0x0B 48 49 #define KXCJK1013_REG_DCST_RESP 0x0C 50 #define KXCJK1013_REG_WHO_AM_I 0x0F 51 #define KXTF9_REG_TILT_POS_CUR 0x10 52 #define KXTF9_REG_TILT_POS_PREV 0x11 53 #define KXTF9_REG_INT_SRC1 0x15 54 #define KXTF9_REG_INT_SRC2 0x16 55 #define KXCJK1013_REG_INT_SRC1 0x16 56 #define KXCJK1013_REG_INT_SRC2 0x17 57 #define KXCJK1013_REG_STATUS_REG 0x18 58 #define KXCJK1013_REG_INT_REL 0x1A 59 #define KXCJK1013_REG_CTRL1 0x1B 60 #define KXTF9_REG_CTRL2 0x1C 61 #define KXTF9_REG_CTRL3 0x1D 62 #define KXCJK1013_REG_CTRL2 0x1D 63 #define KXCJK1013_REG_INT_CTRL1 0x1E 64 #define KXCJK1013_REG_INT_CTRL2 0x1F 65 #define KXTF9_REG_INT_CTRL3 0x20 66 #define KXCJK1013_REG_DATA_CTRL 0x21 67 #define KXTF9_REG_TILT_TIMER 0x28 68 #define KXCJK1013_REG_WAKE_TIMER 0x29 69 #define KXTF9_REG_TDT_TIMER 0x2B 70 #define KXTF9_REG_TDT_THRESH_H 0x2C 71 #define KXTF9_REG_TDT_THRESH_L 0x2D 72 #define KXTF9_REG_TDT_TAP_TIMER 0x2E 73 #define KXTF9_REG_TDT_TOTAL_TIMER 0x2F 74 #define KXTF9_REG_TDT_LATENCY_TIMER 0x30 75 #define KXTF9_REG_TDT_WINDOW_TIMER 0x31 76 #define KXCJK1013_REG_SELF_TEST 0x3A 77 #define KXTF9_REG_WAKE_THRESH 0x5A 78 #define KXTF9_REG_TILT_ANGLE 0x5C 79 #define KXTF9_REG_HYST_SET 0x5F 80 #define KXCJK1013_REG_WAKE_THRES 0x6A 81 82 /* Everything up to 0x11 is equal to KXCJK1013/KXTF9 above */ 83 #define KX023_REG_INS1 0x12 84 #define KX023_REG_INS2 0x13 85 #define KX023_REG_INS3 0x14 86 #define KX023_REG_STAT 0x15 87 #define KX023_REG_INT_REL 0x17 88 #define KX023_REG_CNTL1 0x18 89 #define KX023_REG_CNTL2 0x19 90 #define KX023_REG_CNTL3 0x1A 91 #define KX023_REG_ODCNTL 0x1B 92 #define KX023_REG_INC1 0x1C 93 #define KX023_REG_INC2 0x1D 94 #define KX023_REG_INC3 0x1E 95 #define KX023_REG_INC4 0x1F 96 #define KX023_REG_INC5 0x20 97 #define KX023_REG_INC6 0x21 98 #define KX023_REG_TILT_TIMER 0x22 99 #define KX023_REG_WUFC 0x23 100 #define KX023_REG_TDTRC 0x24 101 #define KX023_REG_TDTC 0x25 102 #define KX023_REG_TTH 0x26 103 #define KX023_REG_TTL 0x27 104 #define KX023_REG_FTD 0x28 105 #define KX023_REG_STD 0x29 106 #define KX023_REG_TLT 0x2A 107 #define KX023_REG_TWS 0x2B 108 #define KX023_REG_ATH 0x30 109 #define KX023_REG_TILT_ANGLE_LL 0x32 110 #define KX023_REG_TILT_ANGLE_HL 0x33 111 #define KX023_REG_HYST_SET 0x34 112 #define KX023_REG_LP_CNTL 0x35 113 #define KX023_REG_BUF_CNTL1 0x3A 114 #define KX023_REG_BUF_CNTL2 0x3B 115 #define KX023_REG_BUF_STATUS_1 0x3C 116 #define KX023_REG_BUF_STATUS_2 0x3D 117 #define KX023_REG_BUF_CLEAR 0x3E 118 #define KX023_REG_BUF_READ 0x3F 119 #define KX023_REG_SELF_TEST 0x60 120 121 #define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7) 122 #define KXCJK1013_REG_CTRL1_BIT_RES BIT(6) 123 #define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5) 124 #define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4) 125 #define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3) 126 #define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1) 127 128 #define KXCJK1013_REG_INT_CTRL1_BIT_IEU BIT(2) /* KXTF9 */ 129 #define KXCJK1013_REG_INT_CTRL1_BIT_IEL BIT(3) 130 #define KXCJK1013_REG_INT_CTRL1_BIT_IEA BIT(4) 131 #define KXCJK1013_REG_INT_CTRL1_BIT_IEN BIT(5) 132 133 #define KXTF9_REG_TILT_BIT_LEFT_EDGE BIT(5) 134 #define KXTF9_REG_TILT_BIT_RIGHT_EDGE BIT(4) 135 #define KXTF9_REG_TILT_BIT_LOWER_EDGE BIT(3) 136 #define KXTF9_REG_TILT_BIT_UPPER_EDGE BIT(2) 137 #define KXTF9_REG_TILT_BIT_FACE_DOWN BIT(1) 138 #define KXTF9_REG_TILT_BIT_FACE_UP BIT(0) 139 140 #define KXCJK1013_DATA_MASK_12_BIT 0x0FFF 141 #define KXCJK1013_MAX_STARTUP_TIME_US 100000 142 143 #define KXCJK1013_SLEEP_DELAY_MS 2000 144 145 #define KXCJK1013_REG_INT_SRC1_BIT_TPS BIT(0) /* KXTF9 */ 146 #define KXCJK1013_REG_INT_SRC1_BIT_WUFS BIT(1) 147 #define KXCJK1013_REG_INT_SRC1_MASK_TDTS (BIT(2) | BIT(3)) /* KXTF9 */ 148 #define KXCJK1013_REG_INT_SRC1_TAP_NONE 0 149 #define KXCJK1013_REG_INT_SRC1_TAP_SINGLE BIT(2) 150 #define KXCJK1013_REG_INT_SRC1_TAP_DOUBLE BIT(3) 151 #define KXCJK1013_REG_INT_SRC1_BIT_DRDY BIT(4) 152 153 /* KXCJK: INT_SOURCE2: motion detect, KXTF9: INT_SRC_REG1: tap detect */ 154 #define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0) 155 #define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1) 156 #define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2) 157 #define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3) 158 #define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4) 159 #define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5) 160 161 /* KX023 interrupt routing to INT1. INT2 can be configured with INC6 */ 162 #define KX023_REG_INC4_BFI1 BIT(6) 163 #define KX023_REG_INC4_WMI1 BIT(5) 164 #define KX023_REG_INC4_DRDY1 BIT(4) 165 #define KX023_REG_INC4_TDTI1 BIT(2) 166 #define KX023_REG_INC4_WUFI1 BIT(1) 167 #define KX023_REG_INC4_TPI1 BIT(0) 168 169 #define KXCJK1013_DEFAULT_WAKE_THRES 1 170 171 enum kx_chipset { 172 KXCJK1013, 173 KXCJ91008, 174 KXTJ21009, 175 KXTF9, 176 KX0231025, 177 KX_MAX_CHIPS /* this must be last */ 178 }; 179 180 enum kx_acpi_type { 181 ACPI_GENERIC, 182 ACPI_SMO8500, 183 ACPI_KIOX010A, 184 }; 185 186 struct kx_chipset_regs { 187 u8 int_src1; 188 u8 int_src2; 189 u8 int_rel; 190 u8 ctrl1; 191 u8 wuf_ctrl; 192 u8 int_ctrl1; 193 u8 data_ctrl; 194 u8 wake_timer; 195 u8 wake_thres; 196 }; 197 198 static const struct kx_chipset_regs kxcjk1013_regs = { 199 .int_src1 = KXCJK1013_REG_INT_SRC1, 200 .int_src2 = KXCJK1013_REG_INT_SRC2, 201 .int_rel = KXCJK1013_REG_INT_REL, 202 .ctrl1 = KXCJK1013_REG_CTRL1, 203 .wuf_ctrl = KXCJK1013_REG_CTRL2, 204 .int_ctrl1 = KXCJK1013_REG_INT_CTRL1, 205 .data_ctrl = KXCJK1013_REG_DATA_CTRL, 206 .wake_timer = KXCJK1013_REG_WAKE_TIMER, 207 .wake_thres = KXCJK1013_REG_WAKE_THRES, 208 }; 209 210 static const struct kx_chipset_regs kxtf9_regs = { 211 /* .int_src1 was moved to INT_SRC2 on KXTF9 */ 212 .int_src1 = KXTF9_REG_INT_SRC2, 213 /* .int_src2 is not available */ 214 .int_rel = KXCJK1013_REG_INT_REL, 215 .ctrl1 = KXCJK1013_REG_CTRL1, 216 .wuf_ctrl = KXTF9_REG_CTRL3, 217 .int_ctrl1 = KXCJK1013_REG_INT_CTRL1, 218 .data_ctrl = KXCJK1013_REG_DATA_CTRL, 219 .wake_timer = KXCJK1013_REG_WAKE_TIMER, 220 .wake_thres = KXTF9_REG_WAKE_THRESH, 221 }; 222 223 /* The registers have totally different names but the bits are compatible */ 224 static const struct kx_chipset_regs kx0231025_regs = { 225 .int_src1 = KX023_REG_INS2, 226 .int_src2 = KX023_REG_INS3, 227 .int_rel = KX023_REG_INT_REL, 228 .ctrl1 = KX023_REG_CNTL1, 229 .wuf_ctrl = KX023_REG_CNTL3, 230 .int_ctrl1 = KX023_REG_INC1, 231 .data_ctrl = KX023_REG_ODCNTL, 232 .wake_timer = KX023_REG_WUFC, 233 .wake_thres = KX023_REG_ATH, 234 }; 235 236 enum kxcjk1013_axis { 237 AXIS_X, 238 AXIS_Y, 239 AXIS_Z, 240 AXIS_MAX 241 }; 242 243 struct kxcjk1013_data { 244 struct i2c_client *client; 245 struct iio_trigger *dready_trig; 246 struct iio_trigger *motion_trig; 247 struct iio_mount_matrix orientation; 248 struct mutex mutex; 249 /* Ensure timestamp naturally aligned */ 250 struct { 251 s16 chans[AXIS_MAX]; 252 s64 timestamp __aligned(8); 253 } scan; 254 u8 odr_bits; 255 u8 range; 256 int wake_thres; 257 int wake_dur; 258 bool active_high_intr; 259 bool dready_trigger_on; 260 int ev_enable_state; 261 bool motion_trigger_on; 262 int64_t timestamp; 263 enum kx_chipset chipset; 264 enum kx_acpi_type acpi_type; 265 const struct kx_chipset_regs *regs; 266 }; 267 268 enum kxcjk1013_mode { 269 STANDBY, 270 OPERATION, 271 }; 272 273 enum kxcjk1013_range { 274 KXCJK1013_RANGE_2G, 275 KXCJK1013_RANGE_4G, 276 KXCJK1013_RANGE_8G, 277 }; 278 279 struct kx_odr_map { 280 int val; 281 int val2; 282 int odr_bits; 283 int wuf_bits; 284 }; 285 286 static const struct kx_odr_map samp_freq_table[] = { 287 { 0, 781000, 0x08, 0x00 }, 288 { 1, 563000, 0x09, 0x01 }, 289 { 3, 125000, 0x0A, 0x02 }, 290 { 6, 250000, 0x0B, 0x03 }, 291 { 12, 500000, 0x00, 0x04 }, 292 { 25, 0, 0x01, 0x05 }, 293 { 50, 0, 0x02, 0x06 }, 294 { 100, 0, 0x03, 0x06 }, 295 { 200, 0, 0x04, 0x06 }, 296 { 400, 0, 0x05, 0x06 }, 297 { 800, 0, 0x06, 0x06 }, 298 { 1600, 0, 0x07, 0x06 }, 299 }; 300 301 static const char *const kxcjk1013_samp_freq_avail = 302 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600"; 303 304 static const struct kx_odr_map kxtf9_samp_freq_table[] = { 305 { 25, 0, 0x01, 0x00 }, 306 { 50, 0, 0x02, 0x01 }, 307 { 100, 0, 0x03, 0x01 }, 308 { 200, 0, 0x04, 0x01 }, 309 { 400, 0, 0x05, 0x01 }, 310 { 800, 0, 0x06, 0x01 }, 311 }; 312 313 static const char *const kxtf9_samp_freq_avail = 314 "25 50 100 200 400 800"; 315 316 /* Refer to section 4 of the specification */ 317 static __maybe_unused const struct { 318 int odr_bits; 319 int usec; 320 } odr_start_up_times[KX_MAX_CHIPS][12] = { 321 /* KXCJK-1013 */ 322 { 323 {0x08, 100000}, 324 {0x09, 100000}, 325 {0x0A, 100000}, 326 {0x0B, 100000}, 327 {0, 80000}, 328 {0x01, 41000}, 329 {0x02, 21000}, 330 {0x03, 11000}, 331 {0x04, 6400}, 332 {0x05, 3900}, 333 {0x06, 2700}, 334 {0x07, 2100}, 335 }, 336 /* KXCJ9-1008 */ 337 { 338 {0x08, 100000}, 339 {0x09, 100000}, 340 {0x0A, 100000}, 341 {0x0B, 100000}, 342 {0, 80000}, 343 {0x01, 41000}, 344 {0x02, 21000}, 345 {0x03, 11000}, 346 {0x04, 6400}, 347 {0x05, 3900}, 348 {0x06, 2700}, 349 {0x07, 2100}, 350 }, 351 /* KXCTJ2-1009 */ 352 { 353 {0x08, 1240000}, 354 {0x09, 621000}, 355 {0x0A, 309000}, 356 {0x0B, 151000}, 357 {0, 80000}, 358 {0x01, 41000}, 359 {0x02, 21000}, 360 {0x03, 11000}, 361 {0x04, 6000}, 362 {0x05, 4000}, 363 {0x06, 3000}, 364 {0x07, 2000}, 365 }, 366 /* KXTF9 */ 367 { 368 {0x01, 81000}, 369 {0x02, 41000}, 370 {0x03, 21000}, 371 {0x04, 11000}, 372 {0x05, 5100}, 373 {0x06, 2700}, 374 }, 375 /* KX023-1025 */ 376 { 377 /* First 4 are not in datasheet, taken from KXCTJ2-1009 */ 378 {0x08, 1240000}, 379 {0x09, 621000}, 380 {0x0A, 309000}, 381 {0x0B, 151000}, 382 {0, 81000}, 383 {0x01, 40000}, 384 {0x02, 22000}, 385 {0x03, 12000}, 386 {0x04, 7000}, 387 {0x05, 4400}, 388 {0x06, 3000}, 389 {0x07, 3000}, 390 }, 391 }; 392 393 static const struct { 394 u16 scale; 395 u8 gsel_0; 396 u8 gsel_1; 397 } KXCJK1013_scale_table[] = { {9582, 0, 0}, 398 {19163, 1, 0}, 399 {38326, 0, 1} }; 400 401 #ifdef CONFIG_ACPI 402 enum kiox010a_fn_index { 403 KIOX010A_SET_LAPTOP_MODE = 1, 404 KIOX010A_SET_TABLET_MODE = 2, 405 }; 406 407 static int kiox010a_dsm(struct device *dev, int fn_index) 408 { 409 acpi_handle handle = ACPI_HANDLE(dev); 410 guid_t kiox010a_dsm_guid; 411 union acpi_object *obj; 412 413 if (!handle) 414 return -ENODEV; 415 416 guid_parse("1f339696-d475-4e26-8cad-2e9f8e6d7a91", &kiox010a_dsm_guid); 417 418 obj = acpi_evaluate_dsm(handle, &kiox010a_dsm_guid, 1, fn_index, NULL); 419 if (!obj) 420 return -EIO; 421 422 ACPI_FREE(obj); 423 return 0; 424 } 425 426 static const struct acpi_device_id kx_acpi_match[] = { 427 {"KXCJ1013", KXCJK1013}, 428 {"KXCJ1008", KXCJ91008}, 429 {"KXCJ9000", KXCJ91008}, 430 {"KIOX0008", KXCJ91008}, 431 {"KIOX0009", KXTJ21009}, 432 {"KIOX000A", KXCJ91008}, 433 {"KIOX010A", KXCJ91008}, /* KXCJ91008 in the display of a yoga 2-in-1 */ 434 {"KIOX020A", KXCJ91008}, /* KXCJ91008 in the base of a yoga 2-in-1 */ 435 {"KXTJ1009", KXTJ21009}, 436 {"KXJ2109", KXTJ21009}, 437 {"SMO8500", KXCJ91008}, 438 { } 439 }; 440 MODULE_DEVICE_TABLE(acpi, kx_acpi_match); 441 442 #endif 443 444 static int kxcjk1013_set_mode(struct kxcjk1013_data *data, 445 enum kxcjk1013_mode mode) 446 { 447 int ret; 448 449 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 450 if (ret < 0) { 451 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 452 return ret; 453 } 454 455 if (mode == STANDBY) 456 ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1; 457 else 458 ret |= KXCJK1013_REG_CTRL1_BIT_PC1; 459 460 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 461 if (ret < 0) { 462 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 463 return ret; 464 } 465 466 return 0; 467 } 468 469 static int kxcjk1013_get_mode(struct kxcjk1013_data *data, 470 enum kxcjk1013_mode *mode) 471 { 472 int ret; 473 474 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 475 if (ret < 0) { 476 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 477 return ret; 478 } 479 480 if (ret & KXCJK1013_REG_CTRL1_BIT_PC1) 481 *mode = OPERATION; 482 else 483 *mode = STANDBY; 484 485 return 0; 486 } 487 488 static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index) 489 { 490 int ret; 491 492 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 493 if (ret < 0) { 494 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 495 return ret; 496 } 497 498 ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 | 499 KXCJK1013_REG_CTRL1_BIT_GSEL1); 500 ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3); 501 ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4); 502 503 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 504 if (ret < 0) { 505 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 506 return ret; 507 } 508 509 data->range = range_index; 510 511 return 0; 512 } 513 514 static int kxcjk1013_chip_init(struct kxcjk1013_data *data) 515 { 516 int ret; 517 518 #ifdef CONFIG_ACPI 519 if (data->acpi_type == ACPI_KIOX010A) { 520 /* Make sure the kbd and touchpad on 2-in-1s using 2 KXCJ91008-s work */ 521 kiox010a_dsm(&data->client->dev, KIOX010A_SET_LAPTOP_MODE); 522 } 523 #endif 524 525 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I); 526 if (ret < 0) { 527 dev_err(&data->client->dev, "Error reading who_am_i\n"); 528 return ret; 529 } 530 531 dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret); 532 533 ret = kxcjk1013_set_mode(data, STANDBY); 534 if (ret < 0) 535 return ret; 536 537 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 538 if (ret < 0) { 539 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 540 return ret; 541 } 542 543 /* Set 12 bit mode */ 544 ret |= KXCJK1013_REG_CTRL1_BIT_RES; 545 546 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 547 if (ret < 0) { 548 dev_err(&data->client->dev, "Error reading reg_ctrl\n"); 549 return ret; 550 } 551 552 /* Setting range to 4G */ 553 ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G); 554 if (ret < 0) 555 return ret; 556 557 ret = i2c_smbus_read_byte_data(data->client, data->regs->data_ctrl); 558 if (ret < 0) { 559 dev_err(&data->client->dev, "Error reading reg_data_ctrl\n"); 560 return ret; 561 } 562 563 data->odr_bits = ret; 564 565 /* Set up INT polarity */ 566 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1); 567 if (ret < 0) { 568 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 569 return ret; 570 } 571 572 if (data->active_high_intr) 573 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEA; 574 else 575 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEA; 576 577 ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret); 578 if (ret < 0) { 579 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 580 return ret; 581 } 582 583 /* On KX023, route all used interrupts to INT1 for now */ 584 if (data->chipset == KX0231025 && data->client->irq > 0) { 585 ret = i2c_smbus_write_byte_data(data->client, KX023_REG_INC4, 586 KX023_REG_INC4_DRDY1 | 587 KX023_REG_INC4_WUFI1); 588 if (ret < 0) { 589 dev_err(&data->client->dev, "Error writing reg_inc4\n"); 590 return ret; 591 } 592 } 593 594 ret = kxcjk1013_set_mode(data, OPERATION); 595 if (ret < 0) 596 return ret; 597 598 data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES; 599 600 return 0; 601 } 602 603 #ifdef CONFIG_PM 604 static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data) 605 { 606 int i; 607 int idx = data->chipset; 608 609 for (i = 0; i < ARRAY_SIZE(odr_start_up_times[idx]); ++i) { 610 if (odr_start_up_times[idx][i].odr_bits == data->odr_bits) 611 return odr_start_up_times[idx][i].usec; 612 } 613 614 return KXCJK1013_MAX_STARTUP_TIME_US; 615 } 616 #endif 617 618 static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on) 619 { 620 #ifdef CONFIG_PM 621 int ret; 622 623 if (on) 624 ret = pm_runtime_resume_and_get(&data->client->dev); 625 else { 626 pm_runtime_mark_last_busy(&data->client->dev); 627 ret = pm_runtime_put_autosuspend(&data->client->dev); 628 } 629 if (ret < 0) { 630 dev_err(&data->client->dev, 631 "Failed: %s for %d\n", __func__, on); 632 return ret; 633 } 634 #endif 635 636 return 0; 637 } 638 639 static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data) 640 { 641 int ret; 642 643 ret = i2c_smbus_write_byte_data(data->client, data->regs->wake_timer, 644 data->wake_dur); 645 if (ret < 0) { 646 dev_err(&data->client->dev, 647 "Error writing reg_wake_timer\n"); 648 return ret; 649 } 650 651 ret = i2c_smbus_write_byte_data(data->client, data->regs->wake_thres, 652 data->wake_thres); 653 if (ret < 0) { 654 dev_err(&data->client->dev, "Error writing reg_wake_thres\n"); 655 return ret; 656 } 657 658 return 0; 659 } 660 661 static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data, 662 bool status) 663 { 664 int ret; 665 enum kxcjk1013_mode store_mode; 666 667 ret = kxcjk1013_get_mode(data, &store_mode); 668 if (ret < 0) 669 return ret; 670 671 /* This is requirement by spec to change state to STANDBY */ 672 ret = kxcjk1013_set_mode(data, STANDBY); 673 if (ret < 0) 674 return ret; 675 676 ret = kxcjk1013_chip_update_thresholds(data); 677 if (ret < 0) 678 return ret; 679 680 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1); 681 if (ret < 0) { 682 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 683 return ret; 684 } 685 686 if (status) 687 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN; 688 else 689 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN; 690 691 ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret); 692 if (ret < 0) { 693 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 694 return ret; 695 } 696 697 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 698 if (ret < 0) { 699 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 700 return ret; 701 } 702 703 if (status) 704 ret |= KXCJK1013_REG_CTRL1_BIT_WUFE; 705 else 706 ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE; 707 708 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 709 if (ret < 0) { 710 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 711 return ret; 712 } 713 714 if (store_mode == OPERATION) { 715 ret = kxcjk1013_set_mode(data, OPERATION); 716 if (ret < 0) 717 return ret; 718 } 719 720 return 0; 721 } 722 723 static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data, 724 bool status) 725 { 726 int ret; 727 enum kxcjk1013_mode store_mode; 728 729 ret = kxcjk1013_get_mode(data, &store_mode); 730 if (ret < 0) 731 return ret; 732 733 /* This is requirement by spec to change state to STANDBY */ 734 ret = kxcjk1013_set_mode(data, STANDBY); 735 if (ret < 0) 736 return ret; 737 738 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1); 739 if (ret < 0) { 740 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 741 return ret; 742 } 743 744 if (status) 745 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN; 746 else 747 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN; 748 749 ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret); 750 if (ret < 0) { 751 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 752 return ret; 753 } 754 755 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 756 if (ret < 0) { 757 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 758 return ret; 759 } 760 761 if (status) 762 ret |= KXCJK1013_REG_CTRL1_BIT_DRDY; 763 else 764 ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY; 765 766 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 767 if (ret < 0) { 768 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 769 return ret; 770 } 771 772 if (store_mode == OPERATION) { 773 ret = kxcjk1013_set_mode(data, OPERATION); 774 if (ret < 0) 775 return ret; 776 } 777 778 return 0; 779 } 780 781 static const struct kx_odr_map *kxcjk1013_find_odr_value( 782 const struct kx_odr_map *map, size_t map_size, int val, int val2) 783 { 784 int i; 785 786 for (i = 0; i < map_size; ++i) { 787 if (map[i].val == val && map[i].val2 == val2) 788 return &map[i]; 789 } 790 791 return ERR_PTR(-EINVAL); 792 } 793 794 static int kxcjk1013_convert_odr_value(const struct kx_odr_map *map, 795 size_t map_size, int odr_bits, 796 int *val, int *val2) 797 { 798 int i; 799 800 for (i = 0; i < map_size; ++i) { 801 if (map[i].odr_bits == odr_bits) { 802 *val = map[i].val; 803 *val2 = map[i].val2; 804 return IIO_VAL_INT_PLUS_MICRO; 805 } 806 } 807 808 return -EINVAL; 809 } 810 811 static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2) 812 { 813 int ret; 814 enum kxcjk1013_mode store_mode; 815 const struct kx_odr_map *odr_setting; 816 817 ret = kxcjk1013_get_mode(data, &store_mode); 818 if (ret < 0) 819 return ret; 820 821 if (data->chipset == KXTF9) 822 odr_setting = kxcjk1013_find_odr_value(kxtf9_samp_freq_table, 823 ARRAY_SIZE(kxtf9_samp_freq_table), 824 val, val2); 825 else 826 odr_setting = kxcjk1013_find_odr_value(samp_freq_table, 827 ARRAY_SIZE(samp_freq_table), 828 val, val2); 829 830 if (IS_ERR(odr_setting)) 831 return PTR_ERR(odr_setting); 832 833 /* To change ODR, the chip must be set to STANDBY as per spec */ 834 ret = kxcjk1013_set_mode(data, STANDBY); 835 if (ret < 0) 836 return ret; 837 838 ret = i2c_smbus_write_byte_data(data->client, data->regs->data_ctrl, 839 odr_setting->odr_bits); 840 if (ret < 0) { 841 dev_err(&data->client->dev, "Error writing data_ctrl\n"); 842 return ret; 843 } 844 845 data->odr_bits = odr_setting->odr_bits; 846 847 ret = i2c_smbus_write_byte_data(data->client, data->regs->wuf_ctrl, 848 odr_setting->wuf_bits); 849 if (ret < 0) { 850 dev_err(&data->client->dev, "Error writing reg_ctrl2\n"); 851 return ret; 852 } 853 854 if (store_mode == OPERATION) { 855 ret = kxcjk1013_set_mode(data, OPERATION); 856 if (ret < 0) 857 return ret; 858 } 859 860 return 0; 861 } 862 863 static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2) 864 { 865 if (data->chipset == KXTF9) 866 return kxcjk1013_convert_odr_value(kxtf9_samp_freq_table, 867 ARRAY_SIZE(kxtf9_samp_freq_table), 868 data->odr_bits, val, val2); 869 else 870 return kxcjk1013_convert_odr_value(samp_freq_table, 871 ARRAY_SIZE(samp_freq_table), 872 data->odr_bits, val, val2); 873 } 874 875 static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis) 876 { 877 u8 reg = KXCJK1013_REG_XOUT_L + axis * 2; 878 int ret; 879 880 ret = i2c_smbus_read_word_data(data->client, reg); 881 if (ret < 0) { 882 dev_err(&data->client->dev, 883 "failed to read accel_%c registers\n", 'x' + axis); 884 return ret; 885 } 886 887 return ret; 888 } 889 890 static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val) 891 { 892 int ret, i; 893 enum kxcjk1013_mode store_mode; 894 895 for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) { 896 if (KXCJK1013_scale_table[i].scale == val) { 897 ret = kxcjk1013_get_mode(data, &store_mode); 898 if (ret < 0) 899 return ret; 900 901 ret = kxcjk1013_set_mode(data, STANDBY); 902 if (ret < 0) 903 return ret; 904 905 ret = kxcjk1013_set_range(data, i); 906 if (ret < 0) 907 return ret; 908 909 if (store_mode == OPERATION) { 910 ret = kxcjk1013_set_mode(data, OPERATION); 911 if (ret) 912 return ret; 913 } 914 915 return 0; 916 } 917 } 918 919 return -EINVAL; 920 } 921 922 static int kxcjk1013_read_raw(struct iio_dev *indio_dev, 923 struct iio_chan_spec const *chan, int *val, 924 int *val2, long mask) 925 { 926 struct kxcjk1013_data *data = iio_priv(indio_dev); 927 int ret; 928 929 switch (mask) { 930 case IIO_CHAN_INFO_RAW: 931 mutex_lock(&data->mutex); 932 if (iio_buffer_enabled(indio_dev)) 933 ret = -EBUSY; 934 else { 935 ret = kxcjk1013_set_power_state(data, true); 936 if (ret < 0) { 937 mutex_unlock(&data->mutex); 938 return ret; 939 } 940 ret = kxcjk1013_get_acc_reg(data, chan->scan_index); 941 if (ret < 0) { 942 kxcjk1013_set_power_state(data, false); 943 mutex_unlock(&data->mutex); 944 return ret; 945 } 946 *val = sign_extend32(ret >> chan->scan_type.shift, 947 chan->scan_type.realbits - 1); 948 ret = kxcjk1013_set_power_state(data, false); 949 } 950 mutex_unlock(&data->mutex); 951 952 if (ret < 0) 953 return ret; 954 955 return IIO_VAL_INT; 956 957 case IIO_CHAN_INFO_SCALE: 958 *val = 0; 959 *val2 = KXCJK1013_scale_table[data->range].scale; 960 return IIO_VAL_INT_PLUS_MICRO; 961 962 case IIO_CHAN_INFO_SAMP_FREQ: 963 mutex_lock(&data->mutex); 964 ret = kxcjk1013_get_odr(data, val, val2); 965 mutex_unlock(&data->mutex); 966 return ret; 967 968 default: 969 return -EINVAL; 970 } 971 } 972 973 static int kxcjk1013_write_raw(struct iio_dev *indio_dev, 974 struct iio_chan_spec const *chan, int val, 975 int val2, long mask) 976 { 977 struct kxcjk1013_data *data = iio_priv(indio_dev); 978 int ret; 979 980 switch (mask) { 981 case IIO_CHAN_INFO_SAMP_FREQ: 982 mutex_lock(&data->mutex); 983 ret = kxcjk1013_set_odr(data, val, val2); 984 mutex_unlock(&data->mutex); 985 break; 986 case IIO_CHAN_INFO_SCALE: 987 if (val) 988 return -EINVAL; 989 990 mutex_lock(&data->mutex); 991 ret = kxcjk1013_set_scale(data, val2); 992 mutex_unlock(&data->mutex); 993 break; 994 default: 995 ret = -EINVAL; 996 } 997 998 return ret; 999 } 1000 1001 static int kxcjk1013_read_event(struct iio_dev *indio_dev, 1002 const struct iio_chan_spec *chan, 1003 enum iio_event_type type, 1004 enum iio_event_direction dir, 1005 enum iio_event_info info, 1006 int *val, int *val2) 1007 { 1008 struct kxcjk1013_data *data = iio_priv(indio_dev); 1009 1010 *val2 = 0; 1011 switch (info) { 1012 case IIO_EV_INFO_VALUE: 1013 *val = data->wake_thres; 1014 break; 1015 case IIO_EV_INFO_PERIOD: 1016 *val = data->wake_dur; 1017 break; 1018 default: 1019 return -EINVAL; 1020 } 1021 1022 return IIO_VAL_INT; 1023 } 1024 1025 static int kxcjk1013_write_event(struct iio_dev *indio_dev, 1026 const struct iio_chan_spec *chan, 1027 enum iio_event_type type, 1028 enum iio_event_direction dir, 1029 enum iio_event_info info, 1030 int val, int val2) 1031 { 1032 struct kxcjk1013_data *data = iio_priv(indio_dev); 1033 1034 if (data->ev_enable_state) 1035 return -EBUSY; 1036 1037 switch (info) { 1038 case IIO_EV_INFO_VALUE: 1039 data->wake_thres = val; 1040 break; 1041 case IIO_EV_INFO_PERIOD: 1042 data->wake_dur = val; 1043 break; 1044 default: 1045 return -EINVAL; 1046 } 1047 1048 return 0; 1049 } 1050 1051 static int kxcjk1013_read_event_config(struct iio_dev *indio_dev, 1052 const struct iio_chan_spec *chan, 1053 enum iio_event_type type, 1054 enum iio_event_direction dir) 1055 { 1056 struct kxcjk1013_data *data = iio_priv(indio_dev); 1057 1058 return data->ev_enable_state; 1059 } 1060 1061 static int kxcjk1013_write_event_config(struct iio_dev *indio_dev, 1062 const struct iio_chan_spec *chan, 1063 enum iio_event_type type, 1064 enum iio_event_direction dir, 1065 int state) 1066 { 1067 struct kxcjk1013_data *data = iio_priv(indio_dev); 1068 int ret; 1069 1070 if (state && data->ev_enable_state) 1071 return 0; 1072 1073 mutex_lock(&data->mutex); 1074 1075 if (!state && data->motion_trigger_on) { 1076 data->ev_enable_state = 0; 1077 mutex_unlock(&data->mutex); 1078 return 0; 1079 } 1080 1081 /* 1082 * We will expect the enable and disable to do operation in 1083 * reverse order. This will happen here anyway as our 1084 * resume operation uses sync mode runtime pm calls, the 1085 * suspend operation will be delayed by autosuspend delay 1086 * So the disable operation will still happen in reverse of 1087 * enable operation. When runtime pm is disabled the mode 1088 * is always on so sequence doesn't matter 1089 */ 1090 ret = kxcjk1013_set_power_state(data, state); 1091 if (ret < 0) { 1092 mutex_unlock(&data->mutex); 1093 return ret; 1094 } 1095 1096 ret = kxcjk1013_setup_any_motion_interrupt(data, state); 1097 if (ret < 0) { 1098 kxcjk1013_set_power_state(data, false); 1099 data->ev_enable_state = 0; 1100 mutex_unlock(&data->mutex); 1101 return ret; 1102 } 1103 1104 data->ev_enable_state = state; 1105 mutex_unlock(&data->mutex); 1106 1107 return 0; 1108 } 1109 1110 static int kxcjk1013_buffer_preenable(struct iio_dev *indio_dev) 1111 { 1112 struct kxcjk1013_data *data = iio_priv(indio_dev); 1113 1114 return kxcjk1013_set_power_state(data, true); 1115 } 1116 1117 static int kxcjk1013_buffer_postdisable(struct iio_dev *indio_dev) 1118 { 1119 struct kxcjk1013_data *data = iio_priv(indio_dev); 1120 1121 return kxcjk1013_set_power_state(data, false); 1122 } 1123 1124 static ssize_t kxcjk1013_get_samp_freq_avail(struct device *dev, 1125 struct device_attribute *attr, 1126 char *buf) 1127 { 1128 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 1129 struct kxcjk1013_data *data = iio_priv(indio_dev); 1130 const char *str; 1131 1132 if (data->chipset == KXTF9) 1133 str = kxtf9_samp_freq_avail; 1134 else 1135 str = kxcjk1013_samp_freq_avail; 1136 1137 return sprintf(buf, "%s\n", str); 1138 } 1139 1140 static IIO_DEVICE_ATTR(in_accel_sampling_frequency_available, S_IRUGO, 1141 kxcjk1013_get_samp_freq_avail, NULL, 0); 1142 1143 static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326"); 1144 1145 static struct attribute *kxcjk1013_attributes[] = { 1146 &iio_dev_attr_in_accel_sampling_frequency_available.dev_attr.attr, 1147 &iio_const_attr_in_accel_scale_available.dev_attr.attr, 1148 NULL, 1149 }; 1150 1151 static const struct attribute_group kxcjk1013_attrs_group = { 1152 .attrs = kxcjk1013_attributes, 1153 }; 1154 1155 static const struct iio_event_spec kxcjk1013_event = { 1156 .type = IIO_EV_TYPE_THRESH, 1157 .dir = IIO_EV_DIR_EITHER, 1158 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 1159 BIT(IIO_EV_INFO_ENABLE) | 1160 BIT(IIO_EV_INFO_PERIOD) 1161 }; 1162 1163 static const struct iio_mount_matrix * 1164 kxcjk1013_get_mount_matrix(const struct iio_dev *indio_dev, 1165 const struct iio_chan_spec *chan) 1166 { 1167 struct kxcjk1013_data *data = iio_priv(indio_dev); 1168 1169 return &data->orientation; 1170 } 1171 1172 static const struct iio_chan_spec_ext_info kxcjk1013_ext_info[] = { 1173 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, kxcjk1013_get_mount_matrix), 1174 { } 1175 }; 1176 1177 #define KXCJK1013_CHANNEL(_axis) { \ 1178 .type = IIO_ACCEL, \ 1179 .modified = 1, \ 1180 .channel2 = IIO_MOD_##_axis, \ 1181 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 1182 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 1183 BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 1184 .scan_index = AXIS_##_axis, \ 1185 .scan_type = { \ 1186 .sign = 's', \ 1187 .realbits = 12, \ 1188 .storagebits = 16, \ 1189 .shift = 4, \ 1190 .endianness = IIO_LE, \ 1191 }, \ 1192 .event_spec = &kxcjk1013_event, \ 1193 .ext_info = kxcjk1013_ext_info, \ 1194 .num_event_specs = 1 \ 1195 } 1196 1197 static const struct iio_chan_spec kxcjk1013_channels[] = { 1198 KXCJK1013_CHANNEL(X), 1199 KXCJK1013_CHANNEL(Y), 1200 KXCJK1013_CHANNEL(Z), 1201 IIO_CHAN_SOFT_TIMESTAMP(3), 1202 }; 1203 1204 static const struct iio_buffer_setup_ops kxcjk1013_buffer_setup_ops = { 1205 .preenable = kxcjk1013_buffer_preenable, 1206 .postdisable = kxcjk1013_buffer_postdisable, 1207 }; 1208 1209 static const struct iio_info kxcjk1013_info = { 1210 .attrs = &kxcjk1013_attrs_group, 1211 .read_raw = kxcjk1013_read_raw, 1212 .write_raw = kxcjk1013_write_raw, 1213 .read_event_value = kxcjk1013_read_event, 1214 .write_event_value = kxcjk1013_write_event, 1215 .write_event_config = kxcjk1013_write_event_config, 1216 .read_event_config = kxcjk1013_read_event_config, 1217 }; 1218 1219 static const unsigned long kxcjk1013_scan_masks[] = {0x7, 0}; 1220 1221 static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p) 1222 { 1223 struct iio_poll_func *pf = p; 1224 struct iio_dev *indio_dev = pf->indio_dev; 1225 struct kxcjk1013_data *data = iio_priv(indio_dev); 1226 int ret; 1227 1228 mutex_lock(&data->mutex); 1229 ret = i2c_smbus_read_i2c_block_data_or_emulated(data->client, 1230 KXCJK1013_REG_XOUT_L, 1231 AXIS_MAX * 2, 1232 (u8 *)data->scan.chans); 1233 mutex_unlock(&data->mutex); 1234 if (ret < 0) 1235 goto err; 1236 1237 iio_push_to_buffers_with_timestamp(indio_dev, &data->scan, 1238 data->timestamp); 1239 err: 1240 iio_trigger_notify_done(indio_dev->trig); 1241 1242 return IRQ_HANDLED; 1243 } 1244 1245 static void kxcjk1013_trig_reen(struct iio_trigger *trig) 1246 { 1247 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 1248 struct kxcjk1013_data *data = iio_priv(indio_dev); 1249 int ret; 1250 1251 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_rel); 1252 if (ret < 0) 1253 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 1254 } 1255 1256 static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig, 1257 bool state) 1258 { 1259 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 1260 struct kxcjk1013_data *data = iio_priv(indio_dev); 1261 int ret; 1262 1263 mutex_lock(&data->mutex); 1264 1265 if (!state && data->ev_enable_state && data->motion_trigger_on) { 1266 data->motion_trigger_on = false; 1267 mutex_unlock(&data->mutex); 1268 return 0; 1269 } 1270 1271 ret = kxcjk1013_set_power_state(data, state); 1272 if (ret < 0) { 1273 mutex_unlock(&data->mutex); 1274 return ret; 1275 } 1276 if (data->motion_trig == trig) 1277 ret = kxcjk1013_setup_any_motion_interrupt(data, state); 1278 else 1279 ret = kxcjk1013_setup_new_data_interrupt(data, state); 1280 if (ret < 0) { 1281 kxcjk1013_set_power_state(data, false); 1282 mutex_unlock(&data->mutex); 1283 return ret; 1284 } 1285 if (data->motion_trig == trig) 1286 data->motion_trigger_on = state; 1287 else 1288 data->dready_trigger_on = state; 1289 1290 mutex_unlock(&data->mutex); 1291 1292 return 0; 1293 } 1294 1295 static const struct iio_trigger_ops kxcjk1013_trigger_ops = { 1296 .set_trigger_state = kxcjk1013_data_rdy_trigger_set_state, 1297 .reenable = kxcjk1013_trig_reen, 1298 }; 1299 1300 static void kxcjk1013_report_motion_event(struct iio_dev *indio_dev) 1301 { 1302 struct kxcjk1013_data *data = iio_priv(indio_dev); 1303 1304 int ret = i2c_smbus_read_byte_data(data->client, data->regs->int_src2); 1305 if (ret < 0) { 1306 dev_err(&data->client->dev, "Error reading reg_int_src2\n"); 1307 return; 1308 } 1309 1310 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN) 1311 iio_push_event(indio_dev, 1312 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1313 0, 1314 IIO_MOD_X, 1315 IIO_EV_TYPE_THRESH, 1316 IIO_EV_DIR_FALLING), 1317 data->timestamp); 1318 1319 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP) 1320 iio_push_event(indio_dev, 1321 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1322 0, 1323 IIO_MOD_X, 1324 IIO_EV_TYPE_THRESH, 1325 IIO_EV_DIR_RISING), 1326 data->timestamp); 1327 1328 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN) 1329 iio_push_event(indio_dev, 1330 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1331 0, 1332 IIO_MOD_Y, 1333 IIO_EV_TYPE_THRESH, 1334 IIO_EV_DIR_FALLING), 1335 data->timestamp); 1336 1337 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP) 1338 iio_push_event(indio_dev, 1339 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1340 0, 1341 IIO_MOD_Y, 1342 IIO_EV_TYPE_THRESH, 1343 IIO_EV_DIR_RISING), 1344 data->timestamp); 1345 1346 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN) 1347 iio_push_event(indio_dev, 1348 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1349 0, 1350 IIO_MOD_Z, 1351 IIO_EV_TYPE_THRESH, 1352 IIO_EV_DIR_FALLING), 1353 data->timestamp); 1354 1355 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP) 1356 iio_push_event(indio_dev, 1357 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1358 0, 1359 IIO_MOD_Z, 1360 IIO_EV_TYPE_THRESH, 1361 IIO_EV_DIR_RISING), 1362 data->timestamp); 1363 } 1364 1365 static irqreturn_t kxcjk1013_event_handler(int irq, void *private) 1366 { 1367 struct iio_dev *indio_dev = private; 1368 struct kxcjk1013_data *data = iio_priv(indio_dev); 1369 int ret; 1370 1371 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_src1); 1372 if (ret < 0) { 1373 dev_err(&data->client->dev, "Error reading reg_int_src1\n"); 1374 goto ack_intr; 1375 } 1376 1377 if (ret & KXCJK1013_REG_INT_SRC1_BIT_WUFS) { 1378 if (data->chipset == KXTF9) 1379 iio_push_event(indio_dev, 1380 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1381 0, 1382 IIO_MOD_X_AND_Y_AND_Z, 1383 IIO_EV_TYPE_THRESH, 1384 IIO_EV_DIR_RISING), 1385 data->timestamp); 1386 else 1387 kxcjk1013_report_motion_event(indio_dev); 1388 } 1389 1390 ack_intr: 1391 if (data->dready_trigger_on) 1392 return IRQ_HANDLED; 1393 1394 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_rel); 1395 if (ret < 0) 1396 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 1397 1398 return IRQ_HANDLED; 1399 } 1400 1401 static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private) 1402 { 1403 struct iio_dev *indio_dev = private; 1404 struct kxcjk1013_data *data = iio_priv(indio_dev); 1405 1406 data->timestamp = iio_get_time_ns(indio_dev); 1407 1408 if (data->dready_trigger_on) 1409 iio_trigger_poll(data->dready_trig); 1410 else if (data->motion_trigger_on) 1411 iio_trigger_poll(data->motion_trig); 1412 1413 if (data->ev_enable_state) 1414 return IRQ_WAKE_THREAD; 1415 else 1416 return IRQ_HANDLED; 1417 } 1418 1419 static const char *kxcjk1013_match_acpi_device(struct device *dev, 1420 enum kx_chipset *chipset, 1421 enum kx_acpi_type *acpi_type, 1422 const char **label) 1423 { 1424 const struct acpi_device_id *id; 1425 1426 id = acpi_match_device(dev->driver->acpi_match_table, dev); 1427 if (!id) 1428 return NULL; 1429 1430 if (strcmp(id->id, "SMO8500") == 0) { 1431 *acpi_type = ACPI_SMO8500; 1432 } else if (strcmp(id->id, "KIOX010A") == 0) { 1433 *acpi_type = ACPI_KIOX010A; 1434 *label = "accel-display"; 1435 } else if (strcmp(id->id, "KIOX020A") == 0) { 1436 *label = "accel-base"; 1437 } 1438 1439 *chipset = (enum kx_chipset)id->driver_data; 1440 1441 return dev_name(dev); 1442 } 1443 1444 static int kxcjk1013_probe(struct i2c_client *client) 1445 { 1446 const struct i2c_device_id *id = i2c_client_get_device_id(client); 1447 static const char * const regulator_names[] = { "vdd", "vddio" }; 1448 struct kxcjk1013_data *data; 1449 struct iio_dev *indio_dev; 1450 struct kxcjk_1013_platform_data *pdata; 1451 const char *name; 1452 int ret; 1453 1454 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 1455 if (!indio_dev) 1456 return -ENOMEM; 1457 1458 data = iio_priv(indio_dev); 1459 i2c_set_clientdata(client, indio_dev); 1460 data->client = client; 1461 1462 pdata = dev_get_platdata(&client->dev); 1463 if (pdata) { 1464 data->active_high_intr = pdata->active_high_intr; 1465 data->orientation = pdata->orientation; 1466 } else { 1467 data->active_high_intr = true; /* default polarity */ 1468 1469 if (!iio_read_acpi_mount_matrix(&client->dev, &data->orientation, "ROTM")) { 1470 ret = iio_read_mount_matrix(&client->dev, &data->orientation); 1471 if (ret) 1472 return ret; 1473 } 1474 1475 } 1476 1477 ret = devm_regulator_bulk_get_enable(&client->dev, 1478 ARRAY_SIZE(regulator_names), 1479 regulator_names); 1480 if (ret) 1481 return dev_err_probe(&client->dev, ret, "Failed to get regulators\n"); 1482 1483 /* 1484 * A typical delay of 10ms is required for powering up 1485 * according to the data sheets of supported chips. 1486 * Hence double that to play safe. 1487 */ 1488 msleep(20); 1489 1490 if (id) { 1491 data->chipset = (enum kx_chipset)(id->driver_data); 1492 name = id->name; 1493 } else if (ACPI_HANDLE(&client->dev)) { 1494 name = kxcjk1013_match_acpi_device(&client->dev, 1495 &data->chipset, 1496 &data->acpi_type, 1497 &indio_dev->label); 1498 } else 1499 return -ENODEV; 1500 1501 switch (data->chipset) { 1502 case KXCJK1013: 1503 case KXCJ91008: 1504 case KXTJ21009: 1505 data->regs = &kxcjk1013_regs; 1506 break; 1507 case KXTF9: 1508 data->regs = &kxtf9_regs; 1509 break; 1510 case KX0231025: 1511 data->regs = &kx0231025_regs; 1512 break; 1513 default: 1514 return -EINVAL; 1515 } 1516 1517 ret = kxcjk1013_chip_init(data); 1518 if (ret < 0) 1519 return ret; 1520 1521 mutex_init(&data->mutex); 1522 1523 indio_dev->channels = kxcjk1013_channels; 1524 indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels); 1525 indio_dev->available_scan_masks = kxcjk1013_scan_masks; 1526 indio_dev->name = name; 1527 indio_dev->modes = INDIO_DIRECT_MODE; 1528 indio_dev->info = &kxcjk1013_info; 1529 1530 if (client->irq > 0 && data->acpi_type != ACPI_SMO8500) { 1531 ret = devm_request_threaded_irq(&client->dev, client->irq, 1532 kxcjk1013_data_rdy_trig_poll, 1533 kxcjk1013_event_handler, 1534 IRQF_TRIGGER_RISING, 1535 KXCJK1013_IRQ_NAME, 1536 indio_dev); 1537 if (ret) 1538 goto err_poweroff; 1539 1540 data->dready_trig = devm_iio_trigger_alloc(&client->dev, 1541 "%s-dev%d", 1542 indio_dev->name, 1543 iio_device_id(indio_dev)); 1544 if (!data->dready_trig) { 1545 ret = -ENOMEM; 1546 goto err_poweroff; 1547 } 1548 1549 data->motion_trig = devm_iio_trigger_alloc(&client->dev, 1550 "%s-any-motion-dev%d", 1551 indio_dev->name, 1552 iio_device_id(indio_dev)); 1553 if (!data->motion_trig) { 1554 ret = -ENOMEM; 1555 goto err_poweroff; 1556 } 1557 1558 data->dready_trig->ops = &kxcjk1013_trigger_ops; 1559 iio_trigger_set_drvdata(data->dready_trig, indio_dev); 1560 ret = iio_trigger_register(data->dready_trig); 1561 if (ret) 1562 goto err_poweroff; 1563 1564 indio_dev->trig = iio_trigger_get(data->dready_trig); 1565 1566 data->motion_trig->ops = &kxcjk1013_trigger_ops; 1567 iio_trigger_set_drvdata(data->motion_trig, indio_dev); 1568 ret = iio_trigger_register(data->motion_trig); 1569 if (ret) { 1570 data->motion_trig = NULL; 1571 goto err_trigger_unregister; 1572 } 1573 } 1574 1575 ret = iio_triggered_buffer_setup(indio_dev, 1576 &iio_pollfunc_store_time, 1577 kxcjk1013_trigger_handler, 1578 &kxcjk1013_buffer_setup_ops); 1579 if (ret < 0) { 1580 dev_err(&client->dev, "iio triggered buffer setup failed\n"); 1581 goto err_trigger_unregister; 1582 } 1583 1584 ret = pm_runtime_set_active(&client->dev); 1585 if (ret) 1586 goto err_buffer_cleanup; 1587 1588 pm_runtime_enable(&client->dev); 1589 pm_runtime_set_autosuspend_delay(&client->dev, 1590 KXCJK1013_SLEEP_DELAY_MS); 1591 pm_runtime_use_autosuspend(&client->dev); 1592 1593 ret = iio_device_register(indio_dev); 1594 if (ret < 0) { 1595 dev_err(&client->dev, "unable to register iio device\n"); 1596 goto err_pm_cleanup; 1597 } 1598 1599 return 0; 1600 1601 err_pm_cleanup: 1602 pm_runtime_dont_use_autosuspend(&client->dev); 1603 pm_runtime_disable(&client->dev); 1604 err_buffer_cleanup: 1605 iio_triggered_buffer_cleanup(indio_dev); 1606 err_trigger_unregister: 1607 if (data->dready_trig) 1608 iio_trigger_unregister(data->dready_trig); 1609 if (data->motion_trig) 1610 iio_trigger_unregister(data->motion_trig); 1611 err_poweroff: 1612 kxcjk1013_set_mode(data, STANDBY); 1613 1614 return ret; 1615 } 1616 1617 static void kxcjk1013_remove(struct i2c_client *client) 1618 { 1619 struct iio_dev *indio_dev = i2c_get_clientdata(client); 1620 struct kxcjk1013_data *data = iio_priv(indio_dev); 1621 1622 iio_device_unregister(indio_dev); 1623 1624 pm_runtime_disable(&client->dev); 1625 pm_runtime_set_suspended(&client->dev); 1626 1627 iio_triggered_buffer_cleanup(indio_dev); 1628 if (data->dready_trig) { 1629 iio_trigger_unregister(data->dready_trig); 1630 iio_trigger_unregister(data->motion_trig); 1631 } 1632 1633 mutex_lock(&data->mutex); 1634 kxcjk1013_set_mode(data, STANDBY); 1635 mutex_unlock(&data->mutex); 1636 } 1637 1638 #ifdef CONFIG_PM_SLEEP 1639 static int kxcjk1013_suspend(struct device *dev) 1640 { 1641 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1642 struct kxcjk1013_data *data = iio_priv(indio_dev); 1643 int ret; 1644 1645 mutex_lock(&data->mutex); 1646 ret = kxcjk1013_set_mode(data, STANDBY); 1647 mutex_unlock(&data->mutex); 1648 1649 return ret; 1650 } 1651 1652 static int kxcjk1013_resume(struct device *dev) 1653 { 1654 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1655 struct kxcjk1013_data *data = iio_priv(indio_dev); 1656 int ret = 0; 1657 1658 mutex_lock(&data->mutex); 1659 ret = kxcjk1013_set_mode(data, OPERATION); 1660 if (ret == 0) 1661 ret = kxcjk1013_set_range(data, data->range); 1662 mutex_unlock(&data->mutex); 1663 1664 return ret; 1665 } 1666 #endif 1667 1668 #ifdef CONFIG_PM 1669 static int kxcjk1013_runtime_suspend(struct device *dev) 1670 { 1671 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1672 struct kxcjk1013_data *data = iio_priv(indio_dev); 1673 int ret; 1674 1675 ret = kxcjk1013_set_mode(data, STANDBY); 1676 if (ret < 0) { 1677 dev_err(&data->client->dev, "powering off device failed\n"); 1678 return -EAGAIN; 1679 } 1680 return 0; 1681 } 1682 1683 static int kxcjk1013_runtime_resume(struct device *dev) 1684 { 1685 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1686 struct kxcjk1013_data *data = iio_priv(indio_dev); 1687 int ret; 1688 int sleep_val; 1689 1690 ret = kxcjk1013_set_mode(data, OPERATION); 1691 if (ret < 0) 1692 return ret; 1693 1694 sleep_val = kxcjk1013_get_startup_times(data); 1695 if (sleep_val < 20000) 1696 usleep_range(sleep_val, 20000); 1697 else 1698 msleep_interruptible(sleep_val/1000); 1699 1700 return 0; 1701 } 1702 #endif 1703 1704 static const struct dev_pm_ops kxcjk1013_pm_ops = { 1705 SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume) 1706 SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend, 1707 kxcjk1013_runtime_resume, NULL) 1708 }; 1709 1710 static const struct i2c_device_id kxcjk1013_id[] = { 1711 {"kxcjk1013", KXCJK1013}, 1712 {"kxcj91008", KXCJ91008}, 1713 {"kxtj21009", KXTJ21009}, 1714 {"kxtf9", KXTF9}, 1715 {"kx023-1025", KX0231025}, 1716 {"SMO8500", KXCJ91008}, 1717 {} 1718 }; 1719 1720 MODULE_DEVICE_TABLE(i2c, kxcjk1013_id); 1721 1722 static const struct of_device_id kxcjk1013_of_match[] = { 1723 { .compatible = "kionix,kxcjk1013", }, 1724 { .compatible = "kionix,kxcj91008", }, 1725 { .compatible = "kionix,kxtj21009", }, 1726 { .compatible = "kionix,kxtf9", }, 1727 { .compatible = "kionix,kx023-1025", }, 1728 { } 1729 }; 1730 MODULE_DEVICE_TABLE(of, kxcjk1013_of_match); 1731 1732 static struct i2c_driver kxcjk1013_driver = { 1733 .driver = { 1734 .name = KXCJK1013_DRV_NAME, 1735 .acpi_match_table = ACPI_PTR(kx_acpi_match), 1736 .of_match_table = kxcjk1013_of_match, 1737 .pm = &kxcjk1013_pm_ops, 1738 }, 1739 .probe = kxcjk1013_probe, 1740 .remove = kxcjk1013_remove, 1741 .id_table = kxcjk1013_id, 1742 }; 1743 module_i2c_driver(kxcjk1013_driver); 1744 1745 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>"); 1746 MODULE_LICENSE("GPL v2"); 1747 MODULE_DESCRIPTION("KXCJK1013 accelerometer driver"); 1748