1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * ADXL313 3-Axis Digital Accelerometer 4 * 5 * Copyright (c) 2021 Lucas Stankus <lucas.p.stankus@gmail.com> 6 * 7 * Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ADXL313.pdf 8 */ 9 10 #include <linux/bitfield.h> 11 #include <linux/interrupt.h> 12 #include <linux/module.h> 13 #include <linux/overflow.h> 14 #include <linux/property.h> 15 #include <linux/regmap.h> 16 #include <linux/units.h> 17 18 #include <linux/iio/buffer.h> 19 #include <linux/iio/events.h> 20 #include <linux/iio/kfifo_buf.h> 21 22 #include "adxl313.h" 23 24 #define ADXL313_INT_NONE U8_MAX 25 #define ADXL313_INT1 1 26 #define ADXL313_INT2 2 27 28 #define ADXL313_REG_XYZ_BASE ADXL313_REG_DATA_AXIS(0) 29 30 #define ADXL313_ACT_XYZ_EN GENMASK(6, 4) 31 #define ADXL313_INACT_XYZ_EN GENMASK(2, 0) 32 33 #define ADXL313_REG_ACT_ACDC_MSK BIT(7) 34 #define ADXL313_REG_INACT_ACDC_MSK BIT(3) 35 #define ADXL313_COUPLING_DC 0 36 #define ADXL313_COUPLING_AC 1 37 38 /* activity/inactivity */ 39 enum adxl313_activity_type { 40 ADXL313_ACTIVITY, 41 ADXL313_INACTIVITY, 42 ADXL313_ACTIVITY_AC, 43 ADXL313_INACTIVITY_AC, 44 }; 45 46 static const unsigned int adxl313_act_int_reg[] = { 47 [ADXL313_ACTIVITY] = ADXL313_INT_ACTIVITY, 48 [ADXL313_INACTIVITY] = ADXL313_INT_INACTIVITY, 49 [ADXL313_ACTIVITY_AC] = ADXL313_INT_ACTIVITY, 50 [ADXL313_INACTIVITY_AC] = ADXL313_INT_INACTIVITY, 51 }; 52 53 static const unsigned int adxl313_act_thresh_reg[] = { 54 [ADXL313_ACTIVITY] = ADXL313_REG_THRESH_ACT, 55 [ADXL313_INACTIVITY] = ADXL313_REG_THRESH_INACT, 56 [ADXL313_ACTIVITY_AC] = ADXL313_REG_THRESH_ACT, 57 [ADXL313_INACTIVITY_AC] = ADXL313_REG_THRESH_INACT, 58 }; 59 60 static const unsigned int adxl313_act_acdc_msk[] = { 61 [ADXL313_ACTIVITY] = ADXL313_REG_ACT_ACDC_MSK, 62 [ADXL313_INACTIVITY] = ADXL313_REG_INACT_ACDC_MSK, 63 [ADXL313_ACTIVITY_AC] = ADXL313_REG_ACT_ACDC_MSK, 64 [ADXL313_INACTIVITY_AC] = ADXL313_REG_INACT_ACDC_MSK, 65 }; 66 67 static const struct regmap_range adxl312_readable_reg_range[] = { 68 regmap_reg_range(ADXL313_REG_DEVID0, ADXL313_REG_DEVID0), 69 regmap_reg_range(ADXL313_REG_OFS_AXIS(0), ADXL313_REG_OFS_AXIS(2)), 70 regmap_reg_range(ADXL313_REG_THRESH_ACT, ADXL313_REG_ACT_INACT_CTL), 71 regmap_reg_range(ADXL313_REG_BW_RATE, ADXL313_REG_FIFO_STATUS), 72 }; 73 74 static const struct regmap_range adxl313_readable_reg_range[] = { 75 regmap_reg_range(ADXL313_REG_DEVID0, ADXL313_REG_XID), 76 regmap_reg_range(ADXL313_REG_SOFT_RESET, ADXL313_REG_SOFT_RESET), 77 regmap_reg_range(ADXL313_REG_OFS_AXIS(0), ADXL313_REG_OFS_AXIS(2)), 78 regmap_reg_range(ADXL313_REG_THRESH_ACT, ADXL313_REG_ACT_INACT_CTL), 79 regmap_reg_range(ADXL313_REG_BW_RATE, ADXL313_REG_FIFO_STATUS), 80 }; 81 82 const struct regmap_access_table adxl312_readable_regs_table = { 83 .yes_ranges = adxl312_readable_reg_range, 84 .n_yes_ranges = ARRAY_SIZE(adxl312_readable_reg_range), 85 }; 86 EXPORT_SYMBOL_NS_GPL(adxl312_readable_regs_table, "IIO_ADXL313"); 87 88 const struct regmap_access_table adxl313_readable_regs_table = { 89 .yes_ranges = adxl313_readable_reg_range, 90 .n_yes_ranges = ARRAY_SIZE(adxl313_readable_reg_range), 91 }; 92 EXPORT_SYMBOL_NS_GPL(adxl313_readable_regs_table, "IIO_ADXL313"); 93 94 const struct regmap_access_table adxl314_readable_regs_table = { 95 .yes_ranges = adxl312_readable_reg_range, 96 .n_yes_ranges = ARRAY_SIZE(adxl312_readable_reg_range), 97 }; 98 EXPORT_SYMBOL_NS_GPL(adxl314_readable_regs_table, "IIO_ADXL313"); 99 100 bool adxl313_is_volatile_reg(struct device *dev, unsigned int reg) 101 { 102 switch (reg) { 103 case ADXL313_REG_DATA_AXIS(0): 104 case ADXL313_REG_DATA_AXIS(1): 105 case ADXL313_REG_DATA_AXIS(2): 106 case ADXL313_REG_DATA_AXIS(3): 107 case ADXL313_REG_DATA_AXIS(4): 108 case ADXL313_REG_DATA_AXIS(5): 109 case ADXL313_REG_FIFO_STATUS: 110 case ADXL313_REG_INT_SOURCE: 111 return true; 112 default: 113 return false; 114 } 115 } 116 EXPORT_SYMBOL_NS_GPL(adxl313_is_volatile_reg, "IIO_ADXL313"); 117 118 static int adxl313_set_measure_en(struct adxl313_data *data, bool en) 119 { 120 return regmap_assign_bits(data->regmap, ADXL313_REG_POWER_CTL, 121 ADXL313_POWER_CTL_MSK, en); 122 } 123 124 static int adxl312_check_id(struct device *dev, 125 struct adxl313_data *data) 126 { 127 unsigned int regval; 128 int ret; 129 130 ret = regmap_read(data->regmap, ADXL313_REG_DEVID0, ®val); 131 if (ret) 132 return ret; 133 134 if (regval != ADXL313_DEVID0_ADXL312_314) 135 dev_warn(dev, "Invalid manufacturer ID: %#02x\n", regval); 136 137 return 0; 138 } 139 140 static int adxl313_check_id(struct device *dev, 141 struct adxl313_data *data) 142 { 143 unsigned int regval; 144 int ret; 145 146 ret = regmap_read(data->regmap, ADXL313_REG_DEVID0, ®val); 147 if (ret) 148 return ret; 149 150 if (regval != ADXL313_DEVID0) 151 dev_warn(dev, "Invalid manufacturer ID: 0x%02x\n", regval); 152 153 /* Check DEVID1 and PARTID */ 154 if (regval == ADXL313_DEVID0) { 155 ret = regmap_read(data->regmap, ADXL313_REG_DEVID1, ®val); 156 if (ret) 157 return ret; 158 159 if (regval != ADXL313_DEVID1) 160 dev_warn(dev, "Invalid mems ID: 0x%02x\n", regval); 161 162 ret = regmap_read(data->regmap, ADXL313_REG_PARTID, ®val); 163 if (ret) 164 return ret; 165 166 if (regval != ADXL313_PARTID) 167 dev_warn(dev, "Invalid device ID: 0x%02x\n", regval); 168 } 169 170 return 0; 171 } 172 173 const struct adxl313_chip_info adxl31x_chip_info[] = { 174 [ADXL312] = { 175 .name = "adxl312", 176 .type = ADXL312, 177 .scale_factor = 28425072, 178 .variable_range = true, 179 .soft_reset = false, 180 .check_id = &adxl312_check_id, 181 }, 182 [ADXL313] = { 183 .name = "adxl313", 184 .type = ADXL313, 185 .scale_factor = 9576806, 186 .variable_range = true, 187 .soft_reset = true, 188 .check_id = &adxl313_check_id, 189 }, 190 [ADXL314] = { 191 .name = "adxl314", 192 .type = ADXL314, 193 .scale_factor = 478858719, 194 .variable_range = false, 195 .soft_reset = false, 196 .check_id = &adxl312_check_id, 197 }, 198 }; 199 EXPORT_SYMBOL_NS_GPL(adxl31x_chip_info, "IIO_ADXL313"); 200 201 static const struct regmap_range adxl312_writable_reg_range[] = { 202 regmap_reg_range(ADXL313_REG_OFS_AXIS(0), ADXL313_REG_OFS_AXIS(2)), 203 regmap_reg_range(ADXL313_REG_THRESH_ACT, ADXL313_REG_ACT_INACT_CTL), 204 regmap_reg_range(ADXL313_REG_BW_RATE, ADXL313_REG_INT_MAP), 205 regmap_reg_range(ADXL313_REG_DATA_FORMAT, ADXL313_REG_DATA_FORMAT), 206 regmap_reg_range(ADXL313_REG_FIFO_CTL, ADXL313_REG_FIFO_CTL), 207 }; 208 209 static const struct regmap_range adxl313_writable_reg_range[] = { 210 regmap_reg_range(ADXL313_REG_SOFT_RESET, ADXL313_REG_SOFT_RESET), 211 regmap_reg_range(ADXL313_REG_OFS_AXIS(0), ADXL313_REG_OFS_AXIS(2)), 212 regmap_reg_range(ADXL313_REG_THRESH_ACT, ADXL313_REG_ACT_INACT_CTL), 213 regmap_reg_range(ADXL313_REG_BW_RATE, ADXL313_REG_INT_MAP), 214 regmap_reg_range(ADXL313_REG_DATA_FORMAT, ADXL313_REG_DATA_FORMAT), 215 regmap_reg_range(ADXL313_REG_FIFO_CTL, ADXL313_REG_FIFO_CTL), 216 }; 217 218 const struct regmap_access_table adxl312_writable_regs_table = { 219 .yes_ranges = adxl312_writable_reg_range, 220 .n_yes_ranges = ARRAY_SIZE(adxl312_writable_reg_range), 221 }; 222 EXPORT_SYMBOL_NS_GPL(adxl312_writable_regs_table, "IIO_ADXL313"); 223 224 const struct regmap_access_table adxl313_writable_regs_table = { 225 .yes_ranges = adxl313_writable_reg_range, 226 .n_yes_ranges = ARRAY_SIZE(adxl313_writable_reg_range), 227 }; 228 EXPORT_SYMBOL_NS_GPL(adxl313_writable_regs_table, "IIO_ADXL313"); 229 230 const struct regmap_access_table adxl314_writable_regs_table = { 231 .yes_ranges = adxl312_writable_reg_range, 232 .n_yes_ranges = ARRAY_SIZE(adxl312_writable_reg_range), 233 }; 234 EXPORT_SYMBOL_NS_GPL(adxl314_writable_regs_table, "IIO_ADXL313"); 235 236 static const int adxl313_odr_freqs[][2] = { 237 [0] = { 6, 250000 }, 238 [1] = { 12, 500000 }, 239 [2] = { 25, 0 }, 240 [3] = { 50, 0 }, 241 [4] = { 100, 0 }, 242 [5] = { 200, 0 }, 243 [6] = { 400, 0 }, 244 [7] = { 800, 0 }, 245 [8] = { 1600, 0 }, 246 [9] = { 3200, 0 }, 247 }; 248 249 #define ADXL313_ACCEL_CHANNEL(index, reg, axis) { \ 250 .type = IIO_ACCEL, \ 251 .scan_index = (index), \ 252 .address = (reg), \ 253 .modified = 1, \ 254 .channel2 = IIO_MOD_##axis, \ 255 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 256 BIT(IIO_CHAN_INFO_CALIBBIAS), \ 257 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 258 BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 259 .info_mask_shared_by_type_available = \ 260 BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 261 .scan_type = { \ 262 .sign = 's', \ 263 .realbits = 13, \ 264 .storagebits = 16, \ 265 .endianness = IIO_BE, \ 266 }, \ 267 } 268 269 static const struct iio_event_spec adxl313_activity_events[] = { 270 { 271 .type = IIO_EV_TYPE_MAG, 272 .dir = IIO_EV_DIR_RISING, 273 .mask_separate = BIT(IIO_EV_INFO_ENABLE), 274 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE), 275 }, 276 { 277 /* activity, AC bit set */ 278 .type = IIO_EV_TYPE_MAG_ADAPTIVE, 279 .dir = IIO_EV_DIR_RISING, 280 .mask_separate = BIT(IIO_EV_INFO_ENABLE), 281 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE), 282 }, 283 }; 284 285 static const struct iio_event_spec adxl313_inactivity_events[] = { 286 { 287 /* inactivity */ 288 .type = IIO_EV_TYPE_MAG, 289 .dir = IIO_EV_DIR_FALLING, 290 .mask_separate = BIT(IIO_EV_INFO_ENABLE), 291 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) | 292 BIT(IIO_EV_INFO_PERIOD), 293 }, 294 { 295 /* inactivity, AC bit set */ 296 .type = IIO_EV_TYPE_MAG_ADAPTIVE, 297 .dir = IIO_EV_DIR_FALLING, 298 .mask_separate = BIT(IIO_EV_INFO_ENABLE), 299 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) | 300 BIT(IIO_EV_INFO_PERIOD), 301 }, 302 }; 303 304 enum adxl313_chans { 305 chan_x, chan_y, chan_z, 306 }; 307 308 static const struct iio_chan_spec adxl313_channels[] = { 309 ADXL313_ACCEL_CHANNEL(0, chan_x, X), 310 ADXL313_ACCEL_CHANNEL(1, chan_y, Y), 311 ADXL313_ACCEL_CHANNEL(2, chan_z, Z), 312 { 313 .type = IIO_ACCEL, 314 .modified = 1, 315 .channel2 = IIO_MOD_X_OR_Y_OR_Z, 316 .scan_index = -1, /* Fake channel for axis OR'ing */ 317 .event_spec = adxl313_activity_events, 318 .num_event_specs = ARRAY_SIZE(adxl313_activity_events), 319 }, 320 { 321 .type = IIO_ACCEL, 322 .modified = 1, 323 .channel2 = IIO_MOD_X_AND_Y_AND_Z, 324 .scan_index = -1, /* Fake channel for axis AND'ing */ 325 .event_spec = adxl313_inactivity_events, 326 .num_event_specs = ARRAY_SIZE(adxl313_inactivity_events), 327 }, 328 }; 329 330 static const unsigned long adxl313_scan_masks[] = { 331 BIT(chan_x) | BIT(chan_y) | BIT(chan_z), 332 0 333 }; 334 335 static int adxl313_set_odr(struct adxl313_data *data, 336 unsigned int freq1, unsigned int freq2) 337 { 338 unsigned int i; 339 340 for (i = 0; i < ARRAY_SIZE(adxl313_odr_freqs); i++) { 341 if (adxl313_odr_freqs[i][0] == freq1 && 342 adxl313_odr_freqs[i][1] == freq2) 343 break; 344 } 345 346 if (i == ARRAY_SIZE(adxl313_odr_freqs)) 347 return -EINVAL; 348 349 return regmap_update_bits(data->regmap, ADXL313_REG_BW_RATE, 350 ADXL313_RATE_MSK, 351 FIELD_PREP(ADXL313_RATE_MSK, ADXL313_RATE_BASE + i)); 352 } 353 354 static int adxl313_read_axis(struct adxl313_data *data, 355 struct iio_chan_spec const *chan) 356 { 357 int ret; 358 359 mutex_lock(&data->lock); 360 361 ret = regmap_bulk_read(data->regmap, 362 ADXL313_REG_DATA_AXIS(chan->address), 363 &data->transf_buf, sizeof(data->transf_buf)); 364 if (ret) 365 goto unlock_ret; 366 367 ret = le16_to_cpu(data->transf_buf); 368 369 unlock_ret: 370 mutex_unlock(&data->lock); 371 return ret; 372 } 373 374 static int adxl313_read_freq_avail(struct iio_dev *indio_dev, 375 struct iio_chan_spec const *chan, 376 const int **vals, int *type, int *length, 377 long mask) 378 { 379 switch (mask) { 380 case IIO_CHAN_INFO_SAMP_FREQ: 381 *vals = (const int *)adxl313_odr_freqs; 382 *length = ARRAY_SIZE(adxl313_odr_freqs) * 2; 383 *type = IIO_VAL_INT_PLUS_MICRO; 384 return IIO_AVAIL_LIST; 385 default: 386 return -EINVAL; 387 } 388 } 389 390 static int adxl313_set_inact_time_s(struct adxl313_data *data, 391 unsigned int val_s) 392 { 393 unsigned int max_boundary = U8_MAX; /* by register size */ 394 unsigned int val = min(val_s, max_boundary); 395 396 return regmap_write(data->regmap, ADXL313_REG_TIME_INACT, val); 397 } 398 399 /** 400 * adxl313_is_act_inact_ac() - Check if AC coupling is enabled. 401 * @data: The device data. 402 * @type: The activity or inactivity type. 403 * 404 * Provide a type of activity or inactivity, combined with either AC coupling 405 * set, or default to DC coupling. This function verifies if the combination is 406 * currently enabled or not. 407 * 408 * Return: if the provided activity type has AC coupling enabled or a negative 409 * error value. 410 */ 411 static int adxl313_is_act_inact_ac(struct adxl313_data *data, 412 enum adxl313_activity_type type) 413 { 414 unsigned int regval; 415 bool coupling; 416 int ret; 417 418 ret = regmap_read(data->regmap, ADXL313_REG_ACT_INACT_CTL, ®val); 419 if (ret) 420 return ret; 421 422 coupling = adxl313_act_acdc_msk[type] & regval; 423 424 switch (type) { 425 case ADXL313_ACTIVITY: 426 case ADXL313_INACTIVITY: 427 return coupling == ADXL313_COUPLING_DC; 428 case ADXL313_ACTIVITY_AC: 429 case ADXL313_INACTIVITY_AC: 430 return coupling == ADXL313_COUPLING_AC; 431 default: 432 return -EINVAL; 433 } 434 } 435 436 static int adxl313_set_act_inact_ac(struct adxl313_data *data, 437 enum adxl313_activity_type type, 438 bool cmd_en) 439 { 440 unsigned int act_inact_ac; 441 442 switch (type) { 443 case ADXL313_ACTIVITY_AC: 444 case ADXL313_INACTIVITY_AC: 445 act_inact_ac = ADXL313_COUPLING_AC && cmd_en; 446 break; 447 case ADXL313_ACTIVITY: 448 case ADXL313_INACTIVITY: 449 act_inact_ac = ADXL313_COUPLING_DC && cmd_en; 450 break; 451 default: 452 return -EINVAL; 453 } 454 455 return regmap_assign_bits(data->regmap, ADXL313_REG_ACT_INACT_CTL, 456 adxl313_act_acdc_msk[type], act_inact_ac); 457 } 458 459 static int adxl313_is_act_inact_en(struct adxl313_data *data, 460 enum adxl313_activity_type type) 461 { 462 unsigned int axis_ctrl; 463 unsigned int regval; 464 bool int_en; 465 int ret; 466 467 ret = regmap_read(data->regmap, ADXL313_REG_ACT_INACT_CTL, &axis_ctrl); 468 if (ret) 469 return ret; 470 471 /* Check if axis for activity are enabled */ 472 switch (type) { 473 case ADXL313_ACTIVITY: 474 case ADXL313_ACTIVITY_AC: 475 if (!FIELD_GET(ADXL313_ACT_XYZ_EN, axis_ctrl)) 476 return false; 477 break; 478 case ADXL313_INACTIVITY: 479 case ADXL313_INACTIVITY_AC: 480 if (!FIELD_GET(ADXL313_INACT_XYZ_EN, axis_ctrl)) 481 return false; 482 break; 483 default: 484 return -EINVAL; 485 } 486 487 /* Check if specific interrupt is enabled */ 488 ret = regmap_read(data->regmap, ADXL313_REG_INT_ENABLE, ®val); 489 if (ret) 490 return ret; 491 492 int_en = adxl313_act_int_reg[type] & regval; 493 if (!int_en) 494 return false; 495 496 /* Check if configured coupling matches provided type */ 497 return adxl313_is_act_inact_ac(data, type); 498 } 499 500 static int adxl313_set_act_inact_linkbit(struct adxl313_data *data, bool en) 501 { 502 int act_ac_en, inact_ac_en; 503 int act_en, inact_en; 504 505 act_en = adxl313_is_act_inact_en(data, ADXL313_ACTIVITY); 506 if (act_en < 0) 507 return act_en; 508 509 act_ac_en = adxl313_is_act_inact_en(data, ADXL313_ACTIVITY_AC); 510 if (act_ac_en < 0) 511 return act_ac_en; 512 513 inact_en = adxl313_is_act_inact_en(data, ADXL313_INACTIVITY); 514 if (inact_en < 0) 515 return inact_en; 516 517 inact_ac_en = adxl313_is_act_inact_en(data, ADXL313_INACTIVITY_AC); 518 if (inact_ac_en < 0) 519 return inact_ac_en; 520 521 act_en = act_en || act_ac_en; 522 523 inact_en = inact_en || inact_ac_en; 524 525 return regmap_assign_bits(data->regmap, ADXL313_REG_POWER_CTL, 526 ADXL313_POWER_CTL_AUTO_SLEEP | ADXL313_POWER_CTL_LINK, 527 en && act_en && inact_en); 528 } 529 530 static int adxl313_set_act_inact_en(struct adxl313_data *data, 531 enum adxl313_activity_type type, 532 bool cmd_en) 533 { 534 unsigned int axis_ctrl; 535 unsigned int threshold; 536 unsigned int inact_time_s; 537 int ret; 538 539 if (cmd_en) { 540 /* When turning on, check if threshold is valid */ 541 ret = regmap_read(data->regmap, adxl313_act_thresh_reg[type], 542 &threshold); 543 if (ret) 544 return ret; 545 546 if (!threshold) /* Just ignore the command if threshold is 0 */ 547 return 0; 548 549 /* When turning on inactivity, check if inact time is valid */ 550 if (type == ADXL313_INACTIVITY || type == ADXL313_INACTIVITY_AC) { 551 ret = regmap_read(data->regmap, 552 ADXL313_REG_TIME_INACT, 553 &inact_time_s); 554 if (ret) 555 return ret; 556 557 if (!inact_time_s) 558 return 0; 559 } 560 } else { 561 /* 562 * When turning off an activity, ensure that the correct 563 * coupling event is specified. This step helps prevent misuse - 564 * for example, if an AC-coupled activity is active and the 565 * current call attempts to turn off a DC-coupled activity, this 566 * inconsistency should be detected here. 567 */ 568 if (adxl313_is_act_inact_ac(data, type) <= 0) 569 return 0; 570 } 571 572 /* Start modifying configuration registers */ 573 ret = adxl313_set_measure_en(data, false); 574 if (ret) 575 return ret; 576 577 /* Enable axis according to the command */ 578 switch (type) { 579 case ADXL313_ACTIVITY: 580 case ADXL313_ACTIVITY_AC: 581 axis_ctrl = ADXL313_ACT_XYZ_EN; 582 break; 583 case ADXL313_INACTIVITY: 584 case ADXL313_INACTIVITY_AC: 585 axis_ctrl = ADXL313_INACT_XYZ_EN; 586 break; 587 default: 588 return -EINVAL; 589 } 590 ret = regmap_assign_bits(data->regmap, ADXL313_REG_ACT_INACT_CTL, 591 axis_ctrl, cmd_en); 592 if (ret) 593 return ret; 594 595 /* Update AC/DC-coupling according to the command */ 596 ret = adxl313_set_act_inact_ac(data, type, cmd_en); 597 if (ret) 598 return ret; 599 600 /* Enable the interrupt line, according to the command */ 601 ret = regmap_assign_bits(data->regmap, ADXL313_REG_INT_ENABLE, 602 adxl313_act_int_reg[type], cmd_en); 603 if (ret) 604 return ret; 605 606 /* Set link-bit and auto-sleep only when ACT and INACT are enabled */ 607 ret = adxl313_set_act_inact_linkbit(data, cmd_en); 608 if (ret) 609 return ret; 610 611 return adxl313_set_measure_en(data, true); 612 } 613 614 static int adxl313_read_raw(struct iio_dev *indio_dev, 615 struct iio_chan_spec const *chan, 616 int *val, int *val2, long mask) 617 { 618 struct adxl313_data *data = iio_priv(indio_dev); 619 unsigned int regval; 620 int ret; 621 622 switch (mask) { 623 case IIO_CHAN_INFO_RAW: 624 ret = adxl313_read_axis(data, chan); 625 if (ret < 0) 626 return ret; 627 628 *val = sign_extend32(ret, chan->scan_type.realbits - 1); 629 return IIO_VAL_INT; 630 case IIO_CHAN_INFO_SCALE: 631 *val = 0; 632 633 *val2 = data->chip_info->scale_factor; 634 635 return IIO_VAL_INT_PLUS_NANO; 636 case IIO_CHAN_INFO_CALIBBIAS: 637 ret = regmap_read(data->regmap, 638 ADXL313_REG_OFS_AXIS(chan->address), ®val); 639 if (ret) 640 return ret; 641 642 /* 643 * 8-bit resolution at minimum range, that is 4x accel data scale 644 * factor at full resolution 645 */ 646 *val = sign_extend32(regval, 7) * 4; 647 return IIO_VAL_INT; 648 case IIO_CHAN_INFO_SAMP_FREQ: 649 ret = regmap_read(data->regmap, ADXL313_REG_BW_RATE, ®val); 650 if (ret) 651 return ret; 652 653 ret = FIELD_GET(ADXL313_RATE_MSK, regval) - ADXL313_RATE_BASE; 654 *val = adxl313_odr_freqs[ret][0]; 655 *val2 = adxl313_odr_freqs[ret][1]; 656 return IIO_VAL_INT_PLUS_MICRO; 657 default: 658 return -EINVAL; 659 } 660 } 661 662 static int adxl313_write_raw(struct iio_dev *indio_dev, 663 struct iio_chan_spec const *chan, 664 int val, int val2, long mask) 665 { 666 struct adxl313_data *data = iio_priv(indio_dev); 667 668 switch (mask) { 669 case IIO_CHAN_INFO_CALIBBIAS: 670 /* 671 * 8-bit resolution at minimum range, that is 4x accel data scale 672 * factor at full resolution 673 */ 674 if (clamp_val(val, -128 * 4, 127 * 4) != val) 675 return -EINVAL; 676 677 return regmap_write(data->regmap, 678 ADXL313_REG_OFS_AXIS(chan->address), 679 val / 4); 680 case IIO_CHAN_INFO_SAMP_FREQ: 681 return adxl313_set_odr(data, val, val2); 682 default: 683 return -EINVAL; 684 } 685 } 686 687 static int adxl313_read_mag_config(struct adxl313_data *data, 688 enum iio_event_direction dir, 689 enum adxl313_activity_type type_act, 690 enum adxl313_activity_type type_inact) 691 { 692 switch (dir) { 693 case IIO_EV_DIR_RISING: 694 return !!adxl313_is_act_inact_en(data, type_act); 695 case IIO_EV_DIR_FALLING: 696 return !!adxl313_is_act_inact_en(data, type_inact); 697 default: 698 return -EINVAL; 699 } 700 } 701 702 static int adxl313_write_mag_config(struct adxl313_data *data, 703 enum iio_event_direction dir, 704 enum adxl313_activity_type type_act, 705 enum adxl313_activity_type type_inact, 706 bool state) 707 { 708 switch (dir) { 709 case IIO_EV_DIR_RISING: 710 return adxl313_set_act_inact_en(data, type_act, state); 711 case IIO_EV_DIR_FALLING: 712 return adxl313_set_act_inact_en(data, type_inact, state); 713 default: 714 return -EINVAL; 715 } 716 } 717 718 static int adxl313_read_event_config(struct iio_dev *indio_dev, 719 const struct iio_chan_spec *chan, 720 enum iio_event_type type, 721 enum iio_event_direction dir) 722 { 723 struct adxl313_data *data = iio_priv(indio_dev); 724 725 switch (type) { 726 case IIO_EV_TYPE_MAG: 727 return adxl313_read_mag_config(data, dir, 728 ADXL313_ACTIVITY, 729 ADXL313_INACTIVITY); 730 case IIO_EV_TYPE_MAG_ADAPTIVE: 731 return adxl313_read_mag_config(data, dir, 732 ADXL313_ACTIVITY_AC, 733 ADXL313_INACTIVITY_AC); 734 default: 735 return -EINVAL; 736 } 737 } 738 739 static int adxl313_write_event_config(struct iio_dev *indio_dev, 740 const struct iio_chan_spec *chan, 741 enum iio_event_type type, 742 enum iio_event_direction dir, 743 bool state) 744 { 745 struct adxl313_data *data = iio_priv(indio_dev); 746 747 switch (type) { 748 case IIO_EV_TYPE_MAG: 749 return adxl313_write_mag_config(data, dir, 750 ADXL313_ACTIVITY, 751 ADXL313_INACTIVITY, 752 state); 753 case IIO_EV_TYPE_MAG_ADAPTIVE: 754 return adxl313_write_mag_config(data, dir, 755 ADXL313_ACTIVITY_AC, 756 ADXL313_INACTIVITY_AC, 757 state); 758 default: 759 return -EINVAL; 760 } 761 } 762 763 static int adxl313_read_mag_value(struct adxl313_data *data, 764 enum iio_event_direction dir, 765 enum iio_event_info info, 766 enum adxl313_activity_type type_act, 767 enum adxl313_activity_type type_inact, 768 int *val, int *val2) 769 { 770 unsigned int threshold; 771 unsigned int period; 772 int ret; 773 774 switch (info) { 775 case IIO_EV_INFO_VALUE: 776 switch (dir) { 777 case IIO_EV_DIR_RISING: 778 ret = regmap_read(data->regmap, 779 adxl313_act_thresh_reg[type_act], 780 &threshold); 781 if (ret) 782 return ret; 783 *val = threshold * 15625; 784 *val2 = MICRO; 785 return IIO_VAL_FRACTIONAL; 786 case IIO_EV_DIR_FALLING: 787 ret = regmap_read(data->regmap, 788 adxl313_act_thresh_reg[type_inact], 789 &threshold); 790 if (ret) 791 return ret; 792 *val = threshold * 15625; 793 *val2 = MICRO; 794 return IIO_VAL_FRACTIONAL; 795 default: 796 return -EINVAL; 797 } 798 case IIO_EV_INFO_PERIOD: 799 ret = regmap_read(data->regmap, ADXL313_REG_TIME_INACT, 800 &period); 801 if (ret) 802 return ret; 803 *val = period; 804 return IIO_VAL_INT; 805 default: 806 return -EINVAL; 807 } 808 } 809 810 static int adxl313_write_mag_value(struct adxl313_data *data, 811 enum iio_event_direction dir, 812 enum iio_event_info info, 813 enum adxl313_activity_type type_act, 814 enum adxl313_activity_type type_inact, 815 int val, int val2) 816 { 817 unsigned int regval; 818 819 switch (info) { 820 case IIO_EV_INFO_VALUE: 821 /* Scale factor 15.625 mg/LSB */ 822 regval = DIV_ROUND_CLOSEST(MICRO * val + val2, 15625); 823 switch (dir) { 824 case IIO_EV_DIR_RISING: 825 return regmap_write(data->regmap, 826 adxl313_act_thresh_reg[type_act], 827 regval); 828 case IIO_EV_DIR_FALLING: 829 return regmap_write(data->regmap, 830 adxl313_act_thresh_reg[type_inact], 831 regval); 832 default: 833 return -EINVAL; 834 } 835 case IIO_EV_INFO_PERIOD: 836 return adxl313_set_inact_time_s(data, val); 837 default: 838 return -EINVAL; 839 } 840 } 841 842 static int adxl313_read_event_value(struct iio_dev *indio_dev, 843 const struct iio_chan_spec *chan, 844 enum iio_event_type type, 845 enum iio_event_direction dir, 846 enum iio_event_info info, 847 int *val, int *val2) 848 { 849 struct adxl313_data *data = iio_priv(indio_dev); 850 851 switch (type) { 852 case IIO_EV_TYPE_MAG: 853 return adxl313_read_mag_value(data, dir, info, 854 ADXL313_ACTIVITY, 855 ADXL313_INACTIVITY, 856 val, val2); 857 case IIO_EV_TYPE_MAG_ADAPTIVE: 858 return adxl313_read_mag_value(data, dir, info, 859 ADXL313_ACTIVITY_AC, 860 ADXL313_INACTIVITY_AC, 861 val, val2); 862 default: 863 return -EINVAL; 864 } 865 } 866 867 static int adxl313_write_event_value(struct iio_dev *indio_dev, 868 const struct iio_chan_spec *chan, 869 enum iio_event_type type, 870 enum iio_event_direction dir, 871 enum iio_event_info info, 872 int val, int val2) 873 { 874 struct adxl313_data *data = iio_priv(indio_dev); 875 876 switch (type) { 877 case IIO_EV_TYPE_MAG: 878 return adxl313_write_mag_value(data, dir, info, 879 ADXL313_ACTIVITY, 880 ADXL313_INACTIVITY, 881 val, val2); 882 case IIO_EV_TYPE_MAG_ADAPTIVE: 883 return adxl313_write_mag_value(data, dir, info, 884 ADXL313_ACTIVITY_AC, 885 ADXL313_INACTIVITY_AC, 886 val, val2); 887 default: 888 return -EINVAL; 889 } 890 } 891 892 static int adxl313_set_watermark(struct iio_dev *indio_dev, unsigned int value) 893 { 894 struct adxl313_data *data = iio_priv(indio_dev); 895 int ret; 896 897 value = min(value, ADXL313_FIFO_SIZE - 1); 898 899 ret = adxl313_set_measure_en(data, false); 900 if (ret) 901 return ret; 902 903 ret = regmap_update_bits(data->regmap, ADXL313_REG_FIFO_CTL, 904 ADXL313_REG_FIFO_CTL_MODE_MSK, value); 905 if (ret) 906 return ret; 907 908 data->watermark = value; 909 910 ret = regmap_set_bits(data->regmap, ADXL313_REG_INT_ENABLE, 911 ADXL313_INT_WATERMARK); 912 if (ret) 913 return ret; 914 915 return adxl313_set_measure_en(data, true); 916 } 917 918 static int adxl313_get_samples(struct adxl313_data *data) 919 { 920 unsigned int regval; 921 int ret; 922 923 ret = regmap_read(data->regmap, ADXL313_REG_FIFO_STATUS, ®val); 924 if (ret) 925 return ret; 926 927 return FIELD_GET(ADXL313_REG_FIFO_STATUS_ENTRIES_MSK, regval); 928 } 929 930 static int adxl313_fifo_transfer(struct adxl313_data *data, int samples) 931 { 932 unsigned int i; 933 int ret; 934 935 for (i = 0; i < samples; i++) { 936 ret = regmap_bulk_read(data->regmap, ADXL313_REG_XYZ_BASE, 937 data->fifo_buf + (i * ADXL313_NUM_AXIS), 938 sizeof(data->fifo_buf[0]) * ADXL313_NUM_AXIS); 939 if (ret) 940 return ret; 941 } 942 943 return 0; 944 } 945 946 /** 947 * adxl313_fifo_reset() - Reset the FIFO and interrupt status registers. 948 * @data: The device data. 949 * 950 * Reset the FIFO status registers. Reading out status registers clears the 951 * FIFO and interrupt configuration. Thus do not evaluate regmap return values. 952 * Ignore particular read register content. Register content is not processed 953 * any further. Therefore the function returns void. 954 */ 955 static void adxl313_fifo_reset(struct adxl313_data *data) 956 { 957 unsigned int regval; 958 int samples; 959 960 adxl313_set_measure_en(data, false); 961 962 samples = adxl313_get_samples(data); 963 if (samples > 0) 964 adxl313_fifo_transfer(data, samples); 965 966 regmap_read(data->regmap, ADXL313_REG_INT_SOURCE, ®val); 967 968 adxl313_set_measure_en(data, true); 969 } 970 971 static int adxl313_buffer_postenable(struct iio_dev *indio_dev) 972 { 973 struct adxl313_data *data = iio_priv(indio_dev); 974 int ret; 975 976 /* Set FIFO modes with measurement turned off, according to datasheet */ 977 ret = adxl313_set_measure_en(data, false); 978 if (ret) 979 return ret; 980 981 ret = regmap_write(data->regmap, ADXL313_REG_FIFO_CTL, 982 FIELD_PREP(ADXL313_REG_FIFO_CTL_SAMPLES_MSK, data->watermark) | 983 FIELD_PREP(ADXL313_REG_FIFO_CTL_MODE_MSK, ADXL313_FIFO_STREAM)); 984 if (ret) 985 return ret; 986 987 return adxl313_set_measure_en(data, true); 988 } 989 990 static int adxl313_buffer_predisable(struct iio_dev *indio_dev) 991 { 992 struct adxl313_data *data = iio_priv(indio_dev); 993 int ret; 994 995 ret = adxl313_set_measure_en(data, false); 996 if (ret) 997 return ret; 998 999 ret = regmap_write(data->regmap, ADXL313_REG_FIFO_CTL, 1000 FIELD_PREP(ADXL313_REG_FIFO_CTL_MODE_MSK, ADXL313_FIFO_BYPASS)); 1001 1002 ret = regmap_write(data->regmap, ADXL313_REG_INT_ENABLE, 0); 1003 if (ret) 1004 return ret; 1005 1006 return adxl313_set_measure_en(data, true); 1007 } 1008 1009 static const struct iio_buffer_setup_ops adxl313_buffer_ops = { 1010 .postenable = adxl313_buffer_postenable, 1011 .predisable = adxl313_buffer_predisable, 1012 }; 1013 1014 static int adxl313_fifo_push(struct iio_dev *indio_dev, int samples) 1015 { 1016 struct adxl313_data *data = iio_priv(indio_dev); 1017 unsigned int i; 1018 int ret; 1019 1020 ret = adxl313_fifo_transfer(data, samples); 1021 if (ret) 1022 return ret; 1023 1024 for (i = 0; i < ADXL313_NUM_AXIS * samples; i += ADXL313_NUM_AXIS) 1025 iio_push_to_buffers(indio_dev, &data->fifo_buf[i]); 1026 1027 return 0; 1028 } 1029 1030 static int adxl313_push_events(struct iio_dev *indio_dev, int int_stat) 1031 { 1032 s64 ts = iio_get_time_ns(indio_dev); 1033 struct adxl313_data *data = iio_priv(indio_dev); 1034 unsigned int regval; 1035 int ret = -ENOENT; 1036 1037 if (FIELD_GET(ADXL313_INT_ACTIVITY, int_stat)) { 1038 ret = regmap_read(data->regmap, ADXL313_REG_ACT_INACT_CTL, ®val); 1039 if (ret) 1040 return ret; 1041 1042 if (FIELD_GET(ADXL313_REG_ACT_ACDC_MSK, regval)) { 1043 /* AC coupled */ 1044 ret = iio_push_event(indio_dev, 1045 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, 1046 IIO_MOD_X_OR_Y_OR_Z, 1047 IIO_EV_TYPE_MAG_ADAPTIVE, 1048 IIO_EV_DIR_RISING), 1049 ts); 1050 if (ret) 1051 return ret; 1052 } else { 1053 /* DC coupled, relying on THRESH */ 1054 ret = iio_push_event(indio_dev, 1055 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, 1056 IIO_MOD_X_OR_Y_OR_Z, 1057 IIO_EV_TYPE_MAG, 1058 IIO_EV_DIR_RISING), 1059 ts); 1060 if (ret) 1061 return ret; 1062 } 1063 } 1064 1065 if (FIELD_GET(ADXL313_INT_INACTIVITY, int_stat)) { 1066 ret = regmap_read(data->regmap, ADXL313_REG_ACT_INACT_CTL, ®val); 1067 if (ret) 1068 return ret; 1069 1070 if (FIELD_GET(ADXL313_REG_INACT_ACDC_MSK, regval)) { 1071 /* AC coupled */ 1072 ret = iio_push_event(indio_dev, 1073 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, 1074 IIO_MOD_X_AND_Y_AND_Z, 1075 IIO_EV_TYPE_MAG_ADAPTIVE, 1076 IIO_EV_DIR_FALLING), 1077 ts); 1078 if (ret) 1079 return ret; 1080 } else { 1081 /* DC coupled, relying on THRESH */ 1082 ret = iio_push_event(indio_dev, 1083 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, 1084 IIO_MOD_X_AND_Y_AND_Z, 1085 IIO_EV_TYPE_MAG, 1086 IIO_EV_DIR_FALLING), 1087 ts); 1088 if (ret) 1089 return ret; 1090 } 1091 } 1092 1093 return ret; 1094 } 1095 1096 static irqreturn_t adxl313_irq_handler(int irq, void *p) 1097 { 1098 struct iio_dev *indio_dev = p; 1099 struct adxl313_data *data = iio_priv(indio_dev); 1100 int samples, int_stat; 1101 1102 if (regmap_read(data->regmap, ADXL313_REG_INT_SOURCE, &int_stat)) 1103 return IRQ_NONE; 1104 1105 /* 1106 * In cases of sensor events not handled (still not implemented) by 1107 * this driver, the FIFO needs to be drained to become operational 1108 * again. In general the sensor configuration only should issue events 1109 * which were configured by this driver. Anyway a miss-configuration 1110 * easily might end up in a hanging sensor FIFO. 1111 */ 1112 if (adxl313_push_events(indio_dev, int_stat)) 1113 goto err_reset_fifo; 1114 1115 if (FIELD_GET(ADXL313_INT_WATERMARK, int_stat)) { 1116 samples = adxl313_get_samples(data); 1117 if (samples < 0) 1118 goto err_reset_fifo; 1119 1120 if (adxl313_fifo_push(indio_dev, samples)) 1121 goto err_reset_fifo; 1122 } 1123 1124 if (FIELD_GET(ADXL313_INT_OVERRUN, int_stat)) 1125 goto err_reset_fifo; 1126 1127 return IRQ_HANDLED; 1128 1129 err_reset_fifo: 1130 adxl313_fifo_reset(data); 1131 1132 return IRQ_HANDLED; 1133 } 1134 1135 static int adxl313_reg_access(struct iio_dev *indio_dev, unsigned int reg, 1136 unsigned int writeval, unsigned int *readval) 1137 { 1138 struct adxl313_data *data = iio_priv(indio_dev); 1139 1140 if (readval) 1141 return regmap_read(data->regmap, reg, readval); 1142 return regmap_write(data->regmap, reg, writeval); 1143 } 1144 1145 static const struct iio_info adxl313_info = { 1146 .read_raw = adxl313_read_raw, 1147 .write_raw = adxl313_write_raw, 1148 .read_event_config = adxl313_read_event_config, 1149 .write_event_config = adxl313_write_event_config, 1150 .read_event_value = adxl313_read_event_value, 1151 .write_event_value = adxl313_write_event_value, 1152 .read_avail = adxl313_read_freq_avail, 1153 .hwfifo_set_watermark = adxl313_set_watermark, 1154 .debugfs_reg_access = &adxl313_reg_access, 1155 }; 1156 1157 static int adxl313_setup(struct device *dev, struct adxl313_data *data, 1158 int (*setup)(struct device *, struct regmap *)) 1159 { 1160 int ret; 1161 1162 /* 1163 * If sw reset available, ensures the device is in a consistent 1164 * state after start up 1165 */ 1166 if (data->chip_info->soft_reset) { 1167 ret = regmap_write(data->regmap, ADXL313_REG_SOFT_RESET, 1168 ADXL313_SOFT_RESET); 1169 if (ret) 1170 return ret; 1171 } 1172 1173 if (setup) { 1174 ret = setup(dev, data->regmap); 1175 if (ret) 1176 return ret; 1177 } 1178 1179 ret = data->chip_info->check_id(dev, data); 1180 if (ret) 1181 return ret; 1182 1183 /* Sets the range to maximum, full resolution, if applicable */ 1184 if (data->chip_info->variable_range) { 1185 ret = regmap_update_bits(data->regmap, ADXL313_REG_DATA_FORMAT, 1186 ADXL313_RANGE_MSK, 1187 FIELD_PREP(ADXL313_RANGE_MSK, ADXL313_RANGE_MAX)); 1188 if (ret) 1189 return ret; 1190 1191 /* Enables full resolution */ 1192 ret = regmap_update_bits(data->regmap, ADXL313_REG_DATA_FORMAT, 1193 ADXL313_FULL_RES, ADXL313_FULL_RES); 1194 if (ret) 1195 return ret; 1196 } 1197 1198 /* Enables measurement mode */ 1199 return adxl313_set_measure_en(data, true); 1200 } 1201 1202 static unsigned int adxl313_get_int_type(struct device *dev, int *irq) 1203 { 1204 *irq = fwnode_irq_get_byname(dev_fwnode(dev), "INT1"); 1205 if (*irq > 0) 1206 return ADXL313_INT1; 1207 1208 *irq = fwnode_irq_get_byname(dev_fwnode(dev), "INT2"); 1209 if (*irq > 0) 1210 return ADXL313_INT2; 1211 1212 return ADXL313_INT_NONE; 1213 } 1214 1215 /** 1216 * adxl313_core_probe() - probe and setup for adxl313 accelerometer 1217 * @dev: Driver model representation of the device 1218 * @regmap: Register map of the device 1219 * @chip_info: Structure containing device specific data 1220 * @setup: Setup routine to be executed right before the standard device 1221 * setup, can also be set to NULL if not required 1222 * 1223 * Return: 0 on success, negative errno on error cases 1224 */ 1225 int adxl313_core_probe(struct device *dev, 1226 struct regmap *regmap, 1227 const struct adxl313_chip_info *chip_info, 1228 int (*setup)(struct device *, struct regmap *)) 1229 { 1230 struct adxl313_data *data; 1231 struct iio_dev *indio_dev; 1232 u8 int_line; 1233 u8 int_map_msk; 1234 int irq, ret; 1235 1236 indio_dev = devm_iio_device_alloc(dev, sizeof(*data)); 1237 if (!indio_dev) 1238 return -ENOMEM; 1239 1240 data = iio_priv(indio_dev); 1241 data->regmap = regmap; 1242 data->chip_info = chip_info; 1243 1244 mutex_init(&data->lock); 1245 1246 indio_dev->name = chip_info->name; 1247 indio_dev->info = &adxl313_info; 1248 indio_dev->modes = INDIO_DIRECT_MODE; 1249 indio_dev->channels = adxl313_channels; 1250 indio_dev->num_channels = ARRAY_SIZE(adxl313_channels); 1251 indio_dev->available_scan_masks = adxl313_scan_masks; 1252 1253 ret = adxl313_setup(dev, data, setup); 1254 if (ret) { 1255 dev_err(dev, "ADXL313 setup failed\n"); 1256 return ret; 1257 } 1258 1259 int_line = adxl313_get_int_type(dev, &irq); 1260 if (int_line == ADXL313_INT_NONE) { 1261 /* 1262 * FIFO_BYPASSED mode 1263 * 1264 * When no interrupt lines are specified, the driver falls back 1265 * to use the sensor in FIFO_BYPASS mode. This means turning off 1266 * internal FIFO and interrupt generation (since there is no 1267 * line specified). Unmaskable interrupts such as overrun or 1268 * data ready won't interfere. Even that a FIFO_STREAM mode w/o 1269 * connected interrupt line might allow for obtaining raw 1270 * measurements, a fallback to disable interrupts when no 1271 * interrupt lines are connected seems to be the cleaner 1272 * solution. 1273 */ 1274 ret = regmap_write(data->regmap, ADXL313_REG_FIFO_CTL, 1275 FIELD_PREP(ADXL313_REG_FIFO_CTL_MODE_MSK, 1276 ADXL313_FIFO_BYPASS)); 1277 if (ret) 1278 return ret; 1279 } else { 1280 /* FIFO_STREAM mode */ 1281 int_map_msk = ADXL313_INT_DREADY | ADXL313_INT_ACTIVITY | 1282 ADXL313_INT_INACTIVITY | ADXL313_INT_WATERMARK | 1283 ADXL313_INT_OVERRUN; 1284 ret = regmap_assign_bits(data->regmap, ADXL313_REG_INT_MAP, 1285 int_map_msk, int_line == ADXL313_INT2); 1286 if (ret) 1287 return ret; 1288 1289 /* 1290 * Reset or configure the registers with reasonable default 1291 * values. As having 0 in most cases may result in undesirable 1292 * behavior if the interrupts are enabled. 1293 */ 1294 ret = regmap_write(data->regmap, ADXL313_REG_ACT_INACT_CTL, 0x00); 1295 if (ret) 1296 return ret; 1297 1298 ret = regmap_write(data->regmap, ADXL313_REG_TIME_INACT, 5); 1299 if (ret) 1300 return ret; 1301 1302 ret = regmap_write(data->regmap, ADXL313_REG_THRESH_INACT, 0x4f); 1303 if (ret) 1304 return ret; 1305 1306 ret = regmap_write(data->regmap, ADXL313_REG_THRESH_ACT, 0x52); 1307 if (ret) 1308 return ret; 1309 1310 ret = devm_iio_kfifo_buffer_setup(dev, indio_dev, 1311 &adxl313_buffer_ops); 1312 if (ret) 1313 return ret; 1314 1315 ret = devm_request_threaded_irq(dev, irq, NULL, 1316 &adxl313_irq_handler, 1317 IRQF_SHARED | IRQF_ONESHOT, 1318 indio_dev->name, indio_dev); 1319 if (ret) 1320 return ret; 1321 } 1322 1323 return devm_iio_device_register(dev, indio_dev); 1324 } 1325 EXPORT_SYMBOL_NS_GPL(adxl313_core_probe, "IIO_ADXL313"); 1326 1327 MODULE_AUTHOR("Lucas Stankus <lucas.p.stankus@gmail.com>"); 1328 MODULE_DESCRIPTION("ADXL313 3-Axis Digital Accelerometer core driver"); 1329 MODULE_LICENSE("GPL v2"); 1330