1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * ADXL313 3-Axis Digital Accelerometer 4 * 5 * Copyright (c) 2021 Lucas Stankus <lucas.p.stankus@gmail.com> 6 * 7 * Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ADXL313.pdf 8 */ 9 10 #include <linux/bitfield.h> 11 #include <linux/cleanup.h> 12 #include <linux/interrupt.h> 13 #include <linux/module.h> 14 #include <linux/overflow.h> 15 #include <linux/property.h> 16 #include <linux/regmap.h> 17 #include <linux/units.h> 18 19 #include <linux/iio/buffer.h> 20 #include <linux/iio/events.h> 21 #include <linux/iio/kfifo_buf.h> 22 23 #include "adxl313.h" 24 25 #define ADXL313_INT_NONE U8_MAX 26 #define ADXL313_INT1 1 27 #define ADXL313_INT2 2 28 29 #define ADXL313_REG_XYZ_BASE ADXL313_REG_DATA_AXIS(0) 30 31 #define ADXL313_ACT_XYZ_EN GENMASK(6, 4) 32 #define ADXL313_INACT_XYZ_EN GENMASK(2, 0) 33 34 #define ADXL313_REG_ACT_ACDC_MSK BIT(7) 35 #define ADXL313_REG_INACT_ACDC_MSK BIT(3) 36 #define ADXL313_COUPLING_DC 0 37 #define ADXL313_COUPLING_AC 1 38 39 /* activity/inactivity */ 40 enum adxl313_activity_type { 41 ADXL313_ACTIVITY, 42 ADXL313_INACTIVITY, 43 ADXL313_ACTIVITY_AC, 44 ADXL313_INACTIVITY_AC, 45 }; 46 47 static const unsigned int adxl313_act_int_reg[] = { 48 [ADXL313_ACTIVITY] = ADXL313_INT_ACTIVITY, 49 [ADXL313_INACTIVITY] = ADXL313_INT_INACTIVITY, 50 [ADXL313_ACTIVITY_AC] = ADXL313_INT_ACTIVITY, 51 [ADXL313_INACTIVITY_AC] = ADXL313_INT_INACTIVITY, 52 }; 53 54 static const unsigned int adxl313_act_thresh_reg[] = { 55 [ADXL313_ACTIVITY] = ADXL313_REG_THRESH_ACT, 56 [ADXL313_INACTIVITY] = ADXL313_REG_THRESH_INACT, 57 [ADXL313_ACTIVITY_AC] = ADXL313_REG_THRESH_ACT, 58 [ADXL313_INACTIVITY_AC] = ADXL313_REG_THRESH_INACT, 59 }; 60 61 static const unsigned int adxl313_act_acdc_msk[] = { 62 [ADXL313_ACTIVITY] = ADXL313_REG_ACT_ACDC_MSK, 63 [ADXL313_INACTIVITY] = ADXL313_REG_INACT_ACDC_MSK, 64 [ADXL313_ACTIVITY_AC] = ADXL313_REG_ACT_ACDC_MSK, 65 [ADXL313_INACTIVITY_AC] = ADXL313_REG_INACT_ACDC_MSK, 66 }; 67 68 static const struct regmap_range adxl312_readable_reg_range[] = { 69 regmap_reg_range(ADXL313_REG_DEVID0, ADXL313_REG_DEVID0), 70 regmap_reg_range(ADXL313_REG_OFS_AXIS(0), ADXL313_REG_OFS_AXIS(2)), 71 regmap_reg_range(ADXL313_REG_THRESH_ACT, ADXL313_REG_ACT_INACT_CTL), 72 regmap_reg_range(ADXL313_REG_BW_RATE, ADXL313_REG_FIFO_STATUS), 73 }; 74 75 static const struct regmap_range adxl313_readable_reg_range[] = { 76 regmap_reg_range(ADXL313_REG_DEVID0, ADXL313_REG_XID), 77 regmap_reg_range(ADXL313_REG_SOFT_RESET, ADXL313_REG_SOFT_RESET), 78 regmap_reg_range(ADXL313_REG_OFS_AXIS(0), ADXL313_REG_OFS_AXIS(2)), 79 regmap_reg_range(ADXL313_REG_THRESH_ACT, ADXL313_REG_ACT_INACT_CTL), 80 regmap_reg_range(ADXL313_REG_BW_RATE, ADXL313_REG_FIFO_STATUS), 81 }; 82 83 const struct regmap_access_table adxl312_readable_regs_table = { 84 .yes_ranges = adxl312_readable_reg_range, 85 .n_yes_ranges = ARRAY_SIZE(adxl312_readable_reg_range), 86 }; 87 EXPORT_SYMBOL_NS_GPL(adxl312_readable_regs_table, "IIO_ADXL313"); 88 89 const struct regmap_access_table adxl313_readable_regs_table = { 90 .yes_ranges = adxl313_readable_reg_range, 91 .n_yes_ranges = ARRAY_SIZE(adxl313_readable_reg_range), 92 }; 93 EXPORT_SYMBOL_NS_GPL(adxl313_readable_regs_table, "IIO_ADXL313"); 94 95 const struct regmap_access_table adxl314_readable_regs_table = { 96 .yes_ranges = adxl312_readable_reg_range, 97 .n_yes_ranges = ARRAY_SIZE(adxl312_readable_reg_range), 98 }; 99 EXPORT_SYMBOL_NS_GPL(adxl314_readable_regs_table, "IIO_ADXL313"); 100 101 bool adxl313_is_volatile_reg(struct device *dev, unsigned int reg) 102 { 103 switch (reg) { 104 case ADXL313_REG_DATA_AXIS(0): 105 case ADXL313_REG_DATA_AXIS(1): 106 case ADXL313_REG_DATA_AXIS(2): 107 case ADXL313_REG_DATA_AXIS(3): 108 case ADXL313_REG_DATA_AXIS(4): 109 case ADXL313_REG_DATA_AXIS(5): 110 case ADXL313_REG_FIFO_STATUS: 111 case ADXL313_REG_INT_SOURCE: 112 return true; 113 default: 114 return false; 115 } 116 } 117 EXPORT_SYMBOL_NS_GPL(adxl313_is_volatile_reg, "IIO_ADXL313"); 118 119 static int adxl313_set_measure_en(struct adxl313_data *data, bool en) 120 { 121 return regmap_assign_bits(data->regmap, ADXL313_REG_POWER_CTL, 122 ADXL313_POWER_CTL_MSK, en); 123 } 124 125 static int adxl312_check_id(struct device *dev, 126 struct adxl313_data *data) 127 { 128 unsigned int regval; 129 int ret; 130 131 ret = regmap_read(data->regmap, ADXL313_REG_DEVID0, ®val); 132 if (ret) 133 return ret; 134 135 if (regval != ADXL313_DEVID0_ADXL312_314) 136 dev_warn(dev, "Invalid manufacturer ID: %#02x\n", regval); 137 138 return 0; 139 } 140 141 static int adxl313_check_id(struct device *dev, 142 struct adxl313_data *data) 143 { 144 unsigned int regval; 145 int ret; 146 147 ret = regmap_read(data->regmap, ADXL313_REG_DEVID0, ®val); 148 if (ret) 149 return ret; 150 151 if (regval != ADXL313_DEVID0) 152 dev_warn(dev, "Invalid manufacturer ID: 0x%02x\n", regval); 153 154 /* Check DEVID1 and PARTID */ 155 if (regval == ADXL313_DEVID0) { 156 ret = regmap_read(data->regmap, ADXL313_REG_DEVID1, ®val); 157 if (ret) 158 return ret; 159 160 if (regval != ADXL313_DEVID1) 161 dev_warn(dev, "Invalid mems ID: 0x%02x\n", regval); 162 163 ret = regmap_read(data->regmap, ADXL313_REG_PARTID, ®val); 164 if (ret) 165 return ret; 166 167 if (regval != ADXL313_PARTID) 168 dev_warn(dev, "Invalid device ID: 0x%02x\n", regval); 169 } 170 171 return 0; 172 } 173 174 const struct adxl313_chip_info adxl31x_chip_info[] = { 175 [ADXL312] = { 176 .name = "adxl312", 177 .type = ADXL312, 178 .scale_factor = 28425072, 179 .variable_range = true, 180 .soft_reset = false, 181 .check_id = &adxl312_check_id, 182 }, 183 [ADXL313] = { 184 .name = "adxl313", 185 .type = ADXL313, 186 .scale_factor = 9576806, 187 .variable_range = true, 188 .soft_reset = true, 189 .check_id = &adxl313_check_id, 190 }, 191 [ADXL314] = { 192 .name = "adxl314", 193 .type = ADXL314, 194 .scale_factor = 478858719, 195 .variable_range = false, 196 .soft_reset = false, 197 .check_id = &adxl312_check_id, 198 }, 199 }; 200 EXPORT_SYMBOL_NS_GPL(adxl31x_chip_info, "IIO_ADXL313"); 201 202 static const struct regmap_range adxl312_writable_reg_range[] = { 203 regmap_reg_range(ADXL313_REG_OFS_AXIS(0), ADXL313_REG_OFS_AXIS(2)), 204 regmap_reg_range(ADXL313_REG_THRESH_ACT, ADXL313_REG_ACT_INACT_CTL), 205 regmap_reg_range(ADXL313_REG_BW_RATE, ADXL313_REG_INT_MAP), 206 regmap_reg_range(ADXL313_REG_DATA_FORMAT, ADXL313_REG_DATA_FORMAT), 207 regmap_reg_range(ADXL313_REG_FIFO_CTL, ADXL313_REG_FIFO_CTL), 208 }; 209 210 static const struct regmap_range adxl313_writable_reg_range[] = { 211 regmap_reg_range(ADXL313_REG_SOFT_RESET, ADXL313_REG_SOFT_RESET), 212 regmap_reg_range(ADXL313_REG_OFS_AXIS(0), ADXL313_REG_OFS_AXIS(2)), 213 regmap_reg_range(ADXL313_REG_THRESH_ACT, ADXL313_REG_ACT_INACT_CTL), 214 regmap_reg_range(ADXL313_REG_BW_RATE, ADXL313_REG_INT_MAP), 215 regmap_reg_range(ADXL313_REG_DATA_FORMAT, ADXL313_REG_DATA_FORMAT), 216 regmap_reg_range(ADXL313_REG_FIFO_CTL, ADXL313_REG_FIFO_CTL), 217 }; 218 219 const struct regmap_access_table adxl312_writable_regs_table = { 220 .yes_ranges = adxl312_writable_reg_range, 221 .n_yes_ranges = ARRAY_SIZE(adxl312_writable_reg_range), 222 }; 223 EXPORT_SYMBOL_NS_GPL(adxl312_writable_regs_table, "IIO_ADXL313"); 224 225 const struct regmap_access_table adxl313_writable_regs_table = { 226 .yes_ranges = adxl313_writable_reg_range, 227 .n_yes_ranges = ARRAY_SIZE(adxl313_writable_reg_range), 228 }; 229 EXPORT_SYMBOL_NS_GPL(adxl313_writable_regs_table, "IIO_ADXL313"); 230 231 const struct regmap_access_table adxl314_writable_regs_table = { 232 .yes_ranges = adxl312_writable_reg_range, 233 .n_yes_ranges = ARRAY_SIZE(adxl312_writable_reg_range), 234 }; 235 EXPORT_SYMBOL_NS_GPL(adxl314_writable_regs_table, "IIO_ADXL313"); 236 237 static const int adxl313_odr_freqs[][2] = { 238 [0] = { 6, 250000 }, 239 [1] = { 12, 500000 }, 240 [2] = { 25, 0 }, 241 [3] = { 50, 0 }, 242 [4] = { 100, 0 }, 243 [5] = { 200, 0 }, 244 [6] = { 400, 0 }, 245 [7] = { 800, 0 }, 246 [8] = { 1600, 0 }, 247 [9] = { 3200, 0 }, 248 }; 249 250 #define ADXL313_ACCEL_CHANNEL(index, reg, axis) { \ 251 .type = IIO_ACCEL, \ 252 .scan_index = (index), \ 253 .address = (reg), \ 254 .modified = 1, \ 255 .channel2 = IIO_MOD_##axis, \ 256 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 257 BIT(IIO_CHAN_INFO_CALIBBIAS), \ 258 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 259 BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 260 .info_mask_shared_by_type_available = \ 261 BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 262 .scan_type = { \ 263 .sign = 's', \ 264 .realbits = 13, \ 265 .storagebits = 16, \ 266 .endianness = IIO_BE, \ 267 }, \ 268 } 269 270 static const struct iio_event_spec adxl313_activity_events[] = { 271 { 272 .type = IIO_EV_TYPE_MAG, 273 .dir = IIO_EV_DIR_RISING, 274 .mask_separate = BIT(IIO_EV_INFO_ENABLE), 275 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE), 276 }, 277 { 278 /* activity, AC bit set */ 279 .type = IIO_EV_TYPE_MAG_ADAPTIVE, 280 .dir = IIO_EV_DIR_RISING, 281 .mask_separate = BIT(IIO_EV_INFO_ENABLE), 282 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE), 283 }, 284 }; 285 286 static const struct iio_event_spec adxl313_inactivity_events[] = { 287 { 288 /* inactivity */ 289 .type = IIO_EV_TYPE_MAG, 290 .dir = IIO_EV_DIR_FALLING, 291 .mask_separate = BIT(IIO_EV_INFO_ENABLE), 292 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) | 293 BIT(IIO_EV_INFO_PERIOD), 294 }, 295 { 296 /* inactivity, AC bit set */ 297 .type = IIO_EV_TYPE_MAG_ADAPTIVE, 298 .dir = IIO_EV_DIR_FALLING, 299 .mask_separate = BIT(IIO_EV_INFO_ENABLE), 300 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) | 301 BIT(IIO_EV_INFO_PERIOD), 302 }, 303 }; 304 305 enum adxl313_chans { 306 chan_x, chan_y, chan_z, 307 }; 308 309 static const struct iio_chan_spec adxl313_channels[] = { 310 ADXL313_ACCEL_CHANNEL(0, chan_x, X), 311 ADXL313_ACCEL_CHANNEL(1, chan_y, Y), 312 ADXL313_ACCEL_CHANNEL(2, chan_z, Z), 313 { 314 .type = IIO_ACCEL, 315 .modified = 1, 316 .channel2 = IIO_MOD_X_OR_Y_OR_Z, 317 .scan_index = -1, /* Fake channel for axis OR'ing */ 318 .event_spec = adxl313_activity_events, 319 .num_event_specs = ARRAY_SIZE(adxl313_activity_events), 320 }, 321 { 322 .type = IIO_ACCEL, 323 .modified = 1, 324 .channel2 = IIO_MOD_X_AND_Y_AND_Z, 325 .scan_index = -1, /* Fake channel for axis AND'ing */ 326 .event_spec = adxl313_inactivity_events, 327 .num_event_specs = ARRAY_SIZE(adxl313_inactivity_events), 328 }, 329 }; 330 331 static const unsigned long adxl313_scan_masks[] = { 332 BIT(chan_x) | BIT(chan_y) | BIT(chan_z), 333 0 334 }; 335 336 static int adxl313_set_odr(struct adxl313_data *data, 337 unsigned int freq1, unsigned int freq2) 338 { 339 unsigned int i; 340 341 for (i = 0; i < ARRAY_SIZE(adxl313_odr_freqs); i++) { 342 if (adxl313_odr_freqs[i][0] == freq1 && 343 adxl313_odr_freqs[i][1] == freq2) 344 break; 345 } 346 347 if (i == ARRAY_SIZE(adxl313_odr_freqs)) 348 return -EINVAL; 349 350 return regmap_update_bits(data->regmap, ADXL313_REG_BW_RATE, 351 ADXL313_RATE_MSK, 352 FIELD_PREP(ADXL313_RATE_MSK, ADXL313_RATE_BASE + i)); 353 } 354 355 static int adxl313_read_axis(struct adxl313_data *data, 356 struct iio_chan_spec const *chan) 357 { 358 int ret; 359 360 guard(mutex)(&data->lock); 361 362 ret = regmap_bulk_read(data->regmap, 363 ADXL313_REG_DATA_AXIS(chan->address), 364 &data->transf_buf, sizeof(data->transf_buf)); 365 if (ret) 366 return ret; 367 368 return le16_to_cpu(data->transf_buf); 369 } 370 371 static int adxl313_read_freq_avail(struct iio_dev *indio_dev, 372 struct iio_chan_spec const *chan, 373 const int **vals, int *type, int *length, 374 long mask) 375 { 376 switch (mask) { 377 case IIO_CHAN_INFO_SAMP_FREQ: 378 *vals = (const int *)adxl313_odr_freqs; 379 *length = ARRAY_SIZE(adxl313_odr_freqs) * 2; 380 *type = IIO_VAL_INT_PLUS_MICRO; 381 return IIO_AVAIL_LIST; 382 default: 383 return -EINVAL; 384 } 385 } 386 387 static int adxl313_set_inact_time_s(struct adxl313_data *data, 388 unsigned int val_s) 389 { 390 unsigned int max_boundary = U8_MAX; /* by register size */ 391 unsigned int val = min(val_s, max_boundary); 392 393 return regmap_write(data->regmap, ADXL313_REG_TIME_INACT, val); 394 } 395 396 /** 397 * adxl313_is_act_inact_ac() - Check if AC coupling is enabled. 398 * @data: The device data. 399 * @type: The activity or inactivity type. 400 * 401 * Provide a type of activity or inactivity, combined with either AC coupling 402 * set, or default to DC coupling. This function verifies if the combination is 403 * currently enabled or not. 404 * 405 * Return: if the provided activity type has AC coupling enabled or a negative 406 * error value. 407 */ 408 static int adxl313_is_act_inact_ac(struct adxl313_data *data, 409 enum adxl313_activity_type type) 410 { 411 unsigned int regval; 412 bool coupling; 413 int ret; 414 415 ret = regmap_read(data->regmap, ADXL313_REG_ACT_INACT_CTL, ®val); 416 if (ret) 417 return ret; 418 419 coupling = adxl313_act_acdc_msk[type] & regval; 420 421 switch (type) { 422 case ADXL313_ACTIVITY: 423 case ADXL313_INACTIVITY: 424 return coupling == ADXL313_COUPLING_DC; 425 case ADXL313_ACTIVITY_AC: 426 case ADXL313_INACTIVITY_AC: 427 return coupling == ADXL313_COUPLING_AC; 428 default: 429 return -EINVAL; 430 } 431 } 432 433 static int adxl313_set_act_inact_ac(struct adxl313_data *data, 434 enum adxl313_activity_type type, 435 bool cmd_en) 436 { 437 unsigned int act_inact_ac; 438 439 switch (type) { 440 case ADXL313_ACTIVITY_AC: 441 case ADXL313_INACTIVITY_AC: 442 act_inact_ac = ADXL313_COUPLING_AC && cmd_en; 443 break; 444 case ADXL313_ACTIVITY: 445 case ADXL313_INACTIVITY: 446 act_inact_ac = ADXL313_COUPLING_DC && cmd_en; 447 break; 448 default: 449 return -EINVAL; 450 } 451 452 return regmap_assign_bits(data->regmap, ADXL313_REG_ACT_INACT_CTL, 453 adxl313_act_acdc_msk[type], act_inact_ac); 454 } 455 456 static int adxl313_is_act_inact_en(struct adxl313_data *data, 457 enum adxl313_activity_type type) 458 { 459 unsigned int axis_ctrl; 460 unsigned int regval; 461 bool int_en; 462 int ret; 463 464 ret = regmap_read(data->regmap, ADXL313_REG_ACT_INACT_CTL, &axis_ctrl); 465 if (ret) 466 return ret; 467 468 /* Check if axis for activity are enabled */ 469 switch (type) { 470 case ADXL313_ACTIVITY: 471 case ADXL313_ACTIVITY_AC: 472 if (!FIELD_GET(ADXL313_ACT_XYZ_EN, axis_ctrl)) 473 return false; 474 break; 475 case ADXL313_INACTIVITY: 476 case ADXL313_INACTIVITY_AC: 477 if (!FIELD_GET(ADXL313_INACT_XYZ_EN, axis_ctrl)) 478 return false; 479 break; 480 default: 481 return -EINVAL; 482 } 483 484 /* Check if specific interrupt is enabled */ 485 ret = regmap_read(data->regmap, ADXL313_REG_INT_ENABLE, ®val); 486 if (ret) 487 return ret; 488 489 int_en = adxl313_act_int_reg[type] & regval; 490 if (!int_en) 491 return false; 492 493 /* Check if configured coupling matches provided type */ 494 return adxl313_is_act_inact_ac(data, type); 495 } 496 497 static int adxl313_set_act_inact_linkbit(struct adxl313_data *data, bool en) 498 { 499 int act_ac_en, inact_ac_en; 500 int act_en, inact_en; 501 502 act_en = adxl313_is_act_inact_en(data, ADXL313_ACTIVITY); 503 if (act_en < 0) 504 return act_en; 505 506 act_ac_en = adxl313_is_act_inact_en(data, ADXL313_ACTIVITY_AC); 507 if (act_ac_en < 0) 508 return act_ac_en; 509 510 inact_en = adxl313_is_act_inact_en(data, ADXL313_INACTIVITY); 511 if (inact_en < 0) 512 return inact_en; 513 514 inact_ac_en = adxl313_is_act_inact_en(data, ADXL313_INACTIVITY_AC); 515 if (inact_ac_en < 0) 516 return inact_ac_en; 517 518 act_en = act_en || act_ac_en; 519 520 inact_en = inact_en || inact_ac_en; 521 522 return regmap_assign_bits(data->regmap, ADXL313_REG_POWER_CTL, 523 ADXL313_POWER_CTL_AUTO_SLEEP | ADXL313_POWER_CTL_LINK, 524 en && act_en && inact_en); 525 } 526 527 static int adxl313_set_act_inact_en(struct adxl313_data *data, 528 enum adxl313_activity_type type, 529 bool cmd_en) 530 { 531 unsigned int axis_ctrl; 532 unsigned int threshold; 533 unsigned int inact_time_s; 534 int ret; 535 536 if (cmd_en) { 537 /* When turning on, check if threshold is valid */ 538 ret = regmap_read(data->regmap, adxl313_act_thresh_reg[type], 539 &threshold); 540 if (ret) 541 return ret; 542 543 if (!threshold) /* Just ignore the command if threshold is 0 */ 544 return 0; 545 546 /* When turning on inactivity, check if inact time is valid */ 547 if (type == ADXL313_INACTIVITY || type == ADXL313_INACTIVITY_AC) { 548 ret = regmap_read(data->regmap, 549 ADXL313_REG_TIME_INACT, 550 &inact_time_s); 551 if (ret) 552 return ret; 553 554 if (!inact_time_s) 555 return 0; 556 } 557 } else { 558 /* 559 * When turning off an activity, ensure that the correct 560 * coupling event is specified. This step helps prevent misuse - 561 * for example, if an AC-coupled activity is active and the 562 * current call attempts to turn off a DC-coupled activity, this 563 * inconsistency should be detected here. 564 */ 565 if (adxl313_is_act_inact_ac(data, type) <= 0) 566 return 0; 567 } 568 569 /* Start modifying configuration registers */ 570 ret = adxl313_set_measure_en(data, false); 571 if (ret) 572 return ret; 573 574 /* Enable axis according to the command */ 575 switch (type) { 576 case ADXL313_ACTIVITY: 577 case ADXL313_ACTIVITY_AC: 578 axis_ctrl = ADXL313_ACT_XYZ_EN; 579 break; 580 case ADXL313_INACTIVITY: 581 case ADXL313_INACTIVITY_AC: 582 axis_ctrl = ADXL313_INACT_XYZ_EN; 583 break; 584 default: 585 return -EINVAL; 586 } 587 ret = regmap_assign_bits(data->regmap, ADXL313_REG_ACT_INACT_CTL, 588 axis_ctrl, cmd_en); 589 if (ret) 590 return ret; 591 592 /* Update AC/DC-coupling according to the command */ 593 ret = adxl313_set_act_inact_ac(data, type, cmd_en); 594 if (ret) 595 return ret; 596 597 /* Enable the interrupt line, according to the command */ 598 ret = regmap_assign_bits(data->regmap, ADXL313_REG_INT_ENABLE, 599 adxl313_act_int_reg[type], cmd_en); 600 if (ret) 601 return ret; 602 603 /* Set link-bit and auto-sleep only when ACT and INACT are enabled */ 604 ret = adxl313_set_act_inact_linkbit(data, cmd_en); 605 if (ret) 606 return ret; 607 608 return adxl313_set_measure_en(data, true); 609 } 610 611 static int adxl313_read_raw(struct iio_dev *indio_dev, 612 struct iio_chan_spec const *chan, 613 int *val, int *val2, long mask) 614 { 615 struct adxl313_data *data = iio_priv(indio_dev); 616 unsigned int regval; 617 int ret; 618 619 switch (mask) { 620 case IIO_CHAN_INFO_RAW: 621 ret = adxl313_read_axis(data, chan); 622 if (ret < 0) 623 return ret; 624 625 *val = sign_extend32(ret, chan->scan_type.realbits - 1); 626 return IIO_VAL_INT; 627 case IIO_CHAN_INFO_SCALE: 628 *val = 0; 629 630 *val2 = data->chip_info->scale_factor; 631 632 return IIO_VAL_INT_PLUS_NANO; 633 case IIO_CHAN_INFO_CALIBBIAS: 634 ret = regmap_read(data->regmap, 635 ADXL313_REG_OFS_AXIS(chan->address), ®val); 636 if (ret) 637 return ret; 638 639 /* 640 * 8-bit resolution at minimum range, that is 4x accel data scale 641 * factor at full resolution 642 */ 643 *val = sign_extend32(regval, 7) * 4; 644 return IIO_VAL_INT; 645 case IIO_CHAN_INFO_SAMP_FREQ: 646 ret = regmap_read(data->regmap, ADXL313_REG_BW_RATE, ®val); 647 if (ret) 648 return ret; 649 650 ret = FIELD_GET(ADXL313_RATE_MSK, regval) - ADXL313_RATE_BASE; 651 *val = adxl313_odr_freqs[ret][0]; 652 *val2 = adxl313_odr_freqs[ret][1]; 653 return IIO_VAL_INT_PLUS_MICRO; 654 default: 655 return -EINVAL; 656 } 657 } 658 659 static int adxl313_write_raw(struct iio_dev *indio_dev, 660 struct iio_chan_spec const *chan, 661 int val, int val2, long mask) 662 { 663 struct adxl313_data *data = iio_priv(indio_dev); 664 665 switch (mask) { 666 case IIO_CHAN_INFO_CALIBBIAS: 667 /* 668 * 8-bit resolution at minimum range, that is 4x accel data scale 669 * factor at full resolution 670 */ 671 if (clamp_val(val, -128 * 4, 127 * 4) != val) 672 return -EINVAL; 673 674 return regmap_write(data->regmap, 675 ADXL313_REG_OFS_AXIS(chan->address), 676 val / 4); 677 case IIO_CHAN_INFO_SAMP_FREQ: 678 return adxl313_set_odr(data, val, val2); 679 default: 680 return -EINVAL; 681 } 682 } 683 684 static int adxl313_read_mag_config(struct adxl313_data *data, 685 enum iio_event_direction dir, 686 enum adxl313_activity_type type_act, 687 enum adxl313_activity_type type_inact) 688 { 689 switch (dir) { 690 case IIO_EV_DIR_RISING: 691 return !!adxl313_is_act_inact_en(data, type_act); 692 case IIO_EV_DIR_FALLING: 693 return !!adxl313_is_act_inact_en(data, type_inact); 694 default: 695 return -EINVAL; 696 } 697 } 698 699 static int adxl313_write_mag_config(struct adxl313_data *data, 700 enum iio_event_direction dir, 701 enum adxl313_activity_type type_act, 702 enum adxl313_activity_type type_inact, 703 bool state) 704 { 705 switch (dir) { 706 case IIO_EV_DIR_RISING: 707 return adxl313_set_act_inact_en(data, type_act, state); 708 case IIO_EV_DIR_FALLING: 709 return adxl313_set_act_inact_en(data, type_inact, state); 710 default: 711 return -EINVAL; 712 } 713 } 714 715 static int adxl313_read_event_config(struct iio_dev *indio_dev, 716 const struct iio_chan_spec *chan, 717 enum iio_event_type type, 718 enum iio_event_direction dir) 719 { 720 struct adxl313_data *data = iio_priv(indio_dev); 721 722 switch (type) { 723 case IIO_EV_TYPE_MAG: 724 return adxl313_read_mag_config(data, dir, 725 ADXL313_ACTIVITY, 726 ADXL313_INACTIVITY); 727 case IIO_EV_TYPE_MAG_ADAPTIVE: 728 return adxl313_read_mag_config(data, dir, 729 ADXL313_ACTIVITY_AC, 730 ADXL313_INACTIVITY_AC); 731 default: 732 return -EINVAL; 733 } 734 } 735 736 static int adxl313_write_event_config(struct iio_dev *indio_dev, 737 const struct iio_chan_spec *chan, 738 enum iio_event_type type, 739 enum iio_event_direction dir, 740 bool state) 741 { 742 struct adxl313_data *data = iio_priv(indio_dev); 743 744 switch (type) { 745 case IIO_EV_TYPE_MAG: 746 return adxl313_write_mag_config(data, dir, 747 ADXL313_ACTIVITY, 748 ADXL313_INACTIVITY, 749 state); 750 case IIO_EV_TYPE_MAG_ADAPTIVE: 751 return adxl313_write_mag_config(data, dir, 752 ADXL313_ACTIVITY_AC, 753 ADXL313_INACTIVITY_AC, 754 state); 755 default: 756 return -EINVAL; 757 } 758 } 759 760 static int adxl313_read_mag_value(struct adxl313_data *data, 761 enum iio_event_direction dir, 762 enum iio_event_info info, 763 enum adxl313_activity_type type_act, 764 enum adxl313_activity_type type_inact, 765 int *val, int *val2) 766 { 767 unsigned int threshold; 768 unsigned int period; 769 int ret; 770 771 switch (info) { 772 case IIO_EV_INFO_VALUE: 773 switch (dir) { 774 case IIO_EV_DIR_RISING: 775 ret = regmap_read(data->regmap, 776 adxl313_act_thresh_reg[type_act], 777 &threshold); 778 if (ret) 779 return ret; 780 *val = threshold * 15625; 781 *val2 = MICRO; 782 return IIO_VAL_FRACTIONAL; 783 case IIO_EV_DIR_FALLING: 784 ret = regmap_read(data->regmap, 785 adxl313_act_thresh_reg[type_inact], 786 &threshold); 787 if (ret) 788 return ret; 789 *val = threshold * 15625; 790 *val2 = MICRO; 791 return IIO_VAL_FRACTIONAL; 792 default: 793 return -EINVAL; 794 } 795 case IIO_EV_INFO_PERIOD: 796 ret = regmap_read(data->regmap, ADXL313_REG_TIME_INACT, 797 &period); 798 if (ret) 799 return ret; 800 *val = period; 801 return IIO_VAL_INT; 802 default: 803 return -EINVAL; 804 } 805 } 806 807 static int adxl313_write_mag_value(struct adxl313_data *data, 808 enum iio_event_direction dir, 809 enum iio_event_info info, 810 enum adxl313_activity_type type_act, 811 enum adxl313_activity_type type_inact, 812 int val, int val2) 813 { 814 unsigned int regval; 815 816 switch (info) { 817 case IIO_EV_INFO_VALUE: 818 /* Scale factor 15.625 mg/LSB */ 819 regval = DIV_ROUND_CLOSEST(MICRO * val + val2, 15625); 820 switch (dir) { 821 case IIO_EV_DIR_RISING: 822 return regmap_write(data->regmap, 823 adxl313_act_thresh_reg[type_act], 824 regval); 825 case IIO_EV_DIR_FALLING: 826 return regmap_write(data->regmap, 827 adxl313_act_thresh_reg[type_inact], 828 regval); 829 default: 830 return -EINVAL; 831 } 832 case IIO_EV_INFO_PERIOD: 833 return adxl313_set_inact_time_s(data, val); 834 default: 835 return -EINVAL; 836 } 837 } 838 839 static int adxl313_read_event_value(struct iio_dev *indio_dev, 840 const struct iio_chan_spec *chan, 841 enum iio_event_type type, 842 enum iio_event_direction dir, 843 enum iio_event_info info, 844 int *val, int *val2) 845 { 846 struct adxl313_data *data = iio_priv(indio_dev); 847 848 switch (type) { 849 case IIO_EV_TYPE_MAG: 850 return adxl313_read_mag_value(data, dir, info, 851 ADXL313_ACTIVITY, 852 ADXL313_INACTIVITY, 853 val, val2); 854 case IIO_EV_TYPE_MAG_ADAPTIVE: 855 return adxl313_read_mag_value(data, dir, info, 856 ADXL313_ACTIVITY_AC, 857 ADXL313_INACTIVITY_AC, 858 val, val2); 859 default: 860 return -EINVAL; 861 } 862 } 863 864 static int adxl313_write_event_value(struct iio_dev *indio_dev, 865 const struct iio_chan_spec *chan, 866 enum iio_event_type type, 867 enum iio_event_direction dir, 868 enum iio_event_info info, 869 int val, int val2) 870 { 871 struct adxl313_data *data = iio_priv(indio_dev); 872 873 switch (type) { 874 case IIO_EV_TYPE_MAG: 875 return adxl313_write_mag_value(data, dir, info, 876 ADXL313_ACTIVITY, 877 ADXL313_INACTIVITY, 878 val, val2); 879 case IIO_EV_TYPE_MAG_ADAPTIVE: 880 return adxl313_write_mag_value(data, dir, info, 881 ADXL313_ACTIVITY_AC, 882 ADXL313_INACTIVITY_AC, 883 val, val2); 884 default: 885 return -EINVAL; 886 } 887 } 888 889 static int adxl313_set_watermark(struct iio_dev *indio_dev, unsigned int value) 890 { 891 struct adxl313_data *data = iio_priv(indio_dev); 892 int ret; 893 894 value = min(value, ADXL313_FIFO_SIZE - 1); 895 896 ret = adxl313_set_measure_en(data, false); 897 if (ret) 898 return ret; 899 900 ret = regmap_update_bits(data->regmap, ADXL313_REG_FIFO_CTL, 901 ADXL313_REG_FIFO_CTL_MODE_MSK, value); 902 if (ret) 903 return ret; 904 905 data->watermark = value; 906 907 ret = regmap_set_bits(data->regmap, ADXL313_REG_INT_ENABLE, 908 ADXL313_INT_WATERMARK); 909 if (ret) 910 return ret; 911 912 return adxl313_set_measure_en(data, true); 913 } 914 915 static int adxl313_get_samples(struct adxl313_data *data) 916 { 917 unsigned int regval; 918 int ret; 919 920 ret = regmap_read(data->regmap, ADXL313_REG_FIFO_STATUS, ®val); 921 if (ret) 922 return ret; 923 924 return FIELD_GET(ADXL313_REG_FIFO_STATUS_ENTRIES_MSK, regval); 925 } 926 927 static int adxl313_fifo_transfer(struct adxl313_data *data, int samples) 928 { 929 unsigned int i; 930 int ret; 931 932 for (i = 0; i < samples; i++) { 933 ret = regmap_bulk_read(data->regmap, ADXL313_REG_XYZ_BASE, 934 data->fifo_buf + (i * ADXL313_NUM_AXIS), 935 sizeof(data->fifo_buf[0]) * ADXL313_NUM_AXIS); 936 if (ret) 937 return ret; 938 } 939 940 return 0; 941 } 942 943 /** 944 * adxl313_fifo_reset() - Reset the FIFO and interrupt status registers. 945 * @data: The device data. 946 * 947 * Reset the FIFO status registers. Reading out status registers clears the 948 * FIFO and interrupt configuration. Thus do not evaluate regmap return values. 949 * Ignore particular read register content. Register content is not processed 950 * any further. Therefore the function returns void. 951 */ 952 static void adxl313_fifo_reset(struct adxl313_data *data) 953 { 954 unsigned int regval; 955 int samples; 956 957 adxl313_set_measure_en(data, false); 958 959 samples = adxl313_get_samples(data); 960 if (samples > 0) 961 adxl313_fifo_transfer(data, samples); 962 963 regmap_read(data->regmap, ADXL313_REG_INT_SOURCE, ®val); 964 965 adxl313_set_measure_en(data, true); 966 } 967 968 static int adxl313_buffer_postenable(struct iio_dev *indio_dev) 969 { 970 struct adxl313_data *data = iio_priv(indio_dev); 971 int ret; 972 973 /* Set FIFO modes with measurement turned off, according to datasheet */ 974 ret = adxl313_set_measure_en(data, false); 975 if (ret) 976 return ret; 977 978 ret = regmap_write(data->regmap, ADXL313_REG_FIFO_CTL, 979 FIELD_PREP(ADXL313_REG_FIFO_CTL_SAMPLES_MSK, data->watermark) | 980 FIELD_PREP(ADXL313_REG_FIFO_CTL_MODE_MSK, ADXL313_FIFO_STREAM)); 981 if (ret) 982 return ret; 983 984 return adxl313_set_measure_en(data, true); 985 } 986 987 static int adxl313_buffer_predisable(struct iio_dev *indio_dev) 988 { 989 struct adxl313_data *data = iio_priv(indio_dev); 990 int ret; 991 992 ret = adxl313_set_measure_en(data, false); 993 if (ret) 994 return ret; 995 996 ret = regmap_write(data->regmap, ADXL313_REG_FIFO_CTL, 997 FIELD_PREP(ADXL313_REG_FIFO_CTL_MODE_MSK, ADXL313_FIFO_BYPASS)); 998 if (ret) 999 return ret; 1000 1001 ret = regmap_write(data->regmap, ADXL313_REG_INT_ENABLE, 0); 1002 if (ret) 1003 return ret; 1004 1005 return adxl313_set_measure_en(data, true); 1006 } 1007 1008 static const struct iio_buffer_setup_ops adxl313_buffer_ops = { 1009 .postenable = adxl313_buffer_postenable, 1010 .predisable = adxl313_buffer_predisable, 1011 }; 1012 1013 static int adxl313_fifo_push(struct iio_dev *indio_dev, int samples) 1014 { 1015 struct adxl313_data *data = iio_priv(indio_dev); 1016 unsigned int i; 1017 int ret; 1018 1019 ret = adxl313_fifo_transfer(data, samples); 1020 if (ret) 1021 return ret; 1022 1023 for (i = 0; i < ADXL313_NUM_AXIS * samples; i += ADXL313_NUM_AXIS) 1024 iio_push_to_buffers(indio_dev, &data->fifo_buf[i]); 1025 1026 return 0; 1027 } 1028 1029 static int adxl313_push_events(struct iio_dev *indio_dev, int int_stat) 1030 { 1031 s64 ts = iio_get_time_ns(indio_dev); 1032 struct adxl313_data *data = iio_priv(indio_dev); 1033 unsigned int regval; 1034 int ret = -ENOENT; 1035 1036 if (FIELD_GET(ADXL313_INT_ACTIVITY, int_stat)) { 1037 ret = regmap_read(data->regmap, ADXL313_REG_ACT_INACT_CTL, ®val); 1038 if (ret) 1039 return ret; 1040 1041 if (FIELD_GET(ADXL313_REG_ACT_ACDC_MSK, regval)) { 1042 /* AC coupled */ 1043 ret = iio_push_event(indio_dev, 1044 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, 1045 IIO_MOD_X_OR_Y_OR_Z, 1046 IIO_EV_TYPE_MAG_ADAPTIVE, 1047 IIO_EV_DIR_RISING), 1048 ts); 1049 if (ret) 1050 return ret; 1051 } else { 1052 /* DC coupled, relying on THRESH */ 1053 ret = iio_push_event(indio_dev, 1054 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, 1055 IIO_MOD_X_OR_Y_OR_Z, 1056 IIO_EV_TYPE_MAG, 1057 IIO_EV_DIR_RISING), 1058 ts); 1059 if (ret) 1060 return ret; 1061 } 1062 } 1063 1064 if (FIELD_GET(ADXL313_INT_INACTIVITY, int_stat)) { 1065 ret = regmap_read(data->regmap, ADXL313_REG_ACT_INACT_CTL, ®val); 1066 if (ret) 1067 return ret; 1068 1069 if (FIELD_GET(ADXL313_REG_INACT_ACDC_MSK, regval)) { 1070 /* AC coupled */ 1071 ret = iio_push_event(indio_dev, 1072 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, 1073 IIO_MOD_X_AND_Y_AND_Z, 1074 IIO_EV_TYPE_MAG_ADAPTIVE, 1075 IIO_EV_DIR_FALLING), 1076 ts); 1077 if (ret) 1078 return ret; 1079 } else { 1080 /* DC coupled, relying on THRESH */ 1081 ret = iio_push_event(indio_dev, 1082 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, 1083 IIO_MOD_X_AND_Y_AND_Z, 1084 IIO_EV_TYPE_MAG, 1085 IIO_EV_DIR_FALLING), 1086 ts); 1087 if (ret) 1088 return ret; 1089 } 1090 } 1091 1092 return ret; 1093 } 1094 1095 static irqreturn_t adxl313_irq_handler(int irq, void *p) 1096 { 1097 struct iio_dev *indio_dev = p; 1098 struct adxl313_data *data = iio_priv(indio_dev); 1099 int samples, int_stat; 1100 1101 if (regmap_read(data->regmap, ADXL313_REG_INT_SOURCE, &int_stat)) 1102 return IRQ_NONE; 1103 1104 /* 1105 * In cases of sensor events not handled (still not implemented) by 1106 * this driver, the FIFO needs to be drained to become operational 1107 * again. In general the sensor configuration only should issue events 1108 * which were configured by this driver. Anyway a miss-configuration 1109 * easily might end up in a hanging sensor FIFO. 1110 */ 1111 if (adxl313_push_events(indio_dev, int_stat)) 1112 goto err_reset_fifo; 1113 1114 if (FIELD_GET(ADXL313_INT_WATERMARK, int_stat)) { 1115 samples = adxl313_get_samples(data); 1116 if (samples < 0) 1117 goto err_reset_fifo; 1118 1119 if (adxl313_fifo_push(indio_dev, samples)) 1120 goto err_reset_fifo; 1121 } 1122 1123 if (FIELD_GET(ADXL313_INT_OVERRUN, int_stat)) 1124 goto err_reset_fifo; 1125 1126 return IRQ_HANDLED; 1127 1128 err_reset_fifo: 1129 adxl313_fifo_reset(data); 1130 1131 return IRQ_HANDLED; 1132 } 1133 1134 static int adxl313_reg_access(struct iio_dev *indio_dev, unsigned int reg, 1135 unsigned int writeval, unsigned int *readval) 1136 { 1137 struct adxl313_data *data = iio_priv(indio_dev); 1138 1139 if (readval) 1140 return regmap_read(data->regmap, reg, readval); 1141 return regmap_write(data->regmap, reg, writeval); 1142 } 1143 1144 static const struct iio_info adxl313_info = { 1145 .read_raw = adxl313_read_raw, 1146 .write_raw = adxl313_write_raw, 1147 .read_event_config = adxl313_read_event_config, 1148 .write_event_config = adxl313_write_event_config, 1149 .read_event_value = adxl313_read_event_value, 1150 .write_event_value = adxl313_write_event_value, 1151 .read_avail = adxl313_read_freq_avail, 1152 .hwfifo_set_watermark = adxl313_set_watermark, 1153 .debugfs_reg_access = &adxl313_reg_access, 1154 }; 1155 1156 static int adxl313_setup(struct device *dev, struct adxl313_data *data, 1157 int (*setup)(struct device *, struct regmap *)) 1158 { 1159 int ret; 1160 1161 /* 1162 * If sw reset available, ensures the device is in a consistent 1163 * state after start up 1164 */ 1165 if (data->chip_info->soft_reset) { 1166 ret = regmap_write(data->regmap, ADXL313_REG_SOFT_RESET, 1167 ADXL313_SOFT_RESET); 1168 if (ret) 1169 return ret; 1170 } 1171 1172 if (setup) { 1173 ret = setup(dev, data->regmap); 1174 if (ret) 1175 return ret; 1176 } 1177 1178 ret = data->chip_info->check_id(dev, data); 1179 if (ret) 1180 return ret; 1181 1182 /* Sets the range to maximum, full resolution, if applicable */ 1183 if (data->chip_info->variable_range) { 1184 ret = regmap_update_bits(data->regmap, ADXL313_REG_DATA_FORMAT, 1185 ADXL313_RANGE_MSK, 1186 FIELD_PREP(ADXL313_RANGE_MSK, ADXL313_RANGE_MAX)); 1187 if (ret) 1188 return ret; 1189 1190 /* Enables full resolution */ 1191 ret = regmap_update_bits(data->regmap, ADXL313_REG_DATA_FORMAT, 1192 ADXL313_FULL_RES, ADXL313_FULL_RES); 1193 if (ret) 1194 return ret; 1195 } 1196 1197 /* Enables measurement mode */ 1198 return adxl313_set_measure_en(data, true); 1199 } 1200 1201 static unsigned int adxl313_get_int_type(struct device *dev, int *irq) 1202 { 1203 *irq = fwnode_irq_get_byname(dev_fwnode(dev), "INT1"); 1204 if (*irq > 0) 1205 return ADXL313_INT1; 1206 1207 *irq = fwnode_irq_get_byname(dev_fwnode(dev), "INT2"); 1208 if (*irq > 0) 1209 return ADXL313_INT2; 1210 1211 return ADXL313_INT_NONE; 1212 } 1213 1214 /** 1215 * adxl313_core_probe() - probe and setup for adxl313 accelerometer 1216 * @dev: Driver model representation of the device 1217 * @regmap: Register map of the device 1218 * @chip_info: Structure containing device specific data 1219 * @setup: Setup routine to be executed right before the standard device 1220 * setup, can also be set to NULL if not required 1221 * 1222 * Return: 0 on success, negative errno on error cases 1223 */ 1224 int adxl313_core_probe(struct device *dev, 1225 struct regmap *regmap, 1226 const struct adxl313_chip_info *chip_info, 1227 int (*setup)(struct device *, struct regmap *)) 1228 { 1229 struct adxl313_data *data; 1230 struct iio_dev *indio_dev; 1231 u8 int_line; 1232 u8 int_map_msk; 1233 int irq, ret; 1234 1235 indio_dev = devm_iio_device_alloc(dev, sizeof(*data)); 1236 if (!indio_dev) 1237 return -ENOMEM; 1238 1239 data = iio_priv(indio_dev); 1240 data->regmap = regmap; 1241 data->chip_info = chip_info; 1242 1243 mutex_init(&data->lock); 1244 1245 indio_dev->name = chip_info->name; 1246 indio_dev->info = &adxl313_info; 1247 indio_dev->modes = INDIO_DIRECT_MODE; 1248 indio_dev->channels = adxl313_channels; 1249 indio_dev->num_channels = ARRAY_SIZE(adxl313_channels); 1250 indio_dev->available_scan_masks = adxl313_scan_masks; 1251 1252 ret = adxl313_setup(dev, data, setup); 1253 if (ret) { 1254 dev_err(dev, "ADXL313 setup failed\n"); 1255 return ret; 1256 } 1257 1258 int_line = adxl313_get_int_type(dev, &irq); 1259 if (int_line == ADXL313_INT_NONE) { 1260 /* 1261 * FIFO_BYPASSED mode 1262 * 1263 * When no interrupt lines are specified, the driver falls back 1264 * to use the sensor in FIFO_BYPASS mode. This means turning off 1265 * internal FIFO and interrupt generation (since there is no 1266 * line specified). Unmaskable interrupts such as overrun or 1267 * data ready won't interfere. Even that a FIFO_STREAM mode w/o 1268 * connected interrupt line might allow for obtaining raw 1269 * measurements, a fallback to disable interrupts when no 1270 * interrupt lines are connected seems to be the cleaner 1271 * solution. 1272 */ 1273 ret = regmap_write(data->regmap, ADXL313_REG_FIFO_CTL, 1274 FIELD_PREP(ADXL313_REG_FIFO_CTL_MODE_MSK, 1275 ADXL313_FIFO_BYPASS)); 1276 if (ret) 1277 return ret; 1278 } else { 1279 /* FIFO_STREAM mode */ 1280 int_map_msk = ADXL313_INT_DREADY | ADXL313_INT_ACTIVITY | 1281 ADXL313_INT_INACTIVITY | ADXL313_INT_WATERMARK | 1282 ADXL313_INT_OVERRUN; 1283 ret = regmap_assign_bits(data->regmap, ADXL313_REG_INT_MAP, 1284 int_map_msk, int_line == ADXL313_INT2); 1285 if (ret) 1286 return ret; 1287 1288 /* 1289 * Reset or configure the registers with reasonable default 1290 * values. As having 0 in most cases may result in undesirable 1291 * behavior if the interrupts are enabled. 1292 */ 1293 ret = regmap_write(data->regmap, ADXL313_REG_ACT_INACT_CTL, 0x00); 1294 if (ret) 1295 return ret; 1296 1297 ret = regmap_write(data->regmap, ADXL313_REG_TIME_INACT, 5); 1298 if (ret) 1299 return ret; 1300 1301 ret = regmap_write(data->regmap, ADXL313_REG_THRESH_INACT, 0x4f); 1302 if (ret) 1303 return ret; 1304 1305 ret = regmap_write(data->regmap, ADXL313_REG_THRESH_ACT, 0x52); 1306 if (ret) 1307 return ret; 1308 1309 ret = devm_iio_kfifo_buffer_setup(dev, indio_dev, 1310 &adxl313_buffer_ops); 1311 if (ret) 1312 return ret; 1313 1314 ret = devm_request_threaded_irq(dev, irq, NULL, 1315 &adxl313_irq_handler, 1316 IRQF_SHARED | IRQF_ONESHOT, 1317 indio_dev->name, indio_dev); 1318 if (ret) 1319 return ret; 1320 } 1321 1322 return devm_iio_device_register(dev, indio_dev); 1323 } 1324 EXPORT_SYMBOL_NS_GPL(adxl313_core_probe, "IIO_ADXL313"); 1325 1326 MODULE_AUTHOR("Lucas Stankus <lucas.p.stankus@gmail.com>"); 1327 MODULE_DESCRIPTION("ADXL313 3-Axis Digital Accelerometer core driver"); 1328 MODULE_LICENSE("GPL v2"); 1329