1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* 3 * Copyright (c) 2020, MIPI Alliance, Inc. 4 * 5 * Author: Nicolas Pitre <npitre@baylibre.com> 6 * 7 * Transfer Mode/Rate Table definitions as found in extended capability 8 * sections 0x04 and 0x08. 9 * This applies starting from I3C HCI v2.0. 10 */ 11 12 #ifndef XFER_MODE_RATE_H 13 #define XFER_MODE_RATE_H 14 15 /* 16 * Master Transfer Mode Table Fixed Indexes. 17 * 18 * Indexes 0x0 and 0x8 are mandatory. Availability for the rest must be 19 * obtained from the mode table in the extended capability area. 20 * Presence and definitions for indexes beyond these ones may vary. 21 */ 22 #define XFERMODE_IDX_I3C_SDR 0x00 /* I3C SDR Mode */ 23 #define XFERMODE_IDX_I3C_HDR_DDR 0x01 /* I3C HDR-DDR Mode */ 24 #define XFERMODE_IDX_I3C_HDR_T 0x02 /* I3C HDR-Ternary Mode */ 25 #define XFERMODE_IDX_I3C_HDR_BT 0x03 /* I3C HDR-BT Mode */ 26 #define XFERMODE_IDX_I2C 0x08 /* Legacy I2C Mode */ 27 28 /* 29 * Transfer Mode Table Entry Bits Definitions 30 */ 31 #define XFERMODE_VALID_XFER_ADD_FUNC GENMASK(21, 16) 32 #define XFERMODE_ML_DATA_XFER_CODING GENMASK(15, 11) 33 #define XFERMODE_ML_ADDL_LANES GENMASK(10, 8) 34 #define XFERMODE_SUPPORTED BIT(7) 35 #define XFERMODE_MODE GENMASK(3, 0) 36 37 /* 38 * Master Data Transfer Rate Selector Values. 39 * 40 * These are the values to be used in the command descriptor XFER_RATE field 41 * and found in the RATE_ID field below. 42 * The I3C_SDR0, I3C_SDR1, I3C_SDR2, I3C_SDR3, I3C_SDR4 and I2C_FM rates 43 * are required, everything else is optional and discoverable in the 44 * Data Transfer Rate Table. Indicated are typical rates. The actual 45 * rates may vary slightly and are also specified in the Data Transfer 46 * Rate Table. 47 */ 48 #define XFERRATE_I3C_SDR0 0x00 /* 12.5 MHz */ 49 #define XFERRATE_I3C_SDR1 0x01 /* 8 MHz */ 50 #define XFERRATE_I3C_SDR2 0x02 /* 6 MHz */ 51 #define XFERRATE_I3C_SDR3 0x03 /* 4 MHz */ 52 #define XFERRATE_I3C_SDR4 0x04 /* 2 MHz */ 53 #define XFERRATE_I3C_SDR_FM_FMP 0x05 /* 400 KHz / 1 MHz */ 54 #define XFERRATE_I3C_SDR_USER6 0x06 /* User Defined */ 55 #define XFERRATE_I3C_SDR_USER7 0x07 /* User Defined */ 56 57 #define XFERRATE_I2C_FM 0x00 /* 400 KHz */ 58 #define XFERRATE_I2C_FMP 0x01 /* 1 MHz */ 59 #define XFERRATE_I2C_USER2 0x02 /* User Defined */ 60 #define XFERRATE_I2C_USER3 0x03 /* User Defined */ 61 #define XFERRATE_I2C_USER4 0x04 /* User Defined */ 62 #define XFERRATE_I2C_USER5 0x05 /* User Defined */ 63 #define XFERRATE_I2C_USER6 0x06 /* User Defined */ 64 #define XFERRATE_I2C_USER7 0x07 /* User Defined */ 65 66 /* 67 * Master Data Transfer Rate Table Mode ID values. 68 */ 69 #define XFERRATE_MODE_I3C 0x00 70 #define XFERRATE_MODE_I2C 0x08 71 72 /* 73 * Master Data Transfer Rate Table Entry Bits Definitions 74 */ 75 #define XFERRATE_MODE_ID GENMASK(31, 28) 76 #define XFERRATE_RATE_ID GENMASK(22, 20) 77 #define XFERRATE_ACTUAL_RATE_KHZ GENMASK(19, 0) 78 79 #endif 80