xref: /linux/drivers/i3c/master.c (revision c02ce1735b150cf7c3b43790b48e23dcd17c0d46)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2018 Cadence Design Systems Inc.
4  *
5  * Author: Boris Brezillon <boris.brezillon@bootlin.com>
6  */
7 
8 #include <linux/atomic.h>
9 #include <linux/bug.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/list.h>
15 #include <linux/of.h>
16 #include <linux/slab.h>
17 #include <linux/spinlock.h>
18 #include <linux/workqueue.h>
19 
20 #include "internals.h"
21 
22 static DEFINE_IDR(i3c_bus_idr);
23 static DEFINE_MUTEX(i3c_core_lock);
24 static int __i3c_first_dynamic_bus_num;
25 static BLOCKING_NOTIFIER_HEAD(i3c_bus_notifier);
26 
27 /**
28  * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
29  * @bus: I3C bus to take the lock on
30  *
31  * This function takes the bus lock so that no other operations can occur on
32  * the bus. This is needed for all kind of bus maintenance operation, like
33  * - enabling/disabling slave events
34  * - re-triggering DAA
35  * - changing the dynamic address of a device
36  * - relinquishing mastership
37  * - ...
38  *
39  * The reason for this kind of locking is that we don't want drivers and core
40  * logic to rely on I3C device information that could be changed behind their
41  * back.
42  */
43 static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
44 {
45 	down_write(&bus->lock);
46 }
47 
48 /**
49  * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
50  *			      operation
51  * @bus: I3C bus to release the lock on
52  *
53  * Should be called when the bus maintenance operation is done. See
54  * i3c_bus_maintenance_lock() for more details on what these maintenance
55  * operations are.
56  */
57 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
58 {
59 	up_write(&bus->lock);
60 }
61 
62 /**
63  * i3c_bus_normaluse_lock - Lock the bus for a normal operation
64  * @bus: I3C bus to take the lock on
65  *
66  * This function takes the bus lock for any operation that is not a maintenance
67  * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
68  * maintenance operations). Basically all communications with I3C devices are
69  * normal operations (HDR, SDR transfers or CCC commands that do not change bus
70  * state or I3C dynamic address).
71  *
72  * Note that this lock is not guaranteeing serialization of normal operations.
73  * In other words, transfer requests passed to the I3C master can be submitted
74  * in parallel and I3C master drivers have to use their own locking to make
75  * sure two different communications are not inter-mixed, or access to the
76  * output/input queue is not done while the engine is busy.
77  */
78 void i3c_bus_normaluse_lock(struct i3c_bus *bus)
79 {
80 	down_read(&bus->lock);
81 }
82 
83 /**
84  * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
85  * @bus: I3C bus to release the lock on
86  *
87  * Should be called when a normal operation is done. See
88  * i3c_bus_normaluse_lock() for more details on what these normal operations
89  * are.
90  */
91 void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
92 {
93 	up_read(&bus->lock);
94 }
95 
96 static struct i3c_master_controller *
97 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
98 {
99 	return container_of(i3cbus, struct i3c_master_controller, bus);
100 }
101 
102 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
103 {
104 	return container_of(dev, struct i3c_master_controller, dev);
105 }
106 
107 static const struct device_type i3c_device_type;
108 
109 static struct i3c_bus *dev_to_i3cbus(struct device *dev)
110 {
111 	struct i3c_master_controller *master;
112 
113 	if (dev->type == &i3c_device_type)
114 		return dev_to_i3cdev(dev)->bus;
115 
116 	master = dev_to_i3cmaster(dev);
117 
118 	return &master->bus;
119 }
120 
121 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
122 {
123 	struct i3c_master_controller *master;
124 
125 	if (dev->type == &i3c_device_type)
126 		return dev_to_i3cdev(dev)->desc;
127 
128 	master = dev_to_i3cmaster(dev);
129 
130 	return master->this;
131 }
132 
133 static ssize_t bcr_show(struct device *dev,
134 			struct device_attribute *da,
135 			char *buf)
136 {
137 	struct i3c_bus *bus = dev_to_i3cbus(dev);
138 	struct i3c_dev_desc *desc;
139 	ssize_t ret;
140 
141 	i3c_bus_normaluse_lock(bus);
142 	desc = dev_to_i3cdesc(dev);
143 	ret = sprintf(buf, "%x\n", desc->info.bcr);
144 	i3c_bus_normaluse_unlock(bus);
145 
146 	return ret;
147 }
148 static DEVICE_ATTR_RO(bcr);
149 
150 static ssize_t dcr_show(struct device *dev,
151 			struct device_attribute *da,
152 			char *buf)
153 {
154 	struct i3c_bus *bus = dev_to_i3cbus(dev);
155 	struct i3c_dev_desc *desc;
156 	ssize_t ret;
157 
158 	i3c_bus_normaluse_lock(bus);
159 	desc = dev_to_i3cdesc(dev);
160 	ret = sprintf(buf, "%x\n", desc->info.dcr);
161 	i3c_bus_normaluse_unlock(bus);
162 
163 	return ret;
164 }
165 static DEVICE_ATTR_RO(dcr);
166 
167 static ssize_t pid_show(struct device *dev,
168 			struct device_attribute *da,
169 			char *buf)
170 {
171 	struct i3c_bus *bus = dev_to_i3cbus(dev);
172 	struct i3c_dev_desc *desc;
173 	ssize_t ret;
174 
175 	i3c_bus_normaluse_lock(bus);
176 	desc = dev_to_i3cdesc(dev);
177 	ret = sprintf(buf, "%llx\n", desc->info.pid);
178 	i3c_bus_normaluse_unlock(bus);
179 
180 	return ret;
181 }
182 static DEVICE_ATTR_RO(pid);
183 
184 static ssize_t dynamic_address_show(struct device *dev,
185 				    struct device_attribute *da,
186 				    char *buf)
187 {
188 	struct i3c_bus *bus = dev_to_i3cbus(dev);
189 	struct i3c_dev_desc *desc;
190 	ssize_t ret;
191 
192 	i3c_bus_normaluse_lock(bus);
193 	desc = dev_to_i3cdesc(dev);
194 	ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
195 	i3c_bus_normaluse_unlock(bus);
196 
197 	return ret;
198 }
199 static DEVICE_ATTR_RO(dynamic_address);
200 
201 static const char * const hdrcap_strings[] = {
202 	"hdr-ddr", "hdr-tsp", "hdr-tsl",
203 };
204 
205 static ssize_t hdrcap_show(struct device *dev,
206 			   struct device_attribute *da,
207 			   char *buf)
208 {
209 	struct i3c_bus *bus = dev_to_i3cbus(dev);
210 	struct i3c_dev_desc *desc;
211 	ssize_t offset = 0, ret;
212 	unsigned long caps;
213 	int mode;
214 
215 	i3c_bus_normaluse_lock(bus);
216 	desc = dev_to_i3cdesc(dev);
217 	caps = desc->info.hdr_cap;
218 	for_each_set_bit(mode, &caps, 8) {
219 		if (mode >= ARRAY_SIZE(hdrcap_strings))
220 			break;
221 
222 		if (!hdrcap_strings[mode])
223 			continue;
224 
225 		ret = sprintf(buf + offset, offset ? " %s" : "%s",
226 			      hdrcap_strings[mode]);
227 		if (ret < 0)
228 			goto out;
229 
230 		offset += ret;
231 	}
232 
233 	ret = sprintf(buf + offset, "\n");
234 	if (ret < 0)
235 		goto out;
236 
237 	ret = offset + ret;
238 
239 out:
240 	i3c_bus_normaluse_unlock(bus);
241 
242 	return ret;
243 }
244 static DEVICE_ATTR_RO(hdrcap);
245 
246 static ssize_t modalias_show(struct device *dev,
247 			     struct device_attribute *da, char *buf)
248 {
249 	struct i3c_device *i3c = dev_to_i3cdev(dev);
250 	struct i3c_device_info devinfo;
251 	u16 manuf, part, ext;
252 
253 	i3c_device_get_info(i3c, &devinfo);
254 	manuf = I3C_PID_MANUF_ID(devinfo.pid);
255 	part = I3C_PID_PART_ID(devinfo.pid);
256 	ext = I3C_PID_EXTRA_INFO(devinfo.pid);
257 
258 	if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
259 		return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
260 			       manuf);
261 
262 	return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
263 		       devinfo.dcr, manuf, part, ext);
264 }
265 static DEVICE_ATTR_RO(modalias);
266 
267 static struct attribute *i3c_device_attrs[] = {
268 	&dev_attr_bcr.attr,
269 	&dev_attr_dcr.attr,
270 	&dev_attr_pid.attr,
271 	&dev_attr_dynamic_address.attr,
272 	&dev_attr_hdrcap.attr,
273 	&dev_attr_modalias.attr,
274 	NULL,
275 };
276 ATTRIBUTE_GROUPS(i3c_device);
277 
278 static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env)
279 {
280 	const struct i3c_device *i3cdev = dev_to_i3cdev(dev);
281 	struct i3c_device_info devinfo;
282 	u16 manuf, part, ext;
283 
284 	i3c_device_get_info(i3cdev, &devinfo);
285 	manuf = I3C_PID_MANUF_ID(devinfo.pid);
286 	part = I3C_PID_PART_ID(devinfo.pid);
287 	ext = I3C_PID_EXTRA_INFO(devinfo.pid);
288 
289 	if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
290 		return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
291 				      devinfo.dcr, manuf);
292 
293 	return add_uevent_var(env,
294 			      "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
295 			      devinfo.dcr, manuf, part, ext);
296 }
297 
298 static const struct device_type i3c_device_type = {
299 	.groups	= i3c_device_groups,
300 	.uevent = i3c_device_uevent,
301 };
302 
303 static int i3c_device_match(struct device *dev, struct device_driver *drv)
304 {
305 	struct i3c_device *i3cdev;
306 	struct i3c_driver *i3cdrv;
307 
308 	if (dev->type != &i3c_device_type)
309 		return 0;
310 
311 	i3cdev = dev_to_i3cdev(dev);
312 	i3cdrv = drv_to_i3cdrv(drv);
313 	if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
314 		return 1;
315 
316 	return 0;
317 }
318 
319 static int i3c_device_probe(struct device *dev)
320 {
321 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
322 	struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
323 
324 	return driver->probe(i3cdev);
325 }
326 
327 static void i3c_device_remove(struct device *dev)
328 {
329 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
330 	struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
331 
332 	if (driver->remove)
333 		driver->remove(i3cdev);
334 
335 	i3c_device_free_ibi(i3cdev);
336 }
337 
338 const struct bus_type i3c_bus_type = {
339 	.name = "i3c",
340 	.match = i3c_device_match,
341 	.probe = i3c_device_probe,
342 	.remove = i3c_device_remove,
343 };
344 
345 static enum i3c_addr_slot_status
346 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
347 {
348 	unsigned long status;
349 	int bitpos = addr * 2;
350 
351 	if (addr > I2C_MAX_ADDR)
352 		return I3C_ADDR_SLOT_RSVD;
353 
354 	status = bus->addrslots[bitpos / BITS_PER_LONG];
355 	status >>= bitpos % BITS_PER_LONG;
356 
357 	return status & I3C_ADDR_SLOT_STATUS_MASK;
358 }
359 
360 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
361 					 enum i3c_addr_slot_status status)
362 {
363 	int bitpos = addr * 2;
364 	unsigned long *ptr;
365 
366 	if (addr > I2C_MAX_ADDR)
367 		return;
368 
369 	ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
370 	*ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
371 						(bitpos % BITS_PER_LONG));
372 	*ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
373 }
374 
375 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
376 {
377 	enum i3c_addr_slot_status status;
378 
379 	status = i3c_bus_get_addr_slot_status(bus, addr);
380 
381 	return status == I3C_ADDR_SLOT_FREE;
382 }
383 
384 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
385 {
386 	enum i3c_addr_slot_status status;
387 	u8 addr;
388 
389 	for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
390 		status = i3c_bus_get_addr_slot_status(bus, addr);
391 		if (status == I3C_ADDR_SLOT_FREE)
392 			return addr;
393 	}
394 
395 	return -ENOMEM;
396 }
397 
398 static void i3c_bus_init_addrslots(struct i3c_bus *bus)
399 {
400 	int i;
401 
402 	/* Addresses 0 to 7 are reserved. */
403 	for (i = 0; i < 8; i++)
404 		i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
405 
406 	/*
407 	 * Reserve broadcast address and all addresses that might collide
408 	 * with the broadcast address when facing a single bit error.
409 	 */
410 	i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
411 				     I3C_ADDR_SLOT_RSVD);
412 	for (i = 0; i < 7; i++)
413 		i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
414 					     I3C_ADDR_SLOT_RSVD);
415 }
416 
417 static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
418 {
419 	mutex_lock(&i3c_core_lock);
420 	idr_remove(&i3c_bus_idr, i3cbus->id);
421 	mutex_unlock(&i3c_core_lock);
422 }
423 
424 static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np)
425 {
426 	int ret, start, end, id = -1;
427 
428 	init_rwsem(&i3cbus->lock);
429 	INIT_LIST_HEAD(&i3cbus->devs.i2c);
430 	INIT_LIST_HEAD(&i3cbus->devs.i3c);
431 	i3c_bus_init_addrslots(i3cbus);
432 	i3cbus->mode = I3C_BUS_MODE_PURE;
433 
434 	if (np)
435 		id = of_alias_get_id(np, "i3c");
436 
437 	mutex_lock(&i3c_core_lock);
438 	if (id >= 0) {
439 		start = id;
440 		end = start + 1;
441 	} else {
442 		start = __i3c_first_dynamic_bus_num;
443 		end = 0;
444 	}
445 
446 	ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL);
447 	mutex_unlock(&i3c_core_lock);
448 
449 	if (ret < 0)
450 		return ret;
451 
452 	i3cbus->id = ret;
453 
454 	return 0;
455 }
456 
457 void i3c_for_each_bus_locked(int (*fn)(struct i3c_bus *bus, void *data),
458 			     void *data)
459 {
460 	struct i3c_bus *bus;
461 	int id;
462 
463 	mutex_lock(&i3c_core_lock);
464 	idr_for_each_entry(&i3c_bus_idr, bus, id)
465 		fn(bus, data);
466 	mutex_unlock(&i3c_core_lock);
467 }
468 EXPORT_SYMBOL_GPL(i3c_for_each_bus_locked);
469 
470 int i3c_register_notifier(struct notifier_block *nb)
471 {
472 	return blocking_notifier_chain_register(&i3c_bus_notifier, nb);
473 }
474 EXPORT_SYMBOL_GPL(i3c_register_notifier);
475 
476 int i3c_unregister_notifier(struct notifier_block *nb)
477 {
478 	return blocking_notifier_chain_unregister(&i3c_bus_notifier, nb);
479 }
480 EXPORT_SYMBOL_GPL(i3c_unregister_notifier);
481 
482 static void i3c_bus_notify(struct i3c_bus *bus, unsigned int action)
483 {
484 	blocking_notifier_call_chain(&i3c_bus_notifier, action, bus);
485 }
486 
487 static const char * const i3c_bus_mode_strings[] = {
488 	[I3C_BUS_MODE_PURE] = "pure",
489 	[I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
490 	[I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
491 	[I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
492 };
493 
494 static ssize_t mode_show(struct device *dev,
495 			 struct device_attribute *da,
496 			 char *buf)
497 {
498 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
499 	ssize_t ret;
500 
501 	i3c_bus_normaluse_lock(i3cbus);
502 	if (i3cbus->mode < 0 ||
503 	    i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
504 	    !i3c_bus_mode_strings[i3cbus->mode])
505 		ret = sprintf(buf, "unknown\n");
506 	else
507 		ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
508 	i3c_bus_normaluse_unlock(i3cbus);
509 
510 	return ret;
511 }
512 static DEVICE_ATTR_RO(mode);
513 
514 static ssize_t current_master_show(struct device *dev,
515 				   struct device_attribute *da,
516 				   char *buf)
517 {
518 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
519 	ssize_t ret;
520 
521 	i3c_bus_normaluse_lock(i3cbus);
522 	ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
523 		      i3cbus->cur_master->info.pid);
524 	i3c_bus_normaluse_unlock(i3cbus);
525 
526 	return ret;
527 }
528 static DEVICE_ATTR_RO(current_master);
529 
530 static ssize_t i3c_scl_frequency_show(struct device *dev,
531 				      struct device_attribute *da,
532 				      char *buf)
533 {
534 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
535 	ssize_t ret;
536 
537 	i3c_bus_normaluse_lock(i3cbus);
538 	ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
539 	i3c_bus_normaluse_unlock(i3cbus);
540 
541 	return ret;
542 }
543 static DEVICE_ATTR_RO(i3c_scl_frequency);
544 
545 static ssize_t i2c_scl_frequency_show(struct device *dev,
546 				      struct device_attribute *da,
547 				      char *buf)
548 {
549 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
550 	ssize_t ret;
551 
552 	i3c_bus_normaluse_lock(i3cbus);
553 	ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
554 	i3c_bus_normaluse_unlock(i3cbus);
555 
556 	return ret;
557 }
558 static DEVICE_ATTR_RO(i2c_scl_frequency);
559 
560 static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable)
561 {
562 	int ret;
563 
564 	if (!master || !master->ops)
565 		return -EINVAL;
566 
567 	if (!master->ops->enable_hotjoin || !master->ops->disable_hotjoin)
568 		return -EINVAL;
569 
570 	i3c_bus_normaluse_lock(&master->bus);
571 
572 	if (enable)
573 		ret = master->ops->enable_hotjoin(master);
574 	else
575 		ret = master->ops->disable_hotjoin(master);
576 
577 	master->hotjoin = enable;
578 
579 	i3c_bus_normaluse_unlock(&master->bus);
580 
581 	return ret;
582 }
583 
584 static ssize_t hotjoin_store(struct device *dev, struct device_attribute *attr,
585 			     const char *buf, size_t count)
586 {
587 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
588 	int ret;
589 	bool res;
590 
591 	if (!i3cbus->cur_master)
592 		return -EINVAL;
593 
594 	if (kstrtobool(buf, &res))
595 		return -EINVAL;
596 
597 	ret = i3c_set_hotjoin(i3cbus->cur_master->common.master, res);
598 	if (ret)
599 		return ret;
600 
601 	return count;
602 }
603 
604 /*
605  * i3c_master_enable_hotjoin - Enable hotjoin
606  * @master: I3C master object
607  *
608  * Return: a 0 in case of success, an negative error code otherwise.
609  */
610 int i3c_master_enable_hotjoin(struct i3c_master_controller *master)
611 {
612 	return i3c_set_hotjoin(master, true);
613 }
614 EXPORT_SYMBOL_GPL(i3c_master_enable_hotjoin);
615 
616 /*
617  * i3c_master_disable_hotjoin - Disable hotjoin
618  * @master: I3C master object
619  *
620  * Return: a 0 in case of success, an negative error code otherwise.
621  */
622 int i3c_master_disable_hotjoin(struct i3c_master_controller *master)
623 {
624 	return i3c_set_hotjoin(master, false);
625 }
626 EXPORT_SYMBOL_GPL(i3c_master_disable_hotjoin);
627 
628 static ssize_t hotjoin_show(struct device *dev, struct device_attribute *da, char *buf)
629 {
630 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
631 	ssize_t ret;
632 
633 	i3c_bus_normaluse_lock(i3cbus);
634 	ret = sysfs_emit(buf, "%d\n", i3cbus->cur_master->common.master->hotjoin);
635 	i3c_bus_normaluse_unlock(i3cbus);
636 
637 	return ret;
638 }
639 
640 static DEVICE_ATTR_RW(hotjoin);
641 
642 static struct attribute *i3c_masterdev_attrs[] = {
643 	&dev_attr_mode.attr,
644 	&dev_attr_current_master.attr,
645 	&dev_attr_i3c_scl_frequency.attr,
646 	&dev_attr_i2c_scl_frequency.attr,
647 	&dev_attr_bcr.attr,
648 	&dev_attr_dcr.attr,
649 	&dev_attr_pid.attr,
650 	&dev_attr_dynamic_address.attr,
651 	&dev_attr_hdrcap.attr,
652 	&dev_attr_hotjoin.attr,
653 	NULL,
654 };
655 ATTRIBUTE_GROUPS(i3c_masterdev);
656 
657 static void i3c_masterdev_release(struct device *dev)
658 {
659 	struct i3c_master_controller *master = dev_to_i3cmaster(dev);
660 	struct i3c_bus *bus = dev_to_i3cbus(dev);
661 
662 	if (master->wq)
663 		destroy_workqueue(master->wq);
664 
665 	WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
666 	i3c_bus_cleanup(bus);
667 
668 	of_node_put(dev->of_node);
669 }
670 
671 static const struct device_type i3c_masterdev_type = {
672 	.groups	= i3c_masterdev_groups,
673 };
674 
675 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
676 			    unsigned long max_i2c_scl_rate)
677 {
678 	struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
679 
680 	i3cbus->mode = mode;
681 
682 	switch (i3cbus->mode) {
683 	case I3C_BUS_MODE_PURE:
684 		if (!i3cbus->scl_rate.i3c)
685 			i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
686 		break;
687 	case I3C_BUS_MODE_MIXED_FAST:
688 	case I3C_BUS_MODE_MIXED_LIMITED:
689 		if (!i3cbus->scl_rate.i3c)
690 			i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
691 		if (!i3cbus->scl_rate.i2c)
692 			i3cbus->scl_rate.i2c = max_i2c_scl_rate;
693 		break;
694 	case I3C_BUS_MODE_MIXED_SLOW:
695 		if (!i3cbus->scl_rate.i2c)
696 			i3cbus->scl_rate.i2c = max_i2c_scl_rate;
697 		if (!i3cbus->scl_rate.i3c ||
698 		    i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
699 			i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
700 		break;
701 	default:
702 		return -EINVAL;
703 	}
704 
705 	dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
706 		i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
707 
708 	/*
709 	 * I3C/I2C frequency may have been overridden, check that user-provided
710 	 * values are not exceeding max possible frequency.
711 	 */
712 	if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
713 	    i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
714 		return -EINVAL;
715 
716 	return 0;
717 }
718 
719 static struct i3c_master_controller *
720 i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
721 {
722 	return container_of(adap, struct i3c_master_controller, i2c);
723 }
724 
725 static struct i2c_adapter *
726 i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
727 {
728 	return &master->i2c;
729 }
730 
731 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
732 {
733 	kfree(dev);
734 }
735 
736 static struct i2c_dev_desc *
737 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
738 			 u16 addr, u8 lvr)
739 {
740 	struct i2c_dev_desc *dev;
741 
742 	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
743 	if (!dev)
744 		return ERR_PTR(-ENOMEM);
745 
746 	dev->common.master = master;
747 	dev->addr = addr;
748 	dev->lvr = lvr;
749 
750 	return dev;
751 }
752 
753 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
754 				   u16 payloadlen)
755 {
756 	dest->addr = addr;
757 	dest->payload.len = payloadlen;
758 	if (payloadlen)
759 		dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
760 	else
761 		dest->payload.data = NULL;
762 
763 	return dest->payload.data;
764 }
765 
766 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
767 {
768 	kfree(dest->payload.data);
769 }
770 
771 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
772 			     struct i3c_ccc_cmd_dest *dests,
773 			     unsigned int ndests)
774 {
775 	cmd->rnw = rnw ? 1 : 0;
776 	cmd->id = id;
777 	cmd->dests = dests;
778 	cmd->ndests = ndests;
779 	cmd->err = I3C_ERROR_UNKNOWN;
780 }
781 
782 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
783 					  struct i3c_ccc_cmd *cmd)
784 {
785 	int ret;
786 
787 	if (!cmd || !master)
788 		return -EINVAL;
789 
790 	if (WARN_ON(master->init_done &&
791 		    !rwsem_is_locked(&master->bus.lock)))
792 		return -EINVAL;
793 
794 	if (!master->ops->send_ccc_cmd)
795 		return -ENOTSUPP;
796 
797 	if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
798 		return -EINVAL;
799 
800 	if (master->ops->supports_ccc_cmd &&
801 	    !master->ops->supports_ccc_cmd(master, cmd))
802 		return -ENOTSUPP;
803 
804 	ret = master->ops->send_ccc_cmd(master, cmd);
805 	if (ret) {
806 		if (cmd->err != I3C_ERROR_UNKNOWN)
807 			return cmd->err;
808 
809 		return ret;
810 	}
811 
812 	return 0;
813 }
814 
815 static struct i2c_dev_desc *
816 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
817 				u16 addr)
818 {
819 	struct i2c_dev_desc *dev;
820 
821 	i3c_bus_for_each_i2cdev(&master->bus, dev) {
822 		if (dev->addr == addr)
823 			return dev;
824 	}
825 
826 	return NULL;
827 }
828 
829 /**
830  * i3c_master_get_free_addr() - get a free address on the bus
831  * @master: I3C master object
832  * @start_addr: where to start searching
833  *
834  * This function must be called with the bus lock held in write mode.
835  *
836  * Return: the first free address starting at @start_addr (included) or -ENOMEM
837  * if there's no more address available.
838  */
839 int i3c_master_get_free_addr(struct i3c_master_controller *master,
840 			     u8 start_addr)
841 {
842 	return i3c_bus_get_free_addr(&master->bus, start_addr);
843 }
844 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
845 
846 static void i3c_device_release(struct device *dev)
847 {
848 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
849 
850 	WARN_ON(i3cdev->desc);
851 
852 	of_node_put(i3cdev->dev.of_node);
853 	kfree(i3cdev);
854 }
855 
856 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
857 {
858 	kfree(dev);
859 }
860 
861 static struct i3c_dev_desc *
862 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
863 			 const struct i3c_device_info *info)
864 {
865 	struct i3c_dev_desc *dev;
866 
867 	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
868 	if (!dev)
869 		return ERR_PTR(-ENOMEM);
870 
871 	dev->common.master = master;
872 	dev->info = *info;
873 	mutex_init(&dev->ibi_lock);
874 
875 	return dev;
876 }
877 
878 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
879 				    u8 addr)
880 {
881 	enum i3c_addr_slot_status addrstat;
882 	struct i3c_ccc_cmd_dest dest;
883 	struct i3c_ccc_cmd cmd;
884 	int ret;
885 
886 	if (!master)
887 		return -EINVAL;
888 
889 	addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
890 	if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
891 		return -EINVAL;
892 
893 	i3c_ccc_cmd_dest_init(&dest, addr, 0);
894 	i3c_ccc_cmd_init(&cmd, false,
895 			 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
896 			 &dest, 1);
897 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
898 	i3c_ccc_cmd_dest_cleanup(&dest);
899 
900 	return ret;
901 }
902 
903 /**
904  * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
905  *				procedure
906  * @master: master used to send frames on the bus
907  *
908  * Send a ENTDAA CCC command to start a DAA procedure.
909  *
910  * Note that this function only sends the ENTDAA CCC command, all the logic
911  * behind dynamic address assignment has to be handled in the I3C master
912  * driver.
913  *
914  * This function must be called with the bus lock held in write mode.
915  *
916  * Return: 0 in case of success, a positive I3C error code if the error is
917  * one of the official Mx error codes, and a negative error code otherwise.
918  */
919 int i3c_master_entdaa_locked(struct i3c_master_controller *master)
920 {
921 	struct i3c_ccc_cmd_dest dest;
922 	struct i3c_ccc_cmd cmd;
923 	int ret;
924 
925 	i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
926 	i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
927 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
928 	i3c_ccc_cmd_dest_cleanup(&dest);
929 
930 	return ret;
931 }
932 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
933 
934 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
935 					u8 addr, bool enable, u8 evts)
936 {
937 	struct i3c_ccc_events *events;
938 	struct i3c_ccc_cmd_dest dest;
939 	struct i3c_ccc_cmd cmd;
940 	int ret;
941 
942 	events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
943 	if (!events)
944 		return -ENOMEM;
945 
946 	events->events = evts;
947 	i3c_ccc_cmd_init(&cmd, false,
948 			 enable ?
949 			 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
950 			 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
951 			 &dest, 1);
952 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
953 	i3c_ccc_cmd_dest_cleanup(&dest);
954 
955 	return ret;
956 }
957 
958 /**
959  * i3c_master_disec_locked() - send a DISEC CCC command
960  * @master: master used to send frames on the bus
961  * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
962  * @evts: events to disable
963  *
964  * Send a DISEC CCC command to disable some or all events coming from a
965  * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
966  *
967  * This function must be called with the bus lock held in write mode.
968  *
969  * Return: 0 in case of success, a positive I3C error code if the error is
970  * one of the official Mx error codes, and a negative error code otherwise.
971  */
972 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
973 			    u8 evts)
974 {
975 	return i3c_master_enec_disec_locked(master, addr, false, evts);
976 }
977 EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
978 
979 /**
980  * i3c_master_enec_locked() - send an ENEC CCC command
981  * @master: master used to send frames on the bus
982  * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
983  * @evts: events to disable
984  *
985  * Sends an ENEC CCC command to enable some or all events coming from a
986  * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
987  *
988  * This function must be called with the bus lock held in write mode.
989  *
990  * Return: 0 in case of success, a positive I3C error code if the error is
991  * one of the official Mx error codes, and a negative error code otherwise.
992  */
993 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
994 			   u8 evts)
995 {
996 	return i3c_master_enec_disec_locked(master, addr, true, evts);
997 }
998 EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
999 
1000 /**
1001  * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
1002  * @master: master used to send frames on the bus
1003  *
1004  * Send a DEFSLVS CCC command containing all the devices known to the @master.
1005  * This is useful when you have secondary masters on the bus to propagate
1006  * device information.
1007  *
1008  * This should be called after all I3C devices have been discovered (in other
1009  * words, after the DAA procedure has finished) and instantiated in
1010  * &i3c_master_controller_ops->bus_init().
1011  * It should also be called if a master ACKed an Hot-Join request and assigned
1012  * a dynamic address to the device joining the bus.
1013  *
1014  * This function must be called with the bus lock held in write mode.
1015  *
1016  * Return: 0 in case of success, a positive I3C error code if the error is
1017  * one of the official Mx error codes, and a negative error code otherwise.
1018  */
1019 int i3c_master_defslvs_locked(struct i3c_master_controller *master)
1020 {
1021 	struct i3c_ccc_defslvs *defslvs;
1022 	struct i3c_ccc_dev_desc *desc;
1023 	struct i3c_ccc_cmd_dest dest;
1024 	struct i3c_dev_desc *i3cdev;
1025 	struct i2c_dev_desc *i2cdev;
1026 	struct i3c_ccc_cmd cmd;
1027 	struct i3c_bus *bus;
1028 	bool send = false;
1029 	int ndevs = 0, ret;
1030 
1031 	if (!master)
1032 		return -EINVAL;
1033 
1034 	bus = i3c_master_get_bus(master);
1035 	i3c_bus_for_each_i3cdev(bus, i3cdev) {
1036 		ndevs++;
1037 
1038 		if (i3cdev == master->this)
1039 			continue;
1040 
1041 		if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
1042 		    I3C_BCR_I3C_MASTER)
1043 			send = true;
1044 	}
1045 
1046 	/* No other master on the bus, skip DEFSLVS. */
1047 	if (!send)
1048 		return 0;
1049 
1050 	i3c_bus_for_each_i2cdev(bus, i2cdev)
1051 		ndevs++;
1052 
1053 	defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
1054 					struct_size(defslvs, slaves,
1055 						    ndevs - 1));
1056 	if (!defslvs)
1057 		return -ENOMEM;
1058 
1059 	defslvs->count = ndevs;
1060 	defslvs->master.bcr = master->this->info.bcr;
1061 	defslvs->master.dcr = master->this->info.dcr;
1062 	defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
1063 	defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
1064 
1065 	desc = defslvs->slaves;
1066 	i3c_bus_for_each_i2cdev(bus, i2cdev) {
1067 		desc->lvr = i2cdev->lvr;
1068 		desc->static_addr = i2cdev->addr << 1;
1069 		desc++;
1070 	}
1071 
1072 	i3c_bus_for_each_i3cdev(bus, i3cdev) {
1073 		/* Skip the I3C dev representing this master. */
1074 		if (i3cdev == master->this)
1075 			continue;
1076 
1077 		desc->bcr = i3cdev->info.bcr;
1078 		desc->dcr = i3cdev->info.dcr;
1079 		desc->dyn_addr = i3cdev->info.dyn_addr << 1;
1080 		desc->static_addr = i3cdev->info.static_addr << 1;
1081 		desc++;
1082 	}
1083 
1084 	i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
1085 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1086 	i3c_ccc_cmd_dest_cleanup(&dest);
1087 
1088 	return ret;
1089 }
1090 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
1091 
1092 static int i3c_master_setda_locked(struct i3c_master_controller *master,
1093 				   u8 oldaddr, u8 newaddr, bool setdasa)
1094 {
1095 	struct i3c_ccc_cmd_dest dest;
1096 	struct i3c_ccc_setda *setda;
1097 	struct i3c_ccc_cmd cmd;
1098 	int ret;
1099 
1100 	if (!oldaddr || !newaddr)
1101 		return -EINVAL;
1102 
1103 	setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
1104 	if (!setda)
1105 		return -ENOMEM;
1106 
1107 	setda->addr = newaddr << 1;
1108 	i3c_ccc_cmd_init(&cmd, false,
1109 			 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
1110 			 &dest, 1);
1111 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1112 	i3c_ccc_cmd_dest_cleanup(&dest);
1113 
1114 	return ret;
1115 }
1116 
1117 static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
1118 				     u8 static_addr, u8 dyn_addr)
1119 {
1120 	return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
1121 }
1122 
1123 static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
1124 				      u8 oldaddr, u8 newaddr)
1125 {
1126 	return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1127 }
1128 
1129 static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1130 				    struct i3c_device_info *info)
1131 {
1132 	struct i3c_ccc_cmd_dest dest;
1133 	struct i3c_ccc_mrl *mrl;
1134 	struct i3c_ccc_cmd cmd;
1135 	int ret;
1136 
1137 	mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1138 	if (!mrl)
1139 		return -ENOMEM;
1140 
1141 	/*
1142 	 * When the device does not have IBI payload GETMRL only returns 2
1143 	 * bytes of data.
1144 	 */
1145 	if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1146 		dest.payload.len -= 1;
1147 
1148 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1149 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1150 	if (ret)
1151 		goto out;
1152 
1153 	switch (dest.payload.len) {
1154 	case 3:
1155 		info->max_ibi_len = mrl->ibi_len;
1156 		fallthrough;
1157 	case 2:
1158 		info->max_read_len = be16_to_cpu(mrl->read_len);
1159 		break;
1160 	default:
1161 		ret = -EIO;
1162 		goto out;
1163 	}
1164 
1165 out:
1166 	i3c_ccc_cmd_dest_cleanup(&dest);
1167 
1168 	return ret;
1169 }
1170 
1171 static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1172 				    struct i3c_device_info *info)
1173 {
1174 	struct i3c_ccc_cmd_dest dest;
1175 	struct i3c_ccc_mwl *mwl;
1176 	struct i3c_ccc_cmd cmd;
1177 	int ret;
1178 
1179 	mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1180 	if (!mwl)
1181 		return -ENOMEM;
1182 
1183 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1184 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1185 	if (ret)
1186 		goto out;
1187 
1188 	if (dest.payload.len != sizeof(*mwl)) {
1189 		ret = -EIO;
1190 		goto out;
1191 	}
1192 
1193 	info->max_write_len = be16_to_cpu(mwl->len);
1194 
1195 out:
1196 	i3c_ccc_cmd_dest_cleanup(&dest);
1197 
1198 	return ret;
1199 }
1200 
1201 static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1202 				     struct i3c_device_info *info)
1203 {
1204 	struct i3c_ccc_getmxds *getmaxds;
1205 	struct i3c_ccc_cmd_dest dest;
1206 	struct i3c_ccc_cmd cmd;
1207 	int ret;
1208 
1209 	getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1210 					 sizeof(*getmaxds));
1211 	if (!getmaxds)
1212 		return -ENOMEM;
1213 
1214 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1215 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1216 	if (ret) {
1217 		/*
1218 		 * Retry when the device does not support max read turnaround
1219 		 * while expecting shorter length from this CCC command.
1220 		 */
1221 		dest.payload.len -= 3;
1222 		ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1223 		if (ret)
1224 			goto out;
1225 	}
1226 
1227 	if (dest.payload.len != 2 && dest.payload.len != 5) {
1228 		ret = -EIO;
1229 		goto out;
1230 	}
1231 
1232 	info->max_read_ds = getmaxds->maxrd;
1233 	info->max_write_ds = getmaxds->maxwr;
1234 	if (dest.payload.len == 5)
1235 		info->max_read_turnaround = getmaxds->maxrdturn[0] |
1236 					    ((u32)getmaxds->maxrdturn[1] << 8) |
1237 					    ((u32)getmaxds->maxrdturn[2] << 16);
1238 
1239 out:
1240 	i3c_ccc_cmd_dest_cleanup(&dest);
1241 
1242 	return ret;
1243 }
1244 
1245 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1246 				       struct i3c_device_info *info)
1247 {
1248 	struct i3c_ccc_gethdrcap *gethdrcap;
1249 	struct i3c_ccc_cmd_dest dest;
1250 	struct i3c_ccc_cmd cmd;
1251 	int ret;
1252 
1253 	gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1254 					  sizeof(*gethdrcap));
1255 	if (!gethdrcap)
1256 		return -ENOMEM;
1257 
1258 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1259 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1260 	if (ret)
1261 		goto out;
1262 
1263 	if (dest.payload.len != 1) {
1264 		ret = -EIO;
1265 		goto out;
1266 	}
1267 
1268 	info->hdr_cap = gethdrcap->modes;
1269 
1270 out:
1271 	i3c_ccc_cmd_dest_cleanup(&dest);
1272 
1273 	return ret;
1274 }
1275 
1276 static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1277 				    struct i3c_device_info *info)
1278 {
1279 	struct i3c_ccc_getpid *getpid;
1280 	struct i3c_ccc_cmd_dest dest;
1281 	struct i3c_ccc_cmd cmd;
1282 	int ret, i;
1283 
1284 	getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1285 	if (!getpid)
1286 		return -ENOMEM;
1287 
1288 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1289 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1290 	if (ret)
1291 		goto out;
1292 
1293 	info->pid = 0;
1294 	for (i = 0; i < sizeof(getpid->pid); i++) {
1295 		int sft = (sizeof(getpid->pid) - i - 1) * 8;
1296 
1297 		info->pid |= (u64)getpid->pid[i] << sft;
1298 	}
1299 
1300 out:
1301 	i3c_ccc_cmd_dest_cleanup(&dest);
1302 
1303 	return ret;
1304 }
1305 
1306 static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1307 				    struct i3c_device_info *info)
1308 {
1309 	struct i3c_ccc_getbcr *getbcr;
1310 	struct i3c_ccc_cmd_dest dest;
1311 	struct i3c_ccc_cmd cmd;
1312 	int ret;
1313 
1314 	getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1315 	if (!getbcr)
1316 		return -ENOMEM;
1317 
1318 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1319 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1320 	if (ret)
1321 		goto out;
1322 
1323 	info->bcr = getbcr->bcr;
1324 
1325 out:
1326 	i3c_ccc_cmd_dest_cleanup(&dest);
1327 
1328 	return ret;
1329 }
1330 
1331 static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1332 				    struct i3c_device_info *info)
1333 {
1334 	struct i3c_ccc_getdcr *getdcr;
1335 	struct i3c_ccc_cmd_dest dest;
1336 	struct i3c_ccc_cmd cmd;
1337 	int ret;
1338 
1339 	getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1340 	if (!getdcr)
1341 		return -ENOMEM;
1342 
1343 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1344 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1345 	if (ret)
1346 		goto out;
1347 
1348 	info->dcr = getdcr->dcr;
1349 
1350 out:
1351 	i3c_ccc_cmd_dest_cleanup(&dest);
1352 
1353 	return ret;
1354 }
1355 
1356 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1357 {
1358 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1359 	enum i3c_addr_slot_status slot_status;
1360 	int ret;
1361 
1362 	if (!dev->info.dyn_addr)
1363 		return -EINVAL;
1364 
1365 	slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1366 						   dev->info.dyn_addr);
1367 	if (slot_status == I3C_ADDR_SLOT_RSVD ||
1368 	    slot_status == I3C_ADDR_SLOT_I2C_DEV)
1369 		return -EINVAL;
1370 
1371 	ret = i3c_master_getpid_locked(master, &dev->info);
1372 	if (ret)
1373 		return ret;
1374 
1375 	ret = i3c_master_getbcr_locked(master, &dev->info);
1376 	if (ret)
1377 		return ret;
1378 
1379 	ret = i3c_master_getdcr_locked(master, &dev->info);
1380 	if (ret)
1381 		return ret;
1382 
1383 	if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1384 		ret = i3c_master_getmxds_locked(master, &dev->info);
1385 		if (ret)
1386 			return ret;
1387 	}
1388 
1389 	if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1390 		dev->info.max_ibi_len = 1;
1391 
1392 	i3c_master_getmrl_locked(master, &dev->info);
1393 	i3c_master_getmwl_locked(master, &dev->info);
1394 
1395 	if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1396 		ret = i3c_master_gethdrcap_locked(master, &dev->info);
1397 		if (ret)
1398 			return ret;
1399 	}
1400 
1401 	return 0;
1402 }
1403 
1404 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1405 {
1406 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1407 
1408 	if (dev->info.static_addr)
1409 		i3c_bus_set_addr_slot_status(&master->bus,
1410 					     dev->info.static_addr,
1411 					     I3C_ADDR_SLOT_FREE);
1412 
1413 	if (dev->info.dyn_addr)
1414 		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1415 					     I3C_ADDR_SLOT_FREE);
1416 
1417 	if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1418 		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1419 					     I3C_ADDR_SLOT_FREE);
1420 }
1421 
1422 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1423 {
1424 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1425 	enum i3c_addr_slot_status status;
1426 
1427 	if (!dev->info.static_addr && !dev->info.dyn_addr)
1428 		return 0;
1429 
1430 	if (dev->info.static_addr) {
1431 		status = i3c_bus_get_addr_slot_status(&master->bus,
1432 						      dev->info.static_addr);
1433 		/* Since static address and assigned dynamic address can be
1434 		 * equal, allow this case to pass.
1435 		 */
1436 		if (status != I3C_ADDR_SLOT_FREE &&
1437 		    dev->info.static_addr != dev->boardinfo->init_dyn_addr)
1438 			return -EBUSY;
1439 
1440 		i3c_bus_set_addr_slot_status(&master->bus,
1441 					     dev->info.static_addr,
1442 					     I3C_ADDR_SLOT_I3C_DEV);
1443 	}
1444 
1445 	/*
1446 	 * ->init_dyn_addr should have been reserved before that, so, if we're
1447 	 * trying to apply a pre-reserved dynamic address, we should not try
1448 	 * to reserve the address slot a second time.
1449 	 */
1450 	if (dev->info.dyn_addr &&
1451 	    (!dev->boardinfo ||
1452 	     dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1453 		status = i3c_bus_get_addr_slot_status(&master->bus,
1454 						      dev->info.dyn_addr);
1455 		if (status != I3C_ADDR_SLOT_FREE)
1456 			goto err_release_static_addr;
1457 
1458 		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1459 					     I3C_ADDR_SLOT_I3C_DEV);
1460 	}
1461 
1462 	return 0;
1463 
1464 err_release_static_addr:
1465 	if (dev->info.static_addr)
1466 		i3c_bus_set_addr_slot_status(&master->bus,
1467 					     dev->info.static_addr,
1468 					     I3C_ADDR_SLOT_FREE);
1469 
1470 	return -EBUSY;
1471 }
1472 
1473 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1474 				     struct i3c_dev_desc *dev)
1475 {
1476 	int ret;
1477 
1478 	/*
1479 	 * We don't attach devices to the controller until they are
1480 	 * addressable on the bus.
1481 	 */
1482 	if (!dev->info.static_addr && !dev->info.dyn_addr)
1483 		return 0;
1484 
1485 	ret = i3c_master_get_i3c_addrs(dev);
1486 	if (ret)
1487 		return ret;
1488 
1489 	/* Do not attach the master device itself. */
1490 	if (master->this != dev && master->ops->attach_i3c_dev) {
1491 		ret = master->ops->attach_i3c_dev(dev);
1492 		if (ret) {
1493 			i3c_master_put_i3c_addrs(dev);
1494 			return ret;
1495 		}
1496 	}
1497 
1498 	list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1499 
1500 	return 0;
1501 }
1502 
1503 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1504 				       u8 old_dyn_addr)
1505 {
1506 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1507 	enum i3c_addr_slot_status status;
1508 	int ret;
1509 
1510 	if (dev->info.dyn_addr != old_dyn_addr &&
1511 	    (!dev->boardinfo ||
1512 	     dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) {
1513 		status = i3c_bus_get_addr_slot_status(&master->bus,
1514 						      dev->info.dyn_addr);
1515 		if (status != I3C_ADDR_SLOT_FREE)
1516 			return -EBUSY;
1517 		i3c_bus_set_addr_slot_status(&master->bus,
1518 					     dev->info.dyn_addr,
1519 					     I3C_ADDR_SLOT_I3C_DEV);
1520 		if (old_dyn_addr)
1521 			i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr,
1522 						     I3C_ADDR_SLOT_FREE);
1523 	}
1524 
1525 	if (master->ops->reattach_i3c_dev) {
1526 		ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1527 		if (ret) {
1528 			i3c_master_put_i3c_addrs(dev);
1529 			return ret;
1530 		}
1531 	}
1532 
1533 	return 0;
1534 }
1535 
1536 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1537 {
1538 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1539 
1540 	/* Do not detach the master device itself. */
1541 	if (master->this != dev && master->ops->detach_i3c_dev)
1542 		master->ops->detach_i3c_dev(dev);
1543 
1544 	i3c_master_put_i3c_addrs(dev);
1545 	list_del(&dev->common.node);
1546 }
1547 
1548 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1549 				     struct i2c_dev_desc *dev)
1550 {
1551 	int ret;
1552 
1553 	if (master->ops->attach_i2c_dev) {
1554 		ret = master->ops->attach_i2c_dev(dev);
1555 		if (ret)
1556 			return ret;
1557 	}
1558 
1559 	list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1560 
1561 	return 0;
1562 }
1563 
1564 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1565 {
1566 	struct i3c_master_controller *master = i2c_dev_get_master(dev);
1567 
1568 	list_del(&dev->common.node);
1569 
1570 	if (master->ops->detach_i2c_dev)
1571 		master->ops->detach_i2c_dev(dev);
1572 }
1573 
1574 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1575 					  struct i3c_dev_boardinfo *boardinfo)
1576 {
1577 	struct i3c_device_info info = {
1578 		.static_addr = boardinfo->static_addr,
1579 		.pid = boardinfo->pid,
1580 	};
1581 	struct i3c_dev_desc *i3cdev;
1582 	int ret;
1583 
1584 	i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1585 	if (IS_ERR(i3cdev))
1586 		return -ENOMEM;
1587 
1588 	i3cdev->boardinfo = boardinfo;
1589 
1590 	ret = i3c_master_attach_i3c_dev(master, i3cdev);
1591 	if (ret)
1592 		goto err_free_dev;
1593 
1594 	ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1595 					i3cdev->boardinfo->init_dyn_addr);
1596 	if (ret)
1597 		goto err_detach_dev;
1598 
1599 	i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1600 	ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
1601 	if (ret)
1602 		goto err_rstdaa;
1603 
1604 	ret = i3c_master_retrieve_dev_info(i3cdev);
1605 	if (ret)
1606 		goto err_rstdaa;
1607 
1608 	return 0;
1609 
1610 err_rstdaa:
1611 	i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1612 err_detach_dev:
1613 	i3c_master_detach_i3c_dev(i3cdev);
1614 err_free_dev:
1615 	i3c_master_free_i3c_dev(i3cdev);
1616 
1617 	return ret;
1618 }
1619 
1620 static void
1621 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1622 {
1623 	struct i3c_dev_desc *desc;
1624 	int ret;
1625 
1626 	if (!master->init_done)
1627 		return;
1628 
1629 	i3c_bus_for_each_i3cdev(&master->bus, desc) {
1630 		if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1631 			continue;
1632 
1633 		desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1634 		if (!desc->dev)
1635 			continue;
1636 
1637 		desc->dev->bus = &master->bus;
1638 		desc->dev->desc = desc;
1639 		desc->dev->dev.parent = &master->dev;
1640 		desc->dev->dev.type = &i3c_device_type;
1641 		desc->dev->dev.bus = &i3c_bus_type;
1642 		desc->dev->dev.release = i3c_device_release;
1643 		dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1644 			     desc->info.pid);
1645 
1646 		if (desc->boardinfo)
1647 			desc->dev->dev.of_node = desc->boardinfo->of_node;
1648 
1649 		ret = device_register(&desc->dev->dev);
1650 		if (ret) {
1651 			dev_err(&master->dev,
1652 				"Failed to add I3C device (err = %d)\n", ret);
1653 			put_device(&desc->dev->dev);
1654 		}
1655 	}
1656 }
1657 
1658 /**
1659  * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1660  * @master: master doing the DAA
1661  *
1662  * This function is instantiating an I3C device object and adding it to the
1663  * I3C device list. All device information are automatically retrieved using
1664  * standard CCC commands.
1665  *
1666  * The I3C device object is returned in case the master wants to attach
1667  * private data to it using i3c_dev_set_master_data().
1668  *
1669  * This function must be called with the bus lock held in write mode.
1670  *
1671  * Return: a 0 in case of success, an negative error code otherwise.
1672  */
1673 int i3c_master_do_daa(struct i3c_master_controller *master)
1674 {
1675 	int ret;
1676 
1677 	i3c_bus_maintenance_lock(&master->bus);
1678 	ret = master->ops->do_daa(master);
1679 	i3c_bus_maintenance_unlock(&master->bus);
1680 
1681 	if (ret)
1682 		return ret;
1683 
1684 	i3c_bus_normaluse_lock(&master->bus);
1685 	i3c_master_register_new_i3c_devs(master);
1686 	i3c_bus_normaluse_unlock(&master->bus);
1687 
1688 	return 0;
1689 }
1690 EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1691 
1692 /**
1693  * i3c_master_set_info() - set master device information
1694  * @master: master used to send frames on the bus
1695  * @info: I3C device information
1696  *
1697  * Set master device info. This should be called from
1698  * &i3c_master_controller_ops->bus_init().
1699  *
1700  * Not all &i3c_device_info fields are meaningful for a master device.
1701  * Here is a list of fields that should be properly filled:
1702  *
1703  * - &i3c_device_info->dyn_addr
1704  * - &i3c_device_info->bcr
1705  * - &i3c_device_info->dcr
1706  * - &i3c_device_info->pid
1707  * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1708  *   &i3c_device_info->bcr
1709  *
1710  * This function must be called with the bus lock held in maintenance mode.
1711  *
1712  * Return: 0 if @info contains valid information (not every piece of
1713  * information can be checked, but we can at least make sure @info->dyn_addr
1714  * and @info->bcr are correct), -EINVAL otherwise.
1715  */
1716 int i3c_master_set_info(struct i3c_master_controller *master,
1717 			const struct i3c_device_info *info)
1718 {
1719 	struct i3c_dev_desc *i3cdev;
1720 	int ret;
1721 
1722 	if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1723 		return -EINVAL;
1724 
1725 	if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1726 	    master->secondary)
1727 		return -EINVAL;
1728 
1729 	if (master->this)
1730 		return -EINVAL;
1731 
1732 	i3cdev = i3c_master_alloc_i3c_dev(master, info);
1733 	if (IS_ERR(i3cdev))
1734 		return PTR_ERR(i3cdev);
1735 
1736 	master->this = i3cdev;
1737 	master->bus.cur_master = master->this;
1738 
1739 	ret = i3c_master_attach_i3c_dev(master, i3cdev);
1740 	if (ret)
1741 		goto err_free_dev;
1742 
1743 	return 0;
1744 
1745 err_free_dev:
1746 	i3c_master_free_i3c_dev(i3cdev);
1747 
1748 	return ret;
1749 }
1750 EXPORT_SYMBOL_GPL(i3c_master_set_info);
1751 
1752 static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1753 {
1754 	struct i3c_dev_desc *i3cdev, *i3ctmp;
1755 	struct i2c_dev_desc *i2cdev, *i2ctmp;
1756 
1757 	list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1758 				 common.node) {
1759 		i3c_master_detach_i3c_dev(i3cdev);
1760 
1761 		if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1762 			i3c_bus_set_addr_slot_status(&master->bus,
1763 					i3cdev->boardinfo->init_dyn_addr,
1764 					I3C_ADDR_SLOT_FREE);
1765 
1766 		i3c_master_free_i3c_dev(i3cdev);
1767 	}
1768 
1769 	list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1770 				 common.node) {
1771 		i3c_master_detach_i2c_dev(i2cdev);
1772 		i3c_bus_set_addr_slot_status(&master->bus,
1773 					     i2cdev->addr,
1774 					     I3C_ADDR_SLOT_FREE);
1775 		i3c_master_free_i2c_dev(i2cdev);
1776 	}
1777 }
1778 
1779 /**
1780  * i3c_master_bus_init() - initialize an I3C bus
1781  * @master: main master initializing the bus
1782  *
1783  * This function is following all initialisation steps described in the I3C
1784  * specification:
1785  *
1786  * 1. Attach I2C devs to the master so that the master can fill its internal
1787  *    device table appropriately
1788  *
1789  * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1790  *    the master controller. That's usually where the bus mode is selected
1791  *    (pure bus or mixed fast/slow bus)
1792  *
1793  * 3. Instruct all devices on the bus to drop their dynamic address. This is
1794  *    particularly important when the bus was previously configured by someone
1795  *    else (for example the bootloader)
1796  *
1797  * 4. Disable all slave events.
1798  *
1799  * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1800  *    also have static_addr, try to pre-assign dynamic addresses requested by
1801  *    the FW with SETDASA and attach corresponding statically defined I3C
1802  *    devices to the master.
1803  *
1804  * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1805  *    remaining I3C devices
1806  *
1807  * Once this is done, all I3C and I2C devices should be usable.
1808  *
1809  * Return: a 0 in case of success, an negative error code otherwise.
1810  */
1811 static int i3c_master_bus_init(struct i3c_master_controller *master)
1812 {
1813 	enum i3c_addr_slot_status status;
1814 	struct i2c_dev_boardinfo *i2cboardinfo;
1815 	struct i3c_dev_boardinfo *i3cboardinfo;
1816 	struct i2c_dev_desc *i2cdev;
1817 	int ret;
1818 
1819 	/*
1820 	 * First attach all devices with static definitions provided by the
1821 	 * FW.
1822 	 */
1823 	list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1824 		status = i3c_bus_get_addr_slot_status(&master->bus,
1825 						      i2cboardinfo->base.addr);
1826 		if (status != I3C_ADDR_SLOT_FREE) {
1827 			ret = -EBUSY;
1828 			goto err_detach_devs;
1829 		}
1830 
1831 		i3c_bus_set_addr_slot_status(&master->bus,
1832 					     i2cboardinfo->base.addr,
1833 					     I3C_ADDR_SLOT_I2C_DEV);
1834 
1835 		i2cdev = i3c_master_alloc_i2c_dev(master,
1836 						  i2cboardinfo->base.addr,
1837 						  i2cboardinfo->lvr);
1838 		if (IS_ERR(i2cdev)) {
1839 			ret = PTR_ERR(i2cdev);
1840 			goto err_detach_devs;
1841 		}
1842 
1843 		ret = i3c_master_attach_i2c_dev(master, i2cdev);
1844 		if (ret) {
1845 			i3c_master_free_i2c_dev(i2cdev);
1846 			goto err_detach_devs;
1847 		}
1848 	}
1849 
1850 	/*
1851 	 * Now execute the controller specific ->bus_init() routine, which
1852 	 * might configure its internal logic to match the bus limitations.
1853 	 */
1854 	ret = master->ops->bus_init(master);
1855 	if (ret)
1856 		goto err_detach_devs;
1857 
1858 	/*
1859 	 * The master device should have been instantiated in ->bus_init(),
1860 	 * complain if this was not the case.
1861 	 */
1862 	if (!master->this) {
1863 		dev_err(&master->dev,
1864 			"master_set_info() was not called in ->bus_init()\n");
1865 		ret = -EINVAL;
1866 		goto err_bus_cleanup;
1867 	}
1868 
1869 	/*
1870 	 * Reset all dynamic address that may have been assigned before
1871 	 * (assigned by the bootloader for example).
1872 	 */
1873 	ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1874 	if (ret && ret != I3C_ERROR_M2)
1875 		goto err_bus_cleanup;
1876 
1877 	/* Disable all slave events before starting DAA. */
1878 	ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1879 				      I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1880 				      I3C_CCC_EVENT_HJ);
1881 	if (ret && ret != I3C_ERROR_M2)
1882 		goto err_bus_cleanup;
1883 
1884 	/*
1885 	 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1886 	 * address and retrieve device information if needed.
1887 	 * In case pre-assign dynamic address fails, setting dynamic address to
1888 	 * the requested init_dyn_addr is retried after DAA is done in
1889 	 * i3c_master_add_i3c_dev_locked().
1890 	 */
1891 	list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1892 
1893 		/*
1894 		 * We don't reserve a dynamic address for devices that
1895 		 * don't explicitly request one.
1896 		 */
1897 		if (!i3cboardinfo->init_dyn_addr)
1898 			continue;
1899 
1900 		ret = i3c_bus_get_addr_slot_status(&master->bus,
1901 						   i3cboardinfo->init_dyn_addr);
1902 		if (ret != I3C_ADDR_SLOT_FREE) {
1903 			ret = -EBUSY;
1904 			goto err_rstdaa;
1905 		}
1906 
1907 		i3c_bus_set_addr_slot_status(&master->bus,
1908 					     i3cboardinfo->init_dyn_addr,
1909 					     I3C_ADDR_SLOT_I3C_DEV);
1910 
1911 		/*
1912 		 * Only try to create/attach devices that have a static
1913 		 * address. Other devices will be created/attached when
1914 		 * DAA happens, and the requested dynamic address will
1915 		 * be set using SETNEWDA once those devices become
1916 		 * addressable.
1917 		 */
1918 
1919 		if (i3cboardinfo->static_addr)
1920 			i3c_master_early_i3c_dev_add(master, i3cboardinfo);
1921 	}
1922 
1923 	ret = i3c_master_do_daa(master);
1924 	if (ret)
1925 		goto err_rstdaa;
1926 
1927 	return 0;
1928 
1929 err_rstdaa:
1930 	i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1931 
1932 err_bus_cleanup:
1933 	if (master->ops->bus_cleanup)
1934 		master->ops->bus_cleanup(master);
1935 
1936 err_detach_devs:
1937 	i3c_master_detach_free_devs(master);
1938 
1939 	return ret;
1940 }
1941 
1942 static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1943 {
1944 	if (master->ops->bus_cleanup)
1945 		master->ops->bus_cleanup(master);
1946 
1947 	i3c_master_detach_free_devs(master);
1948 }
1949 
1950 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
1951 {
1952 	struct i3c_master_controller *master = i3cdev->common.master;
1953 	struct i3c_dev_boardinfo *i3cboardinfo;
1954 
1955 	list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1956 		if (i3cdev->info.pid != i3cboardinfo->pid)
1957 			continue;
1958 
1959 		i3cdev->boardinfo = i3cboardinfo;
1960 		i3cdev->info.static_addr = i3cboardinfo->static_addr;
1961 		return;
1962 	}
1963 }
1964 
1965 static struct i3c_dev_desc *
1966 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1967 {
1968 	struct i3c_master_controller *master = i3c_dev_get_master(refdev);
1969 	struct i3c_dev_desc *i3cdev;
1970 
1971 	i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1972 		if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1973 			return i3cdev;
1974 	}
1975 
1976 	return NULL;
1977 }
1978 
1979 /**
1980  * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1981  * @master: master used to send frames on the bus
1982  * @addr: I3C slave dynamic address assigned to the device
1983  *
1984  * This function is instantiating an I3C device object and adding it to the
1985  * I3C device list. All device information are automatically retrieved using
1986  * standard CCC commands.
1987  *
1988  * The I3C device object is returned in case the master wants to attach
1989  * private data to it using i3c_dev_set_master_data().
1990  *
1991  * This function must be called with the bus lock held in write mode.
1992  *
1993  * Return: a 0 in case of success, an negative error code otherwise.
1994  */
1995 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
1996 				  u8 addr)
1997 {
1998 	struct i3c_device_info info = { .dyn_addr = addr };
1999 	struct i3c_dev_desc *newdev, *olddev;
2000 	u8 old_dyn_addr = addr, expected_dyn_addr;
2001 	struct i3c_ibi_setup ibireq = { };
2002 	bool enable_ibi = false;
2003 	int ret;
2004 
2005 	if (!master)
2006 		return -EINVAL;
2007 
2008 	newdev = i3c_master_alloc_i3c_dev(master, &info);
2009 	if (IS_ERR(newdev))
2010 		return PTR_ERR(newdev);
2011 
2012 	ret = i3c_master_attach_i3c_dev(master, newdev);
2013 	if (ret)
2014 		goto err_free_dev;
2015 
2016 	ret = i3c_master_retrieve_dev_info(newdev);
2017 	if (ret)
2018 		goto err_detach_dev;
2019 
2020 	i3c_master_attach_boardinfo(newdev);
2021 
2022 	olddev = i3c_master_search_i3c_dev_duplicate(newdev);
2023 	if (olddev) {
2024 		newdev->dev = olddev->dev;
2025 		if (newdev->dev)
2026 			newdev->dev->desc = newdev;
2027 
2028 		/*
2029 		 * We need to restore the IBI state too, so let's save the
2030 		 * IBI information and try to restore them after olddev has
2031 		 * been detached+released and its IBI has been stopped and
2032 		 * the associated resources have been freed.
2033 		 */
2034 		mutex_lock(&olddev->ibi_lock);
2035 		if (olddev->ibi) {
2036 			ibireq.handler = olddev->ibi->handler;
2037 			ibireq.max_payload_len = olddev->ibi->max_payload_len;
2038 			ibireq.num_slots = olddev->ibi->num_slots;
2039 
2040 			if (olddev->ibi->enabled) {
2041 				enable_ibi = true;
2042 				i3c_dev_disable_ibi_locked(olddev);
2043 			}
2044 
2045 			i3c_dev_free_ibi_locked(olddev);
2046 		}
2047 		mutex_unlock(&olddev->ibi_lock);
2048 
2049 		old_dyn_addr = olddev->info.dyn_addr;
2050 
2051 		i3c_master_detach_i3c_dev(olddev);
2052 		i3c_master_free_i3c_dev(olddev);
2053 	}
2054 
2055 	/*
2056 	 * Depending on our previous state, the expected dynamic address might
2057 	 * differ:
2058 	 * - if the device already had a dynamic address assigned, let's try to
2059 	 *   re-apply this one
2060 	 * - if the device did not have a dynamic address and the firmware
2061 	 *   requested a specific address, pick this one
2062 	 * - in any other case, keep the address automatically assigned by the
2063 	 *   master
2064 	 */
2065 	if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
2066 		expected_dyn_addr = old_dyn_addr;
2067 	else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
2068 		expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
2069 	else
2070 		expected_dyn_addr = newdev->info.dyn_addr;
2071 
2072 	if (newdev->info.dyn_addr != expected_dyn_addr) {
2073 		/*
2074 		 * Try to apply the expected dynamic address. If it fails, keep
2075 		 * the address assigned by the master.
2076 		 */
2077 		ret = i3c_master_setnewda_locked(master,
2078 						 newdev->info.dyn_addr,
2079 						 expected_dyn_addr);
2080 		if (!ret) {
2081 			old_dyn_addr = newdev->info.dyn_addr;
2082 			newdev->info.dyn_addr = expected_dyn_addr;
2083 			i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
2084 		} else {
2085 			dev_err(&master->dev,
2086 				"Failed to assign reserved/old address to device %d%llx",
2087 				master->bus.id, newdev->info.pid);
2088 		}
2089 	}
2090 
2091 	/*
2092 	 * Now is time to try to restore the IBI setup. If we're lucky,
2093 	 * everything works as before, otherwise, all we can do is complain.
2094 	 * FIXME: maybe we should add callback to inform the driver that it
2095 	 * should request the IBI again instead of trying to hide that from
2096 	 * him.
2097 	 */
2098 	if (ibireq.handler) {
2099 		mutex_lock(&newdev->ibi_lock);
2100 		ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
2101 		if (ret) {
2102 			dev_err(&master->dev,
2103 				"Failed to request IBI on device %d-%llx",
2104 				master->bus.id, newdev->info.pid);
2105 		} else if (enable_ibi) {
2106 			ret = i3c_dev_enable_ibi_locked(newdev);
2107 			if (ret)
2108 				dev_err(&master->dev,
2109 					"Failed to re-enable IBI on device %d-%llx",
2110 					master->bus.id, newdev->info.pid);
2111 		}
2112 		mutex_unlock(&newdev->ibi_lock);
2113 	}
2114 
2115 	return 0;
2116 
2117 err_detach_dev:
2118 	if (newdev->dev && newdev->dev->desc)
2119 		newdev->dev->desc = NULL;
2120 
2121 	i3c_master_detach_i3c_dev(newdev);
2122 
2123 err_free_dev:
2124 	i3c_master_free_i3c_dev(newdev);
2125 
2126 	return ret;
2127 }
2128 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
2129 
2130 #define OF_I3C_REG1_IS_I2C_DEV			BIT(31)
2131 
2132 static int
2133 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
2134 				struct device_node *node, u32 *reg)
2135 {
2136 	struct i2c_dev_boardinfo *boardinfo;
2137 	struct device *dev = &master->dev;
2138 	int ret;
2139 
2140 	boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2141 	if (!boardinfo)
2142 		return -ENOMEM;
2143 
2144 	ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2145 	if (ret)
2146 		return ret;
2147 
2148 	/*
2149 	 * The I3C Specification does not clearly say I2C devices with 10-bit
2150 	 * address are supported. These devices can't be passed properly through
2151 	 * DEFSLVS command.
2152 	 */
2153 	if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2154 		dev_err(dev, "I2C device with 10 bit address not supported.");
2155 		return -ENOTSUPP;
2156 	}
2157 
2158 	/* LVR is encoded in reg[2]. */
2159 	boardinfo->lvr = reg[2];
2160 
2161 	list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2162 	of_node_get(node);
2163 
2164 	return 0;
2165 }
2166 
2167 static int
2168 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2169 				struct device_node *node, u32 *reg)
2170 {
2171 	struct i3c_dev_boardinfo *boardinfo;
2172 	struct device *dev = &master->dev;
2173 	enum i3c_addr_slot_status addrstatus;
2174 	u32 init_dyn_addr = 0;
2175 
2176 	boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2177 	if (!boardinfo)
2178 		return -ENOMEM;
2179 
2180 	if (reg[0]) {
2181 		if (reg[0] > I3C_MAX_ADDR)
2182 			return -EINVAL;
2183 
2184 		addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2185 							  reg[0]);
2186 		if (addrstatus != I3C_ADDR_SLOT_FREE)
2187 			return -EINVAL;
2188 	}
2189 
2190 	boardinfo->static_addr = reg[0];
2191 
2192 	if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2193 		if (init_dyn_addr > I3C_MAX_ADDR)
2194 			return -EINVAL;
2195 
2196 		addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2197 							  init_dyn_addr);
2198 		if (addrstatus != I3C_ADDR_SLOT_FREE)
2199 			return -EINVAL;
2200 	}
2201 
2202 	boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2203 
2204 	if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2205 	    I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2206 		return -EINVAL;
2207 
2208 	boardinfo->init_dyn_addr = init_dyn_addr;
2209 	boardinfo->of_node = of_node_get(node);
2210 	list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2211 
2212 	return 0;
2213 }
2214 
2215 static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2216 				 struct device_node *node)
2217 {
2218 	u32 reg[3];
2219 	int ret;
2220 
2221 	if (!master || !node)
2222 		return -EINVAL;
2223 
2224 	ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2225 	if (ret)
2226 		return ret;
2227 
2228 	/*
2229 	 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2230 	 * dealing with an I2C device.
2231 	 */
2232 	if (!reg[1])
2233 		ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2234 	else
2235 		ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2236 
2237 	return ret;
2238 }
2239 
2240 static int of_populate_i3c_bus(struct i3c_master_controller *master)
2241 {
2242 	struct device *dev = &master->dev;
2243 	struct device_node *i3cbus_np = dev->of_node;
2244 	struct device_node *node;
2245 	int ret;
2246 	u32 val;
2247 
2248 	if (!i3cbus_np)
2249 		return 0;
2250 
2251 	for_each_available_child_of_node(i3cbus_np, node) {
2252 		ret = of_i3c_master_add_dev(master, node);
2253 		if (ret) {
2254 			of_node_put(node);
2255 			return ret;
2256 		}
2257 	}
2258 
2259 	/*
2260 	 * The user might want to limit I2C and I3C speed in case some devices
2261 	 * on the bus are not supporting typical rates, or if the bus topology
2262 	 * prevents it from using max possible rate.
2263 	 */
2264 	if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2265 		master->bus.scl_rate.i2c = val;
2266 
2267 	if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2268 		master->bus.scl_rate.i3c = val;
2269 
2270 	return 0;
2271 }
2272 
2273 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2274 				       struct i2c_msg *xfers, int nxfers)
2275 {
2276 	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2277 	struct i2c_dev_desc *dev;
2278 	int i, ret;
2279 	u16 addr;
2280 
2281 	if (!xfers || !master || nxfers <= 0)
2282 		return -EINVAL;
2283 
2284 	if (!master->ops->i2c_xfers)
2285 		return -ENOTSUPP;
2286 
2287 	/* Doing transfers to different devices is not supported. */
2288 	addr = xfers[0].addr;
2289 	for (i = 1; i < nxfers; i++) {
2290 		if (addr != xfers[i].addr)
2291 			return -ENOTSUPP;
2292 	}
2293 
2294 	i3c_bus_normaluse_lock(&master->bus);
2295 	dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2296 	if (!dev)
2297 		ret = -ENOENT;
2298 	else
2299 		ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2300 	i3c_bus_normaluse_unlock(&master->bus);
2301 
2302 	return ret ? ret : nxfers;
2303 }
2304 
2305 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2306 {
2307 	return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2308 }
2309 
2310 static u8 i3c_master_i2c_get_lvr(struct i2c_client *client)
2311 {
2312 	/* Fall back to no spike filters and FM bus mode. */
2313 	u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE;
2314 
2315 	if (client->dev.of_node) {
2316 		u32 reg[3];
2317 
2318 		if (!of_property_read_u32_array(client->dev.of_node, "reg",
2319 						reg, ARRAY_SIZE(reg)))
2320 			lvr = reg[2];
2321 	}
2322 
2323 	return lvr;
2324 }
2325 
2326 static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client)
2327 {
2328 	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2329 	enum i3c_addr_slot_status status;
2330 	struct i2c_dev_desc *i2cdev;
2331 	int ret;
2332 
2333 	/* Already added by board info? */
2334 	if (i3c_master_find_i2c_dev_by_addr(master, client->addr))
2335 		return 0;
2336 
2337 	status = i3c_bus_get_addr_slot_status(&master->bus, client->addr);
2338 	if (status != I3C_ADDR_SLOT_FREE)
2339 		return -EBUSY;
2340 
2341 	i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2342 				     I3C_ADDR_SLOT_I2C_DEV);
2343 
2344 	i2cdev = i3c_master_alloc_i2c_dev(master, client->addr,
2345 					  i3c_master_i2c_get_lvr(client));
2346 	if (IS_ERR(i2cdev)) {
2347 		ret = PTR_ERR(i2cdev);
2348 		goto out_clear_status;
2349 	}
2350 
2351 	ret = i3c_master_attach_i2c_dev(master, i2cdev);
2352 	if (ret)
2353 		goto out_free_dev;
2354 
2355 	return 0;
2356 
2357 out_free_dev:
2358 	i3c_master_free_i2c_dev(i2cdev);
2359 out_clear_status:
2360 	i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2361 				     I3C_ADDR_SLOT_FREE);
2362 
2363 	return ret;
2364 }
2365 
2366 static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client)
2367 {
2368 	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2369 	struct i2c_dev_desc *dev;
2370 
2371 	dev = i3c_master_find_i2c_dev_by_addr(master, client->addr);
2372 	if (!dev)
2373 		return -ENODEV;
2374 
2375 	i3c_master_detach_i2c_dev(dev);
2376 	i3c_bus_set_addr_slot_status(&master->bus, dev->addr,
2377 				     I3C_ADDR_SLOT_FREE);
2378 	i3c_master_free_i2c_dev(dev);
2379 
2380 	return 0;
2381 }
2382 
2383 static const struct i2c_algorithm i3c_master_i2c_algo = {
2384 	.master_xfer = i3c_master_i2c_adapter_xfer,
2385 	.functionality = i3c_master_i2c_funcs,
2386 };
2387 
2388 static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action,
2389 				 void *data)
2390 {
2391 	struct i2c_adapter *adap;
2392 	struct i2c_client *client;
2393 	struct device *dev = data;
2394 	struct i3c_master_controller *master;
2395 	int ret;
2396 
2397 	if (dev->type != &i2c_client_type)
2398 		return 0;
2399 
2400 	client = to_i2c_client(dev);
2401 	adap = client->adapter;
2402 
2403 	if (adap->algo != &i3c_master_i2c_algo)
2404 		return 0;
2405 
2406 	master = i2c_adapter_to_i3c_master(adap);
2407 
2408 	i3c_bus_maintenance_lock(&master->bus);
2409 	switch (action) {
2410 	case BUS_NOTIFY_ADD_DEVICE:
2411 		ret = i3c_master_i2c_attach(adap, client);
2412 		break;
2413 	case BUS_NOTIFY_DEL_DEVICE:
2414 		ret = i3c_master_i2c_detach(adap, client);
2415 		break;
2416 	}
2417 	i3c_bus_maintenance_unlock(&master->bus);
2418 
2419 	return ret;
2420 }
2421 
2422 static struct notifier_block i2cdev_notifier = {
2423 	.notifier_call = i3c_i2c_notifier_call,
2424 };
2425 
2426 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2427 {
2428 	struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2429 	struct i2c_dev_desc *i2cdev;
2430 	struct i2c_dev_boardinfo *i2cboardinfo;
2431 	int ret;
2432 
2433 	adap->dev.parent = master->dev.parent;
2434 	adap->owner = master->dev.parent->driver->owner;
2435 	adap->algo = &i3c_master_i2c_algo;
2436 	strscpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2437 
2438 	/* FIXME: Should we allow i3c masters to override these values? */
2439 	adap->timeout = 1000;
2440 	adap->retries = 3;
2441 
2442 	ret = i2c_add_adapter(adap);
2443 	if (ret)
2444 		return ret;
2445 
2446 	/*
2447 	 * We silently ignore failures here. The bus should keep working
2448 	 * correctly even if one or more i2c devices are not registered.
2449 	 */
2450 	list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
2451 		i2cdev = i3c_master_find_i2c_dev_by_addr(master,
2452 							 i2cboardinfo->base.addr);
2453 		if (WARN_ON(!i2cdev))
2454 			continue;
2455 		i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base);
2456 	}
2457 
2458 	return 0;
2459 }
2460 
2461 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2462 {
2463 	struct i2c_dev_desc *i2cdev;
2464 
2465 	i2c_del_adapter(&master->i2c);
2466 
2467 	i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2468 		i2cdev->dev = NULL;
2469 }
2470 
2471 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2472 {
2473 	struct i3c_dev_desc *i3cdev;
2474 
2475 	i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2476 		if (!i3cdev->dev)
2477 			continue;
2478 
2479 		i3cdev->dev->desc = NULL;
2480 		if (device_is_registered(&i3cdev->dev->dev))
2481 			device_unregister(&i3cdev->dev->dev);
2482 		else
2483 			put_device(&i3cdev->dev->dev);
2484 		i3cdev->dev = NULL;
2485 	}
2486 }
2487 
2488 /**
2489  * i3c_master_queue_ibi() - Queue an IBI
2490  * @dev: the device this IBI is coming from
2491  * @slot: the IBI slot used to store the payload
2492  *
2493  * Queue an IBI to the controller workqueue. The IBI handler attached to
2494  * the dev will be called from a workqueue context.
2495  */
2496 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2497 {
2498 	atomic_inc(&dev->ibi->pending_ibis);
2499 	queue_work(dev->ibi->wq, &slot->work);
2500 }
2501 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2502 
2503 static void i3c_master_handle_ibi(struct work_struct *work)
2504 {
2505 	struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2506 						 work);
2507 	struct i3c_dev_desc *dev = slot->dev;
2508 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2509 	struct i3c_ibi_payload payload;
2510 
2511 	payload.data = slot->data;
2512 	payload.len = slot->len;
2513 
2514 	if (dev->dev)
2515 		dev->ibi->handler(dev->dev, &payload);
2516 
2517 	master->ops->recycle_ibi_slot(dev, slot);
2518 	if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2519 		complete(&dev->ibi->all_ibis_handled);
2520 }
2521 
2522 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2523 				     struct i3c_ibi_slot *slot)
2524 {
2525 	slot->dev = dev;
2526 	INIT_WORK(&slot->work, i3c_master_handle_ibi);
2527 }
2528 
2529 struct i3c_generic_ibi_slot {
2530 	struct list_head node;
2531 	struct i3c_ibi_slot base;
2532 };
2533 
2534 struct i3c_generic_ibi_pool {
2535 	spinlock_t lock;
2536 	unsigned int num_slots;
2537 	struct i3c_generic_ibi_slot *slots;
2538 	void *payload_buf;
2539 	struct list_head free_slots;
2540 	struct list_head pending;
2541 };
2542 
2543 /**
2544  * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2545  * @pool: the IBI pool to free
2546  *
2547  * Free all IBI slots allated by a generic IBI pool.
2548  */
2549 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2550 {
2551 	struct i3c_generic_ibi_slot *slot;
2552 	unsigned int nslots = 0;
2553 
2554 	while (!list_empty(&pool->free_slots)) {
2555 		slot = list_first_entry(&pool->free_slots,
2556 					struct i3c_generic_ibi_slot, node);
2557 		list_del(&slot->node);
2558 		nslots++;
2559 	}
2560 
2561 	/*
2562 	 * If the number of freed slots is not equal to the number of allocated
2563 	 * slots we have a leak somewhere.
2564 	 */
2565 	WARN_ON(nslots != pool->num_slots);
2566 
2567 	kfree(pool->payload_buf);
2568 	kfree(pool->slots);
2569 	kfree(pool);
2570 }
2571 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2572 
2573 /**
2574  * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2575  * @dev: the device this pool will be used for
2576  * @req: IBI setup request describing what the device driver expects
2577  *
2578  * Create a generic IBI pool based on the information provided in @req.
2579  *
2580  * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2581  */
2582 struct i3c_generic_ibi_pool *
2583 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2584 			   const struct i3c_ibi_setup *req)
2585 {
2586 	struct i3c_generic_ibi_pool *pool;
2587 	struct i3c_generic_ibi_slot *slot;
2588 	unsigned int i;
2589 	int ret;
2590 
2591 	pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2592 	if (!pool)
2593 		return ERR_PTR(-ENOMEM);
2594 
2595 	spin_lock_init(&pool->lock);
2596 	INIT_LIST_HEAD(&pool->free_slots);
2597 	INIT_LIST_HEAD(&pool->pending);
2598 
2599 	pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2600 	if (!pool->slots) {
2601 		ret = -ENOMEM;
2602 		goto err_free_pool;
2603 	}
2604 
2605 	if (req->max_payload_len) {
2606 		pool->payload_buf = kcalloc(req->num_slots,
2607 					    req->max_payload_len, GFP_KERNEL);
2608 		if (!pool->payload_buf) {
2609 			ret = -ENOMEM;
2610 			goto err_free_pool;
2611 		}
2612 	}
2613 
2614 	for (i = 0; i < req->num_slots; i++) {
2615 		slot = &pool->slots[i];
2616 		i3c_master_init_ibi_slot(dev, &slot->base);
2617 
2618 		if (req->max_payload_len)
2619 			slot->base.data = pool->payload_buf +
2620 					  (i * req->max_payload_len);
2621 
2622 		list_add_tail(&slot->node, &pool->free_slots);
2623 		pool->num_slots++;
2624 	}
2625 
2626 	return pool;
2627 
2628 err_free_pool:
2629 	i3c_generic_ibi_free_pool(pool);
2630 	return ERR_PTR(ret);
2631 }
2632 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2633 
2634 /**
2635  * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2636  * @pool: the pool to query an IBI slot on
2637  *
2638  * Search for a free slot in a generic IBI pool.
2639  * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2640  * when it's no longer needed.
2641  *
2642  * Return: a pointer to a free slot, or NULL if there's no free slot available.
2643  */
2644 struct i3c_ibi_slot *
2645 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2646 {
2647 	struct i3c_generic_ibi_slot *slot;
2648 	unsigned long flags;
2649 
2650 	spin_lock_irqsave(&pool->lock, flags);
2651 	slot = list_first_entry_or_null(&pool->free_slots,
2652 					struct i3c_generic_ibi_slot, node);
2653 	if (slot)
2654 		list_del(&slot->node);
2655 	spin_unlock_irqrestore(&pool->lock, flags);
2656 
2657 	return slot ? &slot->base : NULL;
2658 }
2659 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2660 
2661 /**
2662  * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2663  * @pool: the pool to return the IBI slot to
2664  * @s: IBI slot to recycle
2665  *
2666  * Add an IBI slot back to its generic IBI pool. Should be called from the
2667  * master driver struct_master_controller_ops->recycle_ibi() method.
2668  */
2669 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2670 				  struct i3c_ibi_slot *s)
2671 {
2672 	struct i3c_generic_ibi_slot *slot;
2673 	unsigned long flags;
2674 
2675 	if (!s)
2676 		return;
2677 
2678 	slot = container_of(s, struct i3c_generic_ibi_slot, base);
2679 	spin_lock_irqsave(&pool->lock, flags);
2680 	list_add_tail(&slot->node, &pool->free_slots);
2681 	spin_unlock_irqrestore(&pool->lock, flags);
2682 }
2683 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2684 
2685 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2686 {
2687 	if (!ops || !ops->bus_init || !ops->priv_xfers ||
2688 	    !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2689 		return -EINVAL;
2690 
2691 	if (ops->request_ibi &&
2692 	    (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2693 	     !ops->recycle_ibi_slot))
2694 		return -EINVAL;
2695 
2696 	return 0;
2697 }
2698 
2699 /**
2700  * i3c_master_register() - register an I3C master
2701  * @master: master used to send frames on the bus
2702  * @parent: the parent device (the one that provides this I3C master
2703  *	    controller)
2704  * @ops: the master controller operations
2705  * @secondary: true if you are registering a secondary master. Will return
2706  *	       -ENOTSUPP if set to true since secondary masters are not yet
2707  *	       supported
2708  *
2709  * This function takes care of everything for you:
2710  *
2711  * - creates and initializes the I3C bus
2712  * - populates the bus with static I2C devs if @parent->of_node is not
2713  *   NULL
2714  * - registers all I3C devices added by the controller during bus
2715  *   initialization
2716  * - registers the I2C adapter and all I2C devices
2717  *
2718  * Return: 0 in case of success, a negative error code otherwise.
2719  */
2720 int i3c_master_register(struct i3c_master_controller *master,
2721 			struct device *parent,
2722 			const struct i3c_master_controller_ops *ops,
2723 			bool secondary)
2724 {
2725 	unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2726 	struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2727 	enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2728 	struct i2c_dev_boardinfo *i2cbi;
2729 	int ret;
2730 
2731 	/* We do not support secondary masters yet. */
2732 	if (secondary)
2733 		return -ENOTSUPP;
2734 
2735 	ret = i3c_master_check_ops(ops);
2736 	if (ret)
2737 		return ret;
2738 
2739 	master->dev.parent = parent;
2740 	master->dev.of_node = of_node_get(parent->of_node);
2741 	master->dev.bus = &i3c_bus_type;
2742 	master->dev.type = &i3c_masterdev_type;
2743 	master->dev.release = i3c_masterdev_release;
2744 	master->ops = ops;
2745 	master->secondary = secondary;
2746 	INIT_LIST_HEAD(&master->boardinfo.i2c);
2747 	INIT_LIST_HEAD(&master->boardinfo.i3c);
2748 
2749 	ret = i3c_bus_init(i3cbus, master->dev.of_node);
2750 	if (ret)
2751 		return ret;
2752 
2753 	device_initialize(&master->dev);
2754 	dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2755 
2756 	master->dev.dma_mask = parent->dma_mask;
2757 	master->dev.coherent_dma_mask = parent->coherent_dma_mask;
2758 	master->dev.dma_parms = parent->dma_parms;
2759 
2760 	ret = of_populate_i3c_bus(master);
2761 	if (ret)
2762 		goto err_put_dev;
2763 
2764 	list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2765 		switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2766 		case I3C_LVR_I2C_INDEX(0):
2767 			if (mode < I3C_BUS_MODE_MIXED_FAST)
2768 				mode = I3C_BUS_MODE_MIXED_FAST;
2769 			break;
2770 		case I3C_LVR_I2C_INDEX(1):
2771 			if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2772 				mode = I3C_BUS_MODE_MIXED_LIMITED;
2773 			break;
2774 		case I3C_LVR_I2C_INDEX(2):
2775 			if (mode < I3C_BUS_MODE_MIXED_SLOW)
2776 				mode = I3C_BUS_MODE_MIXED_SLOW;
2777 			break;
2778 		default:
2779 			ret = -EINVAL;
2780 			goto err_put_dev;
2781 		}
2782 
2783 		if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2784 			i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2785 	}
2786 
2787 	ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2788 	if (ret)
2789 		goto err_put_dev;
2790 
2791 	master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2792 	if (!master->wq) {
2793 		ret = -ENOMEM;
2794 		goto err_put_dev;
2795 	}
2796 
2797 	ret = i3c_master_bus_init(master);
2798 	if (ret)
2799 		goto err_put_dev;
2800 
2801 	ret = device_add(&master->dev);
2802 	if (ret)
2803 		goto err_cleanup_bus;
2804 
2805 	/*
2806 	 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2807 	 * through the I2C subsystem.
2808 	 */
2809 	ret = i3c_master_i2c_adapter_init(master);
2810 	if (ret)
2811 		goto err_del_dev;
2812 
2813 	i3c_bus_notify(i3cbus, I3C_NOTIFY_BUS_ADD);
2814 
2815 	/*
2816 	 * We're done initializing the bus and the controller, we can now
2817 	 * register I3C devices discovered during the initial DAA.
2818 	 */
2819 	master->init_done = true;
2820 	i3c_bus_normaluse_lock(&master->bus);
2821 	i3c_master_register_new_i3c_devs(master);
2822 	i3c_bus_normaluse_unlock(&master->bus);
2823 
2824 	return 0;
2825 
2826 err_del_dev:
2827 	device_del(&master->dev);
2828 
2829 err_cleanup_bus:
2830 	i3c_master_bus_cleanup(master);
2831 
2832 err_put_dev:
2833 	put_device(&master->dev);
2834 
2835 	return ret;
2836 }
2837 EXPORT_SYMBOL_GPL(i3c_master_register);
2838 
2839 /**
2840  * i3c_master_unregister() - unregister an I3C master
2841  * @master: master used to send frames on the bus
2842  *
2843  * Basically undo everything done in i3c_master_register().
2844  */
2845 void i3c_master_unregister(struct i3c_master_controller *master)
2846 {
2847 	i3c_bus_notify(&master->bus, I3C_NOTIFY_BUS_REMOVE);
2848 
2849 	i3c_master_i2c_adapter_cleanup(master);
2850 	i3c_master_unregister_i3c_devs(master);
2851 	i3c_master_bus_cleanup(master);
2852 	device_unregister(&master->dev);
2853 }
2854 EXPORT_SYMBOL_GPL(i3c_master_unregister);
2855 
2856 int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev)
2857 {
2858 	struct i3c_master_controller *master;
2859 
2860 	if (!dev)
2861 		return -ENOENT;
2862 
2863 	master = i3c_dev_get_master(dev);
2864 	if (!master)
2865 		return -EINVAL;
2866 
2867 	if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
2868 		!dev->boardinfo->static_addr)
2869 		return -EINVAL;
2870 
2871 	return i3c_master_setdasa_locked(master, dev->info.static_addr,
2872 						dev->boardinfo->init_dyn_addr);
2873 }
2874 
2875 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2876 				 struct i3c_priv_xfer *xfers,
2877 				 int nxfers)
2878 {
2879 	struct i3c_master_controller *master;
2880 
2881 	if (!dev)
2882 		return -ENOENT;
2883 
2884 	master = i3c_dev_get_master(dev);
2885 	if (!master || !xfers)
2886 		return -EINVAL;
2887 
2888 	if (!master->ops->priv_xfers)
2889 		return -ENOTSUPP;
2890 
2891 	return master->ops->priv_xfers(dev, xfers, nxfers);
2892 }
2893 
2894 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2895 {
2896 	struct i3c_master_controller *master;
2897 	int ret;
2898 
2899 	if (!dev->ibi)
2900 		return -EINVAL;
2901 
2902 	master = i3c_dev_get_master(dev);
2903 	ret = master->ops->disable_ibi(dev);
2904 	if (ret)
2905 		return ret;
2906 
2907 	reinit_completion(&dev->ibi->all_ibis_handled);
2908 	if (atomic_read(&dev->ibi->pending_ibis))
2909 		wait_for_completion(&dev->ibi->all_ibis_handled);
2910 
2911 	dev->ibi->enabled = false;
2912 
2913 	return 0;
2914 }
2915 
2916 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2917 {
2918 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2919 	int ret;
2920 
2921 	if (!dev->ibi)
2922 		return -EINVAL;
2923 
2924 	ret = master->ops->enable_ibi(dev);
2925 	if (!ret)
2926 		dev->ibi->enabled = true;
2927 
2928 	return ret;
2929 }
2930 
2931 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2932 			       const struct i3c_ibi_setup *req)
2933 {
2934 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2935 	struct i3c_device_ibi_info *ibi;
2936 	int ret;
2937 
2938 	if (!master->ops->request_ibi)
2939 		return -ENOTSUPP;
2940 
2941 	if (dev->ibi)
2942 		return -EBUSY;
2943 
2944 	ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2945 	if (!ibi)
2946 		return -ENOMEM;
2947 
2948 	ibi->wq = alloc_ordered_workqueue(dev_name(i3cdev_to_dev(dev->dev)), WQ_MEM_RECLAIM);
2949 	if (!ibi->wq) {
2950 		kfree(ibi);
2951 		return -ENOMEM;
2952 	}
2953 
2954 	atomic_set(&ibi->pending_ibis, 0);
2955 	init_completion(&ibi->all_ibis_handled);
2956 	ibi->handler = req->handler;
2957 	ibi->max_payload_len = req->max_payload_len;
2958 	ibi->num_slots = req->num_slots;
2959 
2960 	dev->ibi = ibi;
2961 	ret = master->ops->request_ibi(dev, req);
2962 	if (ret) {
2963 		kfree(ibi);
2964 		dev->ibi = NULL;
2965 	}
2966 
2967 	return ret;
2968 }
2969 
2970 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2971 {
2972 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2973 
2974 	if (!dev->ibi)
2975 		return;
2976 
2977 	if (WARN_ON(dev->ibi->enabled))
2978 		WARN_ON(i3c_dev_disable_ibi_locked(dev));
2979 
2980 	master->ops->free_ibi(dev);
2981 
2982 	if (dev->ibi->wq) {
2983 		destroy_workqueue(dev->ibi->wq);
2984 		dev->ibi->wq = NULL;
2985 	}
2986 
2987 	kfree(dev->ibi);
2988 	dev->ibi = NULL;
2989 }
2990 
2991 static int __init i3c_init(void)
2992 {
2993 	int res;
2994 
2995 	res = of_alias_get_highest_id("i3c");
2996 	if (res >= 0) {
2997 		mutex_lock(&i3c_core_lock);
2998 		__i3c_first_dynamic_bus_num = res + 1;
2999 		mutex_unlock(&i3c_core_lock);
3000 	}
3001 
3002 	res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier);
3003 	if (res)
3004 		return res;
3005 
3006 	res = bus_register(&i3c_bus_type);
3007 	if (res)
3008 		goto out_unreg_notifier;
3009 
3010 	return 0;
3011 
3012 out_unreg_notifier:
3013 	bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
3014 
3015 	return res;
3016 }
3017 subsys_initcall(i3c_init);
3018 
3019 static void __exit i3c_exit(void)
3020 {
3021 	bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
3022 	idr_destroy(&i3c_bus_idr);
3023 	bus_unregister(&i3c_bus_type);
3024 }
3025 module_exit(i3c_exit);
3026 
3027 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
3028 MODULE_DESCRIPTION("I3C core");
3029 MODULE_LICENSE("GPL v2");
3030