xref: /linux/drivers/i3c/master.c (revision a4ff64edf9edc8f05e2183610dc8306d3279c6ac)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2018 Cadence Design Systems Inc.
4  *
5  * Author: Boris Brezillon <boris.brezillon@bootlin.com>
6  */
7 
8 #include <linux/atomic.h>
9 #include <linux/bug.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/list.h>
15 #include <linux/of.h>
16 #include <linux/slab.h>
17 #include <linux/spinlock.h>
18 #include <linux/workqueue.h>
19 
20 #include "internals.h"
21 
22 static DEFINE_IDR(i3c_bus_idr);
23 static DEFINE_MUTEX(i3c_core_lock);
24 static int __i3c_first_dynamic_bus_num;
25 static BLOCKING_NOTIFIER_HEAD(i3c_bus_notifier);
26 
27 /**
28  * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
29  * @bus: I3C bus to take the lock on
30  *
31  * This function takes the bus lock so that no other operations can occur on
32  * the bus. This is needed for all kind of bus maintenance operation, like
33  * - enabling/disabling slave events
34  * - re-triggering DAA
35  * - changing the dynamic address of a device
36  * - relinquishing mastership
37  * - ...
38  *
39  * The reason for this kind of locking is that we don't want drivers and core
40  * logic to rely on I3C device information that could be changed behind their
41  * back.
42  */
43 static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
44 {
45 	down_write(&bus->lock);
46 }
47 
48 /**
49  * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
50  *			      operation
51  * @bus: I3C bus to release the lock on
52  *
53  * Should be called when the bus maintenance operation is done. See
54  * i3c_bus_maintenance_lock() for more details on what these maintenance
55  * operations are.
56  */
57 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
58 {
59 	up_write(&bus->lock);
60 }
61 
62 /**
63  * i3c_bus_normaluse_lock - Lock the bus for a normal operation
64  * @bus: I3C bus to take the lock on
65  *
66  * This function takes the bus lock for any operation that is not a maintenance
67  * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
68  * maintenance operations). Basically all communications with I3C devices are
69  * normal operations (HDR, SDR transfers or CCC commands that do not change bus
70  * state or I3C dynamic address).
71  *
72  * Note that this lock is not guaranteeing serialization of normal operations.
73  * In other words, transfer requests passed to the I3C master can be submitted
74  * in parallel and I3C master drivers have to use their own locking to make
75  * sure two different communications are not inter-mixed, or access to the
76  * output/input queue is not done while the engine is busy.
77  */
78 void i3c_bus_normaluse_lock(struct i3c_bus *bus)
79 {
80 	down_read(&bus->lock);
81 }
82 
83 /**
84  * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
85  * @bus: I3C bus to release the lock on
86  *
87  * Should be called when a normal operation is done. See
88  * i3c_bus_normaluse_lock() for more details on what these normal operations
89  * are.
90  */
91 void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
92 {
93 	up_read(&bus->lock);
94 }
95 
96 static struct i3c_master_controller *
97 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
98 {
99 	return container_of(i3cbus, struct i3c_master_controller, bus);
100 }
101 
102 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
103 {
104 	return container_of(dev, struct i3c_master_controller, dev);
105 }
106 
107 static const struct device_type i3c_device_type;
108 
109 static struct i3c_bus *dev_to_i3cbus(struct device *dev)
110 {
111 	struct i3c_master_controller *master;
112 
113 	if (dev->type == &i3c_device_type)
114 		return dev_to_i3cdev(dev)->bus;
115 
116 	master = dev_to_i3cmaster(dev);
117 
118 	return &master->bus;
119 }
120 
121 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
122 {
123 	struct i3c_master_controller *master;
124 
125 	if (dev->type == &i3c_device_type)
126 		return dev_to_i3cdev(dev)->desc;
127 
128 	master = dev_to_i3cmaster(dev);
129 
130 	return master->this;
131 }
132 
133 static ssize_t bcr_show(struct device *dev,
134 			struct device_attribute *da,
135 			char *buf)
136 {
137 	struct i3c_bus *bus = dev_to_i3cbus(dev);
138 	struct i3c_dev_desc *desc;
139 	ssize_t ret;
140 
141 	i3c_bus_normaluse_lock(bus);
142 	desc = dev_to_i3cdesc(dev);
143 	ret = sprintf(buf, "%x\n", desc->info.bcr);
144 	i3c_bus_normaluse_unlock(bus);
145 
146 	return ret;
147 }
148 static DEVICE_ATTR_RO(bcr);
149 
150 static ssize_t dcr_show(struct device *dev,
151 			struct device_attribute *da,
152 			char *buf)
153 {
154 	struct i3c_bus *bus = dev_to_i3cbus(dev);
155 	struct i3c_dev_desc *desc;
156 	ssize_t ret;
157 
158 	i3c_bus_normaluse_lock(bus);
159 	desc = dev_to_i3cdesc(dev);
160 	ret = sprintf(buf, "%x\n", desc->info.dcr);
161 	i3c_bus_normaluse_unlock(bus);
162 
163 	return ret;
164 }
165 static DEVICE_ATTR_RO(dcr);
166 
167 static ssize_t pid_show(struct device *dev,
168 			struct device_attribute *da,
169 			char *buf)
170 {
171 	struct i3c_bus *bus = dev_to_i3cbus(dev);
172 	struct i3c_dev_desc *desc;
173 	ssize_t ret;
174 
175 	i3c_bus_normaluse_lock(bus);
176 	desc = dev_to_i3cdesc(dev);
177 	ret = sprintf(buf, "%llx\n", desc->info.pid);
178 	i3c_bus_normaluse_unlock(bus);
179 
180 	return ret;
181 }
182 static DEVICE_ATTR_RO(pid);
183 
184 static ssize_t dynamic_address_show(struct device *dev,
185 				    struct device_attribute *da,
186 				    char *buf)
187 {
188 	struct i3c_bus *bus = dev_to_i3cbus(dev);
189 	struct i3c_dev_desc *desc;
190 	ssize_t ret;
191 
192 	i3c_bus_normaluse_lock(bus);
193 	desc = dev_to_i3cdesc(dev);
194 	ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
195 	i3c_bus_normaluse_unlock(bus);
196 
197 	return ret;
198 }
199 static DEVICE_ATTR_RO(dynamic_address);
200 
201 static const char * const hdrcap_strings[] = {
202 	"hdr-ddr", "hdr-tsp", "hdr-tsl",
203 };
204 
205 static ssize_t hdrcap_show(struct device *dev,
206 			   struct device_attribute *da,
207 			   char *buf)
208 {
209 	struct i3c_bus *bus = dev_to_i3cbus(dev);
210 	struct i3c_dev_desc *desc;
211 	ssize_t offset = 0, ret;
212 	unsigned long caps;
213 	int mode;
214 
215 	i3c_bus_normaluse_lock(bus);
216 	desc = dev_to_i3cdesc(dev);
217 	caps = desc->info.hdr_cap;
218 	for_each_set_bit(mode, &caps, 8) {
219 		if (mode >= ARRAY_SIZE(hdrcap_strings))
220 			break;
221 
222 		if (!hdrcap_strings[mode])
223 			continue;
224 
225 		ret = sprintf(buf + offset, offset ? " %s" : "%s",
226 			      hdrcap_strings[mode]);
227 		if (ret < 0)
228 			goto out;
229 
230 		offset += ret;
231 	}
232 
233 	ret = sprintf(buf + offset, "\n");
234 	if (ret < 0)
235 		goto out;
236 
237 	ret = offset + ret;
238 
239 out:
240 	i3c_bus_normaluse_unlock(bus);
241 
242 	return ret;
243 }
244 static DEVICE_ATTR_RO(hdrcap);
245 
246 static ssize_t modalias_show(struct device *dev,
247 			     struct device_attribute *da, char *buf)
248 {
249 	struct i3c_device *i3c = dev_to_i3cdev(dev);
250 	struct i3c_device_info devinfo;
251 	u16 manuf, part, ext;
252 
253 	i3c_device_get_info(i3c, &devinfo);
254 	manuf = I3C_PID_MANUF_ID(devinfo.pid);
255 	part = I3C_PID_PART_ID(devinfo.pid);
256 	ext = I3C_PID_EXTRA_INFO(devinfo.pid);
257 
258 	if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
259 		return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
260 			       manuf);
261 
262 	return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
263 		       devinfo.dcr, manuf, part, ext);
264 }
265 static DEVICE_ATTR_RO(modalias);
266 
267 static struct attribute *i3c_device_attrs[] = {
268 	&dev_attr_bcr.attr,
269 	&dev_attr_dcr.attr,
270 	&dev_attr_pid.attr,
271 	&dev_attr_dynamic_address.attr,
272 	&dev_attr_hdrcap.attr,
273 	&dev_attr_modalias.attr,
274 	NULL,
275 };
276 ATTRIBUTE_GROUPS(i3c_device);
277 
278 static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env)
279 {
280 	const struct i3c_device *i3cdev = dev_to_i3cdev(dev);
281 	struct i3c_device_info devinfo;
282 	u16 manuf, part, ext;
283 
284 	i3c_device_get_info(i3cdev, &devinfo);
285 	manuf = I3C_PID_MANUF_ID(devinfo.pid);
286 	part = I3C_PID_PART_ID(devinfo.pid);
287 	ext = I3C_PID_EXTRA_INFO(devinfo.pid);
288 
289 	if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
290 		return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
291 				      devinfo.dcr, manuf);
292 
293 	return add_uevent_var(env,
294 			      "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
295 			      devinfo.dcr, manuf, part, ext);
296 }
297 
298 static const struct device_type i3c_device_type = {
299 	.groups	= i3c_device_groups,
300 	.uevent = i3c_device_uevent,
301 };
302 
303 static int i3c_device_match(struct device *dev, struct device_driver *drv)
304 {
305 	struct i3c_device *i3cdev;
306 	struct i3c_driver *i3cdrv;
307 
308 	if (dev->type != &i3c_device_type)
309 		return 0;
310 
311 	i3cdev = dev_to_i3cdev(dev);
312 	i3cdrv = drv_to_i3cdrv(drv);
313 	if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
314 		return 1;
315 
316 	return 0;
317 }
318 
319 static int i3c_device_probe(struct device *dev)
320 {
321 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
322 	struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
323 
324 	return driver->probe(i3cdev);
325 }
326 
327 static void i3c_device_remove(struct device *dev)
328 {
329 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
330 	struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
331 
332 	if (driver->remove)
333 		driver->remove(i3cdev);
334 
335 	i3c_device_free_ibi(i3cdev);
336 }
337 
338 struct bus_type i3c_bus_type = {
339 	.name = "i3c",
340 	.match = i3c_device_match,
341 	.probe = i3c_device_probe,
342 	.remove = i3c_device_remove,
343 };
344 
345 static enum i3c_addr_slot_status
346 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
347 {
348 	unsigned long status;
349 	int bitpos = addr * 2;
350 
351 	if (addr > I2C_MAX_ADDR)
352 		return I3C_ADDR_SLOT_RSVD;
353 
354 	status = bus->addrslots[bitpos / BITS_PER_LONG];
355 	status >>= bitpos % BITS_PER_LONG;
356 
357 	return status & I3C_ADDR_SLOT_STATUS_MASK;
358 }
359 
360 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
361 					 enum i3c_addr_slot_status status)
362 {
363 	int bitpos = addr * 2;
364 	unsigned long *ptr;
365 
366 	if (addr > I2C_MAX_ADDR)
367 		return;
368 
369 	ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
370 	*ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
371 						(bitpos % BITS_PER_LONG));
372 	*ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
373 }
374 
375 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
376 {
377 	enum i3c_addr_slot_status status;
378 
379 	status = i3c_bus_get_addr_slot_status(bus, addr);
380 
381 	return status == I3C_ADDR_SLOT_FREE;
382 }
383 
384 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
385 {
386 	enum i3c_addr_slot_status status;
387 	u8 addr;
388 
389 	for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
390 		status = i3c_bus_get_addr_slot_status(bus, addr);
391 		if (status == I3C_ADDR_SLOT_FREE)
392 			return addr;
393 	}
394 
395 	return -ENOMEM;
396 }
397 
398 static void i3c_bus_init_addrslots(struct i3c_bus *bus)
399 {
400 	int i;
401 
402 	/* Addresses 0 to 7 are reserved. */
403 	for (i = 0; i < 8; i++)
404 		i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
405 
406 	/*
407 	 * Reserve broadcast address and all addresses that might collide
408 	 * with the broadcast address when facing a single bit error.
409 	 */
410 	i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
411 				     I3C_ADDR_SLOT_RSVD);
412 	for (i = 0; i < 7; i++)
413 		i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
414 					     I3C_ADDR_SLOT_RSVD);
415 }
416 
417 static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
418 {
419 	mutex_lock(&i3c_core_lock);
420 	idr_remove(&i3c_bus_idr, i3cbus->id);
421 	mutex_unlock(&i3c_core_lock);
422 }
423 
424 static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np)
425 {
426 	int ret, start, end, id = -1;
427 
428 	init_rwsem(&i3cbus->lock);
429 	INIT_LIST_HEAD(&i3cbus->devs.i2c);
430 	INIT_LIST_HEAD(&i3cbus->devs.i3c);
431 	i3c_bus_init_addrslots(i3cbus);
432 	i3cbus->mode = I3C_BUS_MODE_PURE;
433 
434 	if (np)
435 		id = of_alias_get_id(np, "i3c");
436 
437 	mutex_lock(&i3c_core_lock);
438 	if (id >= 0) {
439 		start = id;
440 		end = start + 1;
441 	} else {
442 		start = __i3c_first_dynamic_bus_num;
443 		end = 0;
444 	}
445 
446 	ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL);
447 	mutex_unlock(&i3c_core_lock);
448 
449 	if (ret < 0)
450 		return ret;
451 
452 	i3cbus->id = ret;
453 
454 	return 0;
455 }
456 
457 void i3c_for_each_bus_locked(int (*fn)(struct i3c_bus *bus, void *data),
458 			     void *data)
459 {
460 	struct i3c_bus *bus;
461 	int id;
462 
463 	mutex_lock(&i3c_core_lock);
464 	idr_for_each_entry(&i3c_bus_idr, bus, id)
465 		fn(bus, data);
466 	mutex_unlock(&i3c_core_lock);
467 }
468 EXPORT_SYMBOL_GPL(i3c_for_each_bus_locked);
469 
470 int i3c_register_notifier(struct notifier_block *nb)
471 {
472 	return blocking_notifier_chain_register(&i3c_bus_notifier, nb);
473 }
474 EXPORT_SYMBOL_GPL(i3c_register_notifier);
475 
476 int i3c_unregister_notifier(struct notifier_block *nb)
477 {
478 	return blocking_notifier_chain_unregister(&i3c_bus_notifier, nb);
479 }
480 EXPORT_SYMBOL_GPL(i3c_unregister_notifier);
481 
482 static void i3c_bus_notify(struct i3c_bus *bus, unsigned int action)
483 {
484 	blocking_notifier_call_chain(&i3c_bus_notifier, action, bus);
485 }
486 
487 static const char * const i3c_bus_mode_strings[] = {
488 	[I3C_BUS_MODE_PURE] = "pure",
489 	[I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
490 	[I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
491 	[I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
492 };
493 
494 static ssize_t mode_show(struct device *dev,
495 			 struct device_attribute *da,
496 			 char *buf)
497 {
498 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
499 	ssize_t ret;
500 
501 	i3c_bus_normaluse_lock(i3cbus);
502 	if (i3cbus->mode < 0 ||
503 	    i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
504 	    !i3c_bus_mode_strings[i3cbus->mode])
505 		ret = sprintf(buf, "unknown\n");
506 	else
507 		ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
508 	i3c_bus_normaluse_unlock(i3cbus);
509 
510 	return ret;
511 }
512 static DEVICE_ATTR_RO(mode);
513 
514 static ssize_t current_master_show(struct device *dev,
515 				   struct device_attribute *da,
516 				   char *buf)
517 {
518 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
519 	ssize_t ret;
520 
521 	i3c_bus_normaluse_lock(i3cbus);
522 	ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
523 		      i3cbus->cur_master->info.pid);
524 	i3c_bus_normaluse_unlock(i3cbus);
525 
526 	return ret;
527 }
528 static DEVICE_ATTR_RO(current_master);
529 
530 static ssize_t i3c_scl_frequency_show(struct device *dev,
531 				      struct device_attribute *da,
532 				      char *buf)
533 {
534 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
535 	ssize_t ret;
536 
537 	i3c_bus_normaluse_lock(i3cbus);
538 	ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
539 	i3c_bus_normaluse_unlock(i3cbus);
540 
541 	return ret;
542 }
543 static DEVICE_ATTR_RO(i3c_scl_frequency);
544 
545 static ssize_t i2c_scl_frequency_show(struct device *dev,
546 				      struct device_attribute *da,
547 				      char *buf)
548 {
549 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
550 	ssize_t ret;
551 
552 	i3c_bus_normaluse_lock(i3cbus);
553 	ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
554 	i3c_bus_normaluse_unlock(i3cbus);
555 
556 	return ret;
557 }
558 static DEVICE_ATTR_RO(i2c_scl_frequency);
559 
560 static struct attribute *i3c_masterdev_attrs[] = {
561 	&dev_attr_mode.attr,
562 	&dev_attr_current_master.attr,
563 	&dev_attr_i3c_scl_frequency.attr,
564 	&dev_attr_i2c_scl_frequency.attr,
565 	&dev_attr_bcr.attr,
566 	&dev_attr_dcr.attr,
567 	&dev_attr_pid.attr,
568 	&dev_attr_dynamic_address.attr,
569 	&dev_attr_hdrcap.attr,
570 	NULL,
571 };
572 ATTRIBUTE_GROUPS(i3c_masterdev);
573 
574 static void i3c_masterdev_release(struct device *dev)
575 {
576 	struct i3c_master_controller *master = dev_to_i3cmaster(dev);
577 	struct i3c_bus *bus = dev_to_i3cbus(dev);
578 
579 	if (master->wq)
580 		destroy_workqueue(master->wq);
581 
582 	WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
583 	i3c_bus_cleanup(bus);
584 
585 	of_node_put(dev->of_node);
586 }
587 
588 static const struct device_type i3c_masterdev_type = {
589 	.groups	= i3c_masterdev_groups,
590 };
591 
592 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
593 			    unsigned long max_i2c_scl_rate)
594 {
595 	struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
596 
597 	i3cbus->mode = mode;
598 
599 	switch (i3cbus->mode) {
600 	case I3C_BUS_MODE_PURE:
601 		if (!i3cbus->scl_rate.i3c)
602 			i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
603 		break;
604 	case I3C_BUS_MODE_MIXED_FAST:
605 	case I3C_BUS_MODE_MIXED_LIMITED:
606 		if (!i3cbus->scl_rate.i3c)
607 			i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
608 		if (!i3cbus->scl_rate.i2c)
609 			i3cbus->scl_rate.i2c = max_i2c_scl_rate;
610 		break;
611 	case I3C_BUS_MODE_MIXED_SLOW:
612 		if (!i3cbus->scl_rate.i2c)
613 			i3cbus->scl_rate.i2c = max_i2c_scl_rate;
614 		if (!i3cbus->scl_rate.i3c ||
615 		    i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
616 			i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
617 		break;
618 	default:
619 		return -EINVAL;
620 	}
621 
622 	dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
623 		i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
624 
625 	/*
626 	 * I3C/I2C frequency may have been overridden, check that user-provided
627 	 * values are not exceeding max possible frequency.
628 	 */
629 	if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
630 	    i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
631 		return -EINVAL;
632 
633 	return 0;
634 }
635 
636 static struct i3c_master_controller *
637 i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
638 {
639 	return container_of(adap, struct i3c_master_controller, i2c);
640 }
641 
642 static struct i2c_adapter *
643 i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
644 {
645 	return &master->i2c;
646 }
647 
648 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
649 {
650 	kfree(dev);
651 }
652 
653 static struct i2c_dev_desc *
654 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
655 			 u16 addr, u8 lvr)
656 {
657 	struct i2c_dev_desc *dev;
658 
659 	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
660 	if (!dev)
661 		return ERR_PTR(-ENOMEM);
662 
663 	dev->common.master = master;
664 	dev->addr = addr;
665 	dev->lvr = lvr;
666 
667 	return dev;
668 }
669 
670 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
671 				   u16 payloadlen)
672 {
673 	dest->addr = addr;
674 	dest->payload.len = payloadlen;
675 	if (payloadlen)
676 		dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
677 	else
678 		dest->payload.data = NULL;
679 
680 	return dest->payload.data;
681 }
682 
683 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
684 {
685 	kfree(dest->payload.data);
686 }
687 
688 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
689 			     struct i3c_ccc_cmd_dest *dests,
690 			     unsigned int ndests)
691 {
692 	cmd->rnw = rnw ? 1 : 0;
693 	cmd->id = id;
694 	cmd->dests = dests;
695 	cmd->ndests = ndests;
696 	cmd->err = I3C_ERROR_UNKNOWN;
697 }
698 
699 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
700 					  struct i3c_ccc_cmd *cmd)
701 {
702 	int ret;
703 
704 	if (!cmd || !master)
705 		return -EINVAL;
706 
707 	if (WARN_ON(master->init_done &&
708 		    !rwsem_is_locked(&master->bus.lock)))
709 		return -EINVAL;
710 
711 	if (!master->ops->send_ccc_cmd)
712 		return -ENOTSUPP;
713 
714 	if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
715 		return -EINVAL;
716 
717 	if (master->ops->supports_ccc_cmd &&
718 	    !master->ops->supports_ccc_cmd(master, cmd))
719 		return -ENOTSUPP;
720 
721 	ret = master->ops->send_ccc_cmd(master, cmd);
722 	if (ret) {
723 		if (cmd->err != I3C_ERROR_UNKNOWN)
724 			return cmd->err;
725 
726 		return ret;
727 	}
728 
729 	return 0;
730 }
731 
732 static struct i2c_dev_desc *
733 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
734 				u16 addr)
735 {
736 	struct i2c_dev_desc *dev;
737 
738 	i3c_bus_for_each_i2cdev(&master->bus, dev) {
739 		if (dev->addr == addr)
740 			return dev;
741 	}
742 
743 	return NULL;
744 }
745 
746 /**
747  * i3c_master_get_free_addr() - get a free address on the bus
748  * @master: I3C master object
749  * @start_addr: where to start searching
750  *
751  * This function must be called with the bus lock held in write mode.
752  *
753  * Return: the first free address starting at @start_addr (included) or -ENOMEM
754  * if there's no more address available.
755  */
756 int i3c_master_get_free_addr(struct i3c_master_controller *master,
757 			     u8 start_addr)
758 {
759 	return i3c_bus_get_free_addr(&master->bus, start_addr);
760 }
761 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
762 
763 static void i3c_device_release(struct device *dev)
764 {
765 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
766 
767 	WARN_ON(i3cdev->desc);
768 
769 	of_node_put(i3cdev->dev.of_node);
770 	kfree(i3cdev);
771 }
772 
773 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
774 {
775 	kfree(dev);
776 }
777 
778 static struct i3c_dev_desc *
779 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
780 			 const struct i3c_device_info *info)
781 {
782 	struct i3c_dev_desc *dev;
783 
784 	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
785 	if (!dev)
786 		return ERR_PTR(-ENOMEM);
787 
788 	dev->common.master = master;
789 	dev->info = *info;
790 	mutex_init(&dev->ibi_lock);
791 
792 	return dev;
793 }
794 
795 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
796 				    u8 addr)
797 {
798 	enum i3c_addr_slot_status addrstat;
799 	struct i3c_ccc_cmd_dest dest;
800 	struct i3c_ccc_cmd cmd;
801 	int ret;
802 
803 	if (!master)
804 		return -EINVAL;
805 
806 	addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
807 	if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
808 		return -EINVAL;
809 
810 	i3c_ccc_cmd_dest_init(&dest, addr, 0);
811 	i3c_ccc_cmd_init(&cmd, false,
812 			 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
813 			 &dest, 1);
814 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
815 	i3c_ccc_cmd_dest_cleanup(&dest);
816 
817 	return ret;
818 }
819 
820 /**
821  * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
822  *				procedure
823  * @master: master used to send frames on the bus
824  *
825  * Send a ENTDAA CCC command to start a DAA procedure.
826  *
827  * Note that this function only sends the ENTDAA CCC command, all the logic
828  * behind dynamic address assignment has to be handled in the I3C master
829  * driver.
830  *
831  * This function must be called with the bus lock held in write mode.
832  *
833  * Return: 0 in case of success, a positive I3C error code if the error is
834  * one of the official Mx error codes, and a negative error code otherwise.
835  */
836 int i3c_master_entdaa_locked(struct i3c_master_controller *master)
837 {
838 	struct i3c_ccc_cmd_dest dest;
839 	struct i3c_ccc_cmd cmd;
840 	int ret;
841 
842 	i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
843 	i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
844 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
845 	i3c_ccc_cmd_dest_cleanup(&dest);
846 
847 	return ret;
848 }
849 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
850 
851 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
852 					u8 addr, bool enable, u8 evts)
853 {
854 	struct i3c_ccc_events *events;
855 	struct i3c_ccc_cmd_dest dest;
856 	struct i3c_ccc_cmd cmd;
857 	int ret;
858 
859 	events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
860 	if (!events)
861 		return -ENOMEM;
862 
863 	events->events = evts;
864 	i3c_ccc_cmd_init(&cmd, false,
865 			 enable ?
866 			 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
867 			 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
868 			 &dest, 1);
869 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
870 	i3c_ccc_cmd_dest_cleanup(&dest);
871 
872 	return ret;
873 }
874 
875 /**
876  * i3c_master_disec_locked() - send a DISEC CCC command
877  * @master: master used to send frames on the bus
878  * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
879  * @evts: events to disable
880  *
881  * Send a DISEC CCC command to disable some or all events coming from a
882  * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
883  *
884  * This function must be called with the bus lock held in write mode.
885  *
886  * Return: 0 in case of success, a positive I3C error code if the error is
887  * one of the official Mx error codes, and a negative error code otherwise.
888  */
889 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
890 			    u8 evts)
891 {
892 	return i3c_master_enec_disec_locked(master, addr, false, evts);
893 }
894 EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
895 
896 /**
897  * i3c_master_enec_locked() - send an ENEC CCC command
898  * @master: master used to send frames on the bus
899  * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
900  * @evts: events to disable
901  *
902  * Sends an ENEC CCC command to enable some or all events coming from a
903  * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
904  *
905  * This function must be called with the bus lock held in write mode.
906  *
907  * Return: 0 in case of success, a positive I3C error code if the error is
908  * one of the official Mx error codes, and a negative error code otherwise.
909  */
910 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
911 			   u8 evts)
912 {
913 	return i3c_master_enec_disec_locked(master, addr, true, evts);
914 }
915 EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
916 
917 /**
918  * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
919  * @master: master used to send frames on the bus
920  *
921  * Send a DEFSLVS CCC command containing all the devices known to the @master.
922  * This is useful when you have secondary masters on the bus to propagate
923  * device information.
924  *
925  * This should be called after all I3C devices have been discovered (in other
926  * words, after the DAA procedure has finished) and instantiated in
927  * &i3c_master_controller_ops->bus_init().
928  * It should also be called if a master ACKed an Hot-Join request and assigned
929  * a dynamic address to the device joining the bus.
930  *
931  * This function must be called with the bus lock held in write mode.
932  *
933  * Return: 0 in case of success, a positive I3C error code if the error is
934  * one of the official Mx error codes, and a negative error code otherwise.
935  */
936 int i3c_master_defslvs_locked(struct i3c_master_controller *master)
937 {
938 	struct i3c_ccc_defslvs *defslvs;
939 	struct i3c_ccc_dev_desc *desc;
940 	struct i3c_ccc_cmd_dest dest;
941 	struct i3c_dev_desc *i3cdev;
942 	struct i2c_dev_desc *i2cdev;
943 	struct i3c_ccc_cmd cmd;
944 	struct i3c_bus *bus;
945 	bool send = false;
946 	int ndevs = 0, ret;
947 
948 	if (!master)
949 		return -EINVAL;
950 
951 	bus = i3c_master_get_bus(master);
952 	i3c_bus_for_each_i3cdev(bus, i3cdev) {
953 		ndevs++;
954 
955 		if (i3cdev == master->this)
956 			continue;
957 
958 		if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
959 		    I3C_BCR_I3C_MASTER)
960 			send = true;
961 	}
962 
963 	/* No other master on the bus, skip DEFSLVS. */
964 	if (!send)
965 		return 0;
966 
967 	i3c_bus_for_each_i2cdev(bus, i2cdev)
968 		ndevs++;
969 
970 	defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
971 					struct_size(defslvs, slaves,
972 						    ndevs - 1));
973 	if (!defslvs)
974 		return -ENOMEM;
975 
976 	defslvs->count = ndevs;
977 	defslvs->master.bcr = master->this->info.bcr;
978 	defslvs->master.dcr = master->this->info.dcr;
979 	defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
980 	defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
981 
982 	desc = defslvs->slaves;
983 	i3c_bus_for_each_i2cdev(bus, i2cdev) {
984 		desc->lvr = i2cdev->lvr;
985 		desc->static_addr = i2cdev->addr << 1;
986 		desc++;
987 	}
988 
989 	i3c_bus_for_each_i3cdev(bus, i3cdev) {
990 		/* Skip the I3C dev representing this master. */
991 		if (i3cdev == master->this)
992 			continue;
993 
994 		desc->bcr = i3cdev->info.bcr;
995 		desc->dcr = i3cdev->info.dcr;
996 		desc->dyn_addr = i3cdev->info.dyn_addr << 1;
997 		desc->static_addr = i3cdev->info.static_addr << 1;
998 		desc++;
999 	}
1000 
1001 	i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
1002 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1003 	i3c_ccc_cmd_dest_cleanup(&dest);
1004 
1005 	return ret;
1006 }
1007 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
1008 
1009 static int i3c_master_setda_locked(struct i3c_master_controller *master,
1010 				   u8 oldaddr, u8 newaddr, bool setdasa)
1011 {
1012 	struct i3c_ccc_cmd_dest dest;
1013 	struct i3c_ccc_setda *setda;
1014 	struct i3c_ccc_cmd cmd;
1015 	int ret;
1016 
1017 	if (!oldaddr || !newaddr)
1018 		return -EINVAL;
1019 
1020 	setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
1021 	if (!setda)
1022 		return -ENOMEM;
1023 
1024 	setda->addr = newaddr << 1;
1025 	i3c_ccc_cmd_init(&cmd, false,
1026 			 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
1027 			 &dest, 1);
1028 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1029 	i3c_ccc_cmd_dest_cleanup(&dest);
1030 
1031 	return ret;
1032 }
1033 
1034 static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
1035 				     u8 static_addr, u8 dyn_addr)
1036 {
1037 	return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
1038 }
1039 
1040 static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
1041 				      u8 oldaddr, u8 newaddr)
1042 {
1043 	return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1044 }
1045 
1046 static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1047 				    struct i3c_device_info *info)
1048 {
1049 	struct i3c_ccc_cmd_dest dest;
1050 	struct i3c_ccc_mrl *mrl;
1051 	struct i3c_ccc_cmd cmd;
1052 	int ret;
1053 
1054 	mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1055 	if (!mrl)
1056 		return -ENOMEM;
1057 
1058 	/*
1059 	 * When the device does not have IBI payload GETMRL only returns 2
1060 	 * bytes of data.
1061 	 */
1062 	if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1063 		dest.payload.len -= 1;
1064 
1065 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1066 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1067 	if (ret)
1068 		goto out;
1069 
1070 	switch (dest.payload.len) {
1071 	case 3:
1072 		info->max_ibi_len = mrl->ibi_len;
1073 		fallthrough;
1074 	case 2:
1075 		info->max_read_len = be16_to_cpu(mrl->read_len);
1076 		break;
1077 	default:
1078 		ret = -EIO;
1079 		goto out;
1080 	}
1081 
1082 out:
1083 	i3c_ccc_cmd_dest_cleanup(&dest);
1084 
1085 	return ret;
1086 }
1087 
1088 static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1089 				    struct i3c_device_info *info)
1090 {
1091 	struct i3c_ccc_cmd_dest dest;
1092 	struct i3c_ccc_mwl *mwl;
1093 	struct i3c_ccc_cmd cmd;
1094 	int ret;
1095 
1096 	mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1097 	if (!mwl)
1098 		return -ENOMEM;
1099 
1100 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1101 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1102 	if (ret)
1103 		goto out;
1104 
1105 	if (dest.payload.len != sizeof(*mwl)) {
1106 		ret = -EIO;
1107 		goto out;
1108 	}
1109 
1110 	info->max_write_len = be16_to_cpu(mwl->len);
1111 
1112 out:
1113 	i3c_ccc_cmd_dest_cleanup(&dest);
1114 
1115 	return ret;
1116 }
1117 
1118 static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1119 				     struct i3c_device_info *info)
1120 {
1121 	struct i3c_ccc_getmxds *getmaxds;
1122 	struct i3c_ccc_cmd_dest dest;
1123 	struct i3c_ccc_cmd cmd;
1124 	int ret;
1125 
1126 	getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1127 					 sizeof(*getmaxds));
1128 	if (!getmaxds)
1129 		return -ENOMEM;
1130 
1131 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1132 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1133 	if (ret)
1134 		goto out;
1135 
1136 	if (dest.payload.len != 2 && dest.payload.len != 5) {
1137 		ret = -EIO;
1138 		goto out;
1139 	}
1140 
1141 	info->max_read_ds = getmaxds->maxrd;
1142 	info->max_write_ds = getmaxds->maxwr;
1143 	if (dest.payload.len == 5)
1144 		info->max_read_turnaround = getmaxds->maxrdturn[0] |
1145 					    ((u32)getmaxds->maxrdturn[1] << 8) |
1146 					    ((u32)getmaxds->maxrdturn[2] << 16);
1147 
1148 out:
1149 	i3c_ccc_cmd_dest_cleanup(&dest);
1150 
1151 	return ret;
1152 }
1153 
1154 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1155 				       struct i3c_device_info *info)
1156 {
1157 	struct i3c_ccc_gethdrcap *gethdrcap;
1158 	struct i3c_ccc_cmd_dest dest;
1159 	struct i3c_ccc_cmd cmd;
1160 	int ret;
1161 
1162 	gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1163 					  sizeof(*gethdrcap));
1164 	if (!gethdrcap)
1165 		return -ENOMEM;
1166 
1167 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1168 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1169 	if (ret)
1170 		goto out;
1171 
1172 	if (dest.payload.len != 1) {
1173 		ret = -EIO;
1174 		goto out;
1175 	}
1176 
1177 	info->hdr_cap = gethdrcap->modes;
1178 
1179 out:
1180 	i3c_ccc_cmd_dest_cleanup(&dest);
1181 
1182 	return ret;
1183 }
1184 
1185 static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1186 				    struct i3c_device_info *info)
1187 {
1188 	struct i3c_ccc_getpid *getpid;
1189 	struct i3c_ccc_cmd_dest dest;
1190 	struct i3c_ccc_cmd cmd;
1191 	int ret, i;
1192 
1193 	getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1194 	if (!getpid)
1195 		return -ENOMEM;
1196 
1197 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1198 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1199 	if (ret)
1200 		goto out;
1201 
1202 	info->pid = 0;
1203 	for (i = 0; i < sizeof(getpid->pid); i++) {
1204 		int sft = (sizeof(getpid->pid) - i - 1) * 8;
1205 
1206 		info->pid |= (u64)getpid->pid[i] << sft;
1207 	}
1208 
1209 out:
1210 	i3c_ccc_cmd_dest_cleanup(&dest);
1211 
1212 	return ret;
1213 }
1214 
1215 static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1216 				    struct i3c_device_info *info)
1217 {
1218 	struct i3c_ccc_getbcr *getbcr;
1219 	struct i3c_ccc_cmd_dest dest;
1220 	struct i3c_ccc_cmd cmd;
1221 	int ret;
1222 
1223 	getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1224 	if (!getbcr)
1225 		return -ENOMEM;
1226 
1227 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1228 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1229 	if (ret)
1230 		goto out;
1231 
1232 	info->bcr = getbcr->bcr;
1233 
1234 out:
1235 	i3c_ccc_cmd_dest_cleanup(&dest);
1236 
1237 	return ret;
1238 }
1239 
1240 static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1241 				    struct i3c_device_info *info)
1242 {
1243 	struct i3c_ccc_getdcr *getdcr;
1244 	struct i3c_ccc_cmd_dest dest;
1245 	struct i3c_ccc_cmd cmd;
1246 	int ret;
1247 
1248 	getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1249 	if (!getdcr)
1250 		return -ENOMEM;
1251 
1252 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1253 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1254 	if (ret)
1255 		goto out;
1256 
1257 	info->dcr = getdcr->dcr;
1258 
1259 out:
1260 	i3c_ccc_cmd_dest_cleanup(&dest);
1261 
1262 	return ret;
1263 }
1264 
1265 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1266 {
1267 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1268 	enum i3c_addr_slot_status slot_status;
1269 	int ret;
1270 
1271 	if (!dev->info.dyn_addr)
1272 		return -EINVAL;
1273 
1274 	slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1275 						   dev->info.dyn_addr);
1276 	if (slot_status == I3C_ADDR_SLOT_RSVD ||
1277 	    slot_status == I3C_ADDR_SLOT_I2C_DEV)
1278 		return -EINVAL;
1279 
1280 	ret = i3c_master_getpid_locked(master, &dev->info);
1281 	if (ret)
1282 		return ret;
1283 
1284 	ret = i3c_master_getbcr_locked(master, &dev->info);
1285 	if (ret)
1286 		return ret;
1287 
1288 	ret = i3c_master_getdcr_locked(master, &dev->info);
1289 	if (ret)
1290 		return ret;
1291 
1292 	if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1293 		ret = i3c_master_getmxds_locked(master, &dev->info);
1294 		if (ret)
1295 			return ret;
1296 	}
1297 
1298 	if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1299 		dev->info.max_ibi_len = 1;
1300 
1301 	i3c_master_getmrl_locked(master, &dev->info);
1302 	i3c_master_getmwl_locked(master, &dev->info);
1303 
1304 	if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1305 		ret = i3c_master_gethdrcap_locked(master, &dev->info);
1306 		if (ret)
1307 			return ret;
1308 	}
1309 
1310 	return 0;
1311 }
1312 
1313 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1314 {
1315 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1316 
1317 	if (dev->info.static_addr)
1318 		i3c_bus_set_addr_slot_status(&master->bus,
1319 					     dev->info.static_addr,
1320 					     I3C_ADDR_SLOT_FREE);
1321 
1322 	if (dev->info.dyn_addr)
1323 		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1324 					     I3C_ADDR_SLOT_FREE);
1325 
1326 	if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1327 		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1328 					     I3C_ADDR_SLOT_FREE);
1329 }
1330 
1331 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1332 {
1333 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1334 	enum i3c_addr_slot_status status;
1335 
1336 	if (!dev->info.static_addr && !dev->info.dyn_addr)
1337 		return 0;
1338 
1339 	if (dev->info.static_addr) {
1340 		status = i3c_bus_get_addr_slot_status(&master->bus,
1341 						      dev->info.static_addr);
1342 		/* Since static address and assigned dynamic address can be
1343 		 * equal, allow this case to pass.
1344 		 */
1345 		if (status != I3C_ADDR_SLOT_FREE &&
1346 		    dev->info.static_addr != dev->boardinfo->init_dyn_addr)
1347 			return -EBUSY;
1348 
1349 		i3c_bus_set_addr_slot_status(&master->bus,
1350 					     dev->info.static_addr,
1351 					     I3C_ADDR_SLOT_I3C_DEV);
1352 	}
1353 
1354 	/*
1355 	 * ->init_dyn_addr should have been reserved before that, so, if we're
1356 	 * trying to apply a pre-reserved dynamic address, we should not try
1357 	 * to reserve the address slot a second time.
1358 	 */
1359 	if (dev->info.dyn_addr &&
1360 	    (!dev->boardinfo ||
1361 	     dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1362 		status = i3c_bus_get_addr_slot_status(&master->bus,
1363 						      dev->info.dyn_addr);
1364 		if (status != I3C_ADDR_SLOT_FREE)
1365 			goto err_release_static_addr;
1366 
1367 		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1368 					     I3C_ADDR_SLOT_I3C_DEV);
1369 	}
1370 
1371 	return 0;
1372 
1373 err_release_static_addr:
1374 	if (dev->info.static_addr)
1375 		i3c_bus_set_addr_slot_status(&master->bus,
1376 					     dev->info.static_addr,
1377 					     I3C_ADDR_SLOT_FREE);
1378 
1379 	return -EBUSY;
1380 }
1381 
1382 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1383 				     struct i3c_dev_desc *dev)
1384 {
1385 	int ret;
1386 
1387 	/*
1388 	 * We don't attach devices to the controller until they are
1389 	 * addressable on the bus.
1390 	 */
1391 	if (!dev->info.static_addr && !dev->info.dyn_addr)
1392 		return 0;
1393 
1394 	ret = i3c_master_get_i3c_addrs(dev);
1395 	if (ret)
1396 		return ret;
1397 
1398 	/* Do not attach the master device itself. */
1399 	if (master->this != dev && master->ops->attach_i3c_dev) {
1400 		ret = master->ops->attach_i3c_dev(dev);
1401 		if (ret) {
1402 			i3c_master_put_i3c_addrs(dev);
1403 			return ret;
1404 		}
1405 	}
1406 
1407 	list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1408 
1409 	return 0;
1410 }
1411 
1412 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1413 				       u8 old_dyn_addr)
1414 {
1415 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1416 	enum i3c_addr_slot_status status;
1417 	int ret;
1418 
1419 	if (dev->info.dyn_addr != old_dyn_addr &&
1420 	    (!dev->boardinfo ||
1421 	     dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) {
1422 		status = i3c_bus_get_addr_slot_status(&master->bus,
1423 						      dev->info.dyn_addr);
1424 		if (status != I3C_ADDR_SLOT_FREE)
1425 			return -EBUSY;
1426 		i3c_bus_set_addr_slot_status(&master->bus,
1427 					     dev->info.dyn_addr,
1428 					     I3C_ADDR_SLOT_I3C_DEV);
1429 		if (old_dyn_addr)
1430 			i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr,
1431 						     I3C_ADDR_SLOT_FREE);
1432 	}
1433 
1434 	if (master->ops->reattach_i3c_dev) {
1435 		ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1436 		if (ret) {
1437 			i3c_master_put_i3c_addrs(dev);
1438 			return ret;
1439 		}
1440 	}
1441 
1442 	return 0;
1443 }
1444 
1445 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1446 {
1447 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1448 
1449 	/* Do not detach the master device itself. */
1450 	if (master->this != dev && master->ops->detach_i3c_dev)
1451 		master->ops->detach_i3c_dev(dev);
1452 
1453 	i3c_master_put_i3c_addrs(dev);
1454 	list_del(&dev->common.node);
1455 }
1456 
1457 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1458 				     struct i2c_dev_desc *dev)
1459 {
1460 	int ret;
1461 
1462 	if (master->ops->attach_i2c_dev) {
1463 		ret = master->ops->attach_i2c_dev(dev);
1464 		if (ret)
1465 			return ret;
1466 	}
1467 
1468 	list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1469 
1470 	return 0;
1471 }
1472 
1473 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1474 {
1475 	struct i3c_master_controller *master = i2c_dev_get_master(dev);
1476 
1477 	list_del(&dev->common.node);
1478 
1479 	if (master->ops->detach_i2c_dev)
1480 		master->ops->detach_i2c_dev(dev);
1481 }
1482 
1483 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1484 					  struct i3c_dev_boardinfo *boardinfo)
1485 {
1486 	struct i3c_device_info info = {
1487 		.static_addr = boardinfo->static_addr,
1488 		.pid = boardinfo->pid,
1489 	};
1490 	struct i3c_dev_desc *i3cdev;
1491 	int ret;
1492 
1493 	i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1494 	if (IS_ERR(i3cdev))
1495 		return -ENOMEM;
1496 
1497 	i3cdev->boardinfo = boardinfo;
1498 
1499 	ret = i3c_master_attach_i3c_dev(master, i3cdev);
1500 	if (ret)
1501 		goto err_free_dev;
1502 
1503 	ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1504 					i3cdev->boardinfo->init_dyn_addr);
1505 	if (ret)
1506 		goto err_detach_dev;
1507 
1508 	i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1509 	ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
1510 	if (ret)
1511 		goto err_rstdaa;
1512 
1513 	ret = i3c_master_retrieve_dev_info(i3cdev);
1514 	if (ret)
1515 		goto err_rstdaa;
1516 
1517 	return 0;
1518 
1519 err_rstdaa:
1520 	i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1521 err_detach_dev:
1522 	i3c_master_detach_i3c_dev(i3cdev);
1523 err_free_dev:
1524 	i3c_master_free_i3c_dev(i3cdev);
1525 
1526 	return ret;
1527 }
1528 
1529 static void
1530 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1531 {
1532 	struct i3c_dev_desc *desc;
1533 	int ret;
1534 
1535 	if (!master->init_done)
1536 		return;
1537 
1538 	i3c_bus_for_each_i3cdev(&master->bus, desc) {
1539 		if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1540 			continue;
1541 
1542 		desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1543 		if (!desc->dev)
1544 			continue;
1545 
1546 		desc->dev->bus = &master->bus;
1547 		desc->dev->desc = desc;
1548 		desc->dev->dev.parent = &master->dev;
1549 		desc->dev->dev.type = &i3c_device_type;
1550 		desc->dev->dev.bus = &i3c_bus_type;
1551 		desc->dev->dev.release = i3c_device_release;
1552 		dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1553 			     desc->info.pid);
1554 
1555 		if (desc->boardinfo)
1556 			desc->dev->dev.of_node = desc->boardinfo->of_node;
1557 
1558 		ret = device_register(&desc->dev->dev);
1559 		if (ret) {
1560 			dev_err(&master->dev,
1561 				"Failed to add I3C device (err = %d)\n", ret);
1562 			put_device(&desc->dev->dev);
1563 		}
1564 	}
1565 }
1566 
1567 /**
1568  * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1569  * @master: master doing the DAA
1570  *
1571  * This function is instantiating an I3C device object and adding it to the
1572  * I3C device list. All device information are automatically retrieved using
1573  * standard CCC commands.
1574  *
1575  * The I3C device object is returned in case the master wants to attach
1576  * private data to it using i3c_dev_set_master_data().
1577  *
1578  * This function must be called with the bus lock held in write mode.
1579  *
1580  * Return: a 0 in case of success, an negative error code otherwise.
1581  */
1582 int i3c_master_do_daa(struct i3c_master_controller *master)
1583 {
1584 	int ret;
1585 
1586 	i3c_bus_maintenance_lock(&master->bus);
1587 	ret = master->ops->do_daa(master);
1588 	i3c_bus_maintenance_unlock(&master->bus);
1589 
1590 	if (ret)
1591 		return ret;
1592 
1593 	i3c_bus_normaluse_lock(&master->bus);
1594 	i3c_master_register_new_i3c_devs(master);
1595 	i3c_bus_normaluse_unlock(&master->bus);
1596 
1597 	return 0;
1598 }
1599 EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1600 
1601 /**
1602  * i3c_master_set_info() - set master device information
1603  * @master: master used to send frames on the bus
1604  * @info: I3C device information
1605  *
1606  * Set master device info. This should be called from
1607  * &i3c_master_controller_ops->bus_init().
1608  *
1609  * Not all &i3c_device_info fields are meaningful for a master device.
1610  * Here is a list of fields that should be properly filled:
1611  *
1612  * - &i3c_device_info->dyn_addr
1613  * - &i3c_device_info->bcr
1614  * - &i3c_device_info->dcr
1615  * - &i3c_device_info->pid
1616  * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1617  *   &i3c_device_info->bcr
1618  *
1619  * This function must be called with the bus lock held in maintenance mode.
1620  *
1621  * Return: 0 if @info contains valid information (not every piece of
1622  * information can be checked, but we can at least make sure @info->dyn_addr
1623  * and @info->bcr are correct), -EINVAL otherwise.
1624  */
1625 int i3c_master_set_info(struct i3c_master_controller *master,
1626 			const struct i3c_device_info *info)
1627 {
1628 	struct i3c_dev_desc *i3cdev;
1629 	int ret;
1630 
1631 	if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1632 		return -EINVAL;
1633 
1634 	if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1635 	    master->secondary)
1636 		return -EINVAL;
1637 
1638 	if (master->this)
1639 		return -EINVAL;
1640 
1641 	i3cdev = i3c_master_alloc_i3c_dev(master, info);
1642 	if (IS_ERR(i3cdev))
1643 		return PTR_ERR(i3cdev);
1644 
1645 	master->this = i3cdev;
1646 	master->bus.cur_master = master->this;
1647 
1648 	ret = i3c_master_attach_i3c_dev(master, i3cdev);
1649 	if (ret)
1650 		goto err_free_dev;
1651 
1652 	return 0;
1653 
1654 err_free_dev:
1655 	i3c_master_free_i3c_dev(i3cdev);
1656 
1657 	return ret;
1658 }
1659 EXPORT_SYMBOL_GPL(i3c_master_set_info);
1660 
1661 static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1662 {
1663 	struct i3c_dev_desc *i3cdev, *i3ctmp;
1664 	struct i2c_dev_desc *i2cdev, *i2ctmp;
1665 
1666 	list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1667 				 common.node) {
1668 		i3c_master_detach_i3c_dev(i3cdev);
1669 
1670 		if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1671 			i3c_bus_set_addr_slot_status(&master->bus,
1672 					i3cdev->boardinfo->init_dyn_addr,
1673 					I3C_ADDR_SLOT_FREE);
1674 
1675 		i3c_master_free_i3c_dev(i3cdev);
1676 	}
1677 
1678 	list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1679 				 common.node) {
1680 		i3c_master_detach_i2c_dev(i2cdev);
1681 		i3c_bus_set_addr_slot_status(&master->bus,
1682 					     i2cdev->addr,
1683 					     I3C_ADDR_SLOT_FREE);
1684 		i3c_master_free_i2c_dev(i2cdev);
1685 	}
1686 }
1687 
1688 /**
1689  * i3c_master_bus_init() - initialize an I3C bus
1690  * @master: main master initializing the bus
1691  *
1692  * This function is following all initialisation steps described in the I3C
1693  * specification:
1694  *
1695  * 1. Attach I2C devs to the master so that the master can fill its internal
1696  *    device table appropriately
1697  *
1698  * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1699  *    the master controller. That's usually where the bus mode is selected
1700  *    (pure bus or mixed fast/slow bus)
1701  *
1702  * 3. Instruct all devices on the bus to drop their dynamic address. This is
1703  *    particularly important when the bus was previously configured by someone
1704  *    else (for example the bootloader)
1705  *
1706  * 4. Disable all slave events.
1707  *
1708  * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1709  *    also have static_addr, try to pre-assign dynamic addresses requested by
1710  *    the FW with SETDASA and attach corresponding statically defined I3C
1711  *    devices to the master.
1712  *
1713  * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1714  *    remaining I3C devices
1715  *
1716  * Once this is done, all I3C and I2C devices should be usable.
1717  *
1718  * Return: a 0 in case of success, an negative error code otherwise.
1719  */
1720 static int i3c_master_bus_init(struct i3c_master_controller *master)
1721 {
1722 	enum i3c_addr_slot_status status;
1723 	struct i2c_dev_boardinfo *i2cboardinfo;
1724 	struct i3c_dev_boardinfo *i3cboardinfo;
1725 	struct i2c_dev_desc *i2cdev;
1726 	int ret;
1727 
1728 	/*
1729 	 * First attach all devices with static definitions provided by the
1730 	 * FW.
1731 	 */
1732 	list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1733 		status = i3c_bus_get_addr_slot_status(&master->bus,
1734 						      i2cboardinfo->base.addr);
1735 		if (status != I3C_ADDR_SLOT_FREE) {
1736 			ret = -EBUSY;
1737 			goto err_detach_devs;
1738 		}
1739 
1740 		i3c_bus_set_addr_slot_status(&master->bus,
1741 					     i2cboardinfo->base.addr,
1742 					     I3C_ADDR_SLOT_I2C_DEV);
1743 
1744 		i2cdev = i3c_master_alloc_i2c_dev(master,
1745 						  i2cboardinfo->base.addr,
1746 						  i2cboardinfo->lvr);
1747 		if (IS_ERR(i2cdev)) {
1748 			ret = PTR_ERR(i2cdev);
1749 			goto err_detach_devs;
1750 		}
1751 
1752 		ret = i3c_master_attach_i2c_dev(master, i2cdev);
1753 		if (ret) {
1754 			i3c_master_free_i2c_dev(i2cdev);
1755 			goto err_detach_devs;
1756 		}
1757 	}
1758 
1759 	/*
1760 	 * Now execute the controller specific ->bus_init() routine, which
1761 	 * might configure its internal logic to match the bus limitations.
1762 	 */
1763 	ret = master->ops->bus_init(master);
1764 	if (ret)
1765 		goto err_detach_devs;
1766 
1767 	/*
1768 	 * The master device should have been instantiated in ->bus_init(),
1769 	 * complain if this was not the case.
1770 	 */
1771 	if (!master->this) {
1772 		dev_err(&master->dev,
1773 			"master_set_info() was not called in ->bus_init()\n");
1774 		ret = -EINVAL;
1775 		goto err_bus_cleanup;
1776 	}
1777 
1778 	/*
1779 	 * Reset all dynamic address that may have been assigned before
1780 	 * (assigned by the bootloader for example).
1781 	 */
1782 	ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1783 	if (ret && ret != I3C_ERROR_M2)
1784 		goto err_bus_cleanup;
1785 
1786 	/* Disable all slave events before starting DAA. */
1787 	ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1788 				      I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1789 				      I3C_CCC_EVENT_HJ);
1790 	if (ret && ret != I3C_ERROR_M2)
1791 		goto err_bus_cleanup;
1792 
1793 	/*
1794 	 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1795 	 * address and retrieve device information if needed.
1796 	 * In case pre-assign dynamic address fails, setting dynamic address to
1797 	 * the requested init_dyn_addr is retried after DAA is done in
1798 	 * i3c_master_add_i3c_dev_locked().
1799 	 */
1800 	list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1801 
1802 		/*
1803 		 * We don't reserve a dynamic address for devices that
1804 		 * don't explicitly request one.
1805 		 */
1806 		if (!i3cboardinfo->init_dyn_addr)
1807 			continue;
1808 
1809 		ret = i3c_bus_get_addr_slot_status(&master->bus,
1810 						   i3cboardinfo->init_dyn_addr);
1811 		if (ret != I3C_ADDR_SLOT_FREE) {
1812 			ret = -EBUSY;
1813 			goto err_rstdaa;
1814 		}
1815 
1816 		i3c_bus_set_addr_slot_status(&master->bus,
1817 					     i3cboardinfo->init_dyn_addr,
1818 					     I3C_ADDR_SLOT_I3C_DEV);
1819 
1820 		/*
1821 		 * Only try to create/attach devices that have a static
1822 		 * address. Other devices will be created/attached when
1823 		 * DAA happens, and the requested dynamic address will
1824 		 * be set using SETNEWDA once those devices become
1825 		 * addressable.
1826 		 */
1827 
1828 		if (i3cboardinfo->static_addr)
1829 			i3c_master_early_i3c_dev_add(master, i3cboardinfo);
1830 	}
1831 
1832 	ret = i3c_master_do_daa(master);
1833 	if (ret)
1834 		goto err_rstdaa;
1835 
1836 	return 0;
1837 
1838 err_rstdaa:
1839 	i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1840 
1841 err_bus_cleanup:
1842 	if (master->ops->bus_cleanup)
1843 		master->ops->bus_cleanup(master);
1844 
1845 err_detach_devs:
1846 	i3c_master_detach_free_devs(master);
1847 
1848 	return ret;
1849 }
1850 
1851 static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1852 {
1853 	if (master->ops->bus_cleanup)
1854 		master->ops->bus_cleanup(master);
1855 
1856 	i3c_master_detach_free_devs(master);
1857 }
1858 
1859 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
1860 {
1861 	struct i3c_master_controller *master = i3cdev->common.master;
1862 	struct i3c_dev_boardinfo *i3cboardinfo;
1863 
1864 	list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1865 		if (i3cdev->info.pid != i3cboardinfo->pid)
1866 			continue;
1867 
1868 		i3cdev->boardinfo = i3cboardinfo;
1869 		i3cdev->info.static_addr = i3cboardinfo->static_addr;
1870 		return;
1871 	}
1872 }
1873 
1874 static struct i3c_dev_desc *
1875 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1876 {
1877 	struct i3c_master_controller *master = i3c_dev_get_master(refdev);
1878 	struct i3c_dev_desc *i3cdev;
1879 
1880 	i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1881 		if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1882 			return i3cdev;
1883 	}
1884 
1885 	return NULL;
1886 }
1887 
1888 /**
1889  * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1890  * @master: master used to send frames on the bus
1891  * @addr: I3C slave dynamic address assigned to the device
1892  *
1893  * This function is instantiating an I3C device object and adding it to the
1894  * I3C device list. All device information are automatically retrieved using
1895  * standard CCC commands.
1896  *
1897  * The I3C device object is returned in case the master wants to attach
1898  * private data to it using i3c_dev_set_master_data().
1899  *
1900  * This function must be called with the bus lock held in write mode.
1901  *
1902  * Return: a 0 in case of success, an negative error code otherwise.
1903  */
1904 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
1905 				  u8 addr)
1906 {
1907 	struct i3c_device_info info = { .dyn_addr = addr };
1908 	struct i3c_dev_desc *newdev, *olddev;
1909 	u8 old_dyn_addr = addr, expected_dyn_addr;
1910 	struct i3c_ibi_setup ibireq = { };
1911 	bool enable_ibi = false;
1912 	int ret;
1913 
1914 	if (!master)
1915 		return -EINVAL;
1916 
1917 	newdev = i3c_master_alloc_i3c_dev(master, &info);
1918 	if (IS_ERR(newdev))
1919 		return PTR_ERR(newdev);
1920 
1921 	ret = i3c_master_attach_i3c_dev(master, newdev);
1922 	if (ret)
1923 		goto err_free_dev;
1924 
1925 	ret = i3c_master_retrieve_dev_info(newdev);
1926 	if (ret)
1927 		goto err_detach_dev;
1928 
1929 	i3c_master_attach_boardinfo(newdev);
1930 
1931 	olddev = i3c_master_search_i3c_dev_duplicate(newdev);
1932 	if (olddev) {
1933 		newdev->dev = olddev->dev;
1934 		if (newdev->dev)
1935 			newdev->dev->desc = newdev;
1936 
1937 		/*
1938 		 * We need to restore the IBI state too, so let's save the
1939 		 * IBI information and try to restore them after olddev has
1940 		 * been detached+released and its IBI has been stopped and
1941 		 * the associated resources have been freed.
1942 		 */
1943 		mutex_lock(&olddev->ibi_lock);
1944 		if (olddev->ibi) {
1945 			ibireq.handler = olddev->ibi->handler;
1946 			ibireq.max_payload_len = olddev->ibi->max_payload_len;
1947 			ibireq.num_slots = olddev->ibi->num_slots;
1948 
1949 			if (olddev->ibi->enabled) {
1950 				enable_ibi = true;
1951 				i3c_dev_disable_ibi_locked(olddev);
1952 			}
1953 
1954 			i3c_dev_free_ibi_locked(olddev);
1955 		}
1956 		mutex_unlock(&olddev->ibi_lock);
1957 
1958 		old_dyn_addr = olddev->info.dyn_addr;
1959 
1960 		i3c_master_detach_i3c_dev(olddev);
1961 		i3c_master_free_i3c_dev(olddev);
1962 	}
1963 
1964 	/*
1965 	 * Depending on our previous state, the expected dynamic address might
1966 	 * differ:
1967 	 * - if the device already had a dynamic address assigned, let's try to
1968 	 *   re-apply this one
1969 	 * - if the device did not have a dynamic address and the firmware
1970 	 *   requested a specific address, pick this one
1971 	 * - in any other case, keep the address automatically assigned by the
1972 	 *   master
1973 	 */
1974 	if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
1975 		expected_dyn_addr = old_dyn_addr;
1976 	else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
1977 		expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
1978 	else
1979 		expected_dyn_addr = newdev->info.dyn_addr;
1980 
1981 	if (newdev->info.dyn_addr != expected_dyn_addr) {
1982 		/*
1983 		 * Try to apply the expected dynamic address. If it fails, keep
1984 		 * the address assigned by the master.
1985 		 */
1986 		ret = i3c_master_setnewda_locked(master,
1987 						 newdev->info.dyn_addr,
1988 						 expected_dyn_addr);
1989 		if (!ret) {
1990 			old_dyn_addr = newdev->info.dyn_addr;
1991 			newdev->info.dyn_addr = expected_dyn_addr;
1992 			i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1993 		} else {
1994 			dev_err(&master->dev,
1995 				"Failed to assign reserved/old address to device %d%llx",
1996 				master->bus.id, newdev->info.pid);
1997 		}
1998 	}
1999 
2000 	/*
2001 	 * Now is time to try to restore the IBI setup. If we're lucky,
2002 	 * everything works as before, otherwise, all we can do is complain.
2003 	 * FIXME: maybe we should add callback to inform the driver that it
2004 	 * should request the IBI again instead of trying to hide that from
2005 	 * him.
2006 	 */
2007 	if (ibireq.handler) {
2008 		mutex_lock(&newdev->ibi_lock);
2009 		ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
2010 		if (ret) {
2011 			dev_err(&master->dev,
2012 				"Failed to request IBI on device %d-%llx",
2013 				master->bus.id, newdev->info.pid);
2014 		} else if (enable_ibi) {
2015 			ret = i3c_dev_enable_ibi_locked(newdev);
2016 			if (ret)
2017 				dev_err(&master->dev,
2018 					"Failed to re-enable IBI on device %d-%llx",
2019 					master->bus.id, newdev->info.pid);
2020 		}
2021 		mutex_unlock(&newdev->ibi_lock);
2022 	}
2023 
2024 	return 0;
2025 
2026 err_detach_dev:
2027 	if (newdev->dev && newdev->dev->desc)
2028 		newdev->dev->desc = NULL;
2029 
2030 	i3c_master_detach_i3c_dev(newdev);
2031 
2032 err_free_dev:
2033 	i3c_master_free_i3c_dev(newdev);
2034 
2035 	return ret;
2036 }
2037 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
2038 
2039 #define OF_I3C_REG1_IS_I2C_DEV			BIT(31)
2040 
2041 static int
2042 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
2043 				struct device_node *node, u32 *reg)
2044 {
2045 	struct i2c_dev_boardinfo *boardinfo;
2046 	struct device *dev = &master->dev;
2047 	int ret;
2048 
2049 	boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2050 	if (!boardinfo)
2051 		return -ENOMEM;
2052 
2053 	ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2054 	if (ret)
2055 		return ret;
2056 
2057 	/*
2058 	 * The I3C Specification does not clearly say I2C devices with 10-bit
2059 	 * address are supported. These devices can't be passed properly through
2060 	 * DEFSLVS command.
2061 	 */
2062 	if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2063 		dev_err(dev, "I2C device with 10 bit address not supported.");
2064 		return -ENOTSUPP;
2065 	}
2066 
2067 	/* LVR is encoded in reg[2]. */
2068 	boardinfo->lvr = reg[2];
2069 
2070 	list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2071 	of_node_get(node);
2072 
2073 	return 0;
2074 }
2075 
2076 static int
2077 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2078 				struct device_node *node, u32 *reg)
2079 {
2080 	struct i3c_dev_boardinfo *boardinfo;
2081 	struct device *dev = &master->dev;
2082 	enum i3c_addr_slot_status addrstatus;
2083 	u32 init_dyn_addr = 0;
2084 
2085 	boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2086 	if (!boardinfo)
2087 		return -ENOMEM;
2088 
2089 	if (reg[0]) {
2090 		if (reg[0] > I3C_MAX_ADDR)
2091 			return -EINVAL;
2092 
2093 		addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2094 							  reg[0]);
2095 		if (addrstatus != I3C_ADDR_SLOT_FREE)
2096 			return -EINVAL;
2097 	}
2098 
2099 	boardinfo->static_addr = reg[0];
2100 
2101 	if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2102 		if (init_dyn_addr > I3C_MAX_ADDR)
2103 			return -EINVAL;
2104 
2105 		addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2106 							  init_dyn_addr);
2107 		if (addrstatus != I3C_ADDR_SLOT_FREE)
2108 			return -EINVAL;
2109 	}
2110 
2111 	boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2112 
2113 	if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2114 	    I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2115 		return -EINVAL;
2116 
2117 	boardinfo->init_dyn_addr = init_dyn_addr;
2118 	boardinfo->of_node = of_node_get(node);
2119 	list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2120 
2121 	return 0;
2122 }
2123 
2124 static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2125 				 struct device_node *node)
2126 {
2127 	u32 reg[3];
2128 	int ret;
2129 
2130 	if (!master || !node)
2131 		return -EINVAL;
2132 
2133 	ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2134 	if (ret)
2135 		return ret;
2136 
2137 	/*
2138 	 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2139 	 * dealing with an I2C device.
2140 	 */
2141 	if (!reg[1])
2142 		ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2143 	else
2144 		ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2145 
2146 	return ret;
2147 }
2148 
2149 static int of_populate_i3c_bus(struct i3c_master_controller *master)
2150 {
2151 	struct device *dev = &master->dev;
2152 	struct device_node *i3cbus_np = dev->of_node;
2153 	struct device_node *node;
2154 	int ret;
2155 	u32 val;
2156 
2157 	if (!i3cbus_np)
2158 		return 0;
2159 
2160 	for_each_available_child_of_node(i3cbus_np, node) {
2161 		ret = of_i3c_master_add_dev(master, node);
2162 		if (ret) {
2163 			of_node_put(node);
2164 			return ret;
2165 		}
2166 	}
2167 
2168 	/*
2169 	 * The user might want to limit I2C and I3C speed in case some devices
2170 	 * on the bus are not supporting typical rates, or if the bus topology
2171 	 * prevents it from using max possible rate.
2172 	 */
2173 	if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2174 		master->bus.scl_rate.i2c = val;
2175 
2176 	if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2177 		master->bus.scl_rate.i3c = val;
2178 
2179 	return 0;
2180 }
2181 
2182 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2183 				       struct i2c_msg *xfers, int nxfers)
2184 {
2185 	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2186 	struct i2c_dev_desc *dev;
2187 	int i, ret;
2188 	u16 addr;
2189 
2190 	if (!xfers || !master || nxfers <= 0)
2191 		return -EINVAL;
2192 
2193 	if (!master->ops->i2c_xfers)
2194 		return -ENOTSUPP;
2195 
2196 	/* Doing transfers to different devices is not supported. */
2197 	addr = xfers[0].addr;
2198 	for (i = 1; i < nxfers; i++) {
2199 		if (addr != xfers[i].addr)
2200 			return -ENOTSUPP;
2201 	}
2202 
2203 	i3c_bus_normaluse_lock(&master->bus);
2204 	dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2205 	if (!dev)
2206 		ret = -ENOENT;
2207 	else
2208 		ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2209 	i3c_bus_normaluse_unlock(&master->bus);
2210 
2211 	return ret ? ret : nxfers;
2212 }
2213 
2214 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2215 {
2216 	return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2217 }
2218 
2219 static u8 i3c_master_i2c_get_lvr(struct i2c_client *client)
2220 {
2221 	/* Fall back to no spike filters and FM bus mode. */
2222 	u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE;
2223 
2224 	if (client->dev.of_node) {
2225 		u32 reg[3];
2226 
2227 		if (!of_property_read_u32_array(client->dev.of_node, "reg",
2228 						reg, ARRAY_SIZE(reg)))
2229 			lvr = reg[2];
2230 	}
2231 
2232 	return lvr;
2233 }
2234 
2235 static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client)
2236 {
2237 	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2238 	enum i3c_addr_slot_status status;
2239 	struct i2c_dev_desc *i2cdev;
2240 	int ret;
2241 
2242 	/* Already added by board info? */
2243 	if (i3c_master_find_i2c_dev_by_addr(master, client->addr))
2244 		return 0;
2245 
2246 	status = i3c_bus_get_addr_slot_status(&master->bus, client->addr);
2247 	if (status != I3C_ADDR_SLOT_FREE)
2248 		return -EBUSY;
2249 
2250 	i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2251 				     I3C_ADDR_SLOT_I2C_DEV);
2252 
2253 	i2cdev = i3c_master_alloc_i2c_dev(master, client->addr,
2254 					  i3c_master_i2c_get_lvr(client));
2255 	if (IS_ERR(i2cdev)) {
2256 		ret = PTR_ERR(i2cdev);
2257 		goto out_clear_status;
2258 	}
2259 
2260 	ret = i3c_master_attach_i2c_dev(master, i2cdev);
2261 	if (ret)
2262 		goto out_free_dev;
2263 
2264 	return 0;
2265 
2266 out_free_dev:
2267 	i3c_master_free_i2c_dev(i2cdev);
2268 out_clear_status:
2269 	i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2270 				     I3C_ADDR_SLOT_FREE);
2271 
2272 	return ret;
2273 }
2274 
2275 static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client)
2276 {
2277 	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2278 	struct i2c_dev_desc *dev;
2279 
2280 	dev = i3c_master_find_i2c_dev_by_addr(master, client->addr);
2281 	if (!dev)
2282 		return -ENODEV;
2283 
2284 	i3c_master_detach_i2c_dev(dev);
2285 	i3c_bus_set_addr_slot_status(&master->bus, dev->addr,
2286 				     I3C_ADDR_SLOT_FREE);
2287 	i3c_master_free_i2c_dev(dev);
2288 
2289 	return 0;
2290 }
2291 
2292 static const struct i2c_algorithm i3c_master_i2c_algo = {
2293 	.master_xfer = i3c_master_i2c_adapter_xfer,
2294 	.functionality = i3c_master_i2c_funcs,
2295 };
2296 
2297 static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action,
2298 				 void *data)
2299 {
2300 	struct i2c_adapter *adap;
2301 	struct i2c_client *client;
2302 	struct device *dev = data;
2303 	struct i3c_master_controller *master;
2304 	int ret;
2305 
2306 	if (dev->type != &i2c_client_type)
2307 		return 0;
2308 
2309 	client = to_i2c_client(dev);
2310 	adap = client->adapter;
2311 
2312 	if (adap->algo != &i3c_master_i2c_algo)
2313 		return 0;
2314 
2315 	master = i2c_adapter_to_i3c_master(adap);
2316 
2317 	i3c_bus_maintenance_lock(&master->bus);
2318 	switch (action) {
2319 	case BUS_NOTIFY_ADD_DEVICE:
2320 		ret = i3c_master_i2c_attach(adap, client);
2321 		break;
2322 	case BUS_NOTIFY_DEL_DEVICE:
2323 		ret = i3c_master_i2c_detach(adap, client);
2324 		break;
2325 	}
2326 	i3c_bus_maintenance_unlock(&master->bus);
2327 
2328 	return ret;
2329 }
2330 
2331 static struct notifier_block i2cdev_notifier = {
2332 	.notifier_call = i3c_i2c_notifier_call,
2333 };
2334 
2335 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2336 {
2337 	struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2338 	struct i2c_dev_desc *i2cdev;
2339 	struct i2c_dev_boardinfo *i2cboardinfo;
2340 	int ret;
2341 
2342 	adap->dev.parent = master->dev.parent;
2343 	adap->owner = master->dev.parent->driver->owner;
2344 	adap->algo = &i3c_master_i2c_algo;
2345 	strscpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2346 
2347 	/* FIXME: Should we allow i3c masters to override these values? */
2348 	adap->timeout = 1000;
2349 	adap->retries = 3;
2350 
2351 	ret = i2c_add_adapter(adap);
2352 	if (ret)
2353 		return ret;
2354 
2355 	/*
2356 	 * We silently ignore failures here. The bus should keep working
2357 	 * correctly even if one or more i2c devices are not registered.
2358 	 */
2359 	list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
2360 		i2cdev = i3c_master_find_i2c_dev_by_addr(master,
2361 							 i2cboardinfo->base.addr);
2362 		if (WARN_ON(!i2cdev))
2363 			continue;
2364 		i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base);
2365 	}
2366 
2367 	return 0;
2368 }
2369 
2370 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2371 {
2372 	struct i2c_dev_desc *i2cdev;
2373 
2374 	i2c_del_adapter(&master->i2c);
2375 
2376 	i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2377 		i2cdev->dev = NULL;
2378 }
2379 
2380 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2381 {
2382 	struct i3c_dev_desc *i3cdev;
2383 
2384 	i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2385 		if (!i3cdev->dev)
2386 			continue;
2387 
2388 		i3cdev->dev->desc = NULL;
2389 		if (device_is_registered(&i3cdev->dev->dev))
2390 			device_unregister(&i3cdev->dev->dev);
2391 		else
2392 			put_device(&i3cdev->dev->dev);
2393 		i3cdev->dev = NULL;
2394 	}
2395 }
2396 
2397 /**
2398  * i3c_master_queue_ibi() - Queue an IBI
2399  * @dev: the device this IBI is coming from
2400  * @slot: the IBI slot used to store the payload
2401  *
2402  * Queue an IBI to the controller workqueue. The IBI handler attached to
2403  * the dev will be called from a workqueue context.
2404  */
2405 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2406 {
2407 	atomic_inc(&dev->ibi->pending_ibis);
2408 	queue_work(dev->ibi->wq, &slot->work);
2409 }
2410 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2411 
2412 static void i3c_master_handle_ibi(struct work_struct *work)
2413 {
2414 	struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2415 						 work);
2416 	struct i3c_dev_desc *dev = slot->dev;
2417 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2418 	struct i3c_ibi_payload payload;
2419 
2420 	payload.data = slot->data;
2421 	payload.len = slot->len;
2422 
2423 	if (dev->dev)
2424 		dev->ibi->handler(dev->dev, &payload);
2425 
2426 	master->ops->recycle_ibi_slot(dev, slot);
2427 	if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2428 		complete(&dev->ibi->all_ibis_handled);
2429 }
2430 
2431 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2432 				     struct i3c_ibi_slot *slot)
2433 {
2434 	slot->dev = dev;
2435 	INIT_WORK(&slot->work, i3c_master_handle_ibi);
2436 }
2437 
2438 struct i3c_generic_ibi_slot {
2439 	struct list_head node;
2440 	struct i3c_ibi_slot base;
2441 };
2442 
2443 struct i3c_generic_ibi_pool {
2444 	spinlock_t lock;
2445 	unsigned int num_slots;
2446 	struct i3c_generic_ibi_slot *slots;
2447 	void *payload_buf;
2448 	struct list_head free_slots;
2449 	struct list_head pending;
2450 };
2451 
2452 /**
2453  * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2454  * @pool: the IBI pool to free
2455  *
2456  * Free all IBI slots allated by a generic IBI pool.
2457  */
2458 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2459 {
2460 	struct i3c_generic_ibi_slot *slot;
2461 	unsigned int nslots = 0;
2462 
2463 	while (!list_empty(&pool->free_slots)) {
2464 		slot = list_first_entry(&pool->free_slots,
2465 					struct i3c_generic_ibi_slot, node);
2466 		list_del(&slot->node);
2467 		nslots++;
2468 	}
2469 
2470 	/*
2471 	 * If the number of freed slots is not equal to the number of allocated
2472 	 * slots we have a leak somewhere.
2473 	 */
2474 	WARN_ON(nslots != pool->num_slots);
2475 
2476 	kfree(pool->payload_buf);
2477 	kfree(pool->slots);
2478 	kfree(pool);
2479 }
2480 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2481 
2482 /**
2483  * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2484  * @dev: the device this pool will be used for
2485  * @req: IBI setup request describing what the device driver expects
2486  *
2487  * Create a generic IBI pool based on the information provided in @req.
2488  *
2489  * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2490  */
2491 struct i3c_generic_ibi_pool *
2492 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2493 			   const struct i3c_ibi_setup *req)
2494 {
2495 	struct i3c_generic_ibi_pool *pool;
2496 	struct i3c_generic_ibi_slot *slot;
2497 	unsigned int i;
2498 	int ret;
2499 
2500 	pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2501 	if (!pool)
2502 		return ERR_PTR(-ENOMEM);
2503 
2504 	spin_lock_init(&pool->lock);
2505 	INIT_LIST_HEAD(&pool->free_slots);
2506 	INIT_LIST_HEAD(&pool->pending);
2507 
2508 	pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2509 	if (!pool->slots) {
2510 		ret = -ENOMEM;
2511 		goto err_free_pool;
2512 	}
2513 
2514 	if (req->max_payload_len) {
2515 		pool->payload_buf = kcalloc(req->num_slots,
2516 					    req->max_payload_len, GFP_KERNEL);
2517 		if (!pool->payload_buf) {
2518 			ret = -ENOMEM;
2519 			goto err_free_pool;
2520 		}
2521 	}
2522 
2523 	for (i = 0; i < req->num_slots; i++) {
2524 		slot = &pool->slots[i];
2525 		i3c_master_init_ibi_slot(dev, &slot->base);
2526 
2527 		if (req->max_payload_len)
2528 			slot->base.data = pool->payload_buf +
2529 					  (i * req->max_payload_len);
2530 
2531 		list_add_tail(&slot->node, &pool->free_slots);
2532 		pool->num_slots++;
2533 	}
2534 
2535 	return pool;
2536 
2537 err_free_pool:
2538 	i3c_generic_ibi_free_pool(pool);
2539 	return ERR_PTR(ret);
2540 }
2541 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2542 
2543 /**
2544  * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2545  * @pool: the pool to query an IBI slot on
2546  *
2547  * Search for a free slot in a generic IBI pool.
2548  * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2549  * when it's no longer needed.
2550  *
2551  * Return: a pointer to a free slot, or NULL if there's no free slot available.
2552  */
2553 struct i3c_ibi_slot *
2554 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2555 {
2556 	struct i3c_generic_ibi_slot *slot;
2557 	unsigned long flags;
2558 
2559 	spin_lock_irqsave(&pool->lock, flags);
2560 	slot = list_first_entry_or_null(&pool->free_slots,
2561 					struct i3c_generic_ibi_slot, node);
2562 	if (slot)
2563 		list_del(&slot->node);
2564 	spin_unlock_irqrestore(&pool->lock, flags);
2565 
2566 	return slot ? &slot->base : NULL;
2567 }
2568 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2569 
2570 /**
2571  * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2572  * @pool: the pool to return the IBI slot to
2573  * @s: IBI slot to recycle
2574  *
2575  * Add an IBI slot back to its generic IBI pool. Should be called from the
2576  * master driver struct_master_controller_ops->recycle_ibi() method.
2577  */
2578 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2579 				  struct i3c_ibi_slot *s)
2580 {
2581 	struct i3c_generic_ibi_slot *slot;
2582 	unsigned long flags;
2583 
2584 	if (!s)
2585 		return;
2586 
2587 	slot = container_of(s, struct i3c_generic_ibi_slot, base);
2588 	spin_lock_irqsave(&pool->lock, flags);
2589 	list_add_tail(&slot->node, &pool->free_slots);
2590 	spin_unlock_irqrestore(&pool->lock, flags);
2591 }
2592 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2593 
2594 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2595 {
2596 	if (!ops || !ops->bus_init || !ops->priv_xfers ||
2597 	    !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2598 		return -EINVAL;
2599 
2600 	if (ops->request_ibi &&
2601 	    (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2602 	     !ops->recycle_ibi_slot))
2603 		return -EINVAL;
2604 
2605 	return 0;
2606 }
2607 
2608 /**
2609  * i3c_master_register() - register an I3C master
2610  * @master: master used to send frames on the bus
2611  * @parent: the parent device (the one that provides this I3C master
2612  *	    controller)
2613  * @ops: the master controller operations
2614  * @secondary: true if you are registering a secondary master. Will return
2615  *	       -ENOTSUPP if set to true since secondary masters are not yet
2616  *	       supported
2617  *
2618  * This function takes care of everything for you:
2619  *
2620  * - creates and initializes the I3C bus
2621  * - populates the bus with static I2C devs if @parent->of_node is not
2622  *   NULL
2623  * - registers all I3C devices added by the controller during bus
2624  *   initialization
2625  * - registers the I2C adapter and all I2C devices
2626  *
2627  * Return: 0 in case of success, a negative error code otherwise.
2628  */
2629 int i3c_master_register(struct i3c_master_controller *master,
2630 			struct device *parent,
2631 			const struct i3c_master_controller_ops *ops,
2632 			bool secondary)
2633 {
2634 	unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2635 	struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2636 	enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2637 	struct i2c_dev_boardinfo *i2cbi;
2638 	int ret;
2639 
2640 	/* We do not support secondary masters yet. */
2641 	if (secondary)
2642 		return -ENOTSUPP;
2643 
2644 	ret = i3c_master_check_ops(ops);
2645 	if (ret)
2646 		return ret;
2647 
2648 	master->dev.parent = parent;
2649 	master->dev.of_node = of_node_get(parent->of_node);
2650 	master->dev.bus = &i3c_bus_type;
2651 	master->dev.type = &i3c_masterdev_type;
2652 	master->dev.release = i3c_masterdev_release;
2653 	master->ops = ops;
2654 	master->secondary = secondary;
2655 	INIT_LIST_HEAD(&master->boardinfo.i2c);
2656 	INIT_LIST_HEAD(&master->boardinfo.i3c);
2657 
2658 	ret = i3c_bus_init(i3cbus, master->dev.of_node);
2659 	if (ret)
2660 		return ret;
2661 
2662 	device_initialize(&master->dev);
2663 	dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2664 
2665 	master->dev.dma_mask = parent->dma_mask;
2666 	master->dev.coherent_dma_mask = parent->coherent_dma_mask;
2667 	master->dev.dma_parms = parent->dma_parms;
2668 
2669 	ret = of_populate_i3c_bus(master);
2670 	if (ret)
2671 		goto err_put_dev;
2672 
2673 	list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2674 		switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2675 		case I3C_LVR_I2C_INDEX(0):
2676 			if (mode < I3C_BUS_MODE_MIXED_FAST)
2677 				mode = I3C_BUS_MODE_MIXED_FAST;
2678 			break;
2679 		case I3C_LVR_I2C_INDEX(1):
2680 			if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2681 				mode = I3C_BUS_MODE_MIXED_LIMITED;
2682 			break;
2683 		case I3C_LVR_I2C_INDEX(2):
2684 			if (mode < I3C_BUS_MODE_MIXED_SLOW)
2685 				mode = I3C_BUS_MODE_MIXED_SLOW;
2686 			break;
2687 		default:
2688 			ret = -EINVAL;
2689 			goto err_put_dev;
2690 		}
2691 
2692 		if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2693 			i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2694 	}
2695 
2696 	ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2697 	if (ret)
2698 		goto err_put_dev;
2699 
2700 	master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2701 	if (!master->wq) {
2702 		ret = -ENOMEM;
2703 		goto err_put_dev;
2704 	}
2705 
2706 	ret = i3c_master_bus_init(master);
2707 	if (ret)
2708 		goto err_put_dev;
2709 
2710 	ret = device_add(&master->dev);
2711 	if (ret)
2712 		goto err_cleanup_bus;
2713 
2714 	/*
2715 	 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2716 	 * through the I2C subsystem.
2717 	 */
2718 	ret = i3c_master_i2c_adapter_init(master);
2719 	if (ret)
2720 		goto err_del_dev;
2721 
2722 	i3c_bus_notify(i3cbus, I3C_NOTIFY_BUS_ADD);
2723 
2724 	/*
2725 	 * We're done initializing the bus and the controller, we can now
2726 	 * register I3C devices discovered during the initial DAA.
2727 	 */
2728 	master->init_done = true;
2729 	i3c_bus_normaluse_lock(&master->bus);
2730 	i3c_master_register_new_i3c_devs(master);
2731 	i3c_bus_normaluse_unlock(&master->bus);
2732 
2733 	return 0;
2734 
2735 err_del_dev:
2736 	device_del(&master->dev);
2737 
2738 err_cleanup_bus:
2739 	i3c_master_bus_cleanup(master);
2740 
2741 err_put_dev:
2742 	put_device(&master->dev);
2743 
2744 	return ret;
2745 }
2746 EXPORT_SYMBOL_GPL(i3c_master_register);
2747 
2748 /**
2749  * i3c_master_unregister() - unregister an I3C master
2750  * @master: master used to send frames on the bus
2751  *
2752  * Basically undo everything done in i3c_master_register().
2753  */
2754 void i3c_master_unregister(struct i3c_master_controller *master)
2755 {
2756 	i3c_bus_notify(&master->bus, I3C_NOTIFY_BUS_REMOVE);
2757 
2758 	i3c_master_i2c_adapter_cleanup(master);
2759 	i3c_master_unregister_i3c_devs(master);
2760 	i3c_master_bus_cleanup(master);
2761 	device_unregister(&master->dev);
2762 }
2763 EXPORT_SYMBOL_GPL(i3c_master_unregister);
2764 
2765 int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev)
2766 {
2767 	struct i3c_master_controller *master;
2768 
2769 	if (!dev)
2770 		return -ENOENT;
2771 
2772 	master = i3c_dev_get_master(dev);
2773 	if (!master)
2774 		return -EINVAL;
2775 
2776 	if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
2777 		!dev->boardinfo->static_addr)
2778 		return -EINVAL;
2779 
2780 	return i3c_master_setdasa_locked(master, dev->info.static_addr,
2781 						dev->boardinfo->init_dyn_addr);
2782 }
2783 
2784 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2785 				 struct i3c_priv_xfer *xfers,
2786 				 int nxfers)
2787 {
2788 	struct i3c_master_controller *master;
2789 
2790 	if (!dev)
2791 		return -ENOENT;
2792 
2793 	master = i3c_dev_get_master(dev);
2794 	if (!master || !xfers)
2795 		return -EINVAL;
2796 
2797 	if (!master->ops->priv_xfers)
2798 		return -ENOTSUPP;
2799 
2800 	return master->ops->priv_xfers(dev, xfers, nxfers);
2801 }
2802 
2803 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2804 {
2805 	struct i3c_master_controller *master;
2806 	int ret;
2807 
2808 	if (!dev->ibi)
2809 		return -EINVAL;
2810 
2811 	master = i3c_dev_get_master(dev);
2812 	ret = master->ops->disable_ibi(dev);
2813 	if (ret)
2814 		return ret;
2815 
2816 	reinit_completion(&dev->ibi->all_ibis_handled);
2817 	if (atomic_read(&dev->ibi->pending_ibis))
2818 		wait_for_completion(&dev->ibi->all_ibis_handled);
2819 
2820 	dev->ibi->enabled = false;
2821 
2822 	return 0;
2823 }
2824 
2825 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2826 {
2827 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2828 	int ret;
2829 
2830 	if (!dev->ibi)
2831 		return -EINVAL;
2832 
2833 	ret = master->ops->enable_ibi(dev);
2834 	if (!ret)
2835 		dev->ibi->enabled = true;
2836 
2837 	return ret;
2838 }
2839 
2840 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2841 			       const struct i3c_ibi_setup *req)
2842 {
2843 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2844 	struct i3c_device_ibi_info *ibi;
2845 	int ret;
2846 
2847 	if (!master->ops->request_ibi)
2848 		return -ENOTSUPP;
2849 
2850 	if (dev->ibi)
2851 		return -EBUSY;
2852 
2853 	ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2854 	if (!ibi)
2855 		return -ENOMEM;
2856 
2857 	ibi->wq = alloc_ordered_workqueue(dev_name(i3cdev_to_dev(dev->dev)), WQ_MEM_RECLAIM);
2858 	if (!ibi->wq) {
2859 		kfree(ibi);
2860 		return -ENOMEM;
2861 	}
2862 
2863 	atomic_set(&ibi->pending_ibis, 0);
2864 	init_completion(&ibi->all_ibis_handled);
2865 	ibi->handler = req->handler;
2866 	ibi->max_payload_len = req->max_payload_len;
2867 	ibi->num_slots = req->num_slots;
2868 
2869 	dev->ibi = ibi;
2870 	ret = master->ops->request_ibi(dev, req);
2871 	if (ret) {
2872 		kfree(ibi);
2873 		dev->ibi = NULL;
2874 	}
2875 
2876 	return ret;
2877 }
2878 
2879 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2880 {
2881 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2882 
2883 	if (!dev->ibi)
2884 		return;
2885 
2886 	if (WARN_ON(dev->ibi->enabled))
2887 		WARN_ON(i3c_dev_disable_ibi_locked(dev));
2888 
2889 	master->ops->free_ibi(dev);
2890 
2891 	if (dev->ibi->wq) {
2892 		destroy_workqueue(dev->ibi->wq);
2893 		dev->ibi->wq = NULL;
2894 	}
2895 
2896 	kfree(dev->ibi);
2897 	dev->ibi = NULL;
2898 }
2899 
2900 static int __init i3c_init(void)
2901 {
2902 	int res;
2903 
2904 	res = of_alias_get_highest_id("i3c");
2905 	if (res >= 0) {
2906 		mutex_lock(&i3c_core_lock);
2907 		__i3c_first_dynamic_bus_num = res + 1;
2908 		mutex_unlock(&i3c_core_lock);
2909 	}
2910 
2911 	res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier);
2912 	if (res)
2913 		return res;
2914 
2915 	res = bus_register(&i3c_bus_type);
2916 	if (res)
2917 		goto out_unreg_notifier;
2918 
2919 	return 0;
2920 
2921 out_unreg_notifier:
2922 	bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
2923 
2924 	return res;
2925 }
2926 subsys_initcall(i3c_init);
2927 
2928 static void __exit i3c_exit(void)
2929 {
2930 	bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
2931 	idr_destroy(&i3c_bus_idr);
2932 	bus_unregister(&i3c_bus_type);
2933 }
2934 module_exit(i3c_exit);
2935 
2936 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
2937 MODULE_DESCRIPTION("I3C core");
2938 MODULE_LICENSE("GPL v2");
2939