1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 Cadence Design Systems Inc. 4 * 5 * Author: Boris Brezillon <boris.brezillon@bootlin.com> 6 */ 7 8 #include <linux/atomic.h> 9 #include <linux/bug.h> 10 #include <linux/device.h> 11 #include <linux/err.h> 12 #include <linux/export.h> 13 #include <linux/kernel.h> 14 #include <linux/list.h> 15 #include <linux/of.h> 16 #include <linux/pm_runtime.h> 17 #include <linux/slab.h> 18 #include <linux/spinlock.h> 19 #include <linux/workqueue.h> 20 21 #include "internals.h" 22 23 static DEFINE_IDR(i3c_bus_idr); 24 static DEFINE_MUTEX(i3c_core_lock); 25 static int __i3c_first_dynamic_bus_num; 26 static BLOCKING_NOTIFIER_HEAD(i3c_bus_notifier); 27 28 /** 29 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation 30 * @bus: I3C bus to take the lock on 31 * 32 * This function takes the bus lock so that no other operations can occur on 33 * the bus. This is needed for all kind of bus maintenance operation, like 34 * - enabling/disabling slave events 35 * - re-triggering DAA 36 * - changing the dynamic address of a device 37 * - relinquishing mastership 38 * - ... 39 * 40 * The reason for this kind of locking is that we don't want drivers and core 41 * logic to rely on I3C device information that could be changed behind their 42 * back. 43 */ 44 static void i3c_bus_maintenance_lock(struct i3c_bus *bus) 45 { 46 down_write(&bus->lock); 47 } 48 49 /** 50 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance 51 * operation 52 * @bus: I3C bus to release the lock on 53 * 54 * Should be called when the bus maintenance operation is done. See 55 * i3c_bus_maintenance_lock() for more details on what these maintenance 56 * operations are. 57 */ 58 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus) 59 { 60 up_write(&bus->lock); 61 } 62 63 /** 64 * i3c_bus_normaluse_lock - Lock the bus for a normal operation 65 * @bus: I3C bus to take the lock on 66 * 67 * This function takes the bus lock for any operation that is not a maintenance 68 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of 69 * maintenance operations). Basically all communications with I3C devices are 70 * normal operations (HDR, SDR transfers or CCC commands that do not change bus 71 * state or I3C dynamic address). 72 * 73 * Note that this lock is not guaranteeing serialization of normal operations. 74 * In other words, transfer requests passed to the I3C master can be submitted 75 * in parallel and I3C master drivers have to use their own locking to make 76 * sure two different communications are not inter-mixed, or access to the 77 * output/input queue is not done while the engine is busy. 78 */ 79 void i3c_bus_normaluse_lock(struct i3c_bus *bus) 80 { 81 down_read(&bus->lock); 82 } 83 84 /** 85 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation 86 * @bus: I3C bus to release the lock on 87 * 88 * Should be called when a normal operation is done. See 89 * i3c_bus_normaluse_lock() for more details on what these normal operations 90 * are. 91 */ 92 void i3c_bus_normaluse_unlock(struct i3c_bus *bus) 93 { 94 up_read(&bus->lock); 95 } 96 97 static struct i3c_master_controller * 98 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus) 99 { 100 return container_of(i3cbus, struct i3c_master_controller, bus); 101 } 102 103 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev) 104 { 105 return container_of(dev, struct i3c_master_controller, dev); 106 } 107 108 static const struct device_type i3c_device_type; 109 110 static struct i3c_bus *dev_to_i3cbus(struct device *dev) 111 { 112 struct i3c_master_controller *master; 113 114 if (dev->type == &i3c_device_type) 115 return dev_to_i3cdev(dev)->bus; 116 117 master = dev_to_i3cmaster(dev); 118 119 return &master->bus; 120 } 121 122 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev) 123 { 124 struct i3c_master_controller *master; 125 126 if (dev->type == &i3c_device_type) 127 return dev_to_i3cdev(dev)->desc; 128 129 master = dev_to_i3cmaster(dev); 130 131 return master->this; 132 } 133 134 static ssize_t bcr_show(struct device *dev, 135 struct device_attribute *da, 136 char *buf) 137 { 138 struct i3c_bus *bus = dev_to_i3cbus(dev); 139 struct i3c_dev_desc *desc; 140 ssize_t ret; 141 142 i3c_bus_normaluse_lock(bus); 143 desc = dev_to_i3cdesc(dev); 144 ret = sprintf(buf, "%x\n", desc->info.bcr); 145 i3c_bus_normaluse_unlock(bus); 146 147 return ret; 148 } 149 static DEVICE_ATTR_RO(bcr); 150 151 static ssize_t dcr_show(struct device *dev, 152 struct device_attribute *da, 153 char *buf) 154 { 155 struct i3c_bus *bus = dev_to_i3cbus(dev); 156 struct i3c_dev_desc *desc; 157 ssize_t ret; 158 159 i3c_bus_normaluse_lock(bus); 160 desc = dev_to_i3cdesc(dev); 161 ret = sprintf(buf, "%x\n", desc->info.dcr); 162 i3c_bus_normaluse_unlock(bus); 163 164 return ret; 165 } 166 static DEVICE_ATTR_RO(dcr); 167 168 static ssize_t pid_show(struct device *dev, 169 struct device_attribute *da, 170 char *buf) 171 { 172 struct i3c_bus *bus = dev_to_i3cbus(dev); 173 struct i3c_dev_desc *desc; 174 ssize_t ret; 175 176 i3c_bus_normaluse_lock(bus); 177 desc = dev_to_i3cdesc(dev); 178 ret = sprintf(buf, "%llx\n", desc->info.pid); 179 i3c_bus_normaluse_unlock(bus); 180 181 return ret; 182 } 183 static DEVICE_ATTR_RO(pid); 184 185 static ssize_t dynamic_address_show(struct device *dev, 186 struct device_attribute *da, 187 char *buf) 188 { 189 struct i3c_bus *bus = dev_to_i3cbus(dev); 190 struct i3c_dev_desc *desc; 191 ssize_t ret; 192 193 i3c_bus_normaluse_lock(bus); 194 desc = dev_to_i3cdesc(dev); 195 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr); 196 i3c_bus_normaluse_unlock(bus); 197 198 return ret; 199 } 200 static DEVICE_ATTR_RO(dynamic_address); 201 202 static const char * const hdrcap_strings[] = { 203 "hdr-ddr", "hdr-tsp", "hdr-tsl", 204 }; 205 206 static ssize_t hdrcap_show(struct device *dev, 207 struct device_attribute *da, 208 char *buf) 209 { 210 struct i3c_bus *bus = dev_to_i3cbus(dev); 211 struct i3c_dev_desc *desc; 212 ssize_t offset = 0, ret; 213 unsigned long caps; 214 int mode; 215 216 i3c_bus_normaluse_lock(bus); 217 desc = dev_to_i3cdesc(dev); 218 caps = desc->info.hdr_cap; 219 for_each_set_bit(mode, &caps, 8) { 220 if (mode >= ARRAY_SIZE(hdrcap_strings)) 221 break; 222 223 if (!hdrcap_strings[mode]) 224 continue; 225 226 ret = sprintf(buf + offset, offset ? " %s" : "%s", 227 hdrcap_strings[mode]); 228 if (ret < 0) 229 goto out; 230 231 offset += ret; 232 } 233 234 ret = sprintf(buf + offset, "\n"); 235 if (ret < 0) 236 goto out; 237 238 ret = offset + ret; 239 240 out: 241 i3c_bus_normaluse_unlock(bus); 242 243 return ret; 244 } 245 static DEVICE_ATTR_RO(hdrcap); 246 247 static ssize_t modalias_show(struct device *dev, 248 struct device_attribute *da, char *buf) 249 { 250 struct i3c_device *i3c = dev_to_i3cdev(dev); 251 struct i3c_device_info devinfo; 252 u16 manuf, part, ext; 253 254 i3c_device_get_info(i3c, &devinfo); 255 manuf = I3C_PID_MANUF_ID(devinfo.pid); 256 part = I3C_PID_PART_ID(devinfo.pid); 257 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 258 259 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 260 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr, 261 manuf); 262 263 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 264 devinfo.dcr, manuf, part, ext); 265 } 266 static DEVICE_ATTR_RO(modalias); 267 268 static struct attribute *i3c_device_attrs[] = { 269 &dev_attr_bcr.attr, 270 &dev_attr_dcr.attr, 271 &dev_attr_pid.attr, 272 &dev_attr_dynamic_address.attr, 273 &dev_attr_hdrcap.attr, 274 &dev_attr_modalias.attr, 275 NULL, 276 }; 277 ATTRIBUTE_GROUPS(i3c_device); 278 279 static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env) 280 { 281 const struct i3c_device *i3cdev = dev_to_i3cdev(dev); 282 struct i3c_device_info devinfo; 283 u16 manuf, part, ext; 284 285 i3c_device_get_info(i3cdev, &devinfo); 286 manuf = I3C_PID_MANUF_ID(devinfo.pid); 287 part = I3C_PID_PART_ID(devinfo.pid); 288 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 289 290 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 291 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X", 292 devinfo.dcr, manuf); 293 294 return add_uevent_var(env, 295 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 296 devinfo.dcr, manuf, part, ext); 297 } 298 299 static const struct device_type i3c_device_type = { 300 .groups = i3c_device_groups, 301 .uevent = i3c_device_uevent, 302 }; 303 304 static int i3c_device_match(struct device *dev, struct device_driver *drv) 305 { 306 struct i3c_device *i3cdev; 307 struct i3c_driver *i3cdrv; 308 309 if (dev->type != &i3c_device_type) 310 return 0; 311 312 i3cdev = dev_to_i3cdev(dev); 313 i3cdrv = drv_to_i3cdrv(drv); 314 if (i3c_device_match_id(i3cdev, i3cdrv->id_table)) 315 return 1; 316 317 return 0; 318 } 319 320 static int i3c_device_probe(struct device *dev) 321 { 322 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 323 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 324 325 return driver->probe(i3cdev); 326 } 327 328 static void i3c_device_remove(struct device *dev) 329 { 330 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 331 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 332 333 if (driver->remove) 334 driver->remove(i3cdev); 335 336 i3c_device_free_ibi(i3cdev); 337 } 338 339 const struct bus_type i3c_bus_type = { 340 .name = "i3c", 341 .match = i3c_device_match, 342 .probe = i3c_device_probe, 343 .remove = i3c_device_remove, 344 }; 345 EXPORT_SYMBOL_GPL(i3c_bus_type); 346 347 static enum i3c_addr_slot_status 348 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr) 349 { 350 unsigned long status; 351 int bitpos = addr * 2; 352 353 if (addr > I2C_MAX_ADDR) 354 return I3C_ADDR_SLOT_RSVD; 355 356 status = bus->addrslots[bitpos / BITS_PER_LONG]; 357 status >>= bitpos % BITS_PER_LONG; 358 359 return status & I3C_ADDR_SLOT_STATUS_MASK; 360 } 361 362 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr, 363 enum i3c_addr_slot_status status) 364 { 365 int bitpos = addr * 2; 366 unsigned long *ptr; 367 368 if (addr > I2C_MAX_ADDR) 369 return; 370 371 ptr = bus->addrslots + (bitpos / BITS_PER_LONG); 372 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK << 373 (bitpos % BITS_PER_LONG)); 374 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG); 375 } 376 377 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr) 378 { 379 enum i3c_addr_slot_status status; 380 381 status = i3c_bus_get_addr_slot_status(bus, addr); 382 383 return status == I3C_ADDR_SLOT_FREE; 384 } 385 386 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr) 387 { 388 enum i3c_addr_slot_status status; 389 u8 addr; 390 391 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) { 392 status = i3c_bus_get_addr_slot_status(bus, addr); 393 if (status == I3C_ADDR_SLOT_FREE) 394 return addr; 395 } 396 397 return -ENOMEM; 398 } 399 400 static void i3c_bus_init_addrslots(struct i3c_bus *bus) 401 { 402 int i; 403 404 /* Addresses 0 to 7 are reserved. */ 405 for (i = 0; i < 8; i++) 406 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD); 407 408 /* 409 * Reserve broadcast address and all addresses that might collide 410 * with the broadcast address when facing a single bit error. 411 */ 412 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR, 413 I3C_ADDR_SLOT_RSVD); 414 for (i = 0; i < 7; i++) 415 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i), 416 I3C_ADDR_SLOT_RSVD); 417 } 418 419 static void i3c_bus_cleanup(struct i3c_bus *i3cbus) 420 { 421 mutex_lock(&i3c_core_lock); 422 idr_remove(&i3c_bus_idr, i3cbus->id); 423 mutex_unlock(&i3c_core_lock); 424 } 425 426 static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np) 427 { 428 int ret, start, end, id = -1; 429 430 init_rwsem(&i3cbus->lock); 431 INIT_LIST_HEAD(&i3cbus->devs.i2c); 432 INIT_LIST_HEAD(&i3cbus->devs.i3c); 433 i3c_bus_init_addrslots(i3cbus); 434 i3cbus->mode = I3C_BUS_MODE_PURE; 435 436 if (np) 437 id = of_alias_get_id(np, "i3c"); 438 439 mutex_lock(&i3c_core_lock); 440 if (id >= 0) { 441 start = id; 442 end = start + 1; 443 } else { 444 start = __i3c_first_dynamic_bus_num; 445 end = 0; 446 } 447 448 ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL); 449 mutex_unlock(&i3c_core_lock); 450 451 if (ret < 0) 452 return ret; 453 454 i3cbus->id = ret; 455 456 return 0; 457 } 458 459 void i3c_for_each_bus_locked(int (*fn)(struct i3c_bus *bus, void *data), 460 void *data) 461 { 462 struct i3c_bus *bus; 463 int id; 464 465 mutex_lock(&i3c_core_lock); 466 idr_for_each_entry(&i3c_bus_idr, bus, id) 467 fn(bus, data); 468 mutex_unlock(&i3c_core_lock); 469 } 470 EXPORT_SYMBOL_GPL(i3c_for_each_bus_locked); 471 472 int i3c_register_notifier(struct notifier_block *nb) 473 { 474 return blocking_notifier_chain_register(&i3c_bus_notifier, nb); 475 } 476 EXPORT_SYMBOL_GPL(i3c_register_notifier); 477 478 int i3c_unregister_notifier(struct notifier_block *nb) 479 { 480 return blocking_notifier_chain_unregister(&i3c_bus_notifier, nb); 481 } 482 EXPORT_SYMBOL_GPL(i3c_unregister_notifier); 483 484 static void i3c_bus_notify(struct i3c_bus *bus, unsigned int action) 485 { 486 blocking_notifier_call_chain(&i3c_bus_notifier, action, bus); 487 } 488 489 static const char * const i3c_bus_mode_strings[] = { 490 [I3C_BUS_MODE_PURE] = "pure", 491 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast", 492 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited", 493 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow", 494 }; 495 496 static ssize_t mode_show(struct device *dev, 497 struct device_attribute *da, 498 char *buf) 499 { 500 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 501 ssize_t ret; 502 503 i3c_bus_normaluse_lock(i3cbus); 504 if (i3cbus->mode < 0 || 505 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) || 506 !i3c_bus_mode_strings[i3cbus->mode]) 507 ret = sprintf(buf, "unknown\n"); 508 else 509 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]); 510 i3c_bus_normaluse_unlock(i3cbus); 511 512 return ret; 513 } 514 static DEVICE_ATTR_RO(mode); 515 516 static ssize_t current_master_show(struct device *dev, 517 struct device_attribute *da, 518 char *buf) 519 { 520 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 521 ssize_t ret; 522 523 i3c_bus_normaluse_lock(i3cbus); 524 ret = sprintf(buf, "%d-%llx\n", i3cbus->id, 525 i3cbus->cur_master->info.pid); 526 i3c_bus_normaluse_unlock(i3cbus); 527 528 return ret; 529 } 530 static DEVICE_ATTR_RO(current_master); 531 532 static ssize_t i3c_scl_frequency_show(struct device *dev, 533 struct device_attribute *da, 534 char *buf) 535 { 536 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 537 ssize_t ret; 538 539 i3c_bus_normaluse_lock(i3cbus); 540 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c); 541 i3c_bus_normaluse_unlock(i3cbus); 542 543 return ret; 544 } 545 static DEVICE_ATTR_RO(i3c_scl_frequency); 546 547 static ssize_t i2c_scl_frequency_show(struct device *dev, 548 struct device_attribute *da, 549 char *buf) 550 { 551 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 552 ssize_t ret; 553 554 i3c_bus_normaluse_lock(i3cbus); 555 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c); 556 i3c_bus_normaluse_unlock(i3cbus); 557 558 return ret; 559 } 560 static DEVICE_ATTR_RO(i2c_scl_frequency); 561 562 static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable) 563 { 564 int ret; 565 566 if (!master || !master->ops) 567 return -EINVAL; 568 569 if (!master->ops->enable_hotjoin || !master->ops->disable_hotjoin) 570 return -EINVAL; 571 572 i3c_bus_normaluse_lock(&master->bus); 573 574 if (enable) 575 ret = master->ops->enable_hotjoin(master); 576 else 577 ret = master->ops->disable_hotjoin(master); 578 579 master->hotjoin = enable; 580 581 i3c_bus_normaluse_unlock(&master->bus); 582 583 return ret; 584 } 585 586 static ssize_t hotjoin_store(struct device *dev, struct device_attribute *attr, 587 const char *buf, size_t count) 588 { 589 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 590 int ret; 591 bool res; 592 593 if (!i3cbus->cur_master) 594 return -EINVAL; 595 596 if (kstrtobool(buf, &res)) 597 return -EINVAL; 598 599 ret = i3c_set_hotjoin(i3cbus->cur_master->common.master, res); 600 if (ret) 601 return ret; 602 603 return count; 604 } 605 606 /* 607 * i3c_master_enable_hotjoin - Enable hotjoin 608 * @master: I3C master object 609 * 610 * Return: a 0 in case of success, an negative error code otherwise. 611 */ 612 int i3c_master_enable_hotjoin(struct i3c_master_controller *master) 613 { 614 return i3c_set_hotjoin(master, true); 615 } 616 EXPORT_SYMBOL_GPL(i3c_master_enable_hotjoin); 617 618 /* 619 * i3c_master_disable_hotjoin - Disable hotjoin 620 * @master: I3C master object 621 * 622 * Return: a 0 in case of success, an negative error code otherwise. 623 */ 624 int i3c_master_disable_hotjoin(struct i3c_master_controller *master) 625 { 626 return i3c_set_hotjoin(master, false); 627 } 628 EXPORT_SYMBOL_GPL(i3c_master_disable_hotjoin); 629 630 static ssize_t hotjoin_show(struct device *dev, struct device_attribute *da, char *buf) 631 { 632 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 633 ssize_t ret; 634 635 i3c_bus_normaluse_lock(i3cbus); 636 ret = sysfs_emit(buf, "%d\n", i3cbus->cur_master->common.master->hotjoin); 637 i3c_bus_normaluse_unlock(i3cbus); 638 639 return ret; 640 } 641 642 static DEVICE_ATTR_RW(hotjoin); 643 644 static struct attribute *i3c_masterdev_attrs[] = { 645 &dev_attr_mode.attr, 646 &dev_attr_current_master.attr, 647 &dev_attr_i3c_scl_frequency.attr, 648 &dev_attr_i2c_scl_frequency.attr, 649 &dev_attr_bcr.attr, 650 &dev_attr_dcr.attr, 651 &dev_attr_pid.attr, 652 &dev_attr_dynamic_address.attr, 653 &dev_attr_hdrcap.attr, 654 &dev_attr_hotjoin.attr, 655 NULL, 656 }; 657 ATTRIBUTE_GROUPS(i3c_masterdev); 658 659 static void i3c_masterdev_release(struct device *dev) 660 { 661 struct i3c_master_controller *master = dev_to_i3cmaster(dev); 662 struct i3c_bus *bus = dev_to_i3cbus(dev); 663 664 if (master->wq) 665 destroy_workqueue(master->wq); 666 667 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c)); 668 i3c_bus_cleanup(bus); 669 670 of_node_put(dev->of_node); 671 } 672 673 static const struct device_type i3c_masterdev_type = { 674 .groups = i3c_masterdev_groups, 675 }; 676 677 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode, 678 unsigned long max_i2c_scl_rate) 679 { 680 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus); 681 682 i3cbus->mode = mode; 683 684 switch (i3cbus->mode) { 685 case I3C_BUS_MODE_PURE: 686 if (!i3cbus->scl_rate.i3c) 687 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; 688 break; 689 case I3C_BUS_MODE_MIXED_FAST: 690 case I3C_BUS_MODE_MIXED_LIMITED: 691 if (!i3cbus->scl_rate.i3c) 692 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; 693 if (!i3cbus->scl_rate.i2c) 694 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 695 break; 696 case I3C_BUS_MODE_MIXED_SLOW: 697 if (!i3cbus->scl_rate.i2c) 698 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 699 if (!i3cbus->scl_rate.i3c || 700 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c) 701 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c; 702 break; 703 default: 704 return -EINVAL; 705 } 706 707 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n", 708 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c); 709 710 /* 711 * I3C/I2C frequency may have been overridden, check that user-provided 712 * values are not exceeding max possible frequency. 713 */ 714 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE || 715 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE) 716 return -EINVAL; 717 718 return 0; 719 } 720 721 static struct i3c_master_controller * 722 i2c_adapter_to_i3c_master(struct i2c_adapter *adap) 723 { 724 return container_of(adap, struct i3c_master_controller, i2c); 725 } 726 727 static struct i2c_adapter * 728 i3c_master_to_i2c_adapter(struct i3c_master_controller *master) 729 { 730 return &master->i2c; 731 } 732 733 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev) 734 { 735 kfree(dev); 736 } 737 738 static struct i2c_dev_desc * 739 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master, 740 u16 addr, u8 lvr) 741 { 742 struct i2c_dev_desc *dev; 743 744 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 745 if (!dev) 746 return ERR_PTR(-ENOMEM); 747 748 dev->common.master = master; 749 dev->addr = addr; 750 dev->lvr = lvr; 751 752 return dev; 753 } 754 755 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr, 756 u16 payloadlen) 757 { 758 dest->addr = addr; 759 dest->payload.len = payloadlen; 760 if (payloadlen) 761 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL); 762 else 763 dest->payload.data = NULL; 764 765 return dest->payload.data; 766 } 767 768 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest) 769 { 770 kfree(dest->payload.data); 771 } 772 773 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id, 774 struct i3c_ccc_cmd_dest *dests, 775 unsigned int ndests) 776 { 777 cmd->rnw = rnw ? 1 : 0; 778 cmd->id = id; 779 cmd->dests = dests; 780 cmd->ndests = ndests; 781 cmd->err = I3C_ERROR_UNKNOWN; 782 } 783 784 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master, 785 struct i3c_ccc_cmd *cmd) 786 { 787 int ret; 788 789 if (!cmd || !master) 790 return -EINVAL; 791 792 if (WARN_ON(master->init_done && 793 !rwsem_is_locked(&master->bus.lock))) 794 return -EINVAL; 795 796 if (!master->ops->send_ccc_cmd) 797 return -ENOTSUPP; 798 799 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests)) 800 return -EINVAL; 801 802 if (master->ops->supports_ccc_cmd && 803 !master->ops->supports_ccc_cmd(master, cmd)) 804 return -ENOTSUPP; 805 806 ret = master->ops->send_ccc_cmd(master, cmd); 807 if (ret) { 808 if (cmd->err != I3C_ERROR_UNKNOWN) 809 return cmd->err; 810 811 return ret; 812 } 813 814 return 0; 815 } 816 817 static struct i2c_dev_desc * 818 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master, 819 u16 addr) 820 { 821 struct i2c_dev_desc *dev; 822 823 i3c_bus_for_each_i2cdev(&master->bus, dev) { 824 if (dev->addr == addr) 825 return dev; 826 } 827 828 return NULL; 829 } 830 831 /** 832 * i3c_master_get_free_addr() - get a free address on the bus 833 * @master: I3C master object 834 * @start_addr: where to start searching 835 * 836 * This function must be called with the bus lock held in write mode. 837 * 838 * Return: the first free address starting at @start_addr (included) or -ENOMEM 839 * if there's no more address available. 840 */ 841 int i3c_master_get_free_addr(struct i3c_master_controller *master, 842 u8 start_addr) 843 { 844 return i3c_bus_get_free_addr(&master->bus, start_addr); 845 } 846 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr); 847 848 static void i3c_device_release(struct device *dev) 849 { 850 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 851 852 WARN_ON(i3cdev->desc); 853 854 of_node_put(i3cdev->dev.of_node); 855 kfree(i3cdev); 856 } 857 858 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev) 859 { 860 kfree(dev); 861 } 862 863 static struct i3c_dev_desc * 864 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master, 865 const struct i3c_device_info *info) 866 { 867 struct i3c_dev_desc *dev; 868 869 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 870 if (!dev) 871 return ERR_PTR(-ENOMEM); 872 873 dev->common.master = master; 874 dev->info = *info; 875 mutex_init(&dev->ibi_lock); 876 877 return dev; 878 } 879 880 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master, 881 u8 addr) 882 { 883 enum i3c_addr_slot_status addrstat; 884 struct i3c_ccc_cmd_dest dest; 885 struct i3c_ccc_cmd cmd; 886 int ret; 887 888 if (!master) 889 return -EINVAL; 890 891 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr); 892 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV) 893 return -EINVAL; 894 895 i3c_ccc_cmd_dest_init(&dest, addr, 0); 896 i3c_ccc_cmd_init(&cmd, false, 897 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR), 898 &dest, 1); 899 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 900 i3c_ccc_cmd_dest_cleanup(&dest); 901 902 return ret; 903 } 904 905 /** 906 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment) 907 * procedure 908 * @master: master used to send frames on the bus 909 * 910 * Send a ENTDAA CCC command to start a DAA procedure. 911 * 912 * Note that this function only sends the ENTDAA CCC command, all the logic 913 * behind dynamic address assignment has to be handled in the I3C master 914 * driver. 915 * 916 * This function must be called with the bus lock held in write mode. 917 * 918 * Return: 0 in case of success, a positive I3C error code if the error is 919 * one of the official Mx error codes, and a negative error code otherwise. 920 */ 921 int i3c_master_entdaa_locked(struct i3c_master_controller *master) 922 { 923 struct i3c_ccc_cmd_dest dest; 924 struct i3c_ccc_cmd cmd; 925 int ret; 926 927 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0); 928 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1); 929 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 930 i3c_ccc_cmd_dest_cleanup(&dest); 931 932 return ret; 933 } 934 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked); 935 936 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master, 937 u8 addr, bool enable, u8 evts) 938 { 939 struct i3c_ccc_events *events; 940 struct i3c_ccc_cmd_dest dest; 941 struct i3c_ccc_cmd cmd; 942 int ret; 943 944 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events)); 945 if (!events) 946 return -ENOMEM; 947 948 events->events = evts; 949 i3c_ccc_cmd_init(&cmd, false, 950 enable ? 951 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) : 952 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR), 953 &dest, 1); 954 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 955 i3c_ccc_cmd_dest_cleanup(&dest); 956 957 return ret; 958 } 959 960 /** 961 * i3c_master_disec_locked() - send a DISEC CCC command 962 * @master: master used to send frames on the bus 963 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 964 * @evts: events to disable 965 * 966 * Send a DISEC CCC command to disable some or all events coming from a 967 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 968 * 969 * This function must be called with the bus lock held in write mode. 970 * 971 * Return: 0 in case of success, a positive I3C error code if the error is 972 * one of the official Mx error codes, and a negative error code otherwise. 973 */ 974 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr, 975 u8 evts) 976 { 977 return i3c_master_enec_disec_locked(master, addr, false, evts); 978 } 979 EXPORT_SYMBOL_GPL(i3c_master_disec_locked); 980 981 /** 982 * i3c_master_enec_locked() - send an ENEC CCC command 983 * @master: master used to send frames on the bus 984 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 985 * @evts: events to disable 986 * 987 * Sends an ENEC CCC command to enable some or all events coming from a 988 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 989 * 990 * This function must be called with the bus lock held in write mode. 991 * 992 * Return: 0 in case of success, a positive I3C error code if the error is 993 * one of the official Mx error codes, and a negative error code otherwise. 994 */ 995 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr, 996 u8 evts) 997 { 998 return i3c_master_enec_disec_locked(master, addr, true, evts); 999 } 1000 EXPORT_SYMBOL_GPL(i3c_master_enec_locked); 1001 1002 /** 1003 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command 1004 * @master: master used to send frames on the bus 1005 * 1006 * Send a DEFSLVS CCC command containing all the devices known to the @master. 1007 * This is useful when you have secondary masters on the bus to propagate 1008 * device information. 1009 * 1010 * This should be called after all I3C devices have been discovered (in other 1011 * words, after the DAA procedure has finished) and instantiated in 1012 * &i3c_master_controller_ops->bus_init(). 1013 * It should also be called if a master ACKed an Hot-Join request and assigned 1014 * a dynamic address to the device joining the bus. 1015 * 1016 * This function must be called with the bus lock held in write mode. 1017 * 1018 * Return: 0 in case of success, a positive I3C error code if the error is 1019 * one of the official Mx error codes, and a negative error code otherwise. 1020 */ 1021 int i3c_master_defslvs_locked(struct i3c_master_controller *master) 1022 { 1023 struct i3c_ccc_defslvs *defslvs; 1024 struct i3c_ccc_dev_desc *desc; 1025 struct i3c_ccc_cmd_dest dest; 1026 struct i3c_dev_desc *i3cdev; 1027 struct i2c_dev_desc *i2cdev; 1028 struct i3c_ccc_cmd cmd; 1029 struct i3c_bus *bus; 1030 bool send = false; 1031 int ndevs = 0, ret; 1032 1033 if (!master) 1034 return -EINVAL; 1035 1036 bus = i3c_master_get_bus(master); 1037 i3c_bus_for_each_i3cdev(bus, i3cdev) { 1038 ndevs++; 1039 1040 if (i3cdev == master->this) 1041 continue; 1042 1043 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) == 1044 I3C_BCR_I3C_MASTER) 1045 send = true; 1046 } 1047 1048 /* No other master on the bus, skip DEFSLVS. */ 1049 if (!send) 1050 return 0; 1051 1052 i3c_bus_for_each_i2cdev(bus, i2cdev) 1053 ndevs++; 1054 1055 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 1056 struct_size(defslvs, slaves, 1057 ndevs - 1)); 1058 if (!defslvs) 1059 return -ENOMEM; 1060 1061 defslvs->count = ndevs; 1062 defslvs->master.bcr = master->this->info.bcr; 1063 defslvs->master.dcr = master->this->info.dcr; 1064 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1; 1065 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1; 1066 1067 desc = defslvs->slaves; 1068 i3c_bus_for_each_i2cdev(bus, i2cdev) { 1069 desc->lvr = i2cdev->lvr; 1070 desc->static_addr = i2cdev->addr << 1; 1071 desc++; 1072 } 1073 1074 i3c_bus_for_each_i3cdev(bus, i3cdev) { 1075 /* Skip the I3C dev representing this master. */ 1076 if (i3cdev == master->this) 1077 continue; 1078 1079 desc->bcr = i3cdev->info.bcr; 1080 desc->dcr = i3cdev->info.dcr; 1081 desc->dyn_addr = i3cdev->info.dyn_addr << 1; 1082 desc->static_addr = i3cdev->info.static_addr << 1; 1083 desc++; 1084 } 1085 1086 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1); 1087 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1088 i3c_ccc_cmd_dest_cleanup(&dest); 1089 1090 return ret; 1091 } 1092 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked); 1093 1094 static int i3c_master_setda_locked(struct i3c_master_controller *master, 1095 u8 oldaddr, u8 newaddr, bool setdasa) 1096 { 1097 struct i3c_ccc_cmd_dest dest; 1098 struct i3c_ccc_setda *setda; 1099 struct i3c_ccc_cmd cmd; 1100 int ret; 1101 1102 if (!oldaddr || !newaddr) 1103 return -EINVAL; 1104 1105 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda)); 1106 if (!setda) 1107 return -ENOMEM; 1108 1109 setda->addr = newaddr << 1; 1110 i3c_ccc_cmd_init(&cmd, false, 1111 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA, 1112 &dest, 1); 1113 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1114 i3c_ccc_cmd_dest_cleanup(&dest); 1115 1116 return ret; 1117 } 1118 1119 static int i3c_master_setdasa_locked(struct i3c_master_controller *master, 1120 u8 static_addr, u8 dyn_addr) 1121 { 1122 return i3c_master_setda_locked(master, static_addr, dyn_addr, true); 1123 } 1124 1125 static int i3c_master_setnewda_locked(struct i3c_master_controller *master, 1126 u8 oldaddr, u8 newaddr) 1127 { 1128 return i3c_master_setda_locked(master, oldaddr, newaddr, false); 1129 } 1130 1131 static int i3c_master_getmrl_locked(struct i3c_master_controller *master, 1132 struct i3c_device_info *info) 1133 { 1134 struct i3c_ccc_cmd_dest dest; 1135 struct i3c_ccc_mrl *mrl; 1136 struct i3c_ccc_cmd cmd; 1137 int ret; 1138 1139 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl)); 1140 if (!mrl) 1141 return -ENOMEM; 1142 1143 /* 1144 * When the device does not have IBI payload GETMRL only returns 2 1145 * bytes of data. 1146 */ 1147 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD)) 1148 dest.payload.len -= 1; 1149 1150 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1); 1151 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1152 if (ret) 1153 goto out; 1154 1155 switch (dest.payload.len) { 1156 case 3: 1157 info->max_ibi_len = mrl->ibi_len; 1158 fallthrough; 1159 case 2: 1160 info->max_read_len = be16_to_cpu(mrl->read_len); 1161 break; 1162 default: 1163 ret = -EIO; 1164 goto out; 1165 } 1166 1167 out: 1168 i3c_ccc_cmd_dest_cleanup(&dest); 1169 1170 return ret; 1171 } 1172 1173 static int i3c_master_getmwl_locked(struct i3c_master_controller *master, 1174 struct i3c_device_info *info) 1175 { 1176 struct i3c_ccc_cmd_dest dest; 1177 struct i3c_ccc_mwl *mwl; 1178 struct i3c_ccc_cmd cmd; 1179 int ret; 1180 1181 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl)); 1182 if (!mwl) 1183 return -ENOMEM; 1184 1185 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1); 1186 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1187 if (ret) 1188 goto out; 1189 1190 if (dest.payload.len != sizeof(*mwl)) { 1191 ret = -EIO; 1192 goto out; 1193 } 1194 1195 info->max_write_len = be16_to_cpu(mwl->len); 1196 1197 out: 1198 i3c_ccc_cmd_dest_cleanup(&dest); 1199 1200 return ret; 1201 } 1202 1203 static int i3c_master_getmxds_locked(struct i3c_master_controller *master, 1204 struct i3c_device_info *info) 1205 { 1206 struct i3c_ccc_getmxds *getmaxds; 1207 struct i3c_ccc_cmd_dest dest; 1208 struct i3c_ccc_cmd cmd; 1209 int ret; 1210 1211 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1212 sizeof(*getmaxds)); 1213 if (!getmaxds) 1214 return -ENOMEM; 1215 1216 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1); 1217 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1218 if (ret) { 1219 /* 1220 * Retry when the device does not support max read turnaround 1221 * while expecting shorter length from this CCC command. 1222 */ 1223 dest.payload.len -= 3; 1224 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1225 if (ret) 1226 goto out; 1227 } 1228 1229 if (dest.payload.len != 2 && dest.payload.len != 5) { 1230 ret = -EIO; 1231 goto out; 1232 } 1233 1234 info->max_read_ds = getmaxds->maxrd; 1235 info->max_write_ds = getmaxds->maxwr; 1236 if (dest.payload.len == 5) 1237 info->max_read_turnaround = getmaxds->maxrdturn[0] | 1238 ((u32)getmaxds->maxrdturn[1] << 8) | 1239 ((u32)getmaxds->maxrdturn[2] << 16); 1240 1241 out: 1242 i3c_ccc_cmd_dest_cleanup(&dest); 1243 1244 return ret; 1245 } 1246 1247 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master, 1248 struct i3c_device_info *info) 1249 { 1250 struct i3c_ccc_gethdrcap *gethdrcap; 1251 struct i3c_ccc_cmd_dest dest; 1252 struct i3c_ccc_cmd cmd; 1253 int ret; 1254 1255 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1256 sizeof(*gethdrcap)); 1257 if (!gethdrcap) 1258 return -ENOMEM; 1259 1260 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1); 1261 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1262 if (ret) 1263 goto out; 1264 1265 if (dest.payload.len != 1) { 1266 ret = -EIO; 1267 goto out; 1268 } 1269 1270 info->hdr_cap = gethdrcap->modes; 1271 1272 out: 1273 i3c_ccc_cmd_dest_cleanup(&dest); 1274 1275 return ret; 1276 } 1277 1278 static int i3c_master_getpid_locked(struct i3c_master_controller *master, 1279 struct i3c_device_info *info) 1280 { 1281 struct i3c_ccc_getpid *getpid; 1282 struct i3c_ccc_cmd_dest dest; 1283 struct i3c_ccc_cmd cmd; 1284 int ret, i; 1285 1286 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid)); 1287 if (!getpid) 1288 return -ENOMEM; 1289 1290 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1); 1291 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1292 if (ret) 1293 goto out; 1294 1295 info->pid = 0; 1296 for (i = 0; i < sizeof(getpid->pid); i++) { 1297 int sft = (sizeof(getpid->pid) - i - 1) * 8; 1298 1299 info->pid |= (u64)getpid->pid[i] << sft; 1300 } 1301 1302 out: 1303 i3c_ccc_cmd_dest_cleanup(&dest); 1304 1305 return ret; 1306 } 1307 1308 static int i3c_master_getbcr_locked(struct i3c_master_controller *master, 1309 struct i3c_device_info *info) 1310 { 1311 struct i3c_ccc_getbcr *getbcr; 1312 struct i3c_ccc_cmd_dest dest; 1313 struct i3c_ccc_cmd cmd; 1314 int ret; 1315 1316 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr)); 1317 if (!getbcr) 1318 return -ENOMEM; 1319 1320 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1); 1321 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1322 if (ret) 1323 goto out; 1324 1325 info->bcr = getbcr->bcr; 1326 1327 out: 1328 i3c_ccc_cmd_dest_cleanup(&dest); 1329 1330 return ret; 1331 } 1332 1333 static int i3c_master_getdcr_locked(struct i3c_master_controller *master, 1334 struct i3c_device_info *info) 1335 { 1336 struct i3c_ccc_getdcr *getdcr; 1337 struct i3c_ccc_cmd_dest dest; 1338 struct i3c_ccc_cmd cmd; 1339 int ret; 1340 1341 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr)); 1342 if (!getdcr) 1343 return -ENOMEM; 1344 1345 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1); 1346 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1347 if (ret) 1348 goto out; 1349 1350 info->dcr = getdcr->dcr; 1351 1352 out: 1353 i3c_ccc_cmd_dest_cleanup(&dest); 1354 1355 return ret; 1356 } 1357 1358 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev) 1359 { 1360 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1361 enum i3c_addr_slot_status slot_status; 1362 int ret; 1363 1364 if (!dev->info.dyn_addr) 1365 return -EINVAL; 1366 1367 slot_status = i3c_bus_get_addr_slot_status(&master->bus, 1368 dev->info.dyn_addr); 1369 if (slot_status == I3C_ADDR_SLOT_RSVD || 1370 slot_status == I3C_ADDR_SLOT_I2C_DEV) 1371 return -EINVAL; 1372 1373 ret = i3c_master_getpid_locked(master, &dev->info); 1374 if (ret) 1375 return ret; 1376 1377 ret = i3c_master_getbcr_locked(master, &dev->info); 1378 if (ret) 1379 return ret; 1380 1381 ret = i3c_master_getdcr_locked(master, &dev->info); 1382 if (ret) 1383 return ret; 1384 1385 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) { 1386 ret = i3c_master_getmxds_locked(master, &dev->info); 1387 if (ret) 1388 return ret; 1389 } 1390 1391 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD) 1392 dev->info.max_ibi_len = 1; 1393 1394 i3c_master_getmrl_locked(master, &dev->info); 1395 i3c_master_getmwl_locked(master, &dev->info); 1396 1397 if (dev->info.bcr & I3C_BCR_HDR_CAP) { 1398 ret = i3c_master_gethdrcap_locked(master, &dev->info); 1399 if (ret) 1400 return ret; 1401 } 1402 1403 return 0; 1404 } 1405 1406 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev) 1407 { 1408 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1409 1410 if (dev->info.static_addr) 1411 i3c_bus_set_addr_slot_status(&master->bus, 1412 dev->info.static_addr, 1413 I3C_ADDR_SLOT_FREE); 1414 1415 if (dev->info.dyn_addr) 1416 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1417 I3C_ADDR_SLOT_FREE); 1418 1419 if (dev->boardinfo && dev->boardinfo->init_dyn_addr) 1420 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1421 I3C_ADDR_SLOT_FREE); 1422 } 1423 1424 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev) 1425 { 1426 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1427 enum i3c_addr_slot_status status; 1428 1429 if (!dev->info.static_addr && !dev->info.dyn_addr) 1430 return 0; 1431 1432 if (dev->info.static_addr) { 1433 status = i3c_bus_get_addr_slot_status(&master->bus, 1434 dev->info.static_addr); 1435 /* Since static address and assigned dynamic address can be 1436 * equal, allow this case to pass. 1437 */ 1438 if (status != I3C_ADDR_SLOT_FREE && 1439 dev->info.static_addr != dev->boardinfo->init_dyn_addr) 1440 return -EBUSY; 1441 1442 i3c_bus_set_addr_slot_status(&master->bus, 1443 dev->info.static_addr, 1444 I3C_ADDR_SLOT_I3C_DEV); 1445 } 1446 1447 /* 1448 * ->init_dyn_addr should have been reserved before that, so, if we're 1449 * trying to apply a pre-reserved dynamic address, we should not try 1450 * to reserve the address slot a second time. 1451 */ 1452 if (dev->info.dyn_addr && 1453 (!dev->boardinfo || 1454 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) { 1455 status = i3c_bus_get_addr_slot_status(&master->bus, 1456 dev->info.dyn_addr); 1457 if (status != I3C_ADDR_SLOT_FREE) 1458 goto err_release_static_addr; 1459 1460 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1461 I3C_ADDR_SLOT_I3C_DEV); 1462 } 1463 1464 return 0; 1465 1466 err_release_static_addr: 1467 if (dev->info.static_addr) 1468 i3c_bus_set_addr_slot_status(&master->bus, 1469 dev->info.static_addr, 1470 I3C_ADDR_SLOT_FREE); 1471 1472 return -EBUSY; 1473 } 1474 1475 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master, 1476 struct i3c_dev_desc *dev) 1477 { 1478 int ret; 1479 1480 /* 1481 * We don't attach devices to the controller until they are 1482 * addressable on the bus. 1483 */ 1484 if (!dev->info.static_addr && !dev->info.dyn_addr) 1485 return 0; 1486 1487 ret = i3c_master_get_i3c_addrs(dev); 1488 if (ret) 1489 return ret; 1490 1491 /* Do not attach the master device itself. */ 1492 if (master->this != dev && master->ops->attach_i3c_dev) { 1493 ret = master->ops->attach_i3c_dev(dev); 1494 if (ret) { 1495 i3c_master_put_i3c_addrs(dev); 1496 return ret; 1497 } 1498 } 1499 1500 list_add_tail(&dev->common.node, &master->bus.devs.i3c); 1501 1502 return 0; 1503 } 1504 1505 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev, 1506 u8 old_dyn_addr) 1507 { 1508 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1509 enum i3c_addr_slot_status status; 1510 int ret; 1511 1512 if (dev->info.dyn_addr != old_dyn_addr && 1513 (!dev->boardinfo || 1514 dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) { 1515 status = i3c_bus_get_addr_slot_status(&master->bus, 1516 dev->info.dyn_addr); 1517 if (status != I3C_ADDR_SLOT_FREE) 1518 return -EBUSY; 1519 i3c_bus_set_addr_slot_status(&master->bus, 1520 dev->info.dyn_addr, 1521 I3C_ADDR_SLOT_I3C_DEV); 1522 if (old_dyn_addr) 1523 i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr, 1524 I3C_ADDR_SLOT_FREE); 1525 } 1526 1527 if (master->ops->reattach_i3c_dev) { 1528 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr); 1529 if (ret) { 1530 i3c_master_put_i3c_addrs(dev); 1531 return ret; 1532 } 1533 } 1534 1535 return 0; 1536 } 1537 1538 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev) 1539 { 1540 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1541 1542 /* Do not detach the master device itself. */ 1543 if (master->this != dev && master->ops->detach_i3c_dev) 1544 master->ops->detach_i3c_dev(dev); 1545 1546 i3c_master_put_i3c_addrs(dev); 1547 list_del(&dev->common.node); 1548 } 1549 1550 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master, 1551 struct i2c_dev_desc *dev) 1552 { 1553 int ret; 1554 1555 if (master->ops->attach_i2c_dev) { 1556 ret = master->ops->attach_i2c_dev(dev); 1557 if (ret) 1558 return ret; 1559 } 1560 1561 list_add_tail(&dev->common.node, &master->bus.devs.i2c); 1562 1563 return 0; 1564 } 1565 1566 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev) 1567 { 1568 struct i3c_master_controller *master = i2c_dev_get_master(dev); 1569 1570 list_del(&dev->common.node); 1571 1572 if (master->ops->detach_i2c_dev) 1573 master->ops->detach_i2c_dev(dev); 1574 } 1575 1576 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master, 1577 struct i3c_dev_boardinfo *boardinfo) 1578 { 1579 struct i3c_device_info info = { 1580 .static_addr = boardinfo->static_addr, 1581 .pid = boardinfo->pid, 1582 }; 1583 struct i3c_dev_desc *i3cdev; 1584 int ret; 1585 1586 i3cdev = i3c_master_alloc_i3c_dev(master, &info); 1587 if (IS_ERR(i3cdev)) 1588 return -ENOMEM; 1589 1590 i3cdev->boardinfo = boardinfo; 1591 1592 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1593 if (ret) 1594 goto err_free_dev; 1595 1596 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr, 1597 i3cdev->boardinfo->init_dyn_addr); 1598 if (ret) 1599 goto err_detach_dev; 1600 1601 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr; 1602 ret = i3c_master_reattach_i3c_dev(i3cdev, 0); 1603 if (ret) 1604 goto err_rstdaa; 1605 1606 ret = i3c_master_retrieve_dev_info(i3cdev); 1607 if (ret) 1608 goto err_rstdaa; 1609 1610 return 0; 1611 1612 err_rstdaa: 1613 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr); 1614 err_detach_dev: 1615 i3c_master_detach_i3c_dev(i3cdev); 1616 err_free_dev: 1617 i3c_master_free_i3c_dev(i3cdev); 1618 1619 return ret; 1620 } 1621 1622 static void 1623 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master) 1624 { 1625 struct i3c_dev_desc *desc; 1626 int ret; 1627 1628 if (!master->init_done) 1629 return; 1630 1631 i3c_bus_for_each_i3cdev(&master->bus, desc) { 1632 if (desc->dev || !desc->info.dyn_addr || desc == master->this) 1633 continue; 1634 1635 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL); 1636 if (!desc->dev) 1637 continue; 1638 1639 desc->dev->bus = &master->bus; 1640 desc->dev->desc = desc; 1641 desc->dev->dev.parent = &master->dev; 1642 desc->dev->dev.type = &i3c_device_type; 1643 desc->dev->dev.bus = &i3c_bus_type; 1644 desc->dev->dev.release = i3c_device_release; 1645 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id, 1646 desc->info.pid); 1647 1648 if (desc->boardinfo) 1649 desc->dev->dev.of_node = desc->boardinfo->of_node; 1650 1651 ret = device_register(&desc->dev->dev); 1652 if (ret) { 1653 dev_err(&master->dev, 1654 "Failed to add I3C device (err = %d)\n", ret); 1655 put_device(&desc->dev->dev); 1656 } 1657 } 1658 } 1659 1660 /** 1661 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment) 1662 * @master: master doing the DAA 1663 * 1664 * This function is instantiating an I3C device object and adding it to the 1665 * I3C device list. All device information are automatically retrieved using 1666 * standard CCC commands. 1667 * 1668 * The I3C device object is returned in case the master wants to attach 1669 * private data to it using i3c_dev_set_master_data(). 1670 * 1671 * This function must be called with the bus lock held in write mode. 1672 * 1673 * Return: a 0 in case of success, an negative error code otherwise. 1674 */ 1675 int i3c_master_do_daa(struct i3c_master_controller *master) 1676 { 1677 int ret; 1678 1679 i3c_bus_maintenance_lock(&master->bus); 1680 ret = master->ops->do_daa(master); 1681 i3c_bus_maintenance_unlock(&master->bus); 1682 1683 if (ret) 1684 return ret; 1685 1686 i3c_bus_normaluse_lock(&master->bus); 1687 i3c_master_register_new_i3c_devs(master); 1688 i3c_bus_normaluse_unlock(&master->bus); 1689 1690 return 0; 1691 } 1692 EXPORT_SYMBOL_GPL(i3c_master_do_daa); 1693 1694 /** 1695 * i3c_master_set_info() - set master device information 1696 * @master: master used to send frames on the bus 1697 * @info: I3C device information 1698 * 1699 * Set master device info. This should be called from 1700 * &i3c_master_controller_ops->bus_init(). 1701 * 1702 * Not all &i3c_device_info fields are meaningful for a master device. 1703 * Here is a list of fields that should be properly filled: 1704 * 1705 * - &i3c_device_info->dyn_addr 1706 * - &i3c_device_info->bcr 1707 * - &i3c_device_info->dcr 1708 * - &i3c_device_info->pid 1709 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in 1710 * &i3c_device_info->bcr 1711 * 1712 * This function must be called with the bus lock held in maintenance mode. 1713 * 1714 * Return: 0 if @info contains valid information (not every piece of 1715 * information can be checked, but we can at least make sure @info->dyn_addr 1716 * and @info->bcr are correct), -EINVAL otherwise. 1717 */ 1718 int i3c_master_set_info(struct i3c_master_controller *master, 1719 const struct i3c_device_info *info) 1720 { 1721 struct i3c_dev_desc *i3cdev; 1722 int ret; 1723 1724 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr)) 1725 return -EINVAL; 1726 1727 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER && 1728 master->secondary) 1729 return -EINVAL; 1730 1731 if (master->this) 1732 return -EINVAL; 1733 1734 i3cdev = i3c_master_alloc_i3c_dev(master, info); 1735 if (IS_ERR(i3cdev)) 1736 return PTR_ERR(i3cdev); 1737 1738 master->this = i3cdev; 1739 master->bus.cur_master = master->this; 1740 1741 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1742 if (ret) 1743 goto err_free_dev; 1744 1745 return 0; 1746 1747 err_free_dev: 1748 i3c_master_free_i3c_dev(i3cdev); 1749 1750 return ret; 1751 } 1752 EXPORT_SYMBOL_GPL(i3c_master_set_info); 1753 1754 static void i3c_master_detach_free_devs(struct i3c_master_controller *master) 1755 { 1756 struct i3c_dev_desc *i3cdev, *i3ctmp; 1757 struct i2c_dev_desc *i2cdev, *i2ctmp; 1758 1759 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c, 1760 common.node) { 1761 i3c_master_detach_i3c_dev(i3cdev); 1762 1763 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr) 1764 i3c_bus_set_addr_slot_status(&master->bus, 1765 i3cdev->boardinfo->init_dyn_addr, 1766 I3C_ADDR_SLOT_FREE); 1767 1768 i3c_master_free_i3c_dev(i3cdev); 1769 } 1770 1771 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c, 1772 common.node) { 1773 i3c_master_detach_i2c_dev(i2cdev); 1774 i3c_bus_set_addr_slot_status(&master->bus, 1775 i2cdev->addr, 1776 I3C_ADDR_SLOT_FREE); 1777 i3c_master_free_i2c_dev(i2cdev); 1778 } 1779 } 1780 1781 /** 1782 * i3c_master_bus_init() - initialize an I3C bus 1783 * @master: main master initializing the bus 1784 * 1785 * This function is following all initialisation steps described in the I3C 1786 * specification: 1787 * 1788 * 1. Attach I2C devs to the master so that the master can fill its internal 1789 * device table appropriately 1790 * 1791 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize 1792 * the master controller. That's usually where the bus mode is selected 1793 * (pure bus or mixed fast/slow bus) 1794 * 1795 * 3. Instruct all devices on the bus to drop their dynamic address. This is 1796 * particularly important when the bus was previously configured by someone 1797 * else (for example the bootloader) 1798 * 1799 * 4. Disable all slave events. 1800 * 1801 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices 1802 * also have static_addr, try to pre-assign dynamic addresses requested by 1803 * the FW with SETDASA and attach corresponding statically defined I3C 1804 * devices to the master. 1805 * 1806 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all 1807 * remaining I3C devices 1808 * 1809 * Once this is done, all I3C and I2C devices should be usable. 1810 * 1811 * Return: a 0 in case of success, an negative error code otherwise. 1812 */ 1813 static int i3c_master_bus_init(struct i3c_master_controller *master) 1814 { 1815 enum i3c_addr_slot_status status; 1816 struct i2c_dev_boardinfo *i2cboardinfo; 1817 struct i3c_dev_boardinfo *i3cboardinfo; 1818 struct i2c_dev_desc *i2cdev; 1819 int ret; 1820 1821 /* 1822 * First attach all devices with static definitions provided by the 1823 * FW. 1824 */ 1825 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) { 1826 status = i3c_bus_get_addr_slot_status(&master->bus, 1827 i2cboardinfo->base.addr); 1828 if (status != I3C_ADDR_SLOT_FREE) { 1829 ret = -EBUSY; 1830 goto err_detach_devs; 1831 } 1832 1833 i3c_bus_set_addr_slot_status(&master->bus, 1834 i2cboardinfo->base.addr, 1835 I3C_ADDR_SLOT_I2C_DEV); 1836 1837 i2cdev = i3c_master_alloc_i2c_dev(master, 1838 i2cboardinfo->base.addr, 1839 i2cboardinfo->lvr); 1840 if (IS_ERR(i2cdev)) { 1841 ret = PTR_ERR(i2cdev); 1842 goto err_detach_devs; 1843 } 1844 1845 ret = i3c_master_attach_i2c_dev(master, i2cdev); 1846 if (ret) { 1847 i3c_master_free_i2c_dev(i2cdev); 1848 goto err_detach_devs; 1849 } 1850 } 1851 1852 /* 1853 * Now execute the controller specific ->bus_init() routine, which 1854 * might configure its internal logic to match the bus limitations. 1855 */ 1856 ret = master->ops->bus_init(master); 1857 if (ret) 1858 goto err_detach_devs; 1859 1860 /* 1861 * The master device should have been instantiated in ->bus_init(), 1862 * complain if this was not the case. 1863 */ 1864 if (!master->this) { 1865 dev_err(&master->dev, 1866 "master_set_info() was not called in ->bus_init()\n"); 1867 ret = -EINVAL; 1868 goto err_bus_cleanup; 1869 } 1870 1871 /* 1872 * Reset all dynamic address that may have been assigned before 1873 * (assigned by the bootloader for example). 1874 */ 1875 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1876 if (ret && ret != I3C_ERROR_M2) 1877 goto err_bus_cleanup; 1878 1879 /* Disable all slave events before starting DAA. */ 1880 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR, 1881 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR | 1882 I3C_CCC_EVENT_HJ); 1883 if (ret && ret != I3C_ERROR_M2) 1884 goto err_bus_cleanup; 1885 1886 /* 1887 * Reserve init_dyn_addr first, and then try to pre-assign dynamic 1888 * address and retrieve device information if needed. 1889 * In case pre-assign dynamic address fails, setting dynamic address to 1890 * the requested init_dyn_addr is retried after DAA is done in 1891 * i3c_master_add_i3c_dev_locked(). 1892 */ 1893 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 1894 1895 /* 1896 * We don't reserve a dynamic address for devices that 1897 * don't explicitly request one. 1898 */ 1899 if (!i3cboardinfo->init_dyn_addr) 1900 continue; 1901 1902 ret = i3c_bus_get_addr_slot_status(&master->bus, 1903 i3cboardinfo->init_dyn_addr); 1904 if (ret != I3C_ADDR_SLOT_FREE) { 1905 ret = -EBUSY; 1906 goto err_rstdaa; 1907 } 1908 1909 i3c_bus_set_addr_slot_status(&master->bus, 1910 i3cboardinfo->init_dyn_addr, 1911 I3C_ADDR_SLOT_I3C_DEV); 1912 1913 /* 1914 * Only try to create/attach devices that have a static 1915 * address. Other devices will be created/attached when 1916 * DAA happens, and the requested dynamic address will 1917 * be set using SETNEWDA once those devices become 1918 * addressable. 1919 */ 1920 1921 if (i3cboardinfo->static_addr) 1922 i3c_master_early_i3c_dev_add(master, i3cboardinfo); 1923 } 1924 1925 ret = i3c_master_do_daa(master); 1926 if (ret) 1927 goto err_rstdaa; 1928 1929 return 0; 1930 1931 err_rstdaa: 1932 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1933 1934 err_bus_cleanup: 1935 if (master->ops->bus_cleanup) 1936 master->ops->bus_cleanup(master); 1937 1938 err_detach_devs: 1939 i3c_master_detach_free_devs(master); 1940 1941 return ret; 1942 } 1943 1944 static void i3c_master_bus_cleanup(struct i3c_master_controller *master) 1945 { 1946 if (master->ops->bus_cleanup) 1947 master->ops->bus_cleanup(master); 1948 1949 i3c_master_detach_free_devs(master); 1950 } 1951 1952 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev) 1953 { 1954 struct i3c_master_controller *master = i3cdev->common.master; 1955 struct i3c_dev_boardinfo *i3cboardinfo; 1956 1957 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 1958 if (i3cdev->info.pid != i3cboardinfo->pid) 1959 continue; 1960 1961 i3cdev->boardinfo = i3cboardinfo; 1962 i3cdev->info.static_addr = i3cboardinfo->static_addr; 1963 return; 1964 } 1965 } 1966 1967 static struct i3c_dev_desc * 1968 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev) 1969 { 1970 struct i3c_master_controller *master = i3c_dev_get_master(refdev); 1971 struct i3c_dev_desc *i3cdev; 1972 1973 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 1974 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid) 1975 return i3cdev; 1976 } 1977 1978 return NULL; 1979 } 1980 1981 /** 1982 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus 1983 * @master: master used to send frames on the bus 1984 * @addr: I3C slave dynamic address assigned to the device 1985 * 1986 * This function is instantiating an I3C device object and adding it to the 1987 * I3C device list. All device information are automatically retrieved using 1988 * standard CCC commands. 1989 * 1990 * The I3C device object is returned in case the master wants to attach 1991 * private data to it using i3c_dev_set_master_data(). 1992 * 1993 * This function must be called with the bus lock held in write mode. 1994 * 1995 * Return: a 0 in case of success, an negative error code otherwise. 1996 */ 1997 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, 1998 u8 addr) 1999 { 2000 struct i3c_device_info info = { .dyn_addr = addr }; 2001 struct i3c_dev_desc *newdev, *olddev; 2002 u8 old_dyn_addr = addr, expected_dyn_addr; 2003 struct i3c_ibi_setup ibireq = { }; 2004 bool enable_ibi = false; 2005 int ret; 2006 2007 if (!master) 2008 return -EINVAL; 2009 2010 newdev = i3c_master_alloc_i3c_dev(master, &info); 2011 if (IS_ERR(newdev)) 2012 return PTR_ERR(newdev); 2013 2014 ret = i3c_master_attach_i3c_dev(master, newdev); 2015 if (ret) 2016 goto err_free_dev; 2017 2018 ret = i3c_master_retrieve_dev_info(newdev); 2019 if (ret) 2020 goto err_detach_dev; 2021 2022 i3c_master_attach_boardinfo(newdev); 2023 2024 olddev = i3c_master_search_i3c_dev_duplicate(newdev); 2025 if (olddev) { 2026 newdev->dev = olddev->dev; 2027 if (newdev->dev) 2028 newdev->dev->desc = newdev; 2029 2030 /* 2031 * We need to restore the IBI state too, so let's save the 2032 * IBI information and try to restore them after olddev has 2033 * been detached+released and its IBI has been stopped and 2034 * the associated resources have been freed. 2035 */ 2036 mutex_lock(&olddev->ibi_lock); 2037 if (olddev->ibi) { 2038 ibireq.handler = olddev->ibi->handler; 2039 ibireq.max_payload_len = olddev->ibi->max_payload_len; 2040 ibireq.num_slots = olddev->ibi->num_slots; 2041 2042 if (olddev->ibi->enabled) { 2043 enable_ibi = true; 2044 i3c_dev_disable_ibi_locked(olddev); 2045 } 2046 2047 i3c_dev_free_ibi_locked(olddev); 2048 } 2049 mutex_unlock(&olddev->ibi_lock); 2050 2051 old_dyn_addr = olddev->info.dyn_addr; 2052 2053 i3c_master_detach_i3c_dev(olddev); 2054 i3c_master_free_i3c_dev(olddev); 2055 } 2056 2057 /* 2058 * Depending on our previous state, the expected dynamic address might 2059 * differ: 2060 * - if the device already had a dynamic address assigned, let's try to 2061 * re-apply this one 2062 * - if the device did not have a dynamic address and the firmware 2063 * requested a specific address, pick this one 2064 * - in any other case, keep the address automatically assigned by the 2065 * master 2066 */ 2067 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr) 2068 expected_dyn_addr = old_dyn_addr; 2069 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr) 2070 expected_dyn_addr = newdev->boardinfo->init_dyn_addr; 2071 else 2072 expected_dyn_addr = newdev->info.dyn_addr; 2073 2074 if (newdev->info.dyn_addr != expected_dyn_addr) { 2075 /* 2076 * Try to apply the expected dynamic address. If it fails, keep 2077 * the address assigned by the master. 2078 */ 2079 ret = i3c_master_setnewda_locked(master, 2080 newdev->info.dyn_addr, 2081 expected_dyn_addr); 2082 if (!ret) { 2083 old_dyn_addr = newdev->info.dyn_addr; 2084 newdev->info.dyn_addr = expected_dyn_addr; 2085 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr); 2086 } else { 2087 dev_err(&master->dev, 2088 "Failed to assign reserved/old address to device %d%llx", 2089 master->bus.id, newdev->info.pid); 2090 } 2091 } 2092 2093 /* 2094 * Now is time to try to restore the IBI setup. If we're lucky, 2095 * everything works as before, otherwise, all we can do is complain. 2096 * FIXME: maybe we should add callback to inform the driver that it 2097 * should request the IBI again instead of trying to hide that from 2098 * him. 2099 */ 2100 if (ibireq.handler) { 2101 mutex_lock(&newdev->ibi_lock); 2102 ret = i3c_dev_request_ibi_locked(newdev, &ibireq); 2103 if (ret) { 2104 dev_err(&master->dev, 2105 "Failed to request IBI on device %d-%llx", 2106 master->bus.id, newdev->info.pid); 2107 } else if (enable_ibi) { 2108 ret = i3c_dev_enable_ibi_locked(newdev); 2109 if (ret) 2110 dev_err(&master->dev, 2111 "Failed to re-enable IBI on device %d-%llx", 2112 master->bus.id, newdev->info.pid); 2113 } 2114 mutex_unlock(&newdev->ibi_lock); 2115 } 2116 2117 return 0; 2118 2119 err_detach_dev: 2120 if (newdev->dev && newdev->dev->desc) 2121 newdev->dev->desc = NULL; 2122 2123 i3c_master_detach_i3c_dev(newdev); 2124 2125 err_free_dev: 2126 i3c_master_free_i3c_dev(newdev); 2127 2128 return ret; 2129 } 2130 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked); 2131 2132 #define OF_I3C_REG1_IS_I2C_DEV BIT(31) 2133 2134 static int 2135 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master, 2136 struct device_node *node, u32 *reg) 2137 { 2138 struct i2c_dev_boardinfo *boardinfo; 2139 struct device *dev = &master->dev; 2140 int ret; 2141 2142 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2143 if (!boardinfo) 2144 return -ENOMEM; 2145 2146 ret = of_i2c_get_board_info(dev, node, &boardinfo->base); 2147 if (ret) 2148 return ret; 2149 2150 /* 2151 * The I3C Specification does not clearly say I2C devices with 10-bit 2152 * address are supported. These devices can't be passed properly through 2153 * DEFSLVS command. 2154 */ 2155 if (boardinfo->base.flags & I2C_CLIENT_TEN) { 2156 dev_err(dev, "I2C device with 10 bit address not supported."); 2157 return -ENOTSUPP; 2158 } 2159 2160 /* LVR is encoded in reg[2]. */ 2161 boardinfo->lvr = reg[2]; 2162 2163 list_add_tail(&boardinfo->node, &master->boardinfo.i2c); 2164 of_node_get(node); 2165 2166 return 0; 2167 } 2168 2169 static int 2170 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master, 2171 struct device_node *node, u32 *reg) 2172 { 2173 struct i3c_dev_boardinfo *boardinfo; 2174 struct device *dev = &master->dev; 2175 enum i3c_addr_slot_status addrstatus; 2176 u32 init_dyn_addr = 0; 2177 2178 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2179 if (!boardinfo) 2180 return -ENOMEM; 2181 2182 if (reg[0]) { 2183 if (reg[0] > I3C_MAX_ADDR) 2184 return -EINVAL; 2185 2186 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2187 reg[0]); 2188 if (addrstatus != I3C_ADDR_SLOT_FREE) 2189 return -EINVAL; 2190 } 2191 2192 boardinfo->static_addr = reg[0]; 2193 2194 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) { 2195 if (init_dyn_addr > I3C_MAX_ADDR) 2196 return -EINVAL; 2197 2198 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2199 init_dyn_addr); 2200 if (addrstatus != I3C_ADDR_SLOT_FREE) 2201 return -EINVAL; 2202 } 2203 2204 boardinfo->pid = ((u64)reg[1] << 32) | reg[2]; 2205 2206 if ((boardinfo->pid & GENMASK_ULL(63, 48)) || 2207 I3C_PID_RND_LOWER_32BITS(boardinfo->pid)) 2208 return -EINVAL; 2209 2210 boardinfo->init_dyn_addr = init_dyn_addr; 2211 boardinfo->of_node = of_node_get(node); 2212 list_add_tail(&boardinfo->node, &master->boardinfo.i3c); 2213 2214 return 0; 2215 } 2216 2217 static int of_i3c_master_add_dev(struct i3c_master_controller *master, 2218 struct device_node *node) 2219 { 2220 u32 reg[3]; 2221 int ret; 2222 2223 if (!master || !node) 2224 return -EINVAL; 2225 2226 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg)); 2227 if (ret) 2228 return ret; 2229 2230 /* 2231 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're 2232 * dealing with an I2C device. 2233 */ 2234 if (!reg[1]) 2235 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg); 2236 else 2237 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg); 2238 2239 return ret; 2240 } 2241 2242 static int of_populate_i3c_bus(struct i3c_master_controller *master) 2243 { 2244 struct device *dev = &master->dev; 2245 struct device_node *i3cbus_np = dev->of_node; 2246 struct device_node *node; 2247 int ret; 2248 u32 val; 2249 2250 if (!i3cbus_np) 2251 return 0; 2252 2253 for_each_available_child_of_node(i3cbus_np, node) { 2254 ret = of_i3c_master_add_dev(master, node); 2255 if (ret) { 2256 of_node_put(node); 2257 return ret; 2258 } 2259 } 2260 2261 /* 2262 * The user might want to limit I2C and I3C speed in case some devices 2263 * on the bus are not supporting typical rates, or if the bus topology 2264 * prevents it from using max possible rate. 2265 */ 2266 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val)) 2267 master->bus.scl_rate.i2c = val; 2268 2269 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val)) 2270 master->bus.scl_rate.i3c = val; 2271 2272 return 0; 2273 } 2274 2275 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap, 2276 struct i2c_msg *xfers, int nxfers) 2277 { 2278 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2279 struct i2c_dev_desc *dev; 2280 int i, ret; 2281 u16 addr; 2282 2283 if (!xfers || !master || nxfers <= 0) 2284 return -EINVAL; 2285 2286 if (!master->ops->i2c_xfers) 2287 return -ENOTSUPP; 2288 2289 /* Doing transfers to different devices is not supported. */ 2290 addr = xfers[0].addr; 2291 for (i = 1; i < nxfers; i++) { 2292 if (addr != xfers[i].addr) 2293 return -ENOTSUPP; 2294 } 2295 2296 i3c_bus_normaluse_lock(&master->bus); 2297 dev = i3c_master_find_i2c_dev_by_addr(master, addr); 2298 if (!dev) 2299 ret = -ENOENT; 2300 else 2301 ret = master->ops->i2c_xfers(dev, xfers, nxfers); 2302 i3c_bus_normaluse_unlock(&master->bus); 2303 2304 return ret ? ret : nxfers; 2305 } 2306 2307 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter) 2308 { 2309 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C; 2310 } 2311 2312 static u8 i3c_master_i2c_get_lvr(struct i2c_client *client) 2313 { 2314 /* Fall back to no spike filters and FM bus mode. */ 2315 u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE; 2316 2317 if (client->dev.of_node) { 2318 u32 reg[3]; 2319 2320 if (!of_property_read_u32_array(client->dev.of_node, "reg", 2321 reg, ARRAY_SIZE(reg))) 2322 lvr = reg[2]; 2323 } 2324 2325 return lvr; 2326 } 2327 2328 static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client) 2329 { 2330 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2331 enum i3c_addr_slot_status status; 2332 struct i2c_dev_desc *i2cdev; 2333 int ret; 2334 2335 /* Already added by board info? */ 2336 if (i3c_master_find_i2c_dev_by_addr(master, client->addr)) 2337 return 0; 2338 2339 status = i3c_bus_get_addr_slot_status(&master->bus, client->addr); 2340 if (status != I3C_ADDR_SLOT_FREE) 2341 return -EBUSY; 2342 2343 i3c_bus_set_addr_slot_status(&master->bus, client->addr, 2344 I3C_ADDR_SLOT_I2C_DEV); 2345 2346 i2cdev = i3c_master_alloc_i2c_dev(master, client->addr, 2347 i3c_master_i2c_get_lvr(client)); 2348 if (IS_ERR(i2cdev)) { 2349 ret = PTR_ERR(i2cdev); 2350 goto out_clear_status; 2351 } 2352 2353 ret = i3c_master_attach_i2c_dev(master, i2cdev); 2354 if (ret) 2355 goto out_free_dev; 2356 2357 return 0; 2358 2359 out_free_dev: 2360 i3c_master_free_i2c_dev(i2cdev); 2361 out_clear_status: 2362 i3c_bus_set_addr_slot_status(&master->bus, client->addr, 2363 I3C_ADDR_SLOT_FREE); 2364 2365 return ret; 2366 } 2367 2368 static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client) 2369 { 2370 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2371 struct i2c_dev_desc *dev; 2372 2373 dev = i3c_master_find_i2c_dev_by_addr(master, client->addr); 2374 if (!dev) 2375 return -ENODEV; 2376 2377 i3c_master_detach_i2c_dev(dev); 2378 i3c_bus_set_addr_slot_status(&master->bus, dev->addr, 2379 I3C_ADDR_SLOT_FREE); 2380 i3c_master_free_i2c_dev(dev); 2381 2382 return 0; 2383 } 2384 2385 static const struct i2c_algorithm i3c_master_i2c_algo = { 2386 .master_xfer = i3c_master_i2c_adapter_xfer, 2387 .functionality = i3c_master_i2c_funcs, 2388 }; 2389 2390 static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action, 2391 void *data) 2392 { 2393 struct i2c_adapter *adap; 2394 struct i2c_client *client; 2395 struct device *dev = data; 2396 struct i3c_master_controller *master; 2397 int ret; 2398 2399 if (dev->type != &i2c_client_type) 2400 return 0; 2401 2402 client = to_i2c_client(dev); 2403 adap = client->adapter; 2404 2405 if (adap->algo != &i3c_master_i2c_algo) 2406 return 0; 2407 2408 master = i2c_adapter_to_i3c_master(adap); 2409 2410 i3c_bus_maintenance_lock(&master->bus); 2411 switch (action) { 2412 case BUS_NOTIFY_ADD_DEVICE: 2413 ret = i3c_master_i2c_attach(adap, client); 2414 break; 2415 case BUS_NOTIFY_DEL_DEVICE: 2416 ret = i3c_master_i2c_detach(adap, client); 2417 break; 2418 } 2419 i3c_bus_maintenance_unlock(&master->bus); 2420 2421 return ret; 2422 } 2423 2424 static struct notifier_block i2cdev_notifier = { 2425 .notifier_call = i3c_i2c_notifier_call, 2426 }; 2427 2428 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master) 2429 { 2430 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master); 2431 struct i2c_dev_desc *i2cdev; 2432 struct i2c_dev_boardinfo *i2cboardinfo; 2433 int ret; 2434 2435 adap->dev.parent = master->dev.parent; 2436 adap->owner = master->dev.parent->driver->owner; 2437 adap->algo = &i3c_master_i2c_algo; 2438 strscpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name)); 2439 2440 /* FIXME: Should we allow i3c masters to override these values? */ 2441 adap->timeout = 1000; 2442 adap->retries = 3; 2443 2444 ret = i2c_add_adapter(adap); 2445 if (ret) 2446 return ret; 2447 2448 /* 2449 * We silently ignore failures here. The bus should keep working 2450 * correctly even if one or more i2c devices are not registered. 2451 */ 2452 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) { 2453 i2cdev = i3c_master_find_i2c_dev_by_addr(master, 2454 i2cboardinfo->base.addr); 2455 if (WARN_ON(!i2cdev)) 2456 continue; 2457 i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base); 2458 } 2459 2460 return 0; 2461 } 2462 2463 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master) 2464 { 2465 struct i2c_dev_desc *i2cdev; 2466 2467 i2c_del_adapter(&master->i2c); 2468 2469 i3c_bus_for_each_i2cdev(&master->bus, i2cdev) 2470 i2cdev->dev = NULL; 2471 } 2472 2473 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master) 2474 { 2475 struct i3c_dev_desc *i3cdev; 2476 2477 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 2478 if (!i3cdev->dev) 2479 continue; 2480 2481 i3cdev->dev->desc = NULL; 2482 if (device_is_registered(&i3cdev->dev->dev)) 2483 device_unregister(&i3cdev->dev->dev); 2484 else 2485 put_device(&i3cdev->dev->dev); 2486 i3cdev->dev = NULL; 2487 } 2488 } 2489 2490 /** 2491 * i3c_master_queue_ibi() - Queue an IBI 2492 * @dev: the device this IBI is coming from 2493 * @slot: the IBI slot used to store the payload 2494 * 2495 * Queue an IBI to the controller workqueue. The IBI handler attached to 2496 * the dev will be called from a workqueue context. 2497 */ 2498 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot) 2499 { 2500 atomic_inc(&dev->ibi->pending_ibis); 2501 queue_work(dev->ibi->wq, &slot->work); 2502 } 2503 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi); 2504 2505 static void i3c_master_handle_ibi(struct work_struct *work) 2506 { 2507 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot, 2508 work); 2509 struct i3c_dev_desc *dev = slot->dev; 2510 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2511 struct i3c_ibi_payload payload; 2512 2513 payload.data = slot->data; 2514 payload.len = slot->len; 2515 2516 if (dev->dev) 2517 dev->ibi->handler(dev->dev, &payload); 2518 2519 master->ops->recycle_ibi_slot(dev, slot); 2520 if (atomic_dec_and_test(&dev->ibi->pending_ibis)) 2521 complete(&dev->ibi->all_ibis_handled); 2522 } 2523 2524 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev, 2525 struct i3c_ibi_slot *slot) 2526 { 2527 slot->dev = dev; 2528 INIT_WORK(&slot->work, i3c_master_handle_ibi); 2529 } 2530 2531 struct i3c_generic_ibi_slot { 2532 struct list_head node; 2533 struct i3c_ibi_slot base; 2534 }; 2535 2536 struct i3c_generic_ibi_pool { 2537 spinlock_t lock; 2538 unsigned int num_slots; 2539 struct i3c_generic_ibi_slot *slots; 2540 void *payload_buf; 2541 struct list_head free_slots; 2542 struct list_head pending; 2543 }; 2544 2545 /** 2546 * i3c_generic_ibi_free_pool() - Free a generic IBI pool 2547 * @pool: the IBI pool to free 2548 * 2549 * Free all IBI slots allated by a generic IBI pool. 2550 */ 2551 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool) 2552 { 2553 struct i3c_generic_ibi_slot *slot; 2554 unsigned int nslots = 0; 2555 2556 while (!list_empty(&pool->free_slots)) { 2557 slot = list_first_entry(&pool->free_slots, 2558 struct i3c_generic_ibi_slot, node); 2559 list_del(&slot->node); 2560 nslots++; 2561 } 2562 2563 /* 2564 * If the number of freed slots is not equal to the number of allocated 2565 * slots we have a leak somewhere. 2566 */ 2567 WARN_ON(nslots != pool->num_slots); 2568 2569 kfree(pool->payload_buf); 2570 kfree(pool->slots); 2571 kfree(pool); 2572 } 2573 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool); 2574 2575 /** 2576 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool 2577 * @dev: the device this pool will be used for 2578 * @req: IBI setup request describing what the device driver expects 2579 * 2580 * Create a generic IBI pool based on the information provided in @req. 2581 * 2582 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise. 2583 */ 2584 struct i3c_generic_ibi_pool * 2585 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev, 2586 const struct i3c_ibi_setup *req) 2587 { 2588 struct i3c_generic_ibi_pool *pool; 2589 struct i3c_generic_ibi_slot *slot; 2590 unsigned int i; 2591 int ret; 2592 2593 pool = kzalloc(sizeof(*pool), GFP_KERNEL); 2594 if (!pool) 2595 return ERR_PTR(-ENOMEM); 2596 2597 spin_lock_init(&pool->lock); 2598 INIT_LIST_HEAD(&pool->free_slots); 2599 INIT_LIST_HEAD(&pool->pending); 2600 2601 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL); 2602 if (!pool->slots) { 2603 ret = -ENOMEM; 2604 goto err_free_pool; 2605 } 2606 2607 if (req->max_payload_len) { 2608 pool->payload_buf = kcalloc(req->num_slots, 2609 req->max_payload_len, GFP_KERNEL); 2610 if (!pool->payload_buf) { 2611 ret = -ENOMEM; 2612 goto err_free_pool; 2613 } 2614 } 2615 2616 for (i = 0; i < req->num_slots; i++) { 2617 slot = &pool->slots[i]; 2618 i3c_master_init_ibi_slot(dev, &slot->base); 2619 2620 if (req->max_payload_len) 2621 slot->base.data = pool->payload_buf + 2622 (i * req->max_payload_len); 2623 2624 list_add_tail(&slot->node, &pool->free_slots); 2625 pool->num_slots++; 2626 } 2627 2628 return pool; 2629 2630 err_free_pool: 2631 i3c_generic_ibi_free_pool(pool); 2632 return ERR_PTR(ret); 2633 } 2634 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool); 2635 2636 /** 2637 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool 2638 * @pool: the pool to query an IBI slot on 2639 * 2640 * Search for a free slot in a generic IBI pool. 2641 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot() 2642 * when it's no longer needed. 2643 * 2644 * Return: a pointer to a free slot, or NULL if there's no free slot available. 2645 */ 2646 struct i3c_ibi_slot * 2647 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool) 2648 { 2649 struct i3c_generic_ibi_slot *slot; 2650 unsigned long flags; 2651 2652 spin_lock_irqsave(&pool->lock, flags); 2653 slot = list_first_entry_or_null(&pool->free_slots, 2654 struct i3c_generic_ibi_slot, node); 2655 if (slot) 2656 list_del(&slot->node); 2657 spin_unlock_irqrestore(&pool->lock, flags); 2658 2659 return slot ? &slot->base : NULL; 2660 } 2661 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot); 2662 2663 /** 2664 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool 2665 * @pool: the pool to return the IBI slot to 2666 * @s: IBI slot to recycle 2667 * 2668 * Add an IBI slot back to its generic IBI pool. Should be called from the 2669 * master driver struct_master_controller_ops->recycle_ibi() method. 2670 */ 2671 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool, 2672 struct i3c_ibi_slot *s) 2673 { 2674 struct i3c_generic_ibi_slot *slot; 2675 unsigned long flags; 2676 2677 if (!s) 2678 return; 2679 2680 slot = container_of(s, struct i3c_generic_ibi_slot, base); 2681 spin_lock_irqsave(&pool->lock, flags); 2682 list_add_tail(&slot->node, &pool->free_slots); 2683 spin_unlock_irqrestore(&pool->lock, flags); 2684 } 2685 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot); 2686 2687 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops) 2688 { 2689 if (!ops || !ops->bus_init || !ops->priv_xfers || 2690 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers) 2691 return -EINVAL; 2692 2693 if (ops->request_ibi && 2694 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi || 2695 !ops->recycle_ibi_slot)) 2696 return -EINVAL; 2697 2698 return 0; 2699 } 2700 2701 /** 2702 * i3c_master_register() - register an I3C master 2703 * @master: master used to send frames on the bus 2704 * @parent: the parent device (the one that provides this I3C master 2705 * controller) 2706 * @ops: the master controller operations 2707 * @secondary: true if you are registering a secondary master. Will return 2708 * -ENOTSUPP if set to true since secondary masters are not yet 2709 * supported 2710 * 2711 * This function takes care of everything for you: 2712 * 2713 * - creates and initializes the I3C bus 2714 * - populates the bus with static I2C devs if @parent->of_node is not 2715 * NULL 2716 * - registers all I3C devices added by the controller during bus 2717 * initialization 2718 * - registers the I2C adapter and all I2C devices 2719 * 2720 * Return: 0 in case of success, a negative error code otherwise. 2721 */ 2722 int i3c_master_register(struct i3c_master_controller *master, 2723 struct device *parent, 2724 const struct i3c_master_controller_ops *ops, 2725 bool secondary) 2726 { 2727 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE; 2728 struct i3c_bus *i3cbus = i3c_master_get_bus(master); 2729 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE; 2730 struct i2c_dev_boardinfo *i2cbi; 2731 int ret; 2732 2733 /* We do not support secondary masters yet. */ 2734 if (secondary) 2735 return -ENOTSUPP; 2736 2737 ret = i3c_master_check_ops(ops); 2738 if (ret) 2739 return ret; 2740 2741 master->dev.parent = parent; 2742 master->dev.of_node = of_node_get(parent->of_node); 2743 master->dev.bus = &i3c_bus_type; 2744 master->dev.type = &i3c_masterdev_type; 2745 master->dev.release = i3c_masterdev_release; 2746 master->ops = ops; 2747 master->secondary = secondary; 2748 INIT_LIST_HEAD(&master->boardinfo.i2c); 2749 INIT_LIST_HEAD(&master->boardinfo.i3c); 2750 2751 ret = i3c_bus_init(i3cbus, master->dev.of_node); 2752 if (ret) 2753 return ret; 2754 2755 device_initialize(&master->dev); 2756 dev_set_name(&master->dev, "i3c-%d", i3cbus->id); 2757 2758 master->dev.dma_mask = parent->dma_mask; 2759 master->dev.coherent_dma_mask = parent->coherent_dma_mask; 2760 master->dev.dma_parms = parent->dma_parms; 2761 2762 ret = of_populate_i3c_bus(master); 2763 if (ret) 2764 goto err_put_dev; 2765 2766 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) { 2767 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) { 2768 case I3C_LVR_I2C_INDEX(0): 2769 if (mode < I3C_BUS_MODE_MIXED_FAST) 2770 mode = I3C_BUS_MODE_MIXED_FAST; 2771 break; 2772 case I3C_LVR_I2C_INDEX(1): 2773 if (mode < I3C_BUS_MODE_MIXED_LIMITED) 2774 mode = I3C_BUS_MODE_MIXED_LIMITED; 2775 break; 2776 case I3C_LVR_I2C_INDEX(2): 2777 if (mode < I3C_BUS_MODE_MIXED_SLOW) 2778 mode = I3C_BUS_MODE_MIXED_SLOW; 2779 break; 2780 default: 2781 ret = -EINVAL; 2782 goto err_put_dev; 2783 } 2784 2785 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE) 2786 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE; 2787 } 2788 2789 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate); 2790 if (ret) 2791 goto err_put_dev; 2792 2793 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent)); 2794 if (!master->wq) { 2795 ret = -ENOMEM; 2796 goto err_put_dev; 2797 } 2798 2799 ret = i3c_master_bus_init(master); 2800 if (ret) 2801 goto err_put_dev; 2802 2803 ret = device_add(&master->dev); 2804 if (ret) 2805 goto err_cleanup_bus; 2806 2807 /* 2808 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed 2809 * through the I2C subsystem. 2810 */ 2811 ret = i3c_master_i2c_adapter_init(master); 2812 if (ret) 2813 goto err_del_dev; 2814 2815 i3c_bus_notify(i3cbus, I3C_NOTIFY_BUS_ADD); 2816 2817 pm_runtime_no_callbacks(&master->dev); 2818 pm_suspend_ignore_children(&master->dev, true); 2819 pm_runtime_enable(&master->dev); 2820 2821 /* 2822 * We're done initializing the bus and the controller, we can now 2823 * register I3C devices discovered during the initial DAA. 2824 */ 2825 master->init_done = true; 2826 i3c_bus_normaluse_lock(&master->bus); 2827 i3c_master_register_new_i3c_devs(master); 2828 i3c_bus_normaluse_unlock(&master->bus); 2829 2830 return 0; 2831 2832 err_del_dev: 2833 device_del(&master->dev); 2834 2835 err_cleanup_bus: 2836 i3c_master_bus_cleanup(master); 2837 2838 err_put_dev: 2839 put_device(&master->dev); 2840 2841 return ret; 2842 } 2843 EXPORT_SYMBOL_GPL(i3c_master_register); 2844 2845 /** 2846 * i3c_master_unregister() - unregister an I3C master 2847 * @master: master used to send frames on the bus 2848 * 2849 * Basically undo everything done in i3c_master_register(). 2850 */ 2851 void i3c_master_unregister(struct i3c_master_controller *master) 2852 { 2853 i3c_bus_notify(&master->bus, I3C_NOTIFY_BUS_REMOVE); 2854 2855 i3c_master_i2c_adapter_cleanup(master); 2856 i3c_master_unregister_i3c_devs(master); 2857 i3c_master_bus_cleanup(master); 2858 pm_runtime_disable(&master->dev); 2859 device_unregister(&master->dev); 2860 } 2861 EXPORT_SYMBOL_GPL(i3c_master_unregister); 2862 2863 int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev) 2864 { 2865 struct i3c_master_controller *master; 2866 2867 if (!dev) 2868 return -ENOENT; 2869 2870 master = i3c_dev_get_master(dev); 2871 if (!master) 2872 return -EINVAL; 2873 2874 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr || 2875 !dev->boardinfo->static_addr) 2876 return -EINVAL; 2877 2878 return i3c_master_setdasa_locked(master, dev->info.static_addr, 2879 dev->boardinfo->init_dyn_addr); 2880 } 2881 2882 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev, 2883 struct i3c_priv_xfer *xfers, 2884 int nxfers) 2885 { 2886 struct i3c_master_controller *master; 2887 2888 if (!dev) 2889 return -ENOENT; 2890 2891 master = i3c_dev_get_master(dev); 2892 if (!master || !xfers) 2893 return -EINVAL; 2894 2895 if (!master->ops->priv_xfers) 2896 return -ENOTSUPP; 2897 2898 return master->ops->priv_xfers(dev, xfers, nxfers); 2899 } 2900 2901 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev) 2902 { 2903 struct i3c_master_controller *master; 2904 int ret; 2905 2906 if (!dev->ibi) 2907 return -EINVAL; 2908 2909 master = i3c_dev_get_master(dev); 2910 ret = master->ops->disable_ibi(dev); 2911 if (ret) 2912 return ret; 2913 2914 reinit_completion(&dev->ibi->all_ibis_handled); 2915 if (atomic_read(&dev->ibi->pending_ibis)) 2916 wait_for_completion(&dev->ibi->all_ibis_handled); 2917 2918 dev->ibi->enabled = false; 2919 2920 return 0; 2921 } 2922 2923 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev) 2924 { 2925 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2926 int ret; 2927 2928 if (!dev->ibi) 2929 return -EINVAL; 2930 2931 ret = master->ops->enable_ibi(dev); 2932 if (!ret) 2933 dev->ibi->enabled = true; 2934 2935 return ret; 2936 } 2937 2938 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev, 2939 const struct i3c_ibi_setup *req) 2940 { 2941 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2942 struct i3c_device_ibi_info *ibi; 2943 int ret; 2944 2945 if (!master->ops->request_ibi) 2946 return -ENOTSUPP; 2947 2948 if (dev->ibi) 2949 return -EBUSY; 2950 2951 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL); 2952 if (!ibi) 2953 return -ENOMEM; 2954 2955 ibi->wq = alloc_ordered_workqueue(dev_name(i3cdev_to_dev(dev->dev)), WQ_MEM_RECLAIM); 2956 if (!ibi->wq) { 2957 kfree(ibi); 2958 return -ENOMEM; 2959 } 2960 2961 atomic_set(&ibi->pending_ibis, 0); 2962 init_completion(&ibi->all_ibis_handled); 2963 ibi->handler = req->handler; 2964 ibi->max_payload_len = req->max_payload_len; 2965 ibi->num_slots = req->num_slots; 2966 2967 dev->ibi = ibi; 2968 ret = master->ops->request_ibi(dev, req); 2969 if (ret) { 2970 kfree(ibi); 2971 dev->ibi = NULL; 2972 } 2973 2974 return ret; 2975 } 2976 2977 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev) 2978 { 2979 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2980 2981 if (!dev->ibi) 2982 return; 2983 2984 if (WARN_ON(dev->ibi->enabled)) 2985 WARN_ON(i3c_dev_disable_ibi_locked(dev)); 2986 2987 master->ops->free_ibi(dev); 2988 2989 if (dev->ibi->wq) { 2990 destroy_workqueue(dev->ibi->wq); 2991 dev->ibi->wq = NULL; 2992 } 2993 2994 kfree(dev->ibi); 2995 dev->ibi = NULL; 2996 } 2997 2998 static int __init i3c_init(void) 2999 { 3000 int res; 3001 3002 res = of_alias_get_highest_id("i3c"); 3003 if (res >= 0) { 3004 mutex_lock(&i3c_core_lock); 3005 __i3c_first_dynamic_bus_num = res + 1; 3006 mutex_unlock(&i3c_core_lock); 3007 } 3008 3009 res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier); 3010 if (res) 3011 return res; 3012 3013 res = bus_register(&i3c_bus_type); 3014 if (res) 3015 goto out_unreg_notifier; 3016 3017 return 0; 3018 3019 out_unreg_notifier: 3020 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier); 3021 3022 return res; 3023 } 3024 subsys_initcall(i3c_init); 3025 3026 static void __exit i3c_exit(void) 3027 { 3028 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier); 3029 idr_destroy(&i3c_bus_idr); 3030 bus_unregister(&i3c_bus_type); 3031 } 3032 module_exit(i3c_exit); 3033 3034 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>"); 3035 MODULE_DESCRIPTION("I3C core"); 3036 MODULE_LICENSE("GPL v2"); 3037