1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 Cadence Design Systems Inc. 4 * 5 * Author: Boris Brezillon <boris.brezillon@bootlin.com> 6 */ 7 8 #include <linux/atomic.h> 9 #include <linux/bug.h> 10 #include <linux/device.h> 11 #include <linux/dma-mapping.h> 12 #include <linux/err.h> 13 #include <linux/export.h> 14 #include <linux/kernel.h> 15 #include <linux/list.h> 16 #include <linux/of.h> 17 #include <linux/pm_runtime.h> 18 #include <linux/slab.h> 19 #include <linux/spinlock.h> 20 #include <linux/workqueue.h> 21 22 #include "internals.h" 23 24 static DEFINE_IDR(i3c_bus_idr); 25 static DEFINE_MUTEX(i3c_core_lock); 26 static int __i3c_first_dynamic_bus_num; 27 static BLOCKING_NOTIFIER_HEAD(i3c_bus_notifier); 28 29 /** 30 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation 31 * @bus: I3C bus to take the lock on 32 * 33 * This function takes the bus lock so that no other operations can occur on 34 * the bus. This is needed for all kind of bus maintenance operation, like 35 * - enabling/disabling slave events 36 * - re-triggering DAA 37 * - changing the dynamic address of a device 38 * - relinquishing mastership 39 * - ... 40 * 41 * The reason for this kind of locking is that we don't want drivers and core 42 * logic to rely on I3C device information that could be changed behind their 43 * back. 44 */ 45 static void i3c_bus_maintenance_lock(struct i3c_bus *bus) 46 { 47 down_write(&bus->lock); 48 } 49 50 /** 51 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance 52 * operation 53 * @bus: I3C bus to release the lock on 54 * 55 * Should be called when the bus maintenance operation is done. See 56 * i3c_bus_maintenance_lock() for more details on what these maintenance 57 * operations are. 58 */ 59 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus) 60 { 61 up_write(&bus->lock); 62 } 63 64 /** 65 * i3c_bus_normaluse_lock - Lock the bus for a normal operation 66 * @bus: I3C bus to take the lock on 67 * 68 * This function takes the bus lock for any operation that is not a maintenance 69 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of 70 * maintenance operations). Basically all communications with I3C devices are 71 * normal operations (HDR, SDR transfers or CCC commands that do not change bus 72 * state or I3C dynamic address). 73 * 74 * Note that this lock is not guaranteeing serialization of normal operations. 75 * In other words, transfer requests passed to the I3C master can be submitted 76 * in parallel and I3C master drivers have to use their own locking to make 77 * sure two different communications are not inter-mixed, or access to the 78 * output/input queue is not done while the engine is busy. 79 */ 80 void i3c_bus_normaluse_lock(struct i3c_bus *bus) 81 { 82 down_read(&bus->lock); 83 } 84 85 /** 86 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation 87 * @bus: I3C bus to release the lock on 88 * 89 * Should be called when a normal operation is done. See 90 * i3c_bus_normaluse_lock() for more details on what these normal operations 91 * are. 92 */ 93 void i3c_bus_normaluse_unlock(struct i3c_bus *bus) 94 { 95 up_read(&bus->lock); 96 } 97 98 static struct i3c_master_controller * 99 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus) 100 { 101 return container_of(i3cbus, struct i3c_master_controller, bus); 102 } 103 104 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev) 105 { 106 return container_of(dev, struct i3c_master_controller, dev); 107 } 108 109 static const struct device_type i3c_device_type; 110 111 static struct i3c_bus *dev_to_i3cbus(struct device *dev) 112 { 113 struct i3c_master_controller *master; 114 115 if (dev->type == &i3c_device_type) 116 return dev_to_i3cdev(dev)->bus; 117 118 master = dev_to_i3cmaster(dev); 119 120 return &master->bus; 121 } 122 123 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev) 124 { 125 struct i3c_master_controller *master; 126 127 if (dev->type == &i3c_device_type) 128 return dev_to_i3cdev(dev)->desc; 129 130 master = dev_to_i3cmaster(dev); 131 132 return master->this; 133 } 134 135 static ssize_t bcr_show(struct device *dev, 136 struct device_attribute *da, 137 char *buf) 138 { 139 struct i3c_bus *bus = dev_to_i3cbus(dev); 140 struct i3c_dev_desc *desc; 141 ssize_t ret; 142 143 i3c_bus_normaluse_lock(bus); 144 desc = dev_to_i3cdesc(dev); 145 ret = sprintf(buf, "0x%02x\n", desc->info.bcr); 146 i3c_bus_normaluse_unlock(bus); 147 148 return ret; 149 } 150 static DEVICE_ATTR_RO(bcr); 151 152 static ssize_t dcr_show(struct device *dev, 153 struct device_attribute *da, 154 char *buf) 155 { 156 struct i3c_bus *bus = dev_to_i3cbus(dev); 157 struct i3c_dev_desc *desc; 158 ssize_t ret; 159 160 i3c_bus_normaluse_lock(bus); 161 desc = dev_to_i3cdesc(dev); 162 ret = sprintf(buf, "0x%02x\n", desc->info.dcr); 163 i3c_bus_normaluse_unlock(bus); 164 165 return ret; 166 } 167 static DEVICE_ATTR_RO(dcr); 168 169 static ssize_t pid_show(struct device *dev, 170 struct device_attribute *da, 171 char *buf) 172 { 173 struct i3c_bus *bus = dev_to_i3cbus(dev); 174 struct i3c_dev_desc *desc; 175 ssize_t ret; 176 177 i3c_bus_normaluse_lock(bus); 178 desc = dev_to_i3cdesc(dev); 179 ret = sprintf(buf, "%llx\n", desc->info.pid); 180 i3c_bus_normaluse_unlock(bus); 181 182 return ret; 183 } 184 static DEVICE_ATTR_RO(pid); 185 186 static ssize_t dynamic_address_show(struct device *dev, 187 struct device_attribute *da, 188 char *buf) 189 { 190 struct i3c_bus *bus = dev_to_i3cbus(dev); 191 struct i3c_dev_desc *desc; 192 ssize_t ret; 193 194 i3c_bus_normaluse_lock(bus); 195 desc = dev_to_i3cdesc(dev); 196 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr); 197 i3c_bus_normaluse_unlock(bus); 198 199 return ret; 200 } 201 static DEVICE_ATTR_RO(dynamic_address); 202 203 static const char * const hdrcap_strings[] = { 204 "hdr-ddr", "hdr-tsp", "hdr-tsl", 205 }; 206 207 static ssize_t hdrcap_show(struct device *dev, 208 struct device_attribute *da, 209 char *buf) 210 { 211 struct i3c_bus *bus = dev_to_i3cbus(dev); 212 struct i3c_dev_desc *desc; 213 ssize_t offset = 0, ret; 214 unsigned long caps; 215 int mode; 216 217 i3c_bus_normaluse_lock(bus); 218 desc = dev_to_i3cdesc(dev); 219 caps = desc->info.hdr_cap; 220 for_each_set_bit(mode, &caps, 8) { 221 if (mode >= ARRAY_SIZE(hdrcap_strings)) 222 break; 223 224 if (!hdrcap_strings[mode]) 225 continue; 226 227 ret = sprintf(buf + offset, offset ? " %s" : "%s", 228 hdrcap_strings[mode]); 229 if (ret < 0) 230 goto out; 231 232 offset += ret; 233 } 234 235 ret = sprintf(buf + offset, "\n"); 236 if (ret < 0) 237 goto out; 238 239 ret = offset + ret; 240 241 out: 242 i3c_bus_normaluse_unlock(bus); 243 244 return ret; 245 } 246 static DEVICE_ATTR_RO(hdrcap); 247 248 static ssize_t modalias_show(struct device *dev, 249 struct device_attribute *da, char *buf) 250 { 251 struct i3c_device *i3c = dev_to_i3cdev(dev); 252 struct i3c_device_info devinfo; 253 u16 manuf, part, ext; 254 255 i3c_device_get_info(i3c, &devinfo); 256 manuf = I3C_PID_MANUF_ID(devinfo.pid); 257 part = I3C_PID_PART_ID(devinfo.pid); 258 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 259 260 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 261 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr, 262 manuf); 263 264 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 265 devinfo.dcr, manuf, part, ext); 266 } 267 static DEVICE_ATTR_RO(modalias); 268 269 static struct attribute *i3c_device_attrs[] = { 270 &dev_attr_bcr.attr, 271 &dev_attr_dcr.attr, 272 &dev_attr_pid.attr, 273 &dev_attr_dynamic_address.attr, 274 &dev_attr_hdrcap.attr, 275 &dev_attr_modalias.attr, 276 NULL, 277 }; 278 ATTRIBUTE_GROUPS(i3c_device); 279 280 static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env) 281 { 282 const struct i3c_device *i3cdev = dev_to_i3cdev(dev); 283 struct i3c_device_info devinfo; 284 u16 manuf, part, ext; 285 286 if (i3cdev->desc) 287 devinfo = i3cdev->desc->info; 288 manuf = I3C_PID_MANUF_ID(devinfo.pid); 289 part = I3C_PID_PART_ID(devinfo.pid); 290 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 291 292 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 293 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X", 294 devinfo.dcr, manuf); 295 296 return add_uevent_var(env, 297 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 298 devinfo.dcr, manuf, part, ext); 299 } 300 301 static const struct device_type i3c_device_type = { 302 .groups = i3c_device_groups, 303 .uevent = i3c_device_uevent, 304 }; 305 306 static int i3c_device_match(struct device *dev, const struct device_driver *drv) 307 { 308 struct i3c_device *i3cdev; 309 const struct i3c_driver *i3cdrv; 310 311 if (dev->type != &i3c_device_type) 312 return 0; 313 314 i3cdev = dev_to_i3cdev(dev); 315 i3cdrv = drv_to_i3cdrv(drv); 316 if (i3c_device_match_id(i3cdev, i3cdrv->id_table)) 317 return 1; 318 319 return 0; 320 } 321 322 static int i3c_device_probe(struct device *dev) 323 { 324 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 325 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 326 327 return driver->probe(i3cdev); 328 } 329 330 static void i3c_device_remove(struct device *dev) 331 { 332 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 333 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 334 335 if (driver->remove) 336 driver->remove(i3cdev); 337 338 i3c_device_free_ibi(i3cdev); 339 } 340 341 const struct bus_type i3c_bus_type = { 342 .name = "i3c", 343 .match = i3c_device_match, 344 .probe = i3c_device_probe, 345 .remove = i3c_device_remove, 346 }; 347 EXPORT_SYMBOL_GPL(i3c_bus_type); 348 349 static enum i3c_addr_slot_status 350 i3c_bus_get_addr_slot_status_mask(struct i3c_bus *bus, u16 addr, u32 mask) 351 { 352 unsigned long status; 353 int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS; 354 355 if (addr > I2C_MAX_ADDR) 356 return I3C_ADDR_SLOT_RSVD; 357 358 status = bus->addrslots[bitpos / BITS_PER_LONG]; 359 status >>= bitpos % BITS_PER_LONG; 360 361 return status & mask; 362 } 363 364 static enum i3c_addr_slot_status 365 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr) 366 { 367 return i3c_bus_get_addr_slot_status_mask(bus, addr, I3C_ADDR_SLOT_STATUS_MASK); 368 } 369 370 static void i3c_bus_set_addr_slot_status_mask(struct i3c_bus *bus, u16 addr, 371 enum i3c_addr_slot_status status, u32 mask) 372 { 373 int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS; 374 unsigned long *ptr; 375 376 if (addr > I2C_MAX_ADDR) 377 return; 378 379 ptr = bus->addrslots + (bitpos / BITS_PER_LONG); 380 *ptr &= ~((unsigned long)mask << (bitpos % BITS_PER_LONG)); 381 *ptr |= ((unsigned long)status & mask) << (bitpos % BITS_PER_LONG); 382 } 383 384 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr, 385 enum i3c_addr_slot_status status) 386 { 387 i3c_bus_set_addr_slot_status_mask(bus, addr, status, I3C_ADDR_SLOT_STATUS_MASK); 388 } 389 390 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr) 391 { 392 enum i3c_addr_slot_status status; 393 394 status = i3c_bus_get_addr_slot_status(bus, addr); 395 396 return status == I3C_ADDR_SLOT_FREE; 397 } 398 399 /* 400 * ┌────┬─────────────┬───┬─────────┬───┐ 401 * │S/Sr│ 7'h7E RnW=0 │ACK│ ENTDAA │ T ├────┐ 402 * └────┴─────────────┴───┴─────────┴───┘ │ 403 * ┌─────────────────────────────────────────┘ 404 * │ ┌──┬─────────────┬───┬─────────────────┬────────────────┬───┬─────────┐ 405 * └─►│Sr│7'h7E RnW=1 │ACK│48bit UID BCR DCR│Assign 7bit Addr│PAR│ ACK/NACK│ 406 * └──┴─────────────┴───┴─────────────────┴────────────────┴───┴─────────┘ 407 * Some master controllers (such as HCI) need to prepare the entire above transaction before 408 * sending it out to the I3C bus. This means that a 7-bit dynamic address needs to be allocated 409 * before knowing the target device's UID information. 410 * 411 * However, some I3C targets may request specific addresses (called as "init_dyn_addr"), which is 412 * typically specified by the DT-'s assigned-address property. Lower addresses having higher IBI 413 * priority. If it is available, i3c_bus_get_free_addr() preferably return a free address that is 414 * not in the list of desired addresses (called as "init_dyn_addr"). This allows the device with 415 * the "init_dyn_addr" to switch to its "init_dyn_addr" when it hot-joins the I3C bus. Otherwise, 416 * if the "init_dyn_addr" is already in use by another I3C device, the target device will not be 417 * able to switch to its desired address. 418 * 419 * If the previous step fails, fallback returning one of the remaining unassigned address, 420 * regardless of its state in the desired list. 421 */ 422 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr) 423 { 424 enum i3c_addr_slot_status status; 425 u8 addr; 426 427 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) { 428 status = i3c_bus_get_addr_slot_status_mask(bus, addr, 429 I3C_ADDR_SLOT_EXT_STATUS_MASK); 430 if (status == I3C_ADDR_SLOT_FREE) 431 return addr; 432 } 433 434 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) { 435 status = i3c_bus_get_addr_slot_status_mask(bus, addr, 436 I3C_ADDR_SLOT_STATUS_MASK); 437 if (status == I3C_ADDR_SLOT_FREE) 438 return addr; 439 } 440 441 return -ENOMEM; 442 } 443 444 static void i3c_bus_init_addrslots(struct i3c_bus *bus) 445 { 446 int i; 447 448 /* Addresses 0 to 7 are reserved. */ 449 for (i = 0; i < 8; i++) 450 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD); 451 452 /* 453 * Reserve broadcast address and all addresses that might collide 454 * with the broadcast address when facing a single bit error. 455 */ 456 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR, 457 I3C_ADDR_SLOT_RSVD); 458 for (i = 0; i < 7; i++) 459 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i), 460 I3C_ADDR_SLOT_RSVD); 461 } 462 463 static void i3c_bus_cleanup(struct i3c_bus *i3cbus) 464 { 465 mutex_lock(&i3c_core_lock); 466 idr_remove(&i3c_bus_idr, i3cbus->id); 467 mutex_unlock(&i3c_core_lock); 468 } 469 470 static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np) 471 { 472 int ret, start, end, id = -1; 473 474 init_rwsem(&i3cbus->lock); 475 INIT_LIST_HEAD(&i3cbus->devs.i2c); 476 INIT_LIST_HEAD(&i3cbus->devs.i3c); 477 i3c_bus_init_addrslots(i3cbus); 478 i3cbus->mode = I3C_BUS_MODE_PURE; 479 480 if (np) 481 id = of_alias_get_id(np, "i3c"); 482 483 mutex_lock(&i3c_core_lock); 484 if (id >= 0) { 485 start = id; 486 end = start + 1; 487 } else { 488 start = __i3c_first_dynamic_bus_num; 489 end = 0; 490 } 491 492 ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL); 493 mutex_unlock(&i3c_core_lock); 494 495 if (ret < 0) 496 return ret; 497 498 i3cbus->id = ret; 499 500 return 0; 501 } 502 503 void i3c_for_each_bus_locked(int (*fn)(struct i3c_bus *bus, void *data), 504 void *data) 505 { 506 struct i3c_bus *bus; 507 int id; 508 509 mutex_lock(&i3c_core_lock); 510 idr_for_each_entry(&i3c_bus_idr, bus, id) 511 fn(bus, data); 512 mutex_unlock(&i3c_core_lock); 513 } 514 EXPORT_SYMBOL_GPL(i3c_for_each_bus_locked); 515 516 int i3c_register_notifier(struct notifier_block *nb) 517 { 518 return blocking_notifier_chain_register(&i3c_bus_notifier, nb); 519 } 520 EXPORT_SYMBOL_GPL(i3c_register_notifier); 521 522 int i3c_unregister_notifier(struct notifier_block *nb) 523 { 524 return blocking_notifier_chain_unregister(&i3c_bus_notifier, nb); 525 } 526 EXPORT_SYMBOL_GPL(i3c_unregister_notifier); 527 528 static void i3c_bus_notify(struct i3c_bus *bus, unsigned int action) 529 { 530 blocking_notifier_call_chain(&i3c_bus_notifier, action, bus); 531 } 532 533 static const char * const i3c_bus_mode_strings[] = { 534 [I3C_BUS_MODE_PURE] = "pure", 535 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast", 536 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited", 537 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow", 538 }; 539 540 static ssize_t mode_show(struct device *dev, 541 struct device_attribute *da, 542 char *buf) 543 { 544 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 545 ssize_t ret; 546 547 i3c_bus_normaluse_lock(i3cbus); 548 if (i3cbus->mode < 0 || 549 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) || 550 !i3c_bus_mode_strings[i3cbus->mode]) 551 ret = sprintf(buf, "unknown\n"); 552 else 553 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]); 554 i3c_bus_normaluse_unlock(i3cbus); 555 556 return ret; 557 } 558 static DEVICE_ATTR_RO(mode); 559 560 static ssize_t current_master_show(struct device *dev, 561 struct device_attribute *da, 562 char *buf) 563 { 564 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 565 ssize_t ret; 566 567 i3c_bus_normaluse_lock(i3cbus); 568 ret = sprintf(buf, "%d-%llx\n", i3cbus->id, 569 i3cbus->cur_master->info.pid); 570 i3c_bus_normaluse_unlock(i3cbus); 571 572 return ret; 573 } 574 static DEVICE_ATTR_RO(current_master); 575 576 static ssize_t i3c_scl_frequency_show(struct device *dev, 577 struct device_attribute *da, 578 char *buf) 579 { 580 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 581 ssize_t ret; 582 583 i3c_bus_normaluse_lock(i3cbus); 584 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c); 585 i3c_bus_normaluse_unlock(i3cbus); 586 587 return ret; 588 } 589 static DEVICE_ATTR_RO(i3c_scl_frequency); 590 591 static ssize_t i2c_scl_frequency_show(struct device *dev, 592 struct device_attribute *da, 593 char *buf) 594 { 595 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 596 ssize_t ret; 597 598 i3c_bus_normaluse_lock(i3cbus); 599 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c); 600 i3c_bus_normaluse_unlock(i3cbus); 601 602 return ret; 603 } 604 static DEVICE_ATTR_RO(i2c_scl_frequency); 605 606 static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable) 607 { 608 int ret; 609 610 if (!master || !master->ops) 611 return -EINVAL; 612 613 if (!master->ops->enable_hotjoin || !master->ops->disable_hotjoin) 614 return -EINVAL; 615 616 i3c_bus_normaluse_lock(&master->bus); 617 618 if (enable) 619 ret = master->ops->enable_hotjoin(master); 620 else 621 ret = master->ops->disable_hotjoin(master); 622 623 master->hotjoin = enable; 624 625 i3c_bus_normaluse_unlock(&master->bus); 626 627 return ret; 628 } 629 630 static ssize_t hotjoin_store(struct device *dev, struct device_attribute *attr, 631 const char *buf, size_t count) 632 { 633 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 634 int ret; 635 bool res; 636 637 if (!i3cbus->cur_master) 638 return -EINVAL; 639 640 if (kstrtobool(buf, &res)) 641 return -EINVAL; 642 643 ret = i3c_set_hotjoin(i3cbus->cur_master->common.master, res); 644 if (ret) 645 return ret; 646 647 return count; 648 } 649 650 /* 651 * i3c_master_enable_hotjoin - Enable hotjoin 652 * @master: I3C master object 653 * 654 * Return: a 0 in case of success, an negative error code otherwise. 655 */ 656 int i3c_master_enable_hotjoin(struct i3c_master_controller *master) 657 { 658 return i3c_set_hotjoin(master, true); 659 } 660 EXPORT_SYMBOL_GPL(i3c_master_enable_hotjoin); 661 662 /* 663 * i3c_master_disable_hotjoin - Disable hotjoin 664 * @master: I3C master object 665 * 666 * Return: a 0 in case of success, an negative error code otherwise. 667 */ 668 int i3c_master_disable_hotjoin(struct i3c_master_controller *master) 669 { 670 return i3c_set_hotjoin(master, false); 671 } 672 EXPORT_SYMBOL_GPL(i3c_master_disable_hotjoin); 673 674 static ssize_t hotjoin_show(struct device *dev, struct device_attribute *da, char *buf) 675 { 676 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 677 ssize_t ret; 678 679 i3c_bus_normaluse_lock(i3cbus); 680 ret = sysfs_emit(buf, "%d\n", i3cbus->cur_master->common.master->hotjoin); 681 i3c_bus_normaluse_unlock(i3cbus); 682 683 return ret; 684 } 685 686 static DEVICE_ATTR_RW(hotjoin); 687 688 static struct attribute *i3c_masterdev_attrs[] = { 689 &dev_attr_mode.attr, 690 &dev_attr_current_master.attr, 691 &dev_attr_i3c_scl_frequency.attr, 692 &dev_attr_i2c_scl_frequency.attr, 693 &dev_attr_bcr.attr, 694 &dev_attr_dcr.attr, 695 &dev_attr_pid.attr, 696 &dev_attr_dynamic_address.attr, 697 &dev_attr_hdrcap.attr, 698 &dev_attr_hotjoin.attr, 699 NULL, 700 }; 701 ATTRIBUTE_GROUPS(i3c_masterdev); 702 703 static void i3c_masterdev_release(struct device *dev) 704 { 705 struct i3c_master_controller *master = dev_to_i3cmaster(dev); 706 struct i3c_bus *bus = dev_to_i3cbus(dev); 707 708 if (master->wq) 709 destroy_workqueue(master->wq); 710 711 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c)); 712 i3c_bus_cleanup(bus); 713 714 of_node_put(dev->of_node); 715 } 716 717 static const struct device_type i3c_masterdev_type = { 718 .groups = i3c_masterdev_groups, 719 }; 720 721 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode, 722 unsigned long max_i2c_scl_rate) 723 { 724 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus); 725 726 i3cbus->mode = mode; 727 728 switch (i3cbus->mode) { 729 case I3C_BUS_MODE_PURE: 730 if (!i3cbus->scl_rate.i3c) 731 i3cbus->scl_rate.i3c = I3C_BUS_I3C_SCL_TYP_RATE; 732 break; 733 case I3C_BUS_MODE_MIXED_FAST: 734 case I3C_BUS_MODE_MIXED_LIMITED: 735 if (!i3cbus->scl_rate.i3c) 736 i3cbus->scl_rate.i3c = I3C_BUS_I3C_SCL_TYP_RATE; 737 if (!i3cbus->scl_rate.i2c) 738 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 739 break; 740 case I3C_BUS_MODE_MIXED_SLOW: 741 if (!i3cbus->scl_rate.i2c) 742 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 743 if (!i3cbus->scl_rate.i3c || 744 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c) 745 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c; 746 break; 747 default: 748 return -EINVAL; 749 } 750 751 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n", 752 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c); 753 754 /* 755 * I3C/I2C frequency may have been overridden, check that user-provided 756 * values are not exceeding max possible frequency. 757 */ 758 if (i3cbus->scl_rate.i3c > I3C_BUS_I3C_SCL_MAX_RATE || 759 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_MAX_RATE) 760 return -EINVAL; 761 762 return 0; 763 } 764 765 static struct i3c_master_controller * 766 i2c_adapter_to_i3c_master(struct i2c_adapter *adap) 767 { 768 return container_of(adap, struct i3c_master_controller, i2c); 769 } 770 771 static struct i2c_adapter * 772 i3c_master_to_i2c_adapter(struct i3c_master_controller *master) 773 { 774 return &master->i2c; 775 } 776 777 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev) 778 { 779 kfree(dev); 780 } 781 782 static struct i2c_dev_desc * 783 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master, 784 u16 addr, u8 lvr) 785 { 786 struct i2c_dev_desc *dev; 787 788 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 789 if (!dev) 790 return ERR_PTR(-ENOMEM); 791 792 dev->common.master = master; 793 dev->addr = addr; 794 dev->lvr = lvr; 795 796 return dev; 797 } 798 799 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr, 800 u16 payloadlen) 801 { 802 dest->addr = addr; 803 dest->payload.len = payloadlen; 804 if (payloadlen) 805 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL); 806 else 807 dest->payload.data = NULL; 808 809 return dest->payload.data; 810 } 811 812 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest) 813 { 814 kfree(dest->payload.data); 815 } 816 817 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id, 818 struct i3c_ccc_cmd_dest *dests, 819 unsigned int ndests) 820 { 821 cmd->rnw = rnw ? 1 : 0; 822 cmd->id = id; 823 cmd->dests = dests; 824 cmd->ndests = ndests; 825 cmd->err = I3C_ERROR_UNKNOWN; 826 } 827 828 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master, 829 struct i3c_ccc_cmd *cmd) 830 { 831 int ret; 832 833 if (!cmd || !master) 834 return -EINVAL; 835 836 if (WARN_ON(master->init_done && 837 !rwsem_is_locked(&master->bus.lock))) 838 return -EINVAL; 839 840 if (!master->ops->send_ccc_cmd) 841 return -EOPNOTSUPP; 842 843 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests)) 844 return -EINVAL; 845 846 if (master->ops->supports_ccc_cmd && 847 !master->ops->supports_ccc_cmd(master, cmd)) 848 return -EOPNOTSUPP; 849 850 ret = master->ops->send_ccc_cmd(master, cmd); 851 if (ret) { 852 if (cmd->err != I3C_ERROR_UNKNOWN) 853 return cmd->err; 854 855 return ret; 856 } 857 858 return 0; 859 } 860 861 static struct i2c_dev_desc * 862 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master, 863 u16 addr) 864 { 865 struct i2c_dev_desc *dev; 866 867 i3c_bus_for_each_i2cdev(&master->bus, dev) { 868 if (dev->addr == addr) 869 return dev; 870 } 871 872 return NULL; 873 } 874 875 /** 876 * i3c_master_get_free_addr() - get a free address on the bus 877 * @master: I3C master object 878 * @start_addr: where to start searching 879 * 880 * This function must be called with the bus lock held in write mode. 881 * 882 * Return: the first free address starting at @start_addr (included) or -ENOMEM 883 * if there's no more address available. 884 */ 885 int i3c_master_get_free_addr(struct i3c_master_controller *master, 886 u8 start_addr) 887 { 888 return i3c_bus_get_free_addr(&master->bus, start_addr); 889 } 890 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr); 891 892 static void i3c_device_release(struct device *dev) 893 { 894 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 895 896 WARN_ON(i3cdev->desc); 897 898 of_node_put(i3cdev->dev.of_node); 899 kfree(i3cdev); 900 } 901 902 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev) 903 { 904 kfree(dev); 905 } 906 907 static struct i3c_dev_desc * 908 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master, 909 const struct i3c_device_info *info) 910 { 911 struct i3c_dev_desc *dev; 912 913 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 914 if (!dev) 915 return ERR_PTR(-ENOMEM); 916 917 dev->common.master = master; 918 dev->info = *info; 919 mutex_init(&dev->ibi_lock); 920 921 return dev; 922 } 923 924 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master, 925 u8 addr) 926 { 927 enum i3c_addr_slot_status addrstat; 928 struct i3c_ccc_cmd_dest dest; 929 struct i3c_ccc_cmd cmd; 930 int ret; 931 932 if (!master) 933 return -EINVAL; 934 935 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr); 936 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV) 937 return -EINVAL; 938 939 i3c_ccc_cmd_dest_init(&dest, addr, 0); 940 i3c_ccc_cmd_init(&cmd, false, 941 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR), 942 &dest, 1); 943 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 944 i3c_ccc_cmd_dest_cleanup(&dest); 945 946 return ret; 947 } 948 949 /** 950 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment) 951 * procedure 952 * @master: master used to send frames on the bus 953 * 954 * Send a ENTDAA CCC command to start a DAA procedure. 955 * 956 * Note that this function only sends the ENTDAA CCC command, all the logic 957 * behind dynamic address assignment has to be handled in the I3C master 958 * driver. 959 * 960 * This function must be called with the bus lock held in write mode. 961 * 962 * Return: 0 in case of success, a positive I3C error code if the error is 963 * one of the official Mx error codes, and a negative error code otherwise. 964 */ 965 int i3c_master_entdaa_locked(struct i3c_master_controller *master) 966 { 967 struct i3c_ccc_cmd_dest dest; 968 struct i3c_ccc_cmd cmd; 969 int ret; 970 971 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0); 972 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1); 973 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 974 i3c_ccc_cmd_dest_cleanup(&dest); 975 976 return ret; 977 } 978 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked); 979 980 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master, 981 u8 addr, bool enable, u8 evts) 982 { 983 struct i3c_ccc_events *events; 984 struct i3c_ccc_cmd_dest dest; 985 struct i3c_ccc_cmd cmd; 986 int ret; 987 988 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events)); 989 if (!events) 990 return -ENOMEM; 991 992 events->events = evts; 993 i3c_ccc_cmd_init(&cmd, false, 994 enable ? 995 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) : 996 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR), 997 &dest, 1); 998 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 999 i3c_ccc_cmd_dest_cleanup(&dest); 1000 1001 return ret; 1002 } 1003 1004 /** 1005 * i3c_master_disec_locked() - send a DISEC CCC command 1006 * @master: master used to send frames on the bus 1007 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 1008 * @evts: events to disable 1009 * 1010 * Send a DISEC CCC command to disable some or all events coming from a 1011 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 1012 * 1013 * This function must be called with the bus lock held in write mode. 1014 * 1015 * Return: 0 in case of success, a positive I3C error code if the error is 1016 * one of the official Mx error codes, and a negative error code otherwise. 1017 */ 1018 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr, 1019 u8 evts) 1020 { 1021 return i3c_master_enec_disec_locked(master, addr, false, evts); 1022 } 1023 EXPORT_SYMBOL_GPL(i3c_master_disec_locked); 1024 1025 /** 1026 * i3c_master_enec_locked() - send an ENEC CCC command 1027 * @master: master used to send frames on the bus 1028 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 1029 * @evts: events to disable 1030 * 1031 * Sends an ENEC CCC command to enable some or all events coming from a 1032 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 1033 * 1034 * This function must be called with the bus lock held in write mode. 1035 * 1036 * Return: 0 in case of success, a positive I3C error code if the error is 1037 * one of the official Mx error codes, and a negative error code otherwise. 1038 */ 1039 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr, 1040 u8 evts) 1041 { 1042 return i3c_master_enec_disec_locked(master, addr, true, evts); 1043 } 1044 EXPORT_SYMBOL_GPL(i3c_master_enec_locked); 1045 1046 /** 1047 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command 1048 * @master: master used to send frames on the bus 1049 * 1050 * Send a DEFSLVS CCC command containing all the devices known to the @master. 1051 * This is useful when you have secondary masters on the bus to propagate 1052 * device information. 1053 * 1054 * This should be called after all I3C devices have been discovered (in other 1055 * words, after the DAA procedure has finished) and instantiated in 1056 * &i3c_master_controller_ops->bus_init(). 1057 * It should also be called if a master ACKed an Hot-Join request and assigned 1058 * a dynamic address to the device joining the bus. 1059 * 1060 * This function must be called with the bus lock held in write mode. 1061 * 1062 * Return: 0 in case of success, a positive I3C error code if the error is 1063 * one of the official Mx error codes, and a negative error code otherwise. 1064 */ 1065 int i3c_master_defslvs_locked(struct i3c_master_controller *master) 1066 { 1067 struct i3c_ccc_defslvs *defslvs; 1068 struct i3c_ccc_dev_desc *desc; 1069 struct i3c_ccc_cmd_dest dest; 1070 struct i3c_dev_desc *i3cdev; 1071 struct i2c_dev_desc *i2cdev; 1072 struct i3c_ccc_cmd cmd; 1073 struct i3c_bus *bus; 1074 bool send = false; 1075 int ndevs = 0, ret; 1076 1077 if (!master) 1078 return -EINVAL; 1079 1080 bus = i3c_master_get_bus(master); 1081 i3c_bus_for_each_i3cdev(bus, i3cdev) { 1082 ndevs++; 1083 1084 if (i3cdev == master->this) 1085 continue; 1086 1087 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) == 1088 I3C_BCR_I3C_MASTER) 1089 send = true; 1090 } 1091 1092 /* No other master on the bus, skip DEFSLVS. */ 1093 if (!send) 1094 return 0; 1095 1096 i3c_bus_for_each_i2cdev(bus, i2cdev) 1097 ndevs++; 1098 1099 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 1100 struct_size(defslvs, slaves, 1101 ndevs - 1)); 1102 if (!defslvs) 1103 return -ENOMEM; 1104 1105 defslvs->count = ndevs; 1106 defslvs->master.bcr = master->this->info.bcr; 1107 defslvs->master.dcr = master->this->info.dcr; 1108 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1; 1109 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1; 1110 1111 desc = defslvs->slaves; 1112 i3c_bus_for_each_i2cdev(bus, i2cdev) { 1113 desc->lvr = i2cdev->lvr; 1114 desc->static_addr = i2cdev->addr << 1; 1115 desc++; 1116 } 1117 1118 i3c_bus_for_each_i3cdev(bus, i3cdev) { 1119 /* Skip the I3C dev representing this master. */ 1120 if (i3cdev == master->this) 1121 continue; 1122 1123 desc->bcr = i3cdev->info.bcr; 1124 desc->dcr = i3cdev->info.dcr; 1125 desc->dyn_addr = i3cdev->info.dyn_addr << 1; 1126 desc->static_addr = i3cdev->info.static_addr << 1; 1127 desc++; 1128 } 1129 1130 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1); 1131 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1132 i3c_ccc_cmd_dest_cleanup(&dest); 1133 1134 return ret; 1135 } 1136 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked); 1137 1138 static int i3c_master_setda_locked(struct i3c_master_controller *master, 1139 u8 oldaddr, u8 newaddr, bool setdasa) 1140 { 1141 struct i3c_ccc_cmd_dest dest; 1142 struct i3c_ccc_setda *setda; 1143 struct i3c_ccc_cmd cmd; 1144 int ret; 1145 1146 if (!oldaddr || !newaddr) 1147 return -EINVAL; 1148 1149 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda)); 1150 if (!setda) 1151 return -ENOMEM; 1152 1153 setda->addr = newaddr << 1; 1154 i3c_ccc_cmd_init(&cmd, false, 1155 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA, 1156 &dest, 1); 1157 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1158 i3c_ccc_cmd_dest_cleanup(&dest); 1159 1160 return ret; 1161 } 1162 1163 static int i3c_master_setdasa_locked(struct i3c_master_controller *master, 1164 u8 static_addr, u8 dyn_addr) 1165 { 1166 return i3c_master_setda_locked(master, static_addr, dyn_addr, true); 1167 } 1168 1169 static int i3c_master_setnewda_locked(struct i3c_master_controller *master, 1170 u8 oldaddr, u8 newaddr) 1171 { 1172 return i3c_master_setda_locked(master, oldaddr, newaddr, false); 1173 } 1174 1175 static int i3c_master_getmrl_locked(struct i3c_master_controller *master, 1176 struct i3c_device_info *info) 1177 { 1178 struct i3c_ccc_cmd_dest dest; 1179 struct i3c_ccc_mrl *mrl; 1180 struct i3c_ccc_cmd cmd; 1181 int ret; 1182 1183 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl)); 1184 if (!mrl) 1185 return -ENOMEM; 1186 1187 /* 1188 * When the device does not have IBI payload GETMRL only returns 2 1189 * bytes of data. 1190 */ 1191 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD)) 1192 dest.payload.len -= 1; 1193 1194 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1); 1195 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1196 if (ret) 1197 goto out; 1198 1199 switch (dest.payload.len) { 1200 case 3: 1201 info->max_ibi_len = mrl->ibi_len; 1202 fallthrough; 1203 case 2: 1204 info->max_read_len = be16_to_cpu(mrl->read_len); 1205 break; 1206 default: 1207 ret = -EIO; 1208 goto out; 1209 } 1210 1211 out: 1212 i3c_ccc_cmd_dest_cleanup(&dest); 1213 1214 return ret; 1215 } 1216 1217 static int i3c_master_getmwl_locked(struct i3c_master_controller *master, 1218 struct i3c_device_info *info) 1219 { 1220 struct i3c_ccc_cmd_dest dest; 1221 struct i3c_ccc_mwl *mwl; 1222 struct i3c_ccc_cmd cmd; 1223 int ret; 1224 1225 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl)); 1226 if (!mwl) 1227 return -ENOMEM; 1228 1229 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1); 1230 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1231 if (ret) 1232 goto out; 1233 1234 if (dest.payload.len != sizeof(*mwl)) { 1235 ret = -EIO; 1236 goto out; 1237 } 1238 1239 info->max_write_len = be16_to_cpu(mwl->len); 1240 1241 out: 1242 i3c_ccc_cmd_dest_cleanup(&dest); 1243 1244 return ret; 1245 } 1246 1247 static int i3c_master_getmxds_locked(struct i3c_master_controller *master, 1248 struct i3c_device_info *info) 1249 { 1250 struct i3c_ccc_getmxds *getmaxds; 1251 struct i3c_ccc_cmd_dest dest; 1252 struct i3c_ccc_cmd cmd; 1253 int ret; 1254 1255 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1256 sizeof(*getmaxds)); 1257 if (!getmaxds) 1258 return -ENOMEM; 1259 1260 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1); 1261 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1262 if (ret) { 1263 /* 1264 * Retry when the device does not support max read turnaround 1265 * while expecting shorter length from this CCC command. 1266 */ 1267 dest.payload.len -= 3; 1268 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1269 if (ret) 1270 goto out; 1271 } 1272 1273 if (dest.payload.len != 2 && dest.payload.len != 5) { 1274 ret = -EIO; 1275 goto out; 1276 } 1277 1278 info->max_read_ds = getmaxds->maxrd; 1279 info->max_write_ds = getmaxds->maxwr; 1280 if (dest.payload.len == 5) 1281 info->max_read_turnaround = getmaxds->maxrdturn[0] | 1282 ((u32)getmaxds->maxrdturn[1] << 8) | 1283 ((u32)getmaxds->maxrdturn[2] << 16); 1284 1285 out: 1286 i3c_ccc_cmd_dest_cleanup(&dest); 1287 1288 return ret; 1289 } 1290 1291 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master, 1292 struct i3c_device_info *info) 1293 { 1294 struct i3c_ccc_gethdrcap *gethdrcap; 1295 struct i3c_ccc_cmd_dest dest; 1296 struct i3c_ccc_cmd cmd; 1297 int ret; 1298 1299 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1300 sizeof(*gethdrcap)); 1301 if (!gethdrcap) 1302 return -ENOMEM; 1303 1304 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1); 1305 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1306 if (ret) 1307 goto out; 1308 1309 if (dest.payload.len != 1) { 1310 ret = -EIO; 1311 goto out; 1312 } 1313 1314 info->hdr_cap = gethdrcap->modes; 1315 1316 out: 1317 i3c_ccc_cmd_dest_cleanup(&dest); 1318 1319 return ret; 1320 } 1321 1322 static int i3c_master_getpid_locked(struct i3c_master_controller *master, 1323 struct i3c_device_info *info) 1324 { 1325 struct i3c_ccc_getpid *getpid; 1326 struct i3c_ccc_cmd_dest dest; 1327 struct i3c_ccc_cmd cmd; 1328 int ret, i; 1329 1330 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid)); 1331 if (!getpid) 1332 return -ENOMEM; 1333 1334 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1); 1335 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1336 if (ret) 1337 goto out; 1338 1339 info->pid = 0; 1340 for (i = 0; i < sizeof(getpid->pid); i++) { 1341 int sft = (sizeof(getpid->pid) - i - 1) * 8; 1342 1343 info->pid |= (u64)getpid->pid[i] << sft; 1344 } 1345 1346 out: 1347 i3c_ccc_cmd_dest_cleanup(&dest); 1348 1349 return ret; 1350 } 1351 1352 static int i3c_master_getbcr_locked(struct i3c_master_controller *master, 1353 struct i3c_device_info *info) 1354 { 1355 struct i3c_ccc_getbcr *getbcr; 1356 struct i3c_ccc_cmd_dest dest; 1357 struct i3c_ccc_cmd cmd; 1358 int ret; 1359 1360 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr)); 1361 if (!getbcr) 1362 return -ENOMEM; 1363 1364 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1); 1365 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1366 if (ret) 1367 goto out; 1368 1369 info->bcr = getbcr->bcr; 1370 1371 out: 1372 i3c_ccc_cmd_dest_cleanup(&dest); 1373 1374 return ret; 1375 } 1376 1377 static int i3c_master_getdcr_locked(struct i3c_master_controller *master, 1378 struct i3c_device_info *info) 1379 { 1380 struct i3c_ccc_getdcr *getdcr; 1381 struct i3c_ccc_cmd_dest dest; 1382 struct i3c_ccc_cmd cmd; 1383 int ret; 1384 1385 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr)); 1386 if (!getdcr) 1387 return -ENOMEM; 1388 1389 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1); 1390 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1391 if (ret) 1392 goto out; 1393 1394 info->dcr = getdcr->dcr; 1395 1396 out: 1397 i3c_ccc_cmd_dest_cleanup(&dest); 1398 1399 return ret; 1400 } 1401 1402 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev) 1403 { 1404 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1405 enum i3c_addr_slot_status slot_status; 1406 int ret; 1407 1408 if (!dev->info.dyn_addr) 1409 return -EINVAL; 1410 1411 slot_status = i3c_bus_get_addr_slot_status(&master->bus, 1412 dev->info.dyn_addr); 1413 if (slot_status == I3C_ADDR_SLOT_RSVD || 1414 slot_status == I3C_ADDR_SLOT_I2C_DEV) 1415 return -EINVAL; 1416 1417 ret = i3c_master_getpid_locked(master, &dev->info); 1418 if (ret) 1419 return ret; 1420 1421 ret = i3c_master_getbcr_locked(master, &dev->info); 1422 if (ret) 1423 return ret; 1424 1425 ret = i3c_master_getdcr_locked(master, &dev->info); 1426 if (ret) 1427 return ret; 1428 1429 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) { 1430 ret = i3c_master_getmxds_locked(master, &dev->info); 1431 if (ret) 1432 return ret; 1433 } 1434 1435 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD) 1436 dev->info.max_ibi_len = 1; 1437 1438 i3c_master_getmrl_locked(master, &dev->info); 1439 i3c_master_getmwl_locked(master, &dev->info); 1440 1441 if (dev->info.bcr & I3C_BCR_HDR_CAP) { 1442 ret = i3c_master_gethdrcap_locked(master, &dev->info); 1443 if (ret && ret != -EOPNOTSUPP) 1444 return ret; 1445 } 1446 1447 return 0; 1448 } 1449 1450 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev) 1451 { 1452 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1453 1454 if (dev->info.static_addr) 1455 i3c_bus_set_addr_slot_status(&master->bus, 1456 dev->info.static_addr, 1457 I3C_ADDR_SLOT_FREE); 1458 1459 if (dev->info.dyn_addr) 1460 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1461 I3C_ADDR_SLOT_FREE); 1462 1463 if (dev->boardinfo && dev->boardinfo->init_dyn_addr) 1464 i3c_bus_set_addr_slot_status(&master->bus, dev->boardinfo->init_dyn_addr, 1465 I3C_ADDR_SLOT_FREE); 1466 } 1467 1468 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev) 1469 { 1470 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1471 enum i3c_addr_slot_status status; 1472 1473 if (!dev->info.static_addr && !dev->info.dyn_addr) 1474 return 0; 1475 1476 if (dev->info.static_addr) { 1477 status = i3c_bus_get_addr_slot_status(&master->bus, 1478 dev->info.static_addr); 1479 /* Since static address and assigned dynamic address can be 1480 * equal, allow this case to pass. 1481 */ 1482 if (status != I3C_ADDR_SLOT_FREE && 1483 dev->info.static_addr != dev->boardinfo->init_dyn_addr) 1484 return -EBUSY; 1485 1486 i3c_bus_set_addr_slot_status(&master->bus, 1487 dev->info.static_addr, 1488 I3C_ADDR_SLOT_I3C_DEV); 1489 } 1490 1491 /* 1492 * ->init_dyn_addr should have been reserved before that, so, if we're 1493 * trying to apply a pre-reserved dynamic address, we should not try 1494 * to reserve the address slot a second time. 1495 */ 1496 if (dev->info.dyn_addr && 1497 (!dev->boardinfo || 1498 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) { 1499 status = i3c_bus_get_addr_slot_status(&master->bus, 1500 dev->info.dyn_addr); 1501 if (status != I3C_ADDR_SLOT_FREE) 1502 goto err_release_static_addr; 1503 1504 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1505 I3C_ADDR_SLOT_I3C_DEV); 1506 } 1507 1508 return 0; 1509 1510 err_release_static_addr: 1511 if (dev->info.static_addr) 1512 i3c_bus_set_addr_slot_status(&master->bus, 1513 dev->info.static_addr, 1514 I3C_ADDR_SLOT_FREE); 1515 1516 return -EBUSY; 1517 } 1518 1519 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master, 1520 struct i3c_dev_desc *dev) 1521 { 1522 int ret; 1523 1524 /* 1525 * We don't attach devices to the controller until they are 1526 * addressable on the bus. 1527 */ 1528 if (!dev->info.static_addr && !dev->info.dyn_addr) 1529 return 0; 1530 1531 ret = i3c_master_get_i3c_addrs(dev); 1532 if (ret) 1533 return ret; 1534 1535 /* Do not attach the master device itself. */ 1536 if (master->this != dev && master->ops->attach_i3c_dev) { 1537 ret = master->ops->attach_i3c_dev(dev); 1538 if (ret) { 1539 i3c_master_put_i3c_addrs(dev); 1540 return ret; 1541 } 1542 } 1543 1544 list_add_tail(&dev->common.node, &master->bus.devs.i3c); 1545 1546 return 0; 1547 } 1548 1549 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev, 1550 u8 old_dyn_addr) 1551 { 1552 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1553 int ret; 1554 1555 if (dev->info.dyn_addr != old_dyn_addr) { 1556 i3c_bus_set_addr_slot_status(&master->bus, 1557 dev->info.dyn_addr, 1558 I3C_ADDR_SLOT_I3C_DEV); 1559 if (old_dyn_addr) 1560 i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr, 1561 I3C_ADDR_SLOT_FREE); 1562 } 1563 1564 if (master->ops->reattach_i3c_dev) { 1565 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr); 1566 if (ret) { 1567 i3c_master_put_i3c_addrs(dev); 1568 return ret; 1569 } 1570 } 1571 1572 return 0; 1573 } 1574 1575 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev) 1576 { 1577 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1578 1579 /* Do not detach the master device itself. */ 1580 if (master->this != dev && master->ops->detach_i3c_dev) 1581 master->ops->detach_i3c_dev(dev); 1582 1583 i3c_master_put_i3c_addrs(dev); 1584 list_del(&dev->common.node); 1585 } 1586 1587 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master, 1588 struct i2c_dev_desc *dev) 1589 { 1590 int ret; 1591 1592 if (master->ops->attach_i2c_dev) { 1593 ret = master->ops->attach_i2c_dev(dev); 1594 if (ret) 1595 return ret; 1596 } 1597 1598 list_add_tail(&dev->common.node, &master->bus.devs.i2c); 1599 1600 return 0; 1601 } 1602 1603 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev) 1604 { 1605 struct i3c_master_controller *master = i2c_dev_get_master(dev); 1606 1607 list_del(&dev->common.node); 1608 1609 if (master->ops->detach_i2c_dev) 1610 master->ops->detach_i2c_dev(dev); 1611 } 1612 1613 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master, 1614 struct i3c_dev_boardinfo *boardinfo) 1615 { 1616 struct i3c_device_info info = { 1617 .static_addr = boardinfo->static_addr, 1618 .pid = boardinfo->pid, 1619 }; 1620 struct i3c_dev_desc *i3cdev; 1621 int ret; 1622 1623 i3cdev = i3c_master_alloc_i3c_dev(master, &info); 1624 if (IS_ERR(i3cdev)) 1625 return -ENOMEM; 1626 1627 i3cdev->boardinfo = boardinfo; 1628 1629 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1630 if (ret) 1631 goto err_free_dev; 1632 1633 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr, 1634 i3cdev->boardinfo->init_dyn_addr); 1635 if (ret) 1636 goto err_detach_dev; 1637 1638 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr; 1639 ret = i3c_master_reattach_i3c_dev(i3cdev, 0); 1640 if (ret) 1641 goto err_rstdaa; 1642 1643 ret = i3c_master_retrieve_dev_info(i3cdev); 1644 if (ret) 1645 goto err_rstdaa; 1646 1647 return 0; 1648 1649 err_rstdaa: 1650 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr); 1651 err_detach_dev: 1652 i3c_master_detach_i3c_dev(i3cdev); 1653 err_free_dev: 1654 i3c_master_free_i3c_dev(i3cdev); 1655 1656 return ret; 1657 } 1658 1659 static void 1660 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master) 1661 { 1662 struct i3c_dev_desc *desc; 1663 int ret; 1664 1665 if (!master->init_done) 1666 return; 1667 1668 i3c_bus_for_each_i3cdev(&master->bus, desc) { 1669 if (desc->dev || !desc->info.dyn_addr || desc == master->this) 1670 continue; 1671 1672 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL); 1673 if (!desc->dev) 1674 continue; 1675 1676 desc->dev->bus = &master->bus; 1677 desc->dev->desc = desc; 1678 desc->dev->dev.parent = &master->dev; 1679 desc->dev->dev.type = &i3c_device_type; 1680 desc->dev->dev.bus = &i3c_bus_type; 1681 desc->dev->dev.release = i3c_device_release; 1682 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id, 1683 desc->info.pid); 1684 1685 if (desc->boardinfo) 1686 desc->dev->dev.of_node = desc->boardinfo->of_node; 1687 1688 ret = device_register(&desc->dev->dev); 1689 if (ret) { 1690 dev_err(&master->dev, 1691 "Failed to add I3C device (err = %d)\n", ret); 1692 put_device(&desc->dev->dev); 1693 } 1694 } 1695 } 1696 1697 /** 1698 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment) 1699 * @master: master doing the DAA 1700 * 1701 * This function is instantiating an I3C device object and adding it to the 1702 * I3C device list. All device information are automatically retrieved using 1703 * standard CCC commands. 1704 * 1705 * The I3C device object is returned in case the master wants to attach 1706 * private data to it using i3c_dev_set_master_data(). 1707 * 1708 * This function must be called with the bus lock held in write mode. 1709 * 1710 * Return: a 0 in case of success, an negative error code otherwise. 1711 */ 1712 int i3c_master_do_daa(struct i3c_master_controller *master) 1713 { 1714 int ret; 1715 1716 i3c_bus_maintenance_lock(&master->bus); 1717 ret = master->ops->do_daa(master); 1718 i3c_bus_maintenance_unlock(&master->bus); 1719 1720 if (ret) 1721 return ret; 1722 1723 i3c_bus_normaluse_lock(&master->bus); 1724 i3c_master_register_new_i3c_devs(master); 1725 i3c_bus_normaluse_unlock(&master->bus); 1726 1727 return 0; 1728 } 1729 EXPORT_SYMBOL_GPL(i3c_master_do_daa); 1730 1731 /** 1732 * i3c_master_dma_map_single() - Map buffer for single DMA transfer 1733 * @dev: device object of a device doing DMA 1734 * @buf: destination/source buffer for DMA 1735 * @len: length of transfer 1736 * @force_bounce: true, force to use a bounce buffer, 1737 * false, function will auto check is a bounce buffer required 1738 * @dir: DMA direction 1739 * 1740 * Map buffer for a DMA transfer and allocate a bounce buffer if required. 1741 * 1742 * Return: I3C DMA transfer descriptor or NULL in case of error. 1743 */ 1744 struct i3c_dma *i3c_master_dma_map_single(struct device *dev, void *buf, 1745 size_t len, bool force_bounce, enum dma_data_direction dir) 1746 { 1747 struct i3c_dma *dma_xfer __free(kfree) = NULL; 1748 void *bounce __free(kfree) = NULL; 1749 void *dma_buf = buf; 1750 1751 dma_xfer = kzalloc(sizeof(*dma_xfer), GFP_KERNEL); 1752 if (!dma_xfer) 1753 return NULL; 1754 1755 dma_xfer->dev = dev; 1756 dma_xfer->buf = buf; 1757 dma_xfer->dir = dir; 1758 dma_xfer->len = len; 1759 dma_xfer->map_len = len; 1760 1761 if (is_vmalloc_addr(buf)) 1762 force_bounce = true; 1763 1764 if (force_bounce) { 1765 dma_xfer->map_len = ALIGN(len, cache_line_size()); 1766 if (dir == DMA_FROM_DEVICE) 1767 bounce = kzalloc(dma_xfer->map_len, GFP_KERNEL); 1768 else 1769 bounce = kmemdup(buf, dma_xfer->map_len, GFP_KERNEL); 1770 if (!bounce) 1771 return NULL; 1772 dma_buf = bounce; 1773 } 1774 1775 dma_xfer->addr = dma_map_single(dev, dma_buf, dma_xfer->map_len, dir); 1776 if (dma_mapping_error(dev, dma_xfer->addr)) 1777 return NULL; 1778 1779 dma_xfer->bounce_buf = no_free_ptr(bounce); 1780 return no_free_ptr(dma_xfer); 1781 } 1782 EXPORT_SYMBOL_GPL(i3c_master_dma_map_single); 1783 1784 /** 1785 * i3c_master_dma_unmap_single() - Unmap buffer after DMA 1786 * @dma_xfer: DMA transfer and mapping descriptor 1787 * 1788 * Unmap buffer and cleanup DMA transfer descriptor. 1789 */ 1790 void i3c_master_dma_unmap_single(struct i3c_dma *dma_xfer) 1791 { 1792 dma_unmap_single(dma_xfer->dev, dma_xfer->addr, 1793 dma_xfer->map_len, dma_xfer->dir); 1794 if (dma_xfer->bounce_buf) { 1795 if (dma_xfer->dir == DMA_FROM_DEVICE) 1796 memcpy(dma_xfer->buf, dma_xfer->bounce_buf, 1797 dma_xfer->len); 1798 kfree(dma_xfer->bounce_buf); 1799 } 1800 kfree(dma_xfer); 1801 } 1802 EXPORT_SYMBOL_GPL(i3c_master_dma_unmap_single); 1803 1804 /** 1805 * i3c_master_set_info() - set master device information 1806 * @master: master used to send frames on the bus 1807 * @info: I3C device information 1808 * 1809 * Set master device info. This should be called from 1810 * &i3c_master_controller_ops->bus_init(). 1811 * 1812 * Not all &i3c_device_info fields are meaningful for a master device. 1813 * Here is a list of fields that should be properly filled: 1814 * 1815 * - &i3c_device_info->dyn_addr 1816 * - &i3c_device_info->bcr 1817 * - &i3c_device_info->dcr 1818 * - &i3c_device_info->pid 1819 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in 1820 * &i3c_device_info->bcr 1821 * 1822 * This function must be called with the bus lock held in maintenance mode. 1823 * 1824 * Return: 0 if @info contains valid information (not every piece of 1825 * information can be checked, but we can at least make sure @info->dyn_addr 1826 * and @info->bcr are correct), -EINVAL otherwise. 1827 */ 1828 int i3c_master_set_info(struct i3c_master_controller *master, 1829 const struct i3c_device_info *info) 1830 { 1831 struct i3c_dev_desc *i3cdev; 1832 int ret; 1833 1834 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr)) 1835 return -EINVAL; 1836 1837 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER && 1838 master->secondary) 1839 return -EINVAL; 1840 1841 if (master->this) 1842 return -EINVAL; 1843 1844 i3cdev = i3c_master_alloc_i3c_dev(master, info); 1845 if (IS_ERR(i3cdev)) 1846 return PTR_ERR(i3cdev); 1847 1848 master->this = i3cdev; 1849 master->bus.cur_master = master->this; 1850 1851 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1852 if (ret) 1853 goto err_free_dev; 1854 1855 return 0; 1856 1857 err_free_dev: 1858 i3c_master_free_i3c_dev(i3cdev); 1859 1860 return ret; 1861 } 1862 EXPORT_SYMBOL_GPL(i3c_master_set_info); 1863 1864 static void i3c_master_detach_free_devs(struct i3c_master_controller *master) 1865 { 1866 struct i3c_dev_desc *i3cdev, *i3ctmp; 1867 struct i2c_dev_desc *i2cdev, *i2ctmp; 1868 1869 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c, 1870 common.node) { 1871 i3c_master_detach_i3c_dev(i3cdev); 1872 1873 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr) 1874 i3c_bus_set_addr_slot_status(&master->bus, 1875 i3cdev->boardinfo->init_dyn_addr, 1876 I3C_ADDR_SLOT_FREE); 1877 1878 i3c_master_free_i3c_dev(i3cdev); 1879 } 1880 1881 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c, 1882 common.node) { 1883 i3c_master_detach_i2c_dev(i2cdev); 1884 i3c_bus_set_addr_slot_status(&master->bus, 1885 i2cdev->addr, 1886 I3C_ADDR_SLOT_FREE); 1887 i3c_master_free_i2c_dev(i2cdev); 1888 } 1889 } 1890 1891 /** 1892 * i3c_master_bus_init() - initialize an I3C bus 1893 * @master: main master initializing the bus 1894 * 1895 * This function is following all initialisation steps described in the I3C 1896 * specification: 1897 * 1898 * 1. Attach I2C devs to the master so that the master can fill its internal 1899 * device table appropriately 1900 * 1901 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize 1902 * the master controller. That's usually where the bus mode is selected 1903 * (pure bus or mixed fast/slow bus) 1904 * 1905 * 3. Instruct all devices on the bus to drop their dynamic address. This is 1906 * particularly important when the bus was previously configured by someone 1907 * else (for example the bootloader) 1908 * 1909 * 4. Disable all slave events. 1910 * 1911 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices 1912 * also have static_addr, try to pre-assign dynamic addresses requested by 1913 * the FW with SETDASA and attach corresponding statically defined I3C 1914 * devices to the master. 1915 * 1916 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all 1917 * remaining I3C devices 1918 * 1919 * Once this is done, all I3C and I2C devices should be usable. 1920 * 1921 * Return: a 0 in case of success, an negative error code otherwise. 1922 */ 1923 static int i3c_master_bus_init(struct i3c_master_controller *master) 1924 { 1925 enum i3c_addr_slot_status status; 1926 struct i2c_dev_boardinfo *i2cboardinfo; 1927 struct i3c_dev_boardinfo *i3cboardinfo; 1928 struct i2c_dev_desc *i2cdev; 1929 int ret; 1930 1931 /* 1932 * First attach all devices with static definitions provided by the 1933 * FW. 1934 */ 1935 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) { 1936 status = i3c_bus_get_addr_slot_status(&master->bus, 1937 i2cboardinfo->base.addr); 1938 if (status != I3C_ADDR_SLOT_FREE) { 1939 ret = -EBUSY; 1940 goto err_detach_devs; 1941 } 1942 1943 i3c_bus_set_addr_slot_status(&master->bus, 1944 i2cboardinfo->base.addr, 1945 I3C_ADDR_SLOT_I2C_DEV); 1946 1947 i2cdev = i3c_master_alloc_i2c_dev(master, 1948 i2cboardinfo->base.addr, 1949 i2cboardinfo->lvr); 1950 if (IS_ERR(i2cdev)) { 1951 ret = PTR_ERR(i2cdev); 1952 goto err_detach_devs; 1953 } 1954 1955 ret = i3c_master_attach_i2c_dev(master, i2cdev); 1956 if (ret) { 1957 i3c_master_free_i2c_dev(i2cdev); 1958 goto err_detach_devs; 1959 } 1960 } 1961 1962 /* 1963 * Now execute the controller specific ->bus_init() routine, which 1964 * might configure its internal logic to match the bus limitations. 1965 */ 1966 ret = master->ops->bus_init(master); 1967 if (ret) 1968 goto err_detach_devs; 1969 1970 /* 1971 * The master device should have been instantiated in ->bus_init(), 1972 * complain if this was not the case. 1973 */ 1974 if (!master->this) { 1975 dev_err(&master->dev, 1976 "master_set_info() was not called in ->bus_init()\n"); 1977 ret = -EINVAL; 1978 goto err_bus_cleanup; 1979 } 1980 1981 if (master->ops->set_speed) { 1982 ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_SLOW_SPEED); 1983 if (ret) 1984 goto err_bus_cleanup; 1985 } 1986 1987 /* 1988 * Reset all dynamic address that may have been assigned before 1989 * (assigned by the bootloader for example). 1990 */ 1991 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1992 if (ret && ret != I3C_ERROR_M2) 1993 goto err_bus_cleanup; 1994 1995 if (master->ops->set_speed) { 1996 ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_NORMAL_SPEED); 1997 if (ret) 1998 goto err_bus_cleanup; 1999 } 2000 2001 /* Disable all slave events before starting DAA. */ 2002 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR, 2003 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR | 2004 I3C_CCC_EVENT_HJ); 2005 if (ret && ret != I3C_ERROR_M2) 2006 goto err_bus_cleanup; 2007 2008 /* 2009 * Reserve init_dyn_addr first, and then try to pre-assign dynamic 2010 * address and retrieve device information if needed. 2011 * In case pre-assign dynamic address fails, setting dynamic address to 2012 * the requested init_dyn_addr is retried after DAA is done in 2013 * i3c_master_add_i3c_dev_locked(). 2014 */ 2015 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 2016 2017 /* 2018 * We don't reserve a dynamic address for devices that 2019 * don't explicitly request one. 2020 */ 2021 if (!i3cboardinfo->init_dyn_addr) 2022 continue; 2023 2024 ret = i3c_bus_get_addr_slot_status(&master->bus, 2025 i3cboardinfo->init_dyn_addr); 2026 if (ret != I3C_ADDR_SLOT_FREE) { 2027 ret = -EBUSY; 2028 goto err_rstdaa; 2029 } 2030 2031 /* Do not mark as occupied until real device exist in bus */ 2032 i3c_bus_set_addr_slot_status_mask(&master->bus, 2033 i3cboardinfo->init_dyn_addr, 2034 I3C_ADDR_SLOT_EXT_DESIRED, 2035 I3C_ADDR_SLOT_EXT_STATUS_MASK); 2036 2037 /* 2038 * Only try to create/attach devices that have a static 2039 * address. Other devices will be created/attached when 2040 * DAA happens, and the requested dynamic address will 2041 * be set using SETNEWDA once those devices become 2042 * addressable. 2043 */ 2044 2045 if (i3cboardinfo->static_addr) 2046 i3c_master_early_i3c_dev_add(master, i3cboardinfo); 2047 } 2048 2049 ret = i3c_master_do_daa(master); 2050 if (ret) 2051 goto err_rstdaa; 2052 2053 return 0; 2054 2055 err_rstdaa: 2056 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 2057 2058 err_bus_cleanup: 2059 if (master->ops->bus_cleanup) 2060 master->ops->bus_cleanup(master); 2061 2062 err_detach_devs: 2063 i3c_master_detach_free_devs(master); 2064 2065 return ret; 2066 } 2067 2068 static void i3c_master_bus_cleanup(struct i3c_master_controller *master) 2069 { 2070 if (master->ops->bus_cleanup) 2071 master->ops->bus_cleanup(master); 2072 2073 i3c_master_detach_free_devs(master); 2074 } 2075 2076 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev) 2077 { 2078 struct i3c_master_controller *master = i3cdev->common.master; 2079 struct i3c_dev_boardinfo *i3cboardinfo; 2080 2081 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 2082 if (i3cdev->info.pid != i3cboardinfo->pid) 2083 continue; 2084 2085 i3cdev->boardinfo = i3cboardinfo; 2086 i3cdev->info.static_addr = i3cboardinfo->static_addr; 2087 return; 2088 } 2089 } 2090 2091 static struct i3c_dev_desc * 2092 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev) 2093 { 2094 struct i3c_master_controller *master = i3c_dev_get_master(refdev); 2095 struct i3c_dev_desc *i3cdev; 2096 2097 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 2098 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid) 2099 return i3cdev; 2100 } 2101 2102 return NULL; 2103 } 2104 2105 /** 2106 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus 2107 * @master: master used to send frames on the bus 2108 * @addr: I3C slave dynamic address assigned to the device 2109 * 2110 * This function is instantiating an I3C device object and adding it to the 2111 * I3C device list. All device information are automatically retrieved using 2112 * standard CCC commands. 2113 * 2114 * The I3C device object is returned in case the master wants to attach 2115 * private data to it using i3c_dev_set_master_data(). 2116 * 2117 * This function must be called with the bus lock held in write mode. 2118 * 2119 * Return: a 0 in case of success, an negative error code otherwise. 2120 */ 2121 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, 2122 u8 addr) 2123 { 2124 struct i3c_device_info info = { .dyn_addr = addr }; 2125 struct i3c_dev_desc *newdev, *olddev; 2126 u8 old_dyn_addr = addr, expected_dyn_addr; 2127 struct i3c_ibi_setup ibireq = { }; 2128 bool enable_ibi = false; 2129 int ret; 2130 2131 if (!master) 2132 return -EINVAL; 2133 2134 newdev = i3c_master_alloc_i3c_dev(master, &info); 2135 if (IS_ERR(newdev)) 2136 return PTR_ERR(newdev); 2137 2138 ret = i3c_master_attach_i3c_dev(master, newdev); 2139 if (ret) 2140 goto err_free_dev; 2141 2142 ret = i3c_master_retrieve_dev_info(newdev); 2143 if (ret) 2144 goto err_detach_dev; 2145 2146 i3c_master_attach_boardinfo(newdev); 2147 2148 olddev = i3c_master_search_i3c_dev_duplicate(newdev); 2149 if (olddev) { 2150 newdev->dev = olddev->dev; 2151 if (newdev->dev) 2152 newdev->dev->desc = newdev; 2153 2154 /* 2155 * We need to restore the IBI state too, so let's save the 2156 * IBI information and try to restore them after olddev has 2157 * been detached+released and its IBI has been stopped and 2158 * the associated resources have been freed. 2159 */ 2160 mutex_lock(&olddev->ibi_lock); 2161 if (olddev->ibi) { 2162 ibireq.handler = olddev->ibi->handler; 2163 ibireq.max_payload_len = olddev->ibi->max_payload_len; 2164 ibireq.num_slots = olddev->ibi->num_slots; 2165 2166 if (olddev->ibi->enabled) 2167 enable_ibi = true; 2168 /* 2169 * The olddev should not receive any commands on the 2170 * i3c bus as it does not exist and has been assigned 2171 * a new address. This will result in NACK or timeout. 2172 * So, update the olddev->ibi->enabled flag to false 2173 * to avoid DISEC with OldAddr. 2174 */ 2175 olddev->ibi->enabled = false; 2176 i3c_dev_free_ibi_locked(olddev); 2177 } 2178 mutex_unlock(&olddev->ibi_lock); 2179 2180 old_dyn_addr = olddev->info.dyn_addr; 2181 2182 i3c_master_detach_i3c_dev(olddev); 2183 i3c_master_free_i3c_dev(olddev); 2184 } 2185 2186 /* 2187 * Depending on our previous state, the expected dynamic address might 2188 * differ: 2189 * - if the device already had a dynamic address assigned, let's try to 2190 * re-apply this one 2191 * - if the device did not have a dynamic address and the firmware 2192 * requested a specific address, pick this one 2193 * - in any other case, keep the address automatically assigned by the 2194 * master 2195 */ 2196 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr) 2197 expected_dyn_addr = old_dyn_addr; 2198 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr) 2199 expected_dyn_addr = newdev->boardinfo->init_dyn_addr; 2200 else 2201 expected_dyn_addr = newdev->info.dyn_addr; 2202 2203 if (newdev->info.dyn_addr != expected_dyn_addr && 2204 i3c_bus_get_addr_slot_status(&master->bus, expected_dyn_addr) == I3C_ADDR_SLOT_FREE) { 2205 /* 2206 * Try to apply the expected dynamic address. If it fails, keep 2207 * the address assigned by the master. 2208 */ 2209 ret = i3c_master_setnewda_locked(master, 2210 newdev->info.dyn_addr, 2211 expected_dyn_addr); 2212 if (!ret) { 2213 old_dyn_addr = newdev->info.dyn_addr; 2214 newdev->info.dyn_addr = expected_dyn_addr; 2215 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr); 2216 } else { 2217 dev_err(&master->dev, 2218 "Failed to assign reserved/old address to device %d%llx", 2219 master->bus.id, newdev->info.pid); 2220 } 2221 } 2222 2223 /* 2224 * Now is time to try to restore the IBI setup. If we're lucky, 2225 * everything works as before, otherwise, all we can do is complain. 2226 * FIXME: maybe we should add callback to inform the driver that it 2227 * should request the IBI again instead of trying to hide that from 2228 * him. 2229 */ 2230 if (ibireq.handler) { 2231 mutex_lock(&newdev->ibi_lock); 2232 ret = i3c_dev_request_ibi_locked(newdev, &ibireq); 2233 if (ret) { 2234 dev_err(&master->dev, 2235 "Failed to request IBI on device %d-%llx", 2236 master->bus.id, newdev->info.pid); 2237 } else if (enable_ibi) { 2238 ret = i3c_dev_enable_ibi_locked(newdev); 2239 if (ret) 2240 dev_err(&master->dev, 2241 "Failed to re-enable IBI on device %d-%llx", 2242 master->bus.id, newdev->info.pid); 2243 } 2244 mutex_unlock(&newdev->ibi_lock); 2245 } 2246 2247 return 0; 2248 2249 err_detach_dev: 2250 if (newdev->dev && newdev->dev->desc) 2251 newdev->dev->desc = NULL; 2252 2253 i3c_master_detach_i3c_dev(newdev); 2254 2255 err_free_dev: 2256 i3c_master_free_i3c_dev(newdev); 2257 2258 return ret; 2259 } 2260 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked); 2261 2262 #define OF_I3C_REG1_IS_I2C_DEV BIT(31) 2263 2264 static int 2265 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master, 2266 struct device_node *node, u32 *reg) 2267 { 2268 struct i2c_dev_boardinfo *boardinfo; 2269 struct device *dev = &master->dev; 2270 int ret; 2271 2272 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2273 if (!boardinfo) 2274 return -ENOMEM; 2275 2276 ret = of_i2c_get_board_info(dev, node, &boardinfo->base); 2277 if (ret) 2278 return ret; 2279 2280 /* 2281 * The I3C Specification does not clearly say I2C devices with 10-bit 2282 * address are supported. These devices can't be passed properly through 2283 * DEFSLVS command. 2284 */ 2285 if (boardinfo->base.flags & I2C_CLIENT_TEN) { 2286 dev_err(dev, "I2C device with 10 bit address not supported."); 2287 return -EOPNOTSUPP; 2288 } 2289 2290 /* LVR is encoded in reg[2]. */ 2291 boardinfo->lvr = reg[2]; 2292 2293 list_add_tail(&boardinfo->node, &master->boardinfo.i2c); 2294 of_node_get(node); 2295 2296 return 0; 2297 } 2298 2299 static int 2300 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master, 2301 struct device_node *node, u32 *reg) 2302 { 2303 struct i3c_dev_boardinfo *boardinfo; 2304 struct device *dev = &master->dev; 2305 enum i3c_addr_slot_status addrstatus; 2306 u32 init_dyn_addr = 0; 2307 2308 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2309 if (!boardinfo) 2310 return -ENOMEM; 2311 2312 if (reg[0]) { 2313 if (reg[0] > I3C_MAX_ADDR) 2314 return -EINVAL; 2315 2316 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2317 reg[0]); 2318 if (addrstatus != I3C_ADDR_SLOT_FREE) 2319 return -EINVAL; 2320 } 2321 2322 boardinfo->static_addr = reg[0]; 2323 2324 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) { 2325 if (init_dyn_addr > I3C_MAX_ADDR) 2326 return -EINVAL; 2327 2328 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2329 init_dyn_addr); 2330 if (addrstatus != I3C_ADDR_SLOT_FREE) 2331 return -EINVAL; 2332 } 2333 2334 boardinfo->pid = ((u64)reg[1] << 32) | reg[2]; 2335 2336 if ((boardinfo->pid & GENMASK_ULL(63, 48)) || 2337 I3C_PID_RND_LOWER_32BITS(boardinfo->pid)) 2338 return -EINVAL; 2339 2340 boardinfo->init_dyn_addr = init_dyn_addr; 2341 boardinfo->of_node = of_node_get(node); 2342 list_add_tail(&boardinfo->node, &master->boardinfo.i3c); 2343 2344 return 0; 2345 } 2346 2347 static int of_i3c_master_add_dev(struct i3c_master_controller *master, 2348 struct device_node *node) 2349 { 2350 u32 reg[3]; 2351 int ret; 2352 2353 if (!master) 2354 return -EINVAL; 2355 2356 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg)); 2357 if (ret) 2358 return ret; 2359 2360 /* 2361 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're 2362 * dealing with an I2C device. 2363 */ 2364 if (!reg[1]) 2365 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg); 2366 else 2367 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg); 2368 2369 return ret; 2370 } 2371 2372 static int of_populate_i3c_bus(struct i3c_master_controller *master) 2373 { 2374 struct device *dev = &master->dev; 2375 struct device_node *i3cbus_np = dev->of_node; 2376 struct device_node *node; 2377 int ret; 2378 u32 val; 2379 2380 if (!i3cbus_np) 2381 return 0; 2382 2383 for_each_available_child_of_node(i3cbus_np, node) { 2384 ret = of_i3c_master_add_dev(master, node); 2385 if (ret) { 2386 of_node_put(node); 2387 return ret; 2388 } 2389 } 2390 2391 /* 2392 * The user might want to limit I2C and I3C speed in case some devices 2393 * on the bus are not supporting typical rates, or if the bus topology 2394 * prevents it from using max possible rate. 2395 */ 2396 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val)) 2397 master->bus.scl_rate.i2c = val; 2398 2399 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val)) 2400 master->bus.scl_rate.i3c = val; 2401 2402 return 0; 2403 } 2404 2405 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap, 2406 struct i2c_msg *xfers, int nxfers) 2407 { 2408 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2409 struct i2c_dev_desc *dev; 2410 int i, ret; 2411 u16 addr; 2412 2413 if (!xfers || !master || nxfers <= 0) 2414 return -EINVAL; 2415 2416 if (!master->ops->i2c_xfers) 2417 return -EOPNOTSUPP; 2418 2419 /* Doing transfers to different devices is not supported. */ 2420 addr = xfers[0].addr; 2421 for (i = 1; i < nxfers; i++) { 2422 if (addr != xfers[i].addr) 2423 return -EOPNOTSUPP; 2424 } 2425 2426 i3c_bus_normaluse_lock(&master->bus); 2427 dev = i3c_master_find_i2c_dev_by_addr(master, addr); 2428 if (!dev) 2429 ret = -ENOENT; 2430 else 2431 ret = master->ops->i2c_xfers(dev, xfers, nxfers); 2432 i3c_bus_normaluse_unlock(&master->bus); 2433 2434 return ret ? ret : nxfers; 2435 } 2436 2437 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter) 2438 { 2439 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C; 2440 } 2441 2442 static u8 i3c_master_i2c_get_lvr(struct i2c_client *client) 2443 { 2444 /* Fall back to no spike filters and FM bus mode. */ 2445 u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE; 2446 u32 reg[3]; 2447 2448 if (!of_property_read_u32_array(client->dev.of_node, "reg", reg, ARRAY_SIZE(reg))) 2449 lvr = reg[2]; 2450 2451 return lvr; 2452 } 2453 2454 static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client) 2455 { 2456 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2457 enum i3c_addr_slot_status status; 2458 struct i2c_dev_desc *i2cdev; 2459 int ret; 2460 2461 /* Already added by board info? */ 2462 if (i3c_master_find_i2c_dev_by_addr(master, client->addr)) 2463 return 0; 2464 2465 status = i3c_bus_get_addr_slot_status(&master->bus, client->addr); 2466 if (status != I3C_ADDR_SLOT_FREE) 2467 return -EBUSY; 2468 2469 i3c_bus_set_addr_slot_status(&master->bus, client->addr, 2470 I3C_ADDR_SLOT_I2C_DEV); 2471 2472 i2cdev = i3c_master_alloc_i2c_dev(master, client->addr, 2473 i3c_master_i2c_get_lvr(client)); 2474 if (IS_ERR(i2cdev)) { 2475 ret = PTR_ERR(i2cdev); 2476 goto out_clear_status; 2477 } 2478 2479 ret = i3c_master_attach_i2c_dev(master, i2cdev); 2480 if (ret) 2481 goto out_free_dev; 2482 2483 return 0; 2484 2485 out_free_dev: 2486 i3c_master_free_i2c_dev(i2cdev); 2487 out_clear_status: 2488 i3c_bus_set_addr_slot_status(&master->bus, client->addr, 2489 I3C_ADDR_SLOT_FREE); 2490 2491 return ret; 2492 } 2493 2494 static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client) 2495 { 2496 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2497 struct i2c_dev_desc *dev; 2498 2499 dev = i3c_master_find_i2c_dev_by_addr(master, client->addr); 2500 if (!dev) 2501 return -ENODEV; 2502 2503 i3c_master_detach_i2c_dev(dev); 2504 i3c_bus_set_addr_slot_status(&master->bus, dev->addr, 2505 I3C_ADDR_SLOT_FREE); 2506 i3c_master_free_i2c_dev(dev); 2507 2508 return 0; 2509 } 2510 2511 static const struct i2c_algorithm i3c_master_i2c_algo = { 2512 .master_xfer = i3c_master_i2c_adapter_xfer, 2513 .functionality = i3c_master_i2c_funcs, 2514 }; 2515 2516 static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action, 2517 void *data) 2518 { 2519 struct i2c_adapter *adap; 2520 struct i2c_client *client; 2521 struct device *dev = data; 2522 struct i3c_master_controller *master; 2523 int ret; 2524 2525 if (dev->type != &i2c_client_type) 2526 return 0; 2527 2528 client = to_i2c_client(dev); 2529 adap = client->adapter; 2530 2531 if (adap->algo != &i3c_master_i2c_algo) 2532 return 0; 2533 2534 master = i2c_adapter_to_i3c_master(adap); 2535 2536 i3c_bus_maintenance_lock(&master->bus); 2537 switch (action) { 2538 case BUS_NOTIFY_ADD_DEVICE: 2539 ret = i3c_master_i2c_attach(adap, client); 2540 break; 2541 case BUS_NOTIFY_DEL_DEVICE: 2542 ret = i3c_master_i2c_detach(adap, client); 2543 break; 2544 default: 2545 ret = -EINVAL; 2546 } 2547 i3c_bus_maintenance_unlock(&master->bus); 2548 2549 return ret; 2550 } 2551 2552 static struct notifier_block i2cdev_notifier = { 2553 .notifier_call = i3c_i2c_notifier_call, 2554 }; 2555 2556 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master) 2557 { 2558 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master); 2559 struct i2c_dev_desc *i2cdev; 2560 struct i2c_dev_boardinfo *i2cboardinfo; 2561 int ret, id; 2562 2563 adap->dev.parent = master->dev.parent; 2564 adap->owner = master->dev.parent->driver->owner; 2565 adap->algo = &i3c_master_i2c_algo; 2566 strscpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name)); 2567 adap->timeout = HZ; 2568 adap->retries = 3; 2569 2570 id = of_alias_get_id(master->dev.of_node, "i2c"); 2571 if (id >= 0) { 2572 adap->nr = id; 2573 ret = i2c_add_numbered_adapter(adap); 2574 } else { 2575 ret = i2c_add_adapter(adap); 2576 } 2577 if (ret) 2578 return ret; 2579 2580 /* 2581 * We silently ignore failures here. The bus should keep working 2582 * correctly even if one or more i2c devices are not registered. 2583 */ 2584 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) { 2585 i2cdev = i3c_master_find_i2c_dev_by_addr(master, 2586 i2cboardinfo->base.addr); 2587 if (WARN_ON(!i2cdev)) 2588 continue; 2589 i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base); 2590 } 2591 2592 return 0; 2593 } 2594 2595 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master) 2596 { 2597 struct i2c_dev_desc *i2cdev; 2598 2599 i2c_del_adapter(&master->i2c); 2600 2601 i3c_bus_for_each_i2cdev(&master->bus, i2cdev) 2602 i2cdev->dev = NULL; 2603 } 2604 2605 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master) 2606 { 2607 struct i3c_dev_desc *i3cdev; 2608 2609 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 2610 if (!i3cdev->dev) 2611 continue; 2612 2613 i3cdev->dev->desc = NULL; 2614 if (device_is_registered(&i3cdev->dev->dev)) 2615 device_unregister(&i3cdev->dev->dev); 2616 else 2617 put_device(&i3cdev->dev->dev); 2618 i3cdev->dev = NULL; 2619 } 2620 } 2621 2622 /** 2623 * i3c_master_queue_ibi() - Queue an IBI 2624 * @dev: the device this IBI is coming from 2625 * @slot: the IBI slot used to store the payload 2626 * 2627 * Queue an IBI to the controller workqueue. The IBI handler attached to 2628 * the dev will be called from a workqueue context. 2629 */ 2630 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot) 2631 { 2632 if (!dev->ibi || !slot) 2633 return; 2634 2635 atomic_inc(&dev->ibi->pending_ibis); 2636 queue_work(dev->ibi->wq, &slot->work); 2637 } 2638 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi); 2639 2640 static void i3c_master_handle_ibi(struct work_struct *work) 2641 { 2642 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot, 2643 work); 2644 struct i3c_dev_desc *dev = slot->dev; 2645 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2646 struct i3c_ibi_payload payload; 2647 2648 payload.data = slot->data; 2649 payload.len = slot->len; 2650 2651 if (dev->dev) 2652 dev->ibi->handler(dev->dev, &payload); 2653 2654 master->ops->recycle_ibi_slot(dev, slot); 2655 if (atomic_dec_and_test(&dev->ibi->pending_ibis)) 2656 complete(&dev->ibi->all_ibis_handled); 2657 } 2658 2659 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev, 2660 struct i3c_ibi_slot *slot) 2661 { 2662 slot->dev = dev; 2663 INIT_WORK(&slot->work, i3c_master_handle_ibi); 2664 } 2665 2666 struct i3c_generic_ibi_slot { 2667 struct list_head node; 2668 struct i3c_ibi_slot base; 2669 }; 2670 2671 struct i3c_generic_ibi_pool { 2672 spinlock_t lock; 2673 unsigned int num_slots; 2674 struct i3c_generic_ibi_slot *slots; 2675 void *payload_buf; 2676 struct list_head free_slots; 2677 struct list_head pending; 2678 }; 2679 2680 /** 2681 * i3c_generic_ibi_free_pool() - Free a generic IBI pool 2682 * @pool: the IBI pool to free 2683 * 2684 * Free all IBI slots allated by a generic IBI pool. 2685 */ 2686 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool) 2687 { 2688 struct i3c_generic_ibi_slot *slot; 2689 unsigned int nslots = 0; 2690 2691 while (!list_empty(&pool->free_slots)) { 2692 slot = list_first_entry(&pool->free_slots, 2693 struct i3c_generic_ibi_slot, node); 2694 list_del(&slot->node); 2695 nslots++; 2696 } 2697 2698 /* 2699 * If the number of freed slots is not equal to the number of allocated 2700 * slots we have a leak somewhere. 2701 */ 2702 WARN_ON(nslots != pool->num_slots); 2703 2704 kfree(pool->payload_buf); 2705 kfree(pool->slots); 2706 kfree(pool); 2707 } 2708 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool); 2709 2710 /** 2711 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool 2712 * @dev: the device this pool will be used for 2713 * @req: IBI setup request describing what the device driver expects 2714 * 2715 * Create a generic IBI pool based on the information provided in @req. 2716 * 2717 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise. 2718 */ 2719 struct i3c_generic_ibi_pool * 2720 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev, 2721 const struct i3c_ibi_setup *req) 2722 { 2723 struct i3c_generic_ibi_pool *pool; 2724 struct i3c_generic_ibi_slot *slot; 2725 unsigned int i; 2726 int ret; 2727 2728 pool = kzalloc(sizeof(*pool), GFP_KERNEL); 2729 if (!pool) 2730 return ERR_PTR(-ENOMEM); 2731 2732 spin_lock_init(&pool->lock); 2733 INIT_LIST_HEAD(&pool->free_slots); 2734 INIT_LIST_HEAD(&pool->pending); 2735 2736 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL); 2737 if (!pool->slots) { 2738 ret = -ENOMEM; 2739 goto err_free_pool; 2740 } 2741 2742 if (req->max_payload_len) { 2743 pool->payload_buf = kcalloc(req->num_slots, 2744 req->max_payload_len, GFP_KERNEL); 2745 if (!pool->payload_buf) { 2746 ret = -ENOMEM; 2747 goto err_free_pool; 2748 } 2749 } 2750 2751 for (i = 0; i < req->num_slots; i++) { 2752 slot = &pool->slots[i]; 2753 i3c_master_init_ibi_slot(dev, &slot->base); 2754 2755 if (req->max_payload_len) 2756 slot->base.data = pool->payload_buf + 2757 (i * req->max_payload_len); 2758 2759 list_add_tail(&slot->node, &pool->free_slots); 2760 pool->num_slots++; 2761 } 2762 2763 return pool; 2764 2765 err_free_pool: 2766 i3c_generic_ibi_free_pool(pool); 2767 return ERR_PTR(ret); 2768 } 2769 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool); 2770 2771 /** 2772 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool 2773 * @pool: the pool to query an IBI slot on 2774 * 2775 * Search for a free slot in a generic IBI pool. 2776 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot() 2777 * when it's no longer needed. 2778 * 2779 * Return: a pointer to a free slot, or NULL if there's no free slot available. 2780 */ 2781 struct i3c_ibi_slot * 2782 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool) 2783 { 2784 struct i3c_generic_ibi_slot *slot; 2785 unsigned long flags; 2786 2787 spin_lock_irqsave(&pool->lock, flags); 2788 slot = list_first_entry_or_null(&pool->free_slots, 2789 struct i3c_generic_ibi_slot, node); 2790 if (slot) 2791 list_del(&slot->node); 2792 spin_unlock_irqrestore(&pool->lock, flags); 2793 2794 return slot ? &slot->base : NULL; 2795 } 2796 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot); 2797 2798 /** 2799 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool 2800 * @pool: the pool to return the IBI slot to 2801 * @s: IBI slot to recycle 2802 * 2803 * Add an IBI slot back to its generic IBI pool. Should be called from the 2804 * master driver struct_master_controller_ops->recycle_ibi() method. 2805 */ 2806 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool, 2807 struct i3c_ibi_slot *s) 2808 { 2809 struct i3c_generic_ibi_slot *slot; 2810 unsigned long flags; 2811 2812 if (!s) 2813 return; 2814 2815 slot = container_of(s, struct i3c_generic_ibi_slot, base); 2816 spin_lock_irqsave(&pool->lock, flags); 2817 list_add_tail(&slot->node, &pool->free_slots); 2818 spin_unlock_irqrestore(&pool->lock, flags); 2819 } 2820 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot); 2821 2822 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops) 2823 { 2824 if (!ops || !ops->bus_init || !ops->priv_xfers || 2825 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers) 2826 return -EINVAL; 2827 2828 if (ops->request_ibi && 2829 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi || 2830 !ops->recycle_ibi_slot)) 2831 return -EINVAL; 2832 2833 return 0; 2834 } 2835 2836 /** 2837 * i3c_master_register() - register an I3C master 2838 * @master: master used to send frames on the bus 2839 * @parent: the parent device (the one that provides this I3C master 2840 * controller) 2841 * @ops: the master controller operations 2842 * @secondary: true if you are registering a secondary master. Will return 2843 * -EOPNOTSUPP if set to true since secondary masters are not yet 2844 * supported 2845 * 2846 * This function takes care of everything for you: 2847 * 2848 * - creates and initializes the I3C bus 2849 * - populates the bus with static I2C devs if @parent->of_node is not 2850 * NULL 2851 * - registers all I3C devices added by the controller during bus 2852 * initialization 2853 * - registers the I2C adapter and all I2C devices 2854 * 2855 * Return: 0 in case of success, a negative error code otherwise. 2856 */ 2857 int i3c_master_register(struct i3c_master_controller *master, 2858 struct device *parent, 2859 const struct i3c_master_controller_ops *ops, 2860 bool secondary) 2861 { 2862 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_MAX_RATE; 2863 struct i3c_bus *i3cbus = i3c_master_get_bus(master); 2864 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE; 2865 struct i2c_dev_boardinfo *i2cbi; 2866 int ret; 2867 2868 /* We do not support secondary masters yet. */ 2869 if (secondary) 2870 return -EOPNOTSUPP; 2871 2872 ret = i3c_master_check_ops(ops); 2873 if (ret) 2874 return ret; 2875 2876 master->dev.parent = parent; 2877 master->dev.of_node = of_node_get(parent->of_node); 2878 master->dev.bus = &i3c_bus_type; 2879 master->dev.type = &i3c_masterdev_type; 2880 master->dev.release = i3c_masterdev_release; 2881 master->ops = ops; 2882 master->secondary = secondary; 2883 INIT_LIST_HEAD(&master->boardinfo.i2c); 2884 INIT_LIST_HEAD(&master->boardinfo.i3c); 2885 2886 ret = i3c_bus_init(i3cbus, master->dev.of_node); 2887 if (ret) 2888 return ret; 2889 2890 device_initialize(&master->dev); 2891 dev_set_name(&master->dev, "i3c-%d", i3cbus->id); 2892 2893 master->dev.dma_mask = parent->dma_mask; 2894 master->dev.coherent_dma_mask = parent->coherent_dma_mask; 2895 master->dev.dma_parms = parent->dma_parms; 2896 2897 ret = of_populate_i3c_bus(master); 2898 if (ret) 2899 goto err_put_dev; 2900 2901 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) { 2902 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) { 2903 case I3C_LVR_I2C_INDEX(0): 2904 if (mode < I3C_BUS_MODE_MIXED_FAST) 2905 mode = I3C_BUS_MODE_MIXED_FAST; 2906 break; 2907 case I3C_LVR_I2C_INDEX(1): 2908 if (mode < I3C_BUS_MODE_MIXED_LIMITED) 2909 mode = I3C_BUS_MODE_MIXED_LIMITED; 2910 break; 2911 case I3C_LVR_I2C_INDEX(2): 2912 if (mode < I3C_BUS_MODE_MIXED_SLOW) 2913 mode = I3C_BUS_MODE_MIXED_SLOW; 2914 break; 2915 default: 2916 ret = -EINVAL; 2917 goto err_put_dev; 2918 } 2919 2920 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE) 2921 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_MAX_RATE; 2922 } 2923 2924 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate); 2925 if (ret) 2926 goto err_put_dev; 2927 2928 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent)); 2929 if (!master->wq) { 2930 ret = -ENOMEM; 2931 goto err_put_dev; 2932 } 2933 2934 ret = i3c_master_bus_init(master); 2935 if (ret) 2936 goto err_put_dev; 2937 2938 ret = device_add(&master->dev); 2939 if (ret) 2940 goto err_cleanup_bus; 2941 2942 /* 2943 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed 2944 * through the I2C subsystem. 2945 */ 2946 ret = i3c_master_i2c_adapter_init(master); 2947 if (ret) 2948 goto err_del_dev; 2949 2950 i3c_bus_notify(i3cbus, I3C_NOTIFY_BUS_ADD); 2951 2952 pm_runtime_no_callbacks(&master->dev); 2953 pm_suspend_ignore_children(&master->dev, true); 2954 pm_runtime_enable(&master->dev); 2955 2956 /* 2957 * We're done initializing the bus and the controller, we can now 2958 * register I3C devices discovered during the initial DAA. 2959 */ 2960 master->init_done = true; 2961 i3c_bus_normaluse_lock(&master->bus); 2962 i3c_master_register_new_i3c_devs(master); 2963 i3c_bus_normaluse_unlock(&master->bus); 2964 2965 return 0; 2966 2967 err_del_dev: 2968 device_del(&master->dev); 2969 2970 err_cleanup_bus: 2971 i3c_master_bus_cleanup(master); 2972 2973 err_put_dev: 2974 put_device(&master->dev); 2975 2976 return ret; 2977 } 2978 EXPORT_SYMBOL_GPL(i3c_master_register); 2979 2980 /** 2981 * i3c_master_unregister() - unregister an I3C master 2982 * @master: master used to send frames on the bus 2983 * 2984 * Basically undo everything done in i3c_master_register(). 2985 */ 2986 void i3c_master_unregister(struct i3c_master_controller *master) 2987 { 2988 i3c_bus_notify(&master->bus, I3C_NOTIFY_BUS_REMOVE); 2989 2990 i3c_master_i2c_adapter_cleanup(master); 2991 i3c_master_unregister_i3c_devs(master); 2992 i3c_master_bus_cleanup(master); 2993 pm_runtime_disable(&master->dev); 2994 device_unregister(&master->dev); 2995 } 2996 EXPORT_SYMBOL_GPL(i3c_master_unregister); 2997 2998 int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev) 2999 { 3000 struct i3c_master_controller *master; 3001 3002 if (!dev) 3003 return -ENOENT; 3004 3005 master = i3c_dev_get_master(dev); 3006 if (!master) 3007 return -EINVAL; 3008 3009 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr || 3010 !dev->boardinfo->static_addr) 3011 return -EINVAL; 3012 3013 return i3c_master_setdasa_locked(master, dev->info.static_addr, 3014 dev->boardinfo->init_dyn_addr); 3015 } 3016 3017 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev, 3018 struct i3c_priv_xfer *xfers, 3019 int nxfers) 3020 { 3021 struct i3c_master_controller *master; 3022 3023 if (!dev) 3024 return -ENOENT; 3025 3026 master = i3c_dev_get_master(dev); 3027 if (!master || !xfers) 3028 return -EINVAL; 3029 3030 if (!master->ops->priv_xfers) 3031 return -EOPNOTSUPP; 3032 3033 return master->ops->priv_xfers(dev, xfers, nxfers); 3034 } 3035 3036 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev) 3037 { 3038 struct i3c_master_controller *master; 3039 int ret; 3040 3041 if (!dev->ibi) 3042 return -EINVAL; 3043 3044 master = i3c_dev_get_master(dev); 3045 ret = master->ops->disable_ibi(dev); 3046 if (ret) 3047 return ret; 3048 3049 reinit_completion(&dev->ibi->all_ibis_handled); 3050 if (atomic_read(&dev->ibi->pending_ibis)) 3051 wait_for_completion(&dev->ibi->all_ibis_handled); 3052 3053 dev->ibi->enabled = false; 3054 3055 return 0; 3056 } 3057 3058 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev) 3059 { 3060 struct i3c_master_controller *master = i3c_dev_get_master(dev); 3061 int ret; 3062 3063 if (!dev->ibi) 3064 return -EINVAL; 3065 3066 ret = master->ops->enable_ibi(dev); 3067 if (!ret) 3068 dev->ibi->enabled = true; 3069 3070 return ret; 3071 } 3072 3073 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev, 3074 const struct i3c_ibi_setup *req) 3075 { 3076 struct i3c_master_controller *master = i3c_dev_get_master(dev); 3077 struct i3c_device_ibi_info *ibi; 3078 int ret; 3079 3080 if (!master->ops->request_ibi) 3081 return -EOPNOTSUPP; 3082 3083 if (dev->ibi) 3084 return -EBUSY; 3085 3086 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL); 3087 if (!ibi) 3088 return -ENOMEM; 3089 3090 ibi->wq = alloc_ordered_workqueue(dev_name(i3cdev_to_dev(dev->dev)), WQ_MEM_RECLAIM); 3091 if (!ibi->wq) { 3092 kfree(ibi); 3093 return -ENOMEM; 3094 } 3095 3096 atomic_set(&ibi->pending_ibis, 0); 3097 init_completion(&ibi->all_ibis_handled); 3098 ibi->handler = req->handler; 3099 ibi->max_payload_len = req->max_payload_len; 3100 ibi->num_slots = req->num_slots; 3101 3102 dev->ibi = ibi; 3103 ret = master->ops->request_ibi(dev, req); 3104 if (ret) { 3105 kfree(ibi); 3106 dev->ibi = NULL; 3107 } 3108 3109 return ret; 3110 } 3111 3112 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev) 3113 { 3114 struct i3c_master_controller *master = i3c_dev_get_master(dev); 3115 3116 if (!dev->ibi) 3117 return; 3118 3119 if (WARN_ON(dev->ibi->enabled)) 3120 WARN_ON(i3c_dev_disable_ibi_locked(dev)); 3121 3122 master->ops->free_ibi(dev); 3123 3124 if (dev->ibi->wq) { 3125 destroy_workqueue(dev->ibi->wq); 3126 dev->ibi->wq = NULL; 3127 } 3128 3129 kfree(dev->ibi); 3130 dev->ibi = NULL; 3131 } 3132 3133 static int __init i3c_init(void) 3134 { 3135 int res; 3136 3137 res = of_alias_get_highest_id("i3c"); 3138 if (res >= 0) { 3139 mutex_lock(&i3c_core_lock); 3140 __i3c_first_dynamic_bus_num = res + 1; 3141 mutex_unlock(&i3c_core_lock); 3142 } 3143 3144 res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier); 3145 if (res) 3146 return res; 3147 3148 res = bus_register(&i3c_bus_type); 3149 if (res) 3150 goto out_unreg_notifier; 3151 3152 return 0; 3153 3154 out_unreg_notifier: 3155 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier); 3156 3157 return res; 3158 } 3159 subsys_initcall(i3c_init); 3160 3161 static void __exit i3c_exit(void) 3162 { 3163 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier); 3164 idr_destroy(&i3c_bus_idr); 3165 bus_unregister(&i3c_bus_type); 3166 } 3167 module_exit(i3c_exit); 3168 3169 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>"); 3170 MODULE_DESCRIPTION("I3C core"); 3171 MODULE_LICENSE("GPL v2"); 3172