1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * X-Gene SLIMpro I2C Driver 4 * 5 * Copyright (c) 2014, Applied Micro Circuits Corporation 6 * Author: Feng Kan <fkan@apm.com> 7 * Author: Hieu Le <hnle@apm.com> 8 * 9 * This driver provides support for X-Gene SLIMpro I2C device access 10 * using the APM X-Gene SLIMpro mailbox driver. 11 */ 12 #include <acpi/pcc.h> 13 #include <linux/acpi.h> 14 #include <linux/dma-mapping.h> 15 #include <linux/i2c.h> 16 #include <linux/interrupt.h> 17 #include <linux/io.h> 18 #include <linux/mailbox_client.h> 19 #include <linux/module.h> 20 #include <linux/of.h> 21 #include <linux/platform_device.h> 22 23 #define MAILBOX_OP_TIMEOUT 1000 /* Operation time out in ms */ 24 #define MAILBOX_I2C_INDEX 0 25 #define SLIMPRO_IIC_BUS 1 /* Use I2C bus 1 only */ 26 27 #define SMBUS_CMD_LEN 1 28 #define BYTE_DATA 1 29 #define WORD_DATA 2 30 #define BLOCK_DATA 3 31 32 #define SLIMPRO_IIC_I2C_PROTOCOL 0 33 #define SLIMPRO_IIC_SMB_PROTOCOL 1 34 35 #define SLIMPRO_IIC_READ 0 36 #define SLIMPRO_IIC_WRITE 1 37 38 #define IIC_SMB_WITHOUT_DATA_LEN 0 39 #define IIC_SMB_WITH_DATA_LEN 1 40 41 #define SLIMPRO_DEBUG_MSG 0 42 #define SLIMPRO_MSG_TYPE_SHIFT 28 43 #define SLIMPRO_DBG_SUBTYPE_I2C1READ 4 44 #define SLIMPRO_DBGMSG_TYPE_SHIFT 24 45 #define SLIMPRO_DBGMSG_TYPE_MASK 0x0F000000U 46 #define SLIMPRO_IIC_DEV_SHIFT 23 47 #define SLIMPRO_IIC_DEV_MASK 0x00800000U 48 #define SLIMPRO_IIC_DEVID_SHIFT 13 49 #define SLIMPRO_IIC_DEVID_MASK 0x007FE000U 50 #define SLIMPRO_IIC_RW_SHIFT 12 51 #define SLIMPRO_IIC_RW_MASK 0x00001000U 52 #define SLIMPRO_IIC_PROTO_SHIFT 11 53 #define SLIMPRO_IIC_PROTO_MASK 0x00000800U 54 #define SLIMPRO_IIC_ADDRLEN_SHIFT 8 55 #define SLIMPRO_IIC_ADDRLEN_MASK 0x00000700U 56 #define SLIMPRO_IIC_DATALEN_SHIFT 0 57 #define SLIMPRO_IIC_DATALEN_MASK 0x000000FFU 58 59 /* 60 * SLIMpro I2C message encode 61 * 62 * dev - Controller number (0-based) 63 * chip - I2C chip address 64 * op - SLIMPRO_IIC_READ or SLIMPRO_IIC_WRITE 65 * proto - SLIMPRO_IIC_SMB_PROTOCOL or SLIMPRO_IIC_I2C_PROTOCOL 66 * addrlen - Length of the address field 67 * datalen - Length of the data field 68 */ 69 #define SLIMPRO_IIC_ENCODE_MSG(dev, chip, op, proto, addrlen, datalen) \ 70 ((SLIMPRO_DEBUG_MSG << SLIMPRO_MSG_TYPE_SHIFT) | \ 71 ((SLIMPRO_DBG_SUBTYPE_I2C1READ << SLIMPRO_DBGMSG_TYPE_SHIFT) & \ 72 SLIMPRO_DBGMSG_TYPE_MASK) | \ 73 ((dev << SLIMPRO_IIC_DEV_SHIFT) & SLIMPRO_IIC_DEV_MASK) | \ 74 ((chip << SLIMPRO_IIC_DEVID_SHIFT) & SLIMPRO_IIC_DEVID_MASK) | \ 75 ((op << SLIMPRO_IIC_RW_SHIFT) & SLIMPRO_IIC_RW_MASK) | \ 76 ((proto << SLIMPRO_IIC_PROTO_SHIFT) & SLIMPRO_IIC_PROTO_MASK) | \ 77 ((addrlen << SLIMPRO_IIC_ADDRLEN_SHIFT) & SLIMPRO_IIC_ADDRLEN_MASK) | \ 78 ((datalen << SLIMPRO_IIC_DATALEN_SHIFT) & SLIMPRO_IIC_DATALEN_MASK)) 79 80 #define SLIMPRO_MSG_TYPE(v) (((v) & 0xF0000000) >> 28) 81 82 /* 83 * Encode for upper address for block data 84 */ 85 #define SLIMPRO_IIC_ENCODE_FLAG_BUFADDR 0x80000000 86 #define SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(a) ((u32) (((a) << 30) \ 87 & 0x40000000)) 88 #define SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(a) ((u32) (((a) >> 12) \ 89 & 0x3FF00000)) 90 #define SLIMPRO_IIC_ENCODE_ADDR(a) ((a) & 0x000FFFFF) 91 92 #define SLIMPRO_IIC_MSG_DWORD_COUNT 3 93 94 struct slimpro_i2c_dev { 95 struct i2c_adapter adapter; 96 struct device *dev; 97 struct mbox_chan *mbox_chan; 98 struct pcc_mbox_chan *pcc_chan; 99 struct mbox_client mbox_client; 100 int mbox_idx; 101 struct completion rd_complete; 102 u8 dma_buffer[I2C_SMBUS_BLOCK_MAX + 1]; /* dma_buffer[0] is used for length */ 103 u32 *resp_msg; 104 phys_addr_t comm_base_addr; 105 void *pcc_comm_addr; 106 }; 107 108 #define to_slimpro_i2c_dev(cl) \ 109 container_of(cl, struct slimpro_i2c_dev, mbox_client) 110 111 enum slimpro_i2c_version { 112 XGENE_SLIMPRO_I2C_V1 = 0, 113 XGENE_SLIMPRO_I2C_V2 = 1, 114 }; 115 116 /* 117 * This function tests and clears a bitmask then returns its old value 118 */ 119 static u16 xgene_word_tst_and_clr(u16 *addr, u16 mask) 120 { 121 u16 ret, val; 122 123 val = le16_to_cpu(READ_ONCE(*addr)); 124 ret = val & mask; 125 val &= ~mask; 126 WRITE_ONCE(*addr, cpu_to_le16(val)); 127 128 return ret; 129 } 130 131 static void slimpro_i2c_rx_cb(struct mbox_client *cl, void *mssg) 132 { 133 struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl); 134 135 /* 136 * Response message format: 137 * mssg[0] is the return code of the operation 138 * mssg[1] is the first data word 139 * mssg[2] is NOT used 140 */ 141 if (ctx->resp_msg) 142 *ctx->resp_msg = ((u32 *)mssg)[1]; 143 144 if (ctx->mbox_client.tx_block) 145 complete(&ctx->rd_complete); 146 } 147 148 static void slimpro_i2c_pcc_rx_cb(struct mbox_client *cl, void *msg) 149 { 150 struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl); 151 struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr; 152 153 /* Check if platform sends interrupt */ 154 if (!xgene_word_tst_and_clr(&generic_comm_base->status, 155 PCC_STATUS_SCI_DOORBELL)) 156 return; 157 158 if (xgene_word_tst_and_clr(&generic_comm_base->status, 159 PCC_STATUS_CMD_COMPLETE)) { 160 msg = generic_comm_base + 1; 161 162 /* Response message msg[1] contains the return value. */ 163 if (ctx->resp_msg) 164 *ctx->resp_msg = ((u32 *)msg)[1]; 165 166 complete(&ctx->rd_complete); 167 } 168 } 169 170 static void slimpro_i2c_pcc_tx_prepare(struct slimpro_i2c_dev *ctx, u32 *msg) 171 { 172 struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr; 173 u32 *ptr = (void *)(generic_comm_base + 1); 174 u16 status; 175 int i; 176 177 WRITE_ONCE(generic_comm_base->signature, 178 cpu_to_le32(PCC_SIGNATURE | ctx->mbox_idx)); 179 180 WRITE_ONCE(generic_comm_base->command, 181 cpu_to_le16(SLIMPRO_MSG_TYPE(msg[0]) | PCC_CMD_GENERATE_DB_INTR)); 182 183 status = le16_to_cpu(READ_ONCE(generic_comm_base->status)); 184 status &= ~PCC_STATUS_CMD_COMPLETE; 185 WRITE_ONCE(generic_comm_base->status, cpu_to_le16(status)); 186 187 /* Copy the message to the PCC comm space */ 188 for (i = 0; i < SLIMPRO_IIC_MSG_DWORD_COUNT; i++) 189 WRITE_ONCE(ptr[i], cpu_to_le32(msg[i])); 190 } 191 192 static int start_i2c_msg_xfer(struct slimpro_i2c_dev *ctx) 193 { 194 if (ctx->mbox_client.tx_block || !acpi_disabled) { 195 if (!wait_for_completion_timeout(&ctx->rd_complete, 196 msecs_to_jiffies(MAILBOX_OP_TIMEOUT))) 197 return -ETIMEDOUT; 198 } 199 200 /* Check of invalid data or no device */ 201 if (*ctx->resp_msg == 0xffffffff) 202 return -ENODEV; 203 204 return 0; 205 } 206 207 static int slimpro_i2c_send_msg(struct slimpro_i2c_dev *ctx, 208 u32 *msg, 209 u32 *data) 210 { 211 int rc; 212 213 ctx->resp_msg = data; 214 215 if (!acpi_disabled) { 216 reinit_completion(&ctx->rd_complete); 217 slimpro_i2c_pcc_tx_prepare(ctx, msg); 218 } 219 220 rc = mbox_send_message(ctx->mbox_chan, msg); 221 if (rc < 0) 222 goto err; 223 224 rc = start_i2c_msg_xfer(ctx); 225 226 err: 227 if (!acpi_disabled) 228 mbox_chan_txdone(ctx->mbox_chan, 0); 229 230 ctx->resp_msg = NULL; 231 232 return rc; 233 } 234 235 static int slimpro_i2c_rd(struct slimpro_i2c_dev *ctx, u32 chip, 236 u32 addr, u32 addrlen, u32 protocol, 237 u32 readlen, u32 *data) 238 { 239 u32 msg[3]; 240 241 msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, 242 SLIMPRO_IIC_READ, protocol, addrlen, readlen); 243 msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr); 244 msg[2] = 0; 245 246 return slimpro_i2c_send_msg(ctx, msg, data); 247 } 248 249 static int slimpro_i2c_wr(struct slimpro_i2c_dev *ctx, u32 chip, 250 u32 addr, u32 addrlen, u32 protocol, u32 writelen, 251 u32 data) 252 { 253 u32 msg[3]; 254 255 msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, 256 SLIMPRO_IIC_WRITE, protocol, addrlen, writelen); 257 msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr); 258 msg[2] = data; 259 260 return slimpro_i2c_send_msg(ctx, msg, msg); 261 } 262 263 static int slimpro_i2c_blkrd(struct slimpro_i2c_dev *ctx, u32 chip, u32 addr, 264 u32 addrlen, u32 protocol, u32 readlen, 265 u32 with_data_len, void *data) 266 { 267 dma_addr_t paddr; 268 u32 msg[3]; 269 int rc; 270 271 paddr = dma_map_single(ctx->dev, ctx->dma_buffer, readlen, DMA_FROM_DEVICE); 272 if (dma_mapping_error(ctx->dev, paddr)) { 273 dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n", 274 ctx->dma_buffer); 275 return -ENOMEM; 276 } 277 278 msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_READ, 279 protocol, addrlen, readlen); 280 msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR | 281 SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(with_data_len) | 282 SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) | 283 SLIMPRO_IIC_ENCODE_ADDR(addr); 284 msg[2] = (u32)paddr; 285 286 rc = slimpro_i2c_send_msg(ctx, msg, msg); 287 288 /* Copy to destination */ 289 memcpy(data, ctx->dma_buffer, readlen); 290 291 dma_unmap_single(ctx->dev, paddr, readlen, DMA_FROM_DEVICE); 292 return rc; 293 } 294 295 static int slimpro_i2c_blkwr(struct slimpro_i2c_dev *ctx, u32 chip, 296 u32 addr, u32 addrlen, u32 protocol, u32 writelen, 297 void *data) 298 { 299 dma_addr_t paddr; 300 u32 msg[3]; 301 int rc; 302 303 if (writelen > I2C_SMBUS_BLOCK_MAX) 304 return -EINVAL; 305 306 memcpy(ctx->dma_buffer, data, writelen); 307 paddr = dma_map_single(ctx->dev, ctx->dma_buffer, writelen, 308 DMA_TO_DEVICE); 309 if (dma_mapping_error(ctx->dev, paddr)) { 310 dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n", 311 ctx->dma_buffer); 312 return -ENOMEM; 313 } 314 315 msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_WRITE, 316 protocol, addrlen, writelen); 317 msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR | 318 SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) | 319 SLIMPRO_IIC_ENCODE_ADDR(addr); 320 msg[2] = (u32)paddr; 321 322 if (ctx->mbox_client.tx_block) 323 reinit_completion(&ctx->rd_complete); 324 325 rc = slimpro_i2c_send_msg(ctx, msg, msg); 326 327 dma_unmap_single(ctx->dev, paddr, writelen, DMA_TO_DEVICE); 328 return rc; 329 } 330 331 static int xgene_slimpro_i2c_xfer(struct i2c_adapter *adap, u16 addr, 332 unsigned short flags, char read_write, 333 u8 command, int size, 334 union i2c_smbus_data *data) 335 { 336 struct slimpro_i2c_dev *ctx = i2c_get_adapdata(adap); 337 int ret = -EOPNOTSUPP; 338 u32 val; 339 340 switch (size) { 341 case I2C_SMBUS_BYTE: 342 if (read_write == I2C_SMBUS_READ) { 343 ret = slimpro_i2c_rd(ctx, addr, 0, 0, 344 SLIMPRO_IIC_SMB_PROTOCOL, 345 BYTE_DATA, &val); 346 data->byte = val; 347 } else { 348 ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN, 349 SLIMPRO_IIC_SMB_PROTOCOL, 350 0, 0); 351 } 352 break; 353 case I2C_SMBUS_BYTE_DATA: 354 if (read_write == I2C_SMBUS_READ) { 355 ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN, 356 SLIMPRO_IIC_SMB_PROTOCOL, 357 BYTE_DATA, &val); 358 data->byte = val; 359 } else { 360 val = data->byte; 361 ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN, 362 SLIMPRO_IIC_SMB_PROTOCOL, 363 BYTE_DATA, val); 364 } 365 break; 366 case I2C_SMBUS_WORD_DATA: 367 if (read_write == I2C_SMBUS_READ) { 368 ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN, 369 SLIMPRO_IIC_SMB_PROTOCOL, 370 WORD_DATA, &val); 371 data->word = val; 372 } else { 373 val = data->word; 374 ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN, 375 SLIMPRO_IIC_SMB_PROTOCOL, 376 WORD_DATA, val); 377 } 378 break; 379 case I2C_SMBUS_BLOCK_DATA: 380 if (read_write == I2C_SMBUS_READ) { 381 ret = slimpro_i2c_blkrd(ctx, addr, command, 382 SMBUS_CMD_LEN, 383 SLIMPRO_IIC_SMB_PROTOCOL, 384 I2C_SMBUS_BLOCK_MAX + 1, 385 IIC_SMB_WITH_DATA_LEN, 386 &data->block[0]); 387 388 } else { 389 ret = slimpro_i2c_blkwr(ctx, addr, command, 390 SMBUS_CMD_LEN, 391 SLIMPRO_IIC_SMB_PROTOCOL, 392 data->block[0] + 1, 393 &data->block[0]); 394 } 395 break; 396 case I2C_SMBUS_I2C_BLOCK_DATA: 397 if (read_write == I2C_SMBUS_READ) { 398 ret = slimpro_i2c_blkrd(ctx, addr, 399 command, 400 SMBUS_CMD_LEN, 401 SLIMPRO_IIC_I2C_PROTOCOL, 402 I2C_SMBUS_BLOCK_MAX, 403 IIC_SMB_WITHOUT_DATA_LEN, 404 &data->block[1]); 405 } else { 406 ret = slimpro_i2c_blkwr(ctx, addr, command, 407 SMBUS_CMD_LEN, 408 SLIMPRO_IIC_I2C_PROTOCOL, 409 data->block[0], 410 &data->block[1]); 411 } 412 break; 413 default: 414 break; 415 } 416 return ret; 417 } 418 419 /* 420 * Return list of supported functionality. 421 */ 422 static u32 xgene_slimpro_i2c_func(struct i2c_adapter *adapter) 423 { 424 return I2C_FUNC_SMBUS_BYTE | 425 I2C_FUNC_SMBUS_BYTE_DATA | 426 I2C_FUNC_SMBUS_WORD_DATA | 427 I2C_FUNC_SMBUS_BLOCK_DATA | 428 I2C_FUNC_SMBUS_I2C_BLOCK; 429 } 430 431 static const struct i2c_algorithm xgene_slimpro_i2c_algorithm = { 432 .smbus_xfer = xgene_slimpro_i2c_xfer, 433 .functionality = xgene_slimpro_i2c_func, 434 }; 435 436 static int xgene_slimpro_i2c_probe(struct platform_device *pdev) 437 { 438 struct slimpro_i2c_dev *ctx; 439 struct i2c_adapter *adapter; 440 struct mbox_client *cl; 441 int rc; 442 443 ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); 444 if (!ctx) 445 return -ENOMEM; 446 447 ctx->dev = &pdev->dev; 448 platform_set_drvdata(pdev, ctx); 449 cl = &ctx->mbox_client; 450 451 /* Request mailbox channel */ 452 cl->dev = &pdev->dev; 453 init_completion(&ctx->rd_complete); 454 cl->tx_tout = MAILBOX_OP_TIMEOUT; 455 cl->knows_txdone = false; 456 if (acpi_disabled) { 457 cl->tx_block = true; 458 cl->rx_callback = slimpro_i2c_rx_cb; 459 ctx->mbox_chan = mbox_request_channel(cl, MAILBOX_I2C_INDEX); 460 if (IS_ERR(ctx->mbox_chan)) { 461 dev_err(&pdev->dev, "i2c mailbox channel request failed\n"); 462 return PTR_ERR(ctx->mbox_chan); 463 } 464 } else { 465 struct pcc_mbox_chan *pcc_chan; 466 const struct acpi_device_id *acpi_id; 467 int version = XGENE_SLIMPRO_I2C_V1; 468 469 acpi_id = acpi_match_device(pdev->dev.driver->acpi_match_table, 470 &pdev->dev); 471 if (!acpi_id) 472 return -EINVAL; 473 474 version = (int)acpi_id->driver_data; 475 476 if (device_property_read_u32(&pdev->dev, "pcc-channel", 477 &ctx->mbox_idx)) 478 ctx->mbox_idx = MAILBOX_I2C_INDEX; 479 480 cl->tx_block = false; 481 cl->rx_callback = slimpro_i2c_pcc_rx_cb; 482 pcc_chan = pcc_mbox_request_channel(cl, ctx->mbox_idx); 483 if (IS_ERR(pcc_chan)) { 484 dev_err(&pdev->dev, "PCC mailbox channel request failed\n"); 485 return PTR_ERR(pcc_chan); 486 } 487 488 ctx->pcc_chan = pcc_chan; 489 ctx->mbox_chan = pcc_chan->mchan; 490 491 if (!ctx->mbox_chan->mbox->txdone_irq) { 492 dev_err(&pdev->dev, "PCC IRQ not supported\n"); 493 rc = -ENOENT; 494 goto mbox_err; 495 } 496 497 /* 498 * This is the shared communication region 499 * for the OS and Platform to communicate over. 500 */ 501 ctx->comm_base_addr = pcc_chan->shmem_base_addr; 502 if (ctx->comm_base_addr) { 503 if (version == XGENE_SLIMPRO_I2C_V2) 504 ctx->pcc_comm_addr = memremap( 505 ctx->comm_base_addr, 506 pcc_chan->shmem_size, 507 MEMREMAP_WT); 508 else 509 ctx->pcc_comm_addr = memremap( 510 ctx->comm_base_addr, 511 pcc_chan->shmem_size, 512 MEMREMAP_WB); 513 } else { 514 dev_err(&pdev->dev, "Failed to get PCC comm region\n"); 515 rc = -ENOENT; 516 goto mbox_err; 517 } 518 519 if (!ctx->pcc_comm_addr) { 520 dev_err(&pdev->dev, 521 "Failed to ioremap PCC comm region\n"); 522 rc = -ENOMEM; 523 goto mbox_err; 524 } 525 } 526 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 527 if (rc) 528 dev_warn(&pdev->dev, "Unable to set dma mask\n"); 529 530 /* Setup I2C adapter */ 531 adapter = &ctx->adapter; 532 snprintf(adapter->name, sizeof(adapter->name), "MAILBOX I2C"); 533 adapter->algo = &xgene_slimpro_i2c_algorithm; 534 adapter->class = I2C_CLASS_HWMON; 535 adapter->dev.parent = &pdev->dev; 536 adapter->dev.of_node = pdev->dev.of_node; 537 ACPI_COMPANION_SET(&adapter->dev, ACPI_COMPANION(&pdev->dev)); 538 i2c_set_adapdata(adapter, ctx); 539 rc = i2c_add_adapter(adapter); 540 if (rc) 541 goto mbox_err; 542 543 dev_info(&pdev->dev, "Mailbox I2C Adapter registered\n"); 544 return 0; 545 546 mbox_err: 547 if (acpi_disabled) 548 mbox_free_channel(ctx->mbox_chan); 549 else 550 pcc_mbox_free_channel(ctx->pcc_chan); 551 552 return rc; 553 } 554 555 static void xgene_slimpro_i2c_remove(struct platform_device *pdev) 556 { 557 struct slimpro_i2c_dev *ctx = platform_get_drvdata(pdev); 558 559 i2c_del_adapter(&ctx->adapter); 560 561 if (acpi_disabled) 562 mbox_free_channel(ctx->mbox_chan); 563 else 564 pcc_mbox_free_channel(ctx->pcc_chan); 565 } 566 567 static const struct of_device_id xgene_slimpro_i2c_dt_ids[] = { 568 {.compatible = "apm,xgene-slimpro-i2c" }, 569 {}, 570 }; 571 MODULE_DEVICE_TABLE(of, xgene_slimpro_i2c_dt_ids); 572 573 #ifdef CONFIG_ACPI 574 static const struct acpi_device_id xgene_slimpro_i2c_acpi_ids[] = { 575 {"APMC0D40", XGENE_SLIMPRO_I2C_V1}, 576 {"APMC0D8B", XGENE_SLIMPRO_I2C_V2}, 577 {} 578 }; 579 MODULE_DEVICE_TABLE(acpi, xgene_slimpro_i2c_acpi_ids); 580 #endif 581 582 static struct platform_driver xgene_slimpro_i2c_driver = { 583 .probe = xgene_slimpro_i2c_probe, 584 .remove_new = xgene_slimpro_i2c_remove, 585 .driver = { 586 .name = "xgene-slimpro-i2c", 587 .of_match_table = of_match_ptr(xgene_slimpro_i2c_dt_ids), 588 .acpi_match_table = ACPI_PTR(xgene_slimpro_i2c_acpi_ids) 589 }, 590 }; 591 592 module_platform_driver(xgene_slimpro_i2c_driver); 593 594 MODULE_DESCRIPTION("APM X-Gene SLIMpro I2C driver"); 595 MODULE_AUTHOR("Feng Kan <fkan@apm.com>"); 596 MODULE_AUTHOR("Hieu Le <hnle@apm.com>"); 597 MODULE_LICENSE("GPL"); 598