1 /* 2 Copyright (c) 2003 Mark M. Hoffman <mhoffman@lightlink.com> 3 4 This program is free software; you can redistribute it and/or modify 5 it under the terms of the GNU General Public License as published by 6 the Free Software Foundation; either version 2 of the License, or 7 (at your option) any later version. 8 9 This program is distributed in the hope that it will be useful, 10 but WITHOUT ANY WARRANTY; without even the implied warranty of 11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 GNU General Public License for more details. 13 */ 14 15 /* 16 This module must be considered BETA unless and until 17 the chipset manufacturer releases a datasheet. 18 The register definitions are based on the SiS630. 19 20 This module relies on quirk_sis_96x_smbus (drivers/pci/quirks.c) 21 for just about every machine for which users have reported. 22 If this module isn't detecting your 96x south bridge, have a 23 look there. 24 25 We assume there can only be one SiS96x with one SMBus interface. 26 */ 27 28 #include <linux/module.h> 29 #include <linux/pci.h> 30 #include <linux/kernel.h> 31 #include <linux/delay.h> 32 #include <linux/stddef.h> 33 #include <linux/ioport.h> 34 #include <linux/i2c.h> 35 #include <linux/acpi.h> 36 #include <linux/io.h> 37 38 /* base address register in PCI config space */ 39 #define SIS96x_BAR 0x04 40 41 /* SiS96x SMBus registers */ 42 #define SMB_STS 0x00 43 #define SMB_EN 0x01 44 #define SMB_CNT 0x02 45 #define SMB_HOST_CNT 0x03 46 #define SMB_ADDR 0x04 47 #define SMB_CMD 0x05 48 #define SMB_PCOUNT 0x06 49 #define SMB_COUNT 0x07 50 #define SMB_BYTE 0x08 51 #define SMB_DEV_ADDR 0x10 52 #define SMB_DB0 0x11 53 #define SMB_DB1 0x12 54 #define SMB_SAA 0x13 55 56 /* register count for request_region */ 57 #define SMB_IOSIZE 0x20 58 59 /* Other settings */ 60 #define MAX_TIMEOUT 500 61 62 /* SiS96x SMBus constants */ 63 #define SIS96x_QUICK 0x00 64 #define SIS96x_BYTE 0x01 65 #define SIS96x_BYTE_DATA 0x02 66 #define SIS96x_WORD_DATA 0x03 67 #define SIS96x_PROC_CALL 0x04 68 #define SIS96x_BLOCK_DATA 0x05 69 70 static struct pci_driver sis96x_driver; 71 static struct i2c_adapter sis96x_adapter; 72 static u16 sis96x_smbus_base; 73 74 static inline u8 sis96x_read(u8 reg) 75 { 76 return inb(sis96x_smbus_base + reg) ; 77 } 78 79 static inline void sis96x_write(u8 reg, u8 data) 80 { 81 outb(data, sis96x_smbus_base + reg) ; 82 } 83 84 /* Execute a SMBus transaction. 85 int size is from SIS96x_QUICK to SIS96x_BLOCK_DATA 86 */ 87 static int sis96x_transaction(int size) 88 { 89 int temp; 90 int result = 0; 91 int timeout = 0; 92 93 dev_dbg(&sis96x_adapter.dev, "SMBus transaction %d\n", size); 94 95 /* Make sure the SMBus host is ready to start transmitting */ 96 if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) { 97 98 dev_dbg(&sis96x_adapter.dev, "SMBus busy (0x%02x). " 99 "Resetting...\n", temp); 100 101 /* kill the transaction */ 102 sis96x_write(SMB_HOST_CNT, 0x20); 103 104 /* check it again */ 105 if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) { 106 dev_dbg(&sis96x_adapter.dev, "Failed (0x%02x)\n", temp); 107 return -EBUSY; 108 } else { 109 dev_dbg(&sis96x_adapter.dev, "Successful\n"); 110 } 111 } 112 113 /* Turn off timeout interrupts, set fast host clock */ 114 sis96x_write(SMB_CNT, 0x20); 115 116 /* clear all (sticky) status flags */ 117 temp = sis96x_read(SMB_STS); 118 sis96x_write(SMB_STS, temp & 0x1e); 119 120 /* start the transaction by setting bit 4 and size bits */ 121 sis96x_write(SMB_HOST_CNT, 0x10 | (size & 0x07)); 122 123 /* We will always wait for a fraction of a second! */ 124 do { 125 msleep(1); 126 temp = sis96x_read(SMB_STS); 127 } while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT)); 128 129 /* If the SMBus is still busy, we give up */ 130 if (timeout > MAX_TIMEOUT) { 131 dev_dbg(&sis96x_adapter.dev, "SMBus Timeout! (0x%02x)\n", temp); 132 result = -ETIMEDOUT; 133 } 134 135 /* device error - probably missing ACK */ 136 if (temp & 0x02) { 137 dev_dbg(&sis96x_adapter.dev, "Failed bus transaction!\n"); 138 result = -ENXIO; 139 } 140 141 /* bus collision */ 142 if (temp & 0x04) { 143 dev_dbg(&sis96x_adapter.dev, "Bus collision!\n"); 144 result = -EIO; 145 } 146 147 /* Finish up by resetting the bus */ 148 sis96x_write(SMB_STS, temp); 149 if ((temp = sis96x_read(SMB_STS))) { 150 dev_dbg(&sis96x_adapter.dev, "Failed reset at " 151 "end of transaction! (0x%02x)\n", temp); 152 } 153 154 return result; 155 } 156 157 /* Return negative errno on error. */ 158 static s32 sis96x_access(struct i2c_adapter * adap, u16 addr, 159 unsigned short flags, char read_write, 160 u8 command, int size, union i2c_smbus_data * data) 161 { 162 int status; 163 164 switch (size) { 165 case I2C_SMBUS_QUICK: 166 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 167 size = SIS96x_QUICK; 168 break; 169 170 case I2C_SMBUS_BYTE: 171 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 172 if (read_write == I2C_SMBUS_WRITE) 173 sis96x_write(SMB_CMD, command); 174 size = SIS96x_BYTE; 175 break; 176 177 case I2C_SMBUS_BYTE_DATA: 178 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 179 sis96x_write(SMB_CMD, command); 180 if (read_write == I2C_SMBUS_WRITE) 181 sis96x_write(SMB_BYTE, data->byte); 182 size = SIS96x_BYTE_DATA; 183 break; 184 185 case I2C_SMBUS_PROC_CALL: 186 case I2C_SMBUS_WORD_DATA: 187 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 188 sis96x_write(SMB_CMD, command); 189 if (read_write == I2C_SMBUS_WRITE) { 190 sis96x_write(SMB_BYTE, data->word & 0xff); 191 sis96x_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8); 192 } 193 size = (size == I2C_SMBUS_PROC_CALL ? 194 SIS96x_PROC_CALL : SIS96x_WORD_DATA); 195 break; 196 197 default: 198 dev_warn(&adap->dev, "Unsupported transaction %d\n", size); 199 return -EOPNOTSUPP; 200 } 201 202 status = sis96x_transaction(size); 203 if (status) 204 return status; 205 206 if ((size != SIS96x_PROC_CALL) && 207 ((read_write == I2C_SMBUS_WRITE) || (size == SIS96x_QUICK))) 208 return 0; 209 210 switch (size) { 211 case SIS96x_BYTE: 212 case SIS96x_BYTE_DATA: 213 data->byte = sis96x_read(SMB_BYTE); 214 break; 215 216 case SIS96x_WORD_DATA: 217 case SIS96x_PROC_CALL: 218 data->word = sis96x_read(SMB_BYTE) + 219 (sis96x_read(SMB_BYTE + 1) << 8); 220 break; 221 } 222 return 0; 223 } 224 225 static u32 sis96x_func(struct i2c_adapter *adapter) 226 { 227 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 228 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 229 I2C_FUNC_SMBUS_PROC_CALL; 230 } 231 232 static const struct i2c_algorithm smbus_algorithm = { 233 .smbus_xfer = sis96x_access, 234 .functionality = sis96x_func, 235 }; 236 237 static struct i2c_adapter sis96x_adapter = { 238 .owner = THIS_MODULE, 239 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD, 240 .algo = &smbus_algorithm, 241 }; 242 243 static const struct pci_device_id sis96x_ids[] = { 244 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_SMBUS) }, 245 { 0, } 246 }; 247 248 MODULE_DEVICE_TABLE (pci, sis96x_ids); 249 250 static int sis96x_probe(struct pci_dev *dev, 251 const struct pci_device_id *id) 252 { 253 u16 ww = 0; 254 int retval; 255 256 if (sis96x_smbus_base) { 257 dev_err(&dev->dev, "Only one device supported.\n"); 258 return -EBUSY; 259 } 260 261 pci_read_config_word(dev, PCI_CLASS_DEVICE, &ww); 262 if (PCI_CLASS_SERIAL_SMBUS != ww) { 263 dev_err(&dev->dev, "Unsupported device class 0x%04x!\n", ww); 264 return -ENODEV; 265 } 266 267 sis96x_smbus_base = pci_resource_start(dev, SIS96x_BAR); 268 if (!sis96x_smbus_base) { 269 dev_err(&dev->dev, "SiS96x SMBus base address " 270 "not initialized!\n"); 271 return -EINVAL; 272 } 273 dev_info(&dev->dev, "SiS96x SMBus base address: 0x%04x\n", 274 sis96x_smbus_base); 275 276 retval = acpi_check_resource_conflict(&dev->resource[SIS96x_BAR]); 277 if (retval) 278 return -ENODEV; 279 280 /* Everything is happy, let's grab the memory and set things up. */ 281 if (!request_region(sis96x_smbus_base, SMB_IOSIZE, 282 sis96x_driver.name)) { 283 dev_err(&dev->dev, "SMBus registers 0x%04x-0x%04x " 284 "already in use!\n", sis96x_smbus_base, 285 sis96x_smbus_base + SMB_IOSIZE - 1); 286 287 sis96x_smbus_base = 0; 288 return -EINVAL; 289 } 290 291 /* set up the sysfs linkage to our parent device */ 292 sis96x_adapter.dev.parent = &dev->dev; 293 294 snprintf(sis96x_adapter.name, sizeof(sis96x_adapter.name), 295 "SiS96x SMBus adapter at 0x%04x", sis96x_smbus_base); 296 297 if ((retval = i2c_add_adapter(&sis96x_adapter))) { 298 dev_err(&dev->dev, "Couldn't register adapter!\n"); 299 release_region(sis96x_smbus_base, SMB_IOSIZE); 300 sis96x_smbus_base = 0; 301 } 302 303 return retval; 304 } 305 306 static void sis96x_remove(struct pci_dev *dev) 307 { 308 if (sis96x_smbus_base) { 309 i2c_del_adapter(&sis96x_adapter); 310 release_region(sis96x_smbus_base, SMB_IOSIZE); 311 sis96x_smbus_base = 0; 312 } 313 } 314 315 static struct pci_driver sis96x_driver = { 316 .name = "sis96x_smbus", 317 .id_table = sis96x_ids, 318 .probe = sis96x_probe, 319 .remove = sis96x_remove, 320 }; 321 322 module_pci_driver(sis96x_driver); 323 324 MODULE_AUTHOR("Mark M. Hoffman <mhoffman@lightlink.com>"); 325 MODULE_DESCRIPTION("SiS96x SMBus driver"); 326 MODULE_LICENSE("GPL"); 327