1 /* 2 sis96x.c - Part of lm_sensors, Linux kernel modules for hardware 3 monitoring 4 5 Copyright (c) 2003 Mark M. Hoffman <mhoffman@lightlink.com> 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 20 */ 21 22 /* 23 This module must be considered BETA unless and until 24 the chipset manufacturer releases a datasheet. 25 The register definitions are based on the SiS630. 26 27 This module relies on quirk_sis_96x_smbus (drivers/pci/quirks.c) 28 for just about every machine for which users have reported. 29 If this module isn't detecting your 96x south bridge, have a 30 look there. 31 32 We assume there can only be one SiS96x with one SMBus interface. 33 */ 34 35 #include <linux/module.h> 36 #include <linux/pci.h> 37 #include <linux/kernel.h> 38 #include <linux/delay.h> 39 #include <linux/stddef.h> 40 #include <linux/sched.h> 41 #include <linux/ioport.h> 42 #include <linux/i2c.h> 43 #include <linux/init.h> 44 #include <asm/io.h> 45 46 /* 47 HISTORY: 48 2003-05-11 1.0.0 Updated from lm_sensors project for kernel 2.5 49 (was i2c-sis645.c from lm_sensors 2.7.0) 50 */ 51 #define SIS96x_VERSION "1.0.0" 52 53 /* base address register in PCI config space */ 54 #define SIS96x_BAR 0x04 55 56 /* SiS96x SMBus registers */ 57 #define SMB_STS 0x00 58 #define SMB_EN 0x01 59 #define SMB_CNT 0x02 60 #define SMB_HOST_CNT 0x03 61 #define SMB_ADDR 0x04 62 #define SMB_CMD 0x05 63 #define SMB_PCOUNT 0x06 64 #define SMB_COUNT 0x07 65 #define SMB_BYTE 0x08 66 #define SMB_DEV_ADDR 0x10 67 #define SMB_DB0 0x11 68 #define SMB_DB1 0x12 69 #define SMB_SAA 0x13 70 71 /* register count for request_region */ 72 #define SMB_IOSIZE 0x20 73 74 /* Other settings */ 75 #define MAX_TIMEOUT 500 76 77 /* SiS96x SMBus constants */ 78 #define SIS96x_QUICK 0x00 79 #define SIS96x_BYTE 0x01 80 #define SIS96x_BYTE_DATA 0x02 81 #define SIS96x_WORD_DATA 0x03 82 #define SIS96x_PROC_CALL 0x04 83 #define SIS96x_BLOCK_DATA 0x05 84 85 static struct i2c_adapter sis96x_adapter; 86 static u16 sis96x_smbus_base = 0; 87 88 static inline u8 sis96x_read(u8 reg) 89 { 90 return inb(sis96x_smbus_base + reg) ; 91 } 92 93 static inline void sis96x_write(u8 reg, u8 data) 94 { 95 outb(data, sis96x_smbus_base + reg) ; 96 } 97 98 /* Execute a SMBus transaction. 99 int size is from SIS96x_QUICK to SIS96x_BLOCK_DATA 100 */ 101 static int sis96x_transaction(int size) 102 { 103 int temp; 104 int result = 0; 105 int timeout = 0; 106 107 dev_dbg(&sis96x_adapter.dev, "SMBus transaction %d\n", size); 108 109 /* Make sure the SMBus host is ready to start transmitting */ 110 if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) { 111 112 dev_dbg(&sis96x_adapter.dev, "SMBus busy (0x%02x). " 113 "Resetting...\n", temp); 114 115 /* kill the transaction */ 116 sis96x_write(SMB_HOST_CNT, 0x20); 117 118 /* check it again */ 119 if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) { 120 dev_dbg(&sis96x_adapter.dev, "Failed (0x%02x)\n", temp); 121 return -1; 122 } else { 123 dev_dbg(&sis96x_adapter.dev, "Successful\n"); 124 } 125 } 126 127 /* Turn off timeout interrupts, set fast host clock */ 128 sis96x_write(SMB_CNT, 0x20); 129 130 /* clear all (sticky) status flags */ 131 temp = sis96x_read(SMB_STS); 132 sis96x_write(SMB_STS, temp & 0x1e); 133 134 /* start the transaction by setting bit 4 and size bits */ 135 sis96x_write(SMB_HOST_CNT, 0x10 | (size & 0x07)); 136 137 /* We will always wait for a fraction of a second! */ 138 do { 139 msleep(1); 140 temp = sis96x_read(SMB_STS); 141 } while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT)); 142 143 /* If the SMBus is still busy, we give up */ 144 if (timeout >= MAX_TIMEOUT) { 145 dev_dbg(&sis96x_adapter.dev, "SMBus Timeout! (0x%02x)\n", temp); 146 result = -1; 147 } 148 149 /* device error - probably missing ACK */ 150 if (temp & 0x02) { 151 dev_dbg(&sis96x_adapter.dev, "Failed bus transaction!\n"); 152 result = -1; 153 } 154 155 /* bus collision */ 156 if (temp & 0x04) { 157 dev_dbg(&sis96x_adapter.dev, "Bus collision!\n"); 158 result = -1; 159 } 160 161 /* Finish up by resetting the bus */ 162 sis96x_write(SMB_STS, temp); 163 if ((temp = sis96x_read(SMB_STS))) { 164 dev_dbg(&sis96x_adapter.dev, "Failed reset at " 165 "end of transaction! (0x%02x)\n", temp); 166 } 167 168 return result; 169 } 170 171 /* Return -1 on error. */ 172 static s32 sis96x_access(struct i2c_adapter * adap, u16 addr, 173 unsigned short flags, char read_write, 174 u8 command, int size, union i2c_smbus_data * data) 175 { 176 177 switch (size) { 178 case I2C_SMBUS_QUICK: 179 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 180 size = SIS96x_QUICK; 181 break; 182 183 case I2C_SMBUS_BYTE: 184 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 185 if (read_write == I2C_SMBUS_WRITE) 186 sis96x_write(SMB_CMD, command); 187 size = SIS96x_BYTE; 188 break; 189 190 case I2C_SMBUS_BYTE_DATA: 191 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 192 sis96x_write(SMB_CMD, command); 193 if (read_write == I2C_SMBUS_WRITE) 194 sis96x_write(SMB_BYTE, data->byte); 195 size = SIS96x_BYTE_DATA; 196 break; 197 198 case I2C_SMBUS_PROC_CALL: 199 case I2C_SMBUS_WORD_DATA: 200 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 201 sis96x_write(SMB_CMD, command); 202 if (read_write == I2C_SMBUS_WRITE) { 203 sis96x_write(SMB_BYTE, data->word & 0xff); 204 sis96x_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8); 205 } 206 size = (size == I2C_SMBUS_PROC_CALL ? 207 SIS96x_PROC_CALL : SIS96x_WORD_DATA); 208 break; 209 210 case I2C_SMBUS_BLOCK_DATA: 211 /* TO DO: */ 212 dev_info(&adap->dev, "SMBus block not implemented!\n"); 213 return -1; 214 break; 215 216 default: 217 dev_info(&adap->dev, "Unsupported I2C size\n"); 218 return -1; 219 break; 220 } 221 222 if (sis96x_transaction(size)) 223 return -1; 224 225 if ((size != SIS96x_PROC_CALL) && 226 ((read_write == I2C_SMBUS_WRITE) || (size == SIS96x_QUICK))) 227 return 0; 228 229 switch (size) { 230 case SIS96x_BYTE: 231 case SIS96x_BYTE_DATA: 232 data->byte = sis96x_read(SMB_BYTE); 233 break; 234 235 case SIS96x_WORD_DATA: 236 case SIS96x_PROC_CALL: 237 data->word = sis96x_read(SMB_BYTE) + 238 (sis96x_read(SMB_BYTE + 1) << 8); 239 break; 240 } 241 return 0; 242 } 243 244 static u32 sis96x_func(struct i2c_adapter *adapter) 245 { 246 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 247 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 248 I2C_FUNC_SMBUS_PROC_CALL; 249 } 250 251 static struct i2c_algorithm smbus_algorithm = { 252 .smbus_xfer = sis96x_access, 253 .functionality = sis96x_func, 254 }; 255 256 static struct i2c_adapter sis96x_adapter = { 257 .owner = THIS_MODULE, 258 .class = I2C_CLASS_HWMON, 259 .algo = &smbus_algorithm, 260 .name = "unset", 261 }; 262 263 static struct pci_device_id sis96x_ids[] = { 264 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_SMBUS) }, 265 { 0, } 266 }; 267 268 MODULE_DEVICE_TABLE (pci, sis96x_ids); 269 270 static int __devinit sis96x_probe(struct pci_dev *dev, 271 const struct pci_device_id *id) 272 { 273 u16 ww = 0; 274 int retval; 275 276 if (sis96x_smbus_base) { 277 dev_err(&dev->dev, "Only one device supported.\n"); 278 return -EBUSY; 279 } 280 281 pci_read_config_word(dev, PCI_CLASS_DEVICE, &ww); 282 if (PCI_CLASS_SERIAL_SMBUS != ww) { 283 dev_err(&dev->dev, "Unsupported device class 0x%04x!\n", ww); 284 return -ENODEV; 285 } 286 287 sis96x_smbus_base = pci_resource_start(dev, SIS96x_BAR); 288 if (!sis96x_smbus_base) { 289 dev_err(&dev->dev, "SiS96x SMBus base address " 290 "not initialized!\n"); 291 return -EINVAL; 292 } 293 dev_info(&dev->dev, "SiS96x SMBus base address: 0x%04x\n", 294 sis96x_smbus_base); 295 296 /* Everything is happy, let's grab the memory and set things up. */ 297 if (!request_region(sis96x_smbus_base, SMB_IOSIZE, "sis96x-smbus")) { 298 dev_err(&dev->dev, "SMBus registers 0x%04x-0x%04x " 299 "already in use!\n", sis96x_smbus_base, 300 sis96x_smbus_base + SMB_IOSIZE - 1); 301 302 sis96x_smbus_base = 0; 303 return -EINVAL; 304 } 305 306 /* set up the driverfs linkage to our parent device */ 307 sis96x_adapter.dev.parent = &dev->dev; 308 309 snprintf(sis96x_adapter.name, I2C_NAME_SIZE, 310 "SiS96x SMBus adapter at 0x%04x", sis96x_smbus_base); 311 312 if ((retval = i2c_add_adapter(&sis96x_adapter))) { 313 dev_err(&dev->dev, "Couldn't register adapter!\n"); 314 release_region(sis96x_smbus_base, SMB_IOSIZE); 315 sis96x_smbus_base = 0; 316 } 317 318 return retval; 319 } 320 321 static void __devexit sis96x_remove(struct pci_dev *dev) 322 { 323 if (sis96x_smbus_base) { 324 i2c_del_adapter(&sis96x_adapter); 325 release_region(sis96x_smbus_base, SMB_IOSIZE); 326 sis96x_smbus_base = 0; 327 } 328 } 329 330 static struct pci_driver sis96x_driver = { 331 .name = "sis96x_smbus", 332 .id_table = sis96x_ids, 333 .probe = sis96x_probe, 334 .remove = __devexit_p(sis96x_remove), 335 }; 336 337 static int __init i2c_sis96x_init(void) 338 { 339 printk(KERN_INFO "i2c-sis96x version %s\n", SIS96x_VERSION); 340 return pci_register_driver(&sis96x_driver); 341 } 342 343 static void __exit i2c_sis96x_exit(void) 344 { 345 pci_unregister_driver(&sis96x_driver); 346 } 347 348 MODULE_AUTHOR("Mark M. Hoffman <mhoffman@lightlink.com>"); 349 MODULE_DESCRIPTION("SiS96x SMBus driver"); 350 MODULE_LICENSE("GPL"); 351 352 /* Register initialization functions using helper macros */ 353 module_init(i2c_sis96x_init); 354 module_exit(i2c_sis96x_exit); 355 356