xref: /linux/drivers/i2c/busses/i2c-s3c2410.c (revision c537b994505099b7197e7d3125b942ecbcc51eb6) 
1 /* linux/drivers/i2c/busses/i2c-s3c2410.c
2  *
3  * Copyright (C) 2004,2005 Simtec Electronics
4  *	Ben Dooks <ben@simtec.co.uk>
5  *
6  * S3C2410 I2C Controller
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
21 */
22 
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 
26 #include <linux/i2c.h>
27 #include <linux/i2c-id.h>
28 #include <linux/init.h>
29 #include <linux/time.h>
30 #include <linux/interrupt.h>
31 #include <linux/delay.h>
32 #include <linux/errno.h>
33 #include <linux/err.h>
34 #include <linux/platform_device.h>
35 #include <linux/clk.h>
36 
37 #include <asm/hardware.h>
38 #include <asm/irq.h>
39 #include <asm/io.h>
40 
41 #include <asm/arch/regs-gpio.h>
42 #include <asm/arch/regs-iic.h>
43 #include <asm/arch/iic.h>
44 
45 /* i2c controller state */
46 
47 enum s3c24xx_i2c_state {
48 	STATE_IDLE,
49 	STATE_START,
50 	STATE_READ,
51 	STATE_WRITE,
52 	STATE_STOP
53 };
54 
55 struct s3c24xx_i2c {
56 	spinlock_t		lock;
57 	wait_queue_head_t	wait;
58 
59 	struct i2c_msg		*msg;
60 	unsigned int		msg_num;
61 	unsigned int		msg_idx;
62 	unsigned int		msg_ptr;
63 
64 	enum s3c24xx_i2c_state	state;
65 
66 	void __iomem		*regs;
67 	struct clk		*clk;
68 	struct device		*dev;
69 	struct resource		*irq;
70 	struct resource		*ioarea;
71 	struct i2c_adapter	adap;
72 };
73 
74 /* default platform data to use if not supplied in the platform_device
75 */
76 
77 static struct s3c2410_platform_i2c s3c24xx_i2c_default_platform = {
78 	.flags		= 0,
79 	.slave_addr	= 0x10,
80 	.bus_freq	= 100*1000,
81 	.max_freq	= 400*1000,
82 	.sda_delay	= S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,
83 };
84 
85 /* s3c24xx_i2c_is2440()
86  *
87  * return true is this is an s3c2440
88 */
89 
90 static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c *i2c)
91 {
92 	struct platform_device *pdev = to_platform_device(i2c->dev);
93 
94 	return !strcmp(pdev->name, "s3c2440-i2c");
95 }
96 
97 
98 /* s3c24xx_i2c_get_platformdata
99  *
100  * get the platform data associated with the given device, or return
101  * the default if there is none
102 */
103 
104 static inline struct s3c2410_platform_i2c *s3c24xx_i2c_get_platformdata(struct device *dev)
105 {
106 	if (dev->platform_data != NULL)
107 		return (struct s3c2410_platform_i2c *)dev->platform_data;
108 
109 	return &s3c24xx_i2c_default_platform;
110 }
111 
112 /* s3c24xx_i2c_master_complete
113  *
114  * complete the message and wake up the caller, using the given return code,
115  * or zero to mean ok.
116 */
117 
118 static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c *i2c, int ret)
119 {
120 	dev_dbg(i2c->dev, "master_complete %d\n", ret);
121 
122 	i2c->msg_ptr = 0;
123 	i2c->msg = NULL;
124 	i2c->msg_idx ++;
125 	i2c->msg_num = 0;
126 	if (ret)
127 		i2c->msg_idx = ret;
128 
129 	wake_up(&i2c->wait);
130 }
131 
132 static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c)
133 {
134 	unsigned long tmp;
135 
136 	tmp = readl(i2c->regs + S3C2410_IICCON);
137 	writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
138 
139 }
140 
141 static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c)
142 {
143 	unsigned long tmp;
144 
145 	tmp = readl(i2c->regs + S3C2410_IICCON);
146 	writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
147 
148 }
149 
150 /* irq enable/disable functions */
151 
152 static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c)
153 {
154 	unsigned long tmp;
155 
156 	tmp = readl(i2c->regs + S3C2410_IICCON);
157 	writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
158 }
159 
160 static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c)
161 {
162 	unsigned long tmp;
163 
164 	tmp = readl(i2c->regs + S3C2410_IICCON);
165 	writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
166 }
167 
168 
169 /* s3c24xx_i2c_message_start
170  *
171  * put the start of a message onto the bus
172 */
173 
174 static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c,
175 				      struct i2c_msg *msg)
176 {
177 	unsigned int addr = (msg->addr & 0x7f) << 1;
178 	unsigned long stat;
179 	unsigned long iiccon;
180 
181 	stat = 0;
182 	stat |=  S3C2410_IICSTAT_TXRXEN;
183 
184 	if (msg->flags & I2C_M_RD) {
185 		stat |= S3C2410_IICSTAT_MASTER_RX;
186 		addr |= 1;
187 	} else
188 		stat |= S3C2410_IICSTAT_MASTER_TX;
189 
190 	if (msg->flags & I2C_M_REV_DIR_ADDR)
191 		addr ^= 1;
192 
193 	// todo - check for wether ack wanted or not
194 	s3c24xx_i2c_enable_ack(i2c);
195 
196 	iiccon = readl(i2c->regs + S3C2410_IICCON);
197 	writel(stat, i2c->regs + S3C2410_IICSTAT);
198 
199 	dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr);
200 	writeb(addr, i2c->regs + S3C2410_IICDS);
201 
202 	// delay a bit and reset iiccon before setting start (per samsung)
203 	udelay(1);
204 	dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon);
205 	writel(iiccon, i2c->regs + S3C2410_IICCON);
206 
207 	stat |=  S3C2410_IICSTAT_START;
208 	writel(stat, i2c->regs + S3C2410_IICSTAT);
209 }
210 
211 static inline void s3c24xx_i2c_stop(struct s3c24xx_i2c *i2c, int ret)
212 {
213 	unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT);
214 
215 	dev_dbg(i2c->dev, "STOP\n");
216 
217 	/* stop the transfer */
218 	iicstat &= ~ S3C2410_IICSTAT_START;
219 	writel(iicstat, i2c->regs + S3C2410_IICSTAT);
220 
221 	i2c->state = STATE_STOP;
222 
223 	s3c24xx_i2c_master_complete(i2c, ret);
224 	s3c24xx_i2c_disable_irq(i2c);
225 }
226 
227 /* helper functions to determine the current state in the set of
228  * messages we are sending */
229 
230 /* is_lastmsg()
231  *
232  * returns TRUE if the current message is the last in the set
233 */
234 
235 static inline int is_lastmsg(struct s3c24xx_i2c *i2c)
236 {
237 	return i2c->msg_idx >= (i2c->msg_num - 1);
238 }
239 
240 /* is_msglast
241  *
242  * returns TRUE if we this is the last byte in the current message
243 */
244 
245 static inline int is_msglast(struct s3c24xx_i2c *i2c)
246 {
247 	return i2c->msg_ptr == i2c->msg->len-1;
248 }
249 
250 /* is_msgend
251  *
252  * returns TRUE if we reached the end of the current message
253 */
254 
255 static inline int is_msgend(struct s3c24xx_i2c *i2c)
256 {
257 	return i2c->msg_ptr >= i2c->msg->len;
258 }
259 
260 /* i2s_s3c_irq_nextbyte
261  *
262  * process an interrupt and work out what to do
263  */
264 
265 static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
266 {
267 	unsigned long tmp;
268 	unsigned char byte;
269 	int ret = 0;
270 
271 	switch (i2c->state) {
272 
273 	case STATE_IDLE:
274 		dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __FUNCTION__);
275 		goto out;
276 		break;
277 
278 	case STATE_STOP:
279 		dev_err(i2c->dev, "%s: called in STATE_STOP\n", __FUNCTION__);
280 		s3c24xx_i2c_disable_irq(i2c);
281 		goto out_ack;
282 
283 	case STATE_START:
284 		/* last thing we did was send a start condition on the
285 		 * bus, or started a new i2c message
286 		 */
287 
288 		if (iicstat  & S3C2410_IICSTAT_LASTBIT &&
289 		    !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
290 			/* ack was not received... */
291 
292 			dev_dbg(i2c->dev, "ack was not received\n");
293 			s3c24xx_i2c_stop(i2c, -EREMOTEIO);
294 			goto out_ack;
295 		}
296 
297 		if (i2c->msg->flags & I2C_M_RD)
298 			i2c->state = STATE_READ;
299 		else
300 			i2c->state = STATE_WRITE;
301 
302 		/* terminate the transfer if there is nothing to do
303 		 * (used by the i2c probe to find devices */
304 
305 		if (is_lastmsg(i2c) && i2c->msg->len == 0) {
306 			s3c24xx_i2c_stop(i2c, 0);
307 			goto out_ack;
308 		}
309 
310 		if (i2c->state == STATE_READ)
311 			goto prepare_read;
312 
313 		/* fall through to the write state, as we will need to
314 		 * send a byte as well */
315 
316 	case STATE_WRITE:
317 		/* we are writing data to the device... check for the
318 		 * end of the message, and if so, work out what to do
319 		 */
320 
321 	retry_write:
322 		if (!is_msgend(i2c)) {
323 			byte = i2c->msg->buf[i2c->msg_ptr++];
324 			writeb(byte, i2c->regs + S3C2410_IICDS);
325 
326 		} else if (!is_lastmsg(i2c)) {
327 			/* we need to go to the next i2c message */
328 
329 			dev_dbg(i2c->dev, "WRITE: Next Message\n");
330 
331 			i2c->msg_ptr = 0;
332 			i2c->msg_idx ++;
333 			i2c->msg++;
334 
335 			/* check to see if we need to do another message */
336 			if (i2c->msg->flags & I2C_M_NOSTART) {
337 
338 				if (i2c->msg->flags & I2C_M_RD) {
339 					/* cannot do this, the controller
340 					 * forces us to send a new START
341 					 * when we change direction */
342 
343 					s3c24xx_i2c_stop(i2c, -EINVAL);
344 				}
345 
346 				goto retry_write;
347 			} else {
348 
349 				/* send the new start */
350 				s3c24xx_i2c_message_start(i2c, i2c->msg);
351 				i2c->state = STATE_START;
352 			}
353 
354 		} else {
355 			/* send stop */
356 
357 			s3c24xx_i2c_stop(i2c, 0);
358 		}
359 		break;
360 
361 	case STATE_READ:
362 		/* we have a byte of data in the data register, do
363 		 * something with it, and then work out wether we are
364 		 * going to do any more read/write
365 		 */
366 
367 		if (!(i2c->msg->flags & I2C_M_IGNORE_NAK) &&
368 		    !(is_msglast(i2c) && is_lastmsg(i2c))) {
369 
370 			if (iicstat & S3C2410_IICSTAT_LASTBIT) {
371 				dev_dbg(i2c->dev, "READ: No Ack\n");
372 
373 				s3c24xx_i2c_stop(i2c, -ECONNREFUSED);
374 				goto out_ack;
375 			}
376 		}
377 
378 		byte = readb(i2c->regs + S3C2410_IICDS);
379 		i2c->msg->buf[i2c->msg_ptr++] = byte;
380 
381 	prepare_read:
382 		if (is_msglast(i2c)) {
383 			/* last byte of buffer */
384 
385 			if (is_lastmsg(i2c))
386 				s3c24xx_i2c_disable_ack(i2c);
387 
388 		} else if (is_msgend(i2c)) {
389 			/* ok, we've read the entire buffer, see if there
390 			 * is anything else we need to do */
391 
392 			if (is_lastmsg(i2c)) {
393 				/* last message, send stop and complete */
394 				dev_dbg(i2c->dev, "READ: Send Stop\n");
395 
396 				s3c24xx_i2c_stop(i2c, 0);
397 			} else {
398 				/* go to the next transfer */
399 				dev_dbg(i2c->dev, "READ: Next Transfer\n");
400 
401 				i2c->msg_ptr = 0;
402 				i2c->msg_idx++;
403 				i2c->msg++;
404 			}
405 		}
406 
407 		break;
408 	}
409 
410 	/* acknowlegde the IRQ and get back on with the work */
411 
412  out_ack:
413 	tmp = readl(i2c->regs + S3C2410_IICCON);
414 	tmp &= ~S3C2410_IICCON_IRQPEND;
415 	writel(tmp, i2c->regs + S3C2410_IICCON);
416  out:
417 	return ret;
418 }
419 
420 /* s3c24xx_i2c_irq
421  *
422  * top level IRQ servicing routine
423 */
424 
425 static irqreturn_t s3c24xx_i2c_irq(int irqno, void *dev_id)
426 {
427 	struct s3c24xx_i2c *i2c = dev_id;
428 	unsigned long status;
429 	unsigned long tmp;
430 
431 	status = readl(i2c->regs + S3C2410_IICSTAT);
432 
433 	if (status & S3C2410_IICSTAT_ARBITR) {
434 		// deal with arbitration loss
435 		dev_err(i2c->dev, "deal with arbitration loss\n");
436 	}
437 
438 	if (i2c->state == STATE_IDLE) {
439 		dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");
440 
441 		tmp = readl(i2c->regs + S3C2410_IICCON);
442 		tmp &= ~S3C2410_IICCON_IRQPEND;
443 		writel(tmp, i2c->regs +  S3C2410_IICCON);
444 		goto out;
445 	}
446 
447 	/* pretty much this leaves us with the fact that we've
448 	 * transmitted or received whatever byte we last sent */
449 
450 	i2s_s3c_irq_nextbyte(i2c, status);
451 
452  out:
453 	return IRQ_HANDLED;
454 }
455 
456 
457 /* s3c24xx_i2c_set_master
458  *
459  * get the i2c bus for a master transaction
460 */
461 
462 static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
463 {
464 	unsigned long iicstat;
465 	int timeout = 400;
466 
467 	while (timeout-- > 0) {
468 		iicstat = readl(i2c->regs + S3C2410_IICSTAT);
469 
470 		if (!(iicstat & S3C2410_IICSTAT_BUSBUSY))
471 			return 0;
472 
473 		msleep(1);
474 	}
475 
476 	dev_dbg(i2c->dev, "timeout: GPEDAT is %08x\n",
477 		__raw_readl(S3C2410_GPEDAT));
478 
479 	return -ETIMEDOUT;
480 }
481 
482 /* s3c24xx_i2c_doxfer
483  *
484  * this starts an i2c transfer
485 */
486 
487 static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, struct i2c_msg *msgs, int num)
488 {
489 	unsigned long timeout;
490 	int ret;
491 
492 	ret = s3c24xx_i2c_set_master(i2c);
493 	if (ret != 0) {
494 		dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
495 		ret = -EAGAIN;
496 		goto out;
497 	}
498 
499 	spin_lock_irq(&i2c->lock);
500 
501 	i2c->msg     = msgs;
502 	i2c->msg_num = num;
503 	i2c->msg_ptr = 0;
504 	i2c->msg_idx = 0;
505 	i2c->state   = STATE_START;
506 
507 	s3c24xx_i2c_enable_irq(i2c);
508 	s3c24xx_i2c_message_start(i2c, msgs);
509 	spin_unlock_irq(&i2c->lock);
510 
511 	timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
512 
513 	ret = i2c->msg_idx;
514 
515 	/* having these next two as dev_err() makes life very
516 	 * noisy when doing an i2cdetect */
517 
518 	if (timeout == 0)
519 		dev_dbg(i2c->dev, "timeout\n");
520 	else if (ret != num)
521 		dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
522 
523 	/* ensure the stop has been through the bus */
524 
525 	msleep(1);
526 
527  out:
528 	return ret;
529 }
530 
531 /* s3c24xx_i2c_xfer
532  *
533  * first port of call from the i2c bus code when an message needs
534  * transferring across the i2c bus.
535 */
536 
537 static int s3c24xx_i2c_xfer(struct i2c_adapter *adap,
538 			struct i2c_msg *msgs, int num)
539 {
540 	struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data;
541 	int retry;
542 	int ret;
543 
544 	for (retry = 0; retry < adap->retries; retry++) {
545 
546 		ret = s3c24xx_i2c_doxfer(i2c, msgs, num);
547 
548 		if (ret != -EAGAIN)
549 			return ret;
550 
551 		dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
552 
553 		udelay(100);
554 	}
555 
556 	return -EREMOTEIO;
557 }
558 
559 /* declare our i2c functionality */
560 static u32 s3c24xx_i2c_func(struct i2c_adapter *adap)
561 {
562 	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING;
563 }
564 
565 /* i2c bus registration info */
566 
567 static const struct i2c_algorithm s3c24xx_i2c_algorithm = {
568 	.master_xfer		= s3c24xx_i2c_xfer,
569 	.functionality		= s3c24xx_i2c_func,
570 };
571 
572 static struct s3c24xx_i2c s3c24xx_i2c = {
573 	.lock	= SPIN_LOCK_UNLOCKED,
574 	.wait	= __WAIT_QUEUE_HEAD_INITIALIZER(s3c24xx_i2c.wait),
575 	.adap	= {
576 		.name			= "s3c2410-i2c",
577 		.owner			= THIS_MODULE,
578 		.algo			= &s3c24xx_i2c_algorithm,
579 		.retries		= 2,
580 		.class			= I2C_CLASS_HWMON,
581 	},
582 };
583 
584 /* s3c24xx_i2c_calcdivisor
585  *
586  * return the divisor settings for a given frequency
587 */
588 
589 static int s3c24xx_i2c_calcdivisor(unsigned long clkin, unsigned int wanted,
590 				   unsigned int *div1, unsigned int *divs)
591 {
592 	unsigned int calc_divs = clkin / wanted;
593 	unsigned int calc_div1;
594 
595 	if (calc_divs > (16*16))
596 		calc_div1 = 512;
597 	else
598 		calc_div1 = 16;
599 
600 	calc_divs += calc_div1-1;
601 	calc_divs /= calc_div1;
602 
603 	if (calc_divs == 0)
604 		calc_divs = 1;
605 	if (calc_divs > 17)
606 		calc_divs = 17;
607 
608 	*divs = calc_divs;
609 	*div1 = calc_div1;
610 
611 	return clkin / (calc_divs * calc_div1);
612 }
613 
614 /* freq_acceptable
615  *
616  * test wether a frequency is within the acceptable range of error
617 */
618 
619 static inline int freq_acceptable(unsigned int freq, unsigned int wanted)
620 {
621 	int diff = freq - wanted;
622 
623 	return (diff >= -2 && diff <= 2);
624 }
625 
626 /* s3c24xx_i2c_getdivisor
627  *
628  * work out a divisor for the user requested frequency setting,
629  * either by the requested frequency, or scanning the acceptable
630  * range of frequencies until something is found
631 */
632 
633 static int s3c24xx_i2c_getdivisor(struct s3c24xx_i2c *i2c,
634 				  struct s3c2410_platform_i2c *pdata,
635 				  unsigned long *iicon,
636 				  unsigned int *got)
637 {
638 	unsigned long clkin = clk_get_rate(i2c->clk);
639 
640 	unsigned int divs, div1;
641 	int freq;
642 	int start, end;
643 
644 	clkin /= 1000;		/* clkin now in KHz */
645 
646 	dev_dbg(i2c->dev,  "pdata %p, freq %lu %lu..%lu\n",
647 		 pdata, pdata->bus_freq, pdata->min_freq, pdata->max_freq);
648 
649 	if (pdata->bus_freq != 0) {
650 		freq = s3c24xx_i2c_calcdivisor(clkin, pdata->bus_freq/1000,
651 					       &div1, &divs);
652 		if (freq_acceptable(freq, pdata->bus_freq/1000))
653 			goto found;
654 	}
655 
656 	/* ok, we may have to search for something suitable... */
657 
658 	start = (pdata->max_freq == 0) ? pdata->bus_freq : pdata->max_freq;
659 	end = pdata->min_freq;
660 
661 	start /= 1000;
662 	end /= 1000;
663 
664 	/* search loop... */
665 
666 	for (; start > end; start--) {
667 		freq = s3c24xx_i2c_calcdivisor(clkin, start, &div1, &divs);
668 		if (freq_acceptable(freq, start))
669 			goto found;
670 	}
671 
672 	/* cannot find frequency spec */
673 
674 	return -EINVAL;
675 
676  found:
677 	*got = freq;
678 	*iicon |= (divs-1);
679 	*iicon |= (div1 == 512) ? S3C2410_IICCON_TXDIV_512 : 0;
680 	return 0;
681 }
682 
683 /* s3c24xx_i2c_init
684  *
685  * initialise the controller, set the IO lines and frequency
686 */
687 
688 static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)
689 {
690 	unsigned long iicon = S3C2410_IICCON_IRQEN | S3C2410_IICCON_ACKEN;
691 	struct s3c2410_platform_i2c *pdata;
692 	unsigned int freq;
693 
694 	/* get the plafrom data */
695 
696 	pdata = s3c24xx_i2c_get_platformdata(i2c->adap.dev.parent);
697 
698 	/* inititalise the gpio */
699 
700 	s3c2410_gpio_cfgpin(S3C2410_GPE15, S3C2410_GPE15_IICSDA);
701 	s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPE14_IICSCL);
702 
703 	/* write slave address */
704 
705 	writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD);
706 
707 	dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr);
708 
709 	/* we need to work out the divisors for the clock... */
710 
711 	if (s3c24xx_i2c_getdivisor(i2c, pdata, &iicon, &freq) != 0) {
712 		dev_err(i2c->dev, "cannot meet bus frequency required\n");
713 		return -EINVAL;
714 	}
715 
716 	/* todo - check that the i2c lines aren't being dragged anywhere */
717 
718 	dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq);
719 	dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02lx\n", iicon);
720 
721 	writel(iicon, i2c->regs + S3C2410_IICCON);
722 
723 	/* check for s3c2440 i2c controller  */
724 
725 	if (s3c24xx_i2c_is2440(i2c)) {
726 		dev_dbg(i2c->dev, "S3C2440_IICLC=%08x\n", pdata->sda_delay);
727 
728 		writel(pdata->sda_delay, i2c->regs + S3C2440_IICLC);
729 	}
730 
731 	return 0;
732 }
733 
734 static void s3c24xx_i2c_free(struct s3c24xx_i2c *i2c)
735 {
736 	if (i2c->clk != NULL && !IS_ERR(i2c->clk)) {
737 		clk_disable(i2c->clk);
738 		clk_put(i2c->clk);
739 		i2c->clk = NULL;
740 	}
741 
742 	if (i2c->regs != NULL) {
743 		iounmap(i2c->regs);
744 		i2c->regs = NULL;
745 	}
746 
747 	if (i2c->ioarea != NULL) {
748 		release_resource(i2c->ioarea);
749 		kfree(i2c->ioarea);
750 		i2c->ioarea = NULL;
751 	}
752 }
753 
754 /* s3c24xx_i2c_probe
755  *
756  * called by the bus driver when a suitable device is found
757 */
758 
759 static int s3c24xx_i2c_probe(struct platform_device *pdev)
760 {
761 	struct s3c24xx_i2c *i2c = &s3c24xx_i2c;
762 	struct resource *res;
763 	int ret;
764 
765 	/* find the clock and enable it */
766 
767 	i2c->dev = &pdev->dev;
768 	i2c->clk = clk_get(&pdev->dev, "i2c");
769 	if (IS_ERR(i2c->clk)) {
770 		dev_err(&pdev->dev, "cannot get clock\n");
771 		ret = -ENOENT;
772 		goto out;
773 	}
774 
775 	dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk);
776 
777 	clk_enable(i2c->clk);
778 
779 	/* map the registers */
780 
781 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
782 	if (res == NULL) {
783 		dev_err(&pdev->dev, "cannot find IO resource\n");
784 		ret = -ENOENT;
785 		goto out;
786 	}
787 
788 	i2c->ioarea = request_mem_region(res->start, (res->end-res->start)+1,
789 					 pdev->name);
790 
791 	if (i2c->ioarea == NULL) {
792 		dev_err(&pdev->dev, "cannot request IO\n");
793 		ret = -ENXIO;
794 		goto out;
795 	}
796 
797 	i2c->regs = ioremap(res->start, (res->end-res->start)+1);
798 
799 	if (i2c->regs == NULL) {
800 		dev_err(&pdev->dev, "cannot map IO\n");
801 		ret = -ENXIO;
802 		goto out;
803 	}
804 
805 	dev_dbg(&pdev->dev, "registers %p (%p, %p)\n", i2c->regs, i2c->ioarea, res);
806 
807 	/* setup info block for the i2c core */
808 
809 	i2c->adap.algo_data = i2c;
810 	i2c->adap.dev.parent = &pdev->dev;
811 
812 	/* initialise the i2c controller */
813 
814 	ret = s3c24xx_i2c_init(i2c);
815 	if (ret != 0)
816 		goto out;
817 
818 	/* find the IRQ for this unit (note, this relies on the init call to
819 	 * ensure no current IRQs pending
820 	 */
821 
822 	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
823 	if (res == NULL) {
824 		dev_err(&pdev->dev, "cannot find IRQ\n");
825 		ret = -ENOENT;
826 		goto out;
827 	}
828 
829 	ret = request_irq(res->start, s3c24xx_i2c_irq, IRQF_DISABLED,
830 			  pdev->name, i2c);
831 
832 	if (ret != 0) {
833 		dev_err(&pdev->dev, "cannot claim IRQ\n");
834 		goto out;
835 	}
836 
837 	i2c->irq = res;
838 
839 	dev_dbg(&pdev->dev, "irq resource %p (%ld)\n", res, res->start);
840 
841 	ret = i2c_add_adapter(&i2c->adap);
842 	if (ret < 0) {
843 		dev_err(&pdev->dev, "failed to add bus to i2c core\n");
844 		goto out;
845 	}
846 
847 	platform_set_drvdata(pdev, i2c);
848 
849 	dev_info(&pdev->dev, "%s: S3C I2C adapter\n", i2c->adap.dev.bus_id);
850 
851  out:
852 	if (ret < 0)
853 		s3c24xx_i2c_free(i2c);
854 
855 	return ret;
856 }
857 
858 /* s3c24xx_i2c_remove
859  *
860  * called when device is removed from the bus
861 */
862 
863 static int s3c24xx_i2c_remove(struct platform_device *pdev)
864 {
865 	struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
866 
867 	if (i2c != NULL) {
868 		s3c24xx_i2c_free(i2c);
869 		platform_set_drvdata(pdev, NULL);
870 	}
871 
872 	return 0;
873 }
874 
875 #ifdef CONFIG_PM
876 static int s3c24xx_i2c_resume(struct platform_device *dev)
877 {
878 	struct s3c24xx_i2c *i2c = platform_get_drvdata(dev);
879 
880 	if (i2c != NULL)
881 		s3c24xx_i2c_init(i2c);
882 
883 	return 0;
884 }
885 
886 #else
887 #define s3c24xx_i2c_resume NULL
888 #endif
889 
890 /* device driver for platform bus bits */
891 
892 static struct platform_driver s3c2410_i2c_driver = {
893 	.probe		= s3c24xx_i2c_probe,
894 	.remove		= s3c24xx_i2c_remove,
895 	.resume		= s3c24xx_i2c_resume,
896 	.driver		= {
897 		.owner	= THIS_MODULE,
898 		.name	= "s3c2410-i2c",
899 	},
900 };
901 
902 static struct platform_driver s3c2440_i2c_driver = {
903 	.probe		= s3c24xx_i2c_probe,
904 	.remove		= s3c24xx_i2c_remove,
905 	.resume		= s3c24xx_i2c_resume,
906 	.driver		= {
907 		.owner	= THIS_MODULE,
908 		.name	= "s3c2440-i2c",
909 	},
910 };
911 
912 static int __init i2c_adap_s3c_init(void)
913 {
914 	int ret;
915 
916 	ret = platform_driver_register(&s3c2410_i2c_driver);
917 	if (ret == 0) {
918 		ret = platform_driver_register(&s3c2440_i2c_driver);
919 		if (ret)
920 			platform_driver_unregister(&s3c2410_i2c_driver);
921 	}
922 
923 	return ret;
924 }
925 
926 static void __exit i2c_adap_s3c_exit(void)
927 {
928 	platform_driver_unregister(&s3c2410_i2c_driver);
929 	platform_driver_unregister(&s3c2440_i2c_driver);
930 }
931 
932 module_init(i2c_adap_s3c_init);
933 module_exit(i2c_adap_s3c_exit);
934 
935 MODULE_DESCRIPTION("S3C24XX I2C Bus driver");
936 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
937 MODULE_LICENSE("GPL");
938