1 /* 2 SMBus driver for nVidia nForce2 MCP 3 4 Added nForce3 Pro 150 Thomas Leibold <thomas@plx.com>, 5 Ported to 2.5 Patrick Dreker <patrick@dreker.de>, 6 Copyright (c) 2003 Hans-Frieder Vogt <hfvogt@arcor.de>, 7 Based on 8 SMBus 2.0 driver for AMD-8111 IO-Hub 9 Copyright (c) 2002 Vojtech Pavlik 10 11 This program is free software; you can redistribute it and/or modify 12 it under the terms of the GNU General Public License as published by 13 the Free Software Foundation; either version 2 of the License, or 14 (at your option) any later version. 15 16 This program is distributed in the hope that it will be useful, 17 but WITHOUT ANY WARRANTY; without even the implied warranty of 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 GNU General Public License for more details. 20 21 You should have received a copy of the GNU General Public License 22 along with this program; if not, write to the Free Software 23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 24 */ 25 26 /* 27 SUPPORTED DEVICES PCI ID 28 nForce2 MCP 0064 29 nForce2 Ultra 400 MCP 0084 30 nForce3 Pro150 MCP 00D4 31 nForce3 250Gb MCP 00E4 32 nForce4 MCP 0052 33 34 This driver supports the 2 SMBuses that are included in the MCP of the 35 nForce2/3/4 chipsets. 36 */ 37 38 /* Note: we assume there can only be one nForce2, with two SMBus interfaces */ 39 40 #include <linux/module.h> 41 #include <linux/pci.h> 42 #include <linux/kernel.h> 43 #include <linux/stddef.h> 44 #include <linux/sched.h> 45 #include <linux/ioport.h> 46 #include <linux/init.h> 47 #include <linux/i2c.h> 48 #include <linux/delay.h> 49 #include <asm/io.h> 50 51 MODULE_LICENSE("GPL"); 52 MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@arcor.de>"); 53 MODULE_DESCRIPTION("nForce2 SMBus driver"); 54 55 56 struct nforce2_smbus { 57 struct pci_dev *dev; 58 struct i2c_adapter adapter; 59 int base; 60 int size; 61 }; 62 63 64 /* 65 * nVidia nForce2 SMBus control register definitions 66 */ 67 #define NFORCE_PCI_SMB1 0x50 68 #define NFORCE_PCI_SMB2 0x54 69 70 71 /* 72 * ACPI 2.0 chapter 13 SMBus 2.0 EC register model 73 */ 74 #define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */ 75 #define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */ 76 #define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */ 77 #define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */ 78 #define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */ 79 #define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data bytes */ 80 #define NVIDIA_SMB_ALRM_A (smbus->base + 0x25) /* alarm address */ 81 #define NVIDIA_SMB_ALRM_D (smbus->base + 0x26) /* 2 bytes alarm data */ 82 83 #define NVIDIA_SMB_STS_DONE 0x80 84 #define NVIDIA_SMB_STS_ALRM 0x40 85 #define NVIDIA_SMB_STS_RES 0x20 86 #define NVIDIA_SMB_STS_STATUS 0x1f 87 88 #define NVIDIA_SMB_PRTCL_WRITE 0x00 89 #define NVIDIA_SMB_PRTCL_READ 0x01 90 #define NVIDIA_SMB_PRTCL_QUICK 0x02 91 #define NVIDIA_SMB_PRTCL_BYTE 0x04 92 #define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06 93 #define NVIDIA_SMB_PRTCL_WORD_DATA 0x08 94 #define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a 95 #define NVIDIA_SMB_PRTCL_PROC_CALL 0x0c 96 #define NVIDIA_SMB_PRTCL_BLOCK_PROC_CALL 0x0d 97 #define NVIDIA_SMB_PRTCL_I2C_BLOCK_DATA 0x4a 98 #define NVIDIA_SMB_PRTCL_PEC 0x80 99 100 101 /* Other settings */ 102 #define MAX_TIMEOUT 256 103 104 105 106 static s32 nforce2_access(struct i2c_adapter *adap, u16 addr, 107 unsigned short flags, char read_write, 108 u8 command, int size, union i2c_smbus_data *data); 109 static u32 nforce2_func(struct i2c_adapter *adapter); 110 111 112 static struct i2c_algorithm smbus_algorithm = { 113 .name = "Non-I2C SMBus adapter", 114 .id = I2C_ALGO_SMBUS, 115 .smbus_xfer = nforce2_access, 116 .functionality = nforce2_func, 117 }; 118 119 static struct i2c_adapter nforce2_adapter = { 120 .owner = THIS_MODULE, 121 .class = I2C_CLASS_HWMON, 122 .algo = &smbus_algorithm, 123 .name = "unset", 124 }; 125 126 /* Return -1 on error. See smbus.h for more information */ 127 static s32 nforce2_access(struct i2c_adapter * adap, u16 addr, 128 unsigned short flags, char read_write, 129 u8 command, int size, union i2c_smbus_data * data) 130 { 131 struct nforce2_smbus *smbus = adap->algo_data; 132 unsigned char protocol, pec, temp; 133 unsigned char len = 0; /* to keep the compiler quiet */ 134 int timeout = 0; 135 int i; 136 137 protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ : 138 NVIDIA_SMB_PRTCL_WRITE; 139 pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0; 140 141 switch (size) { 142 143 case I2C_SMBUS_QUICK: 144 protocol |= NVIDIA_SMB_PRTCL_QUICK; 145 read_write = I2C_SMBUS_WRITE; 146 break; 147 148 case I2C_SMBUS_BYTE: 149 if (read_write == I2C_SMBUS_WRITE) 150 outb_p(command, NVIDIA_SMB_CMD); 151 protocol |= NVIDIA_SMB_PRTCL_BYTE; 152 break; 153 154 case I2C_SMBUS_BYTE_DATA: 155 outb_p(command, NVIDIA_SMB_CMD); 156 if (read_write == I2C_SMBUS_WRITE) 157 outb_p(data->byte, NVIDIA_SMB_DATA); 158 protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA; 159 break; 160 161 case I2C_SMBUS_WORD_DATA: 162 outb_p(command, NVIDIA_SMB_CMD); 163 if (read_write == I2C_SMBUS_WRITE) { 164 outb_p(data->word, NVIDIA_SMB_DATA); 165 outb_p(data->word >> 8, NVIDIA_SMB_DATA+1); 166 } 167 protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec; 168 break; 169 170 case I2C_SMBUS_BLOCK_DATA: 171 outb_p(command, NVIDIA_SMB_CMD); 172 if (read_write == I2C_SMBUS_WRITE) { 173 len = min_t(u8, data->block[0], 32); 174 outb_p(len, NVIDIA_SMB_BCNT); 175 for (i = 0; i < len; i++) 176 outb_p(data->block[i + 1], NVIDIA_SMB_DATA+i); 177 } 178 protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec; 179 break; 180 181 case I2C_SMBUS_I2C_BLOCK_DATA: 182 len = min_t(u8, data->block[0], 32); 183 outb_p(command, NVIDIA_SMB_CMD); 184 outb_p(len, NVIDIA_SMB_BCNT); 185 if (read_write == I2C_SMBUS_WRITE) 186 for (i = 0; i < len; i++) 187 outb_p(data->block[i + 1], NVIDIA_SMB_DATA+i); 188 protocol |= NVIDIA_SMB_PRTCL_I2C_BLOCK_DATA; 189 break; 190 191 case I2C_SMBUS_PROC_CALL: 192 dev_err(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n"); 193 return -1; 194 /* 195 outb_p(command, NVIDIA_SMB_CMD); 196 outb_p(data->word, NVIDIA_SMB_DATA); 197 outb_p(data->word >> 8, NVIDIA_SMB_DATA + 1); 198 protocol = NVIDIA_SMB_PRTCL_PROC_CALL | pec; 199 read_write = I2C_SMBUS_READ; 200 break; 201 */ 202 203 case I2C_SMBUS_BLOCK_PROC_CALL: 204 dev_err(&adap->dev, "I2C_SMBUS_BLOCK_PROC_CALL not supported!\n"); 205 return -1; 206 /* 207 protocol |= pec; 208 len = min_t(u8, data->block[0], 31); 209 outb_p(command, NVIDIA_SMB_CMD); 210 outb_p(len, NVIDIA_SMB_BCNT); 211 for (i = 0; i < len; i++) 212 outb_p(data->block[i + 1], NVIDIA_SMB_DATA + i); 213 protocol = NVIDIA_SMB_PRTCL_BLOCK_PROC_CALL | pec; 214 read_write = I2C_SMBUS_READ; 215 break; 216 */ 217 218 case I2C_SMBUS_WORD_DATA_PEC: 219 case I2C_SMBUS_BLOCK_DATA_PEC: 220 case I2C_SMBUS_PROC_CALL_PEC: 221 case I2C_SMBUS_BLOCK_PROC_CALL_PEC: 222 dev_err(&adap->dev, "Unexpected software PEC transaction %d\n.", size); 223 return -1; 224 225 default: 226 dev_err(&adap->dev, "Unsupported transaction %d\n", size); 227 return -1; 228 } 229 230 outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR); 231 outb_p(protocol, NVIDIA_SMB_PRTCL); 232 233 temp = inb_p(NVIDIA_SMB_STS); 234 235 #if 0 236 do { 237 i2c_do_pause(1); 238 temp = inb_p(NVIDIA_SMB_STS); 239 } while (((temp & NVIDIA_SMB_STS_DONE) == 0) && (timeout++ < MAX_TIMEOUT)); 240 #endif 241 if (~temp & NVIDIA_SMB_STS_DONE) { 242 udelay(500); 243 temp = inb_p(NVIDIA_SMB_STS); 244 } 245 if (~temp & NVIDIA_SMB_STS_DONE) { 246 msleep(10); 247 temp = inb_p(NVIDIA_SMB_STS); 248 } 249 250 if ((timeout >= MAX_TIMEOUT) || (~temp & NVIDIA_SMB_STS_DONE) 251 || (temp & NVIDIA_SMB_STS_STATUS)) 252 return -1; 253 254 if (read_write == I2C_SMBUS_WRITE) 255 return 0; 256 257 switch (size) { 258 259 case I2C_SMBUS_BYTE: 260 case I2C_SMBUS_BYTE_DATA: 261 data->byte = inb_p(NVIDIA_SMB_DATA); 262 break; 263 264 case I2C_SMBUS_WORD_DATA: 265 /* case I2C_SMBUS_PROC_CALL: not supported */ 266 data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8); 267 break; 268 269 case I2C_SMBUS_BLOCK_DATA: 270 /* case I2C_SMBUS_BLOCK_PROC_CALL: not supported */ 271 len = inb_p(NVIDIA_SMB_BCNT); 272 len = min_t(u8, len, 32); 273 case I2C_SMBUS_I2C_BLOCK_DATA: 274 for (i = 0; i < len; i++) 275 data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i); 276 data->block[0] = len; 277 break; 278 } 279 280 return 0; 281 } 282 283 284 static u32 nforce2_func(struct i2c_adapter *adapter) 285 { 286 /* other functionality might be possible, but is not tested */ 287 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 288 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA /* | 289 I2C_FUNC_SMBUS_BLOCK_DATA */; 290 } 291 292 293 static struct pci_device_id nforce2_ids[] = { 294 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) }, 295 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) }, 296 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) }, 297 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) }, 298 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) }, 299 { 0 } 300 }; 301 302 303 MODULE_DEVICE_TABLE (pci, nforce2_ids); 304 305 306 static int __devinit nforce2_probe_smb (struct pci_dev *dev, int reg, 307 struct nforce2_smbus *smbus, char *name) 308 { 309 u16 iobase; 310 int error; 311 312 if (pci_read_config_word(dev, reg, &iobase) != PCIBIOS_SUCCESSFUL) { 313 dev_err(&smbus->adapter.dev, "Error reading PCI config for %s\n", name); 314 return -1; 315 } 316 smbus->dev = dev; 317 smbus->base = iobase & 0xfffc; 318 smbus->size = 8; 319 320 if (!request_region(smbus->base, smbus->size, "nForce2 SMBus")) { 321 dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n", 322 smbus->base, smbus->base+smbus->size-1, name); 323 return -1; 324 } 325 smbus->adapter = nforce2_adapter; 326 smbus->adapter.algo_data = smbus; 327 smbus->adapter.dev.parent = &dev->dev; 328 snprintf(smbus->adapter.name, I2C_NAME_SIZE, 329 "SMBus nForce2 adapter at %04x", smbus->base); 330 331 error = i2c_add_adapter(&smbus->adapter); 332 if (error) { 333 dev_err(&smbus->adapter.dev, "Failed to register adapter.\n"); 334 release_region(smbus->base, smbus->size); 335 return -1; 336 } 337 dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base); 338 return 0; 339 } 340 341 342 static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id) 343 { 344 struct nforce2_smbus *smbuses; 345 int res1, res2; 346 347 /* we support 2 SMBus adapters */ 348 if (!(smbuses = (void *)kmalloc(2*sizeof(struct nforce2_smbus), 349 GFP_KERNEL))) 350 return -ENOMEM; 351 memset (smbuses, 0, 2*sizeof(struct nforce2_smbus)); 352 pci_set_drvdata(dev, smbuses); 353 354 /* SMBus adapter 1 */ 355 res1 = nforce2_probe_smb (dev, NFORCE_PCI_SMB1, &smbuses[0], "SMB1"); 356 if (res1 < 0) { 357 dev_err(&dev->dev, "Error probing SMB1.\n"); 358 smbuses[0].base = 0; /* to have a check value */ 359 } 360 res2 = nforce2_probe_smb (dev, NFORCE_PCI_SMB2, &smbuses[1], "SMB2"); 361 if (res2 < 0) { 362 dev_err(&dev->dev, "Error probing SMB2.\n"); 363 smbuses[1].base = 0; /* to have a check value */ 364 } 365 if ((res1 < 0) && (res2 < 0)) { 366 /* we did not find even one of the SMBuses, so we give up */ 367 kfree(smbuses); 368 return -ENODEV; 369 } 370 371 return 0; 372 } 373 374 375 static void __devexit nforce2_remove(struct pci_dev *dev) 376 { 377 struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev); 378 379 if (smbuses[0].base) { 380 i2c_del_adapter(&smbuses[0].adapter); 381 release_region(smbuses[0].base, smbuses[0].size); 382 } 383 if (smbuses[1].base) { 384 i2c_del_adapter(&smbuses[1].adapter); 385 release_region(smbuses[1].base, smbuses[1].size); 386 } 387 kfree(smbuses); 388 } 389 390 static struct pci_driver nforce2_driver = { 391 .name = "nForce2_smbus", 392 .id_table = nforce2_ids, 393 .probe = nforce2_probe, 394 .remove = __devexit_p(nforce2_remove), 395 }; 396 397 static int __init nforce2_init(void) 398 { 399 return pci_register_driver(&nforce2_driver); 400 } 401 402 static void __exit nforce2_exit(void) 403 { 404 pci_unregister_driver(&nforce2_driver); 405 } 406 407 module_init(nforce2_init); 408 module_exit(nforce2_exit); 409 410