1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 SMBus driver for nVidia nForce2 MCP 4 5 Added nForce3 Pro 150 Thomas Leibold <thomas@plx.com>, 6 Ported to 2.5 Patrick Dreker <patrick@dreker.de>, 7 Copyright (c) 2003 Hans-Frieder Vogt <hfvogt@arcor.de>, 8 Based on 9 SMBus 2.0 driver for AMD-8111 IO-Hub 10 Copyright (c) 2002 Vojtech Pavlik 11 12 */ 13 14 /* 15 SUPPORTED DEVICES PCI ID 16 nForce2 MCP 0064 17 nForce2 Ultra 400 MCP 0084 18 nForce3 Pro150 MCP 00D4 19 nForce3 250Gb MCP 00E4 20 nForce4 MCP 0052 21 nForce4 MCP-04 0034 22 nForce MCP51 0264 23 nForce MCP55 0368 24 nForce MCP61 03EB 25 nForce MCP65 0446 26 nForce MCP67 0542 27 nForce MCP73 07D8 28 nForce MCP78S 0752 29 nForce MCP79 0AA2 30 31 This driver supports the 2 SMBuses that are included in the MCP of the 32 nForce2/3/4/5xx chipsets. 33 */ 34 35 /* Note: we assume there can only be one nForce2, with two SMBus interfaces */ 36 37 #include <linux/module.h> 38 #include <linux/pci.h> 39 #include <linux/kernel.h> 40 #include <linux/stddef.h> 41 #include <linux/ioport.h> 42 #include <linux/i2c.h> 43 #include <linux/delay.h> 44 #include <linux/dmi.h> 45 #include <linux/acpi.h> 46 #include <linux/slab.h> 47 #include <linux/io.h> 48 49 MODULE_LICENSE("GPL"); 50 MODULE_AUTHOR("Hans-Frieder Vogt <hfvogt@gmx.net>"); 51 MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver"); 52 53 54 struct nforce2_smbus { 55 struct i2c_adapter adapter; 56 int base; 57 int size; 58 int blockops; 59 int can_abort; 60 }; 61 62 63 /* 64 * nVidia nForce2 SMBus control register definitions 65 * (Newer incarnations use standard BARs 4 and 5 instead) 66 */ 67 #define NFORCE_PCI_SMB1 0x50 68 #define NFORCE_PCI_SMB2 0x54 69 70 71 /* 72 * ACPI 2.0 chapter 13 SMBus 2.0 EC register model 73 */ 74 #define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */ 75 #define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */ 76 #define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */ 77 #define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */ 78 #define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */ 79 #define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data 80 bytes */ 81 #define NVIDIA_SMB_STATUS_ABRT (smbus->base + 0x3c) /* register used to 82 check the status of 83 the abort command */ 84 #define NVIDIA_SMB_CTRL (smbus->base + 0x3e) /* control register */ 85 86 #define NVIDIA_SMB_STATUS_ABRT_STS 0x01 /* Bit to notify that 87 abort succeeded */ 88 #define NVIDIA_SMB_CTRL_ABORT 0x20 89 #define NVIDIA_SMB_STS_DONE 0x80 90 #define NVIDIA_SMB_STS_ALRM 0x40 91 #define NVIDIA_SMB_STS_RES 0x20 92 #define NVIDIA_SMB_STS_STATUS 0x1f 93 94 #define NVIDIA_SMB_PRTCL_WRITE 0x00 95 #define NVIDIA_SMB_PRTCL_READ 0x01 96 #define NVIDIA_SMB_PRTCL_QUICK 0x02 97 #define NVIDIA_SMB_PRTCL_BYTE 0x04 98 #define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06 99 #define NVIDIA_SMB_PRTCL_WORD_DATA 0x08 100 #define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a 101 #define NVIDIA_SMB_PRTCL_PEC 0x80 102 103 /* Misc definitions */ 104 #define MAX_TIMEOUT 100 105 106 /* We disable the second SMBus channel on these boards */ 107 static const struct dmi_system_id nforce2_dmi_blacklist2[] = { 108 { 109 .ident = "DFI Lanparty NF4 Expert", 110 .matches = { 111 DMI_MATCH(DMI_BOARD_VENDOR, "DFI Corp,LTD"), 112 DMI_MATCH(DMI_BOARD_NAME, "LP UT NF4 Expert"), 113 }, 114 }, 115 { } 116 }; 117 118 static struct pci_driver nforce2_driver; 119 120 static void nforce2_abort(struct i2c_adapter *adap) 121 { 122 struct nforce2_smbus *smbus = adap->algo_data; 123 int timeout = 0; 124 unsigned char temp; 125 126 dev_dbg(&adap->dev, "Aborting current transaction\n"); 127 128 outb_p(NVIDIA_SMB_CTRL_ABORT, NVIDIA_SMB_CTRL); 129 do { 130 msleep(1); 131 temp = inb_p(NVIDIA_SMB_STATUS_ABRT); 132 } while (!(temp & NVIDIA_SMB_STATUS_ABRT_STS) && 133 (timeout++ < MAX_TIMEOUT)); 134 if (!(temp & NVIDIA_SMB_STATUS_ABRT_STS)) 135 dev_err(&adap->dev, "Can't reset the smbus\n"); 136 outb_p(NVIDIA_SMB_STATUS_ABRT_STS, NVIDIA_SMB_STATUS_ABRT); 137 } 138 139 static int nforce2_check_status(struct i2c_adapter *adap) 140 { 141 struct nforce2_smbus *smbus = adap->algo_data; 142 int timeout = 0; 143 unsigned char temp; 144 145 do { 146 msleep(1); 147 temp = inb_p(NVIDIA_SMB_STS); 148 } while ((!temp) && (timeout++ < MAX_TIMEOUT)); 149 150 if (timeout > MAX_TIMEOUT) { 151 dev_dbg(&adap->dev, "SMBus Timeout!\n"); 152 if (smbus->can_abort) 153 nforce2_abort(adap); 154 return -ETIMEDOUT; 155 } 156 if (!(temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) { 157 dev_dbg(&adap->dev, "Transaction failed (0x%02x)!\n", temp); 158 return -EIO; 159 } 160 return 0; 161 } 162 163 /* Return negative errno on error */ 164 static s32 nforce2_access(struct i2c_adapter *adap, u16 addr, 165 unsigned short flags, char read_write, 166 u8 command, int size, union i2c_smbus_data *data) 167 { 168 struct nforce2_smbus *smbus = adap->algo_data; 169 unsigned char protocol, pec; 170 u8 len; 171 int i, status; 172 173 protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ : 174 NVIDIA_SMB_PRTCL_WRITE; 175 pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0; 176 177 switch (size) { 178 case I2C_SMBUS_QUICK: 179 protocol |= NVIDIA_SMB_PRTCL_QUICK; 180 read_write = I2C_SMBUS_WRITE; 181 break; 182 183 case I2C_SMBUS_BYTE: 184 if (read_write == I2C_SMBUS_WRITE) 185 outb_p(command, NVIDIA_SMB_CMD); 186 protocol |= NVIDIA_SMB_PRTCL_BYTE; 187 break; 188 189 case I2C_SMBUS_BYTE_DATA: 190 outb_p(command, NVIDIA_SMB_CMD); 191 if (read_write == I2C_SMBUS_WRITE) 192 outb_p(data->byte, NVIDIA_SMB_DATA); 193 protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA; 194 break; 195 196 case I2C_SMBUS_WORD_DATA: 197 outb_p(command, NVIDIA_SMB_CMD); 198 if (read_write == I2C_SMBUS_WRITE) { 199 outb_p(data->word, NVIDIA_SMB_DATA); 200 outb_p(data->word >> 8, NVIDIA_SMB_DATA + 1); 201 } 202 protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec; 203 break; 204 205 case I2C_SMBUS_BLOCK_DATA: 206 outb_p(command, NVIDIA_SMB_CMD); 207 if (read_write == I2C_SMBUS_WRITE) { 208 len = data->block[0]; 209 if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX)) { 210 dev_err(&adap->dev, 211 "Transaction failed (requested block size: %d)\n", 212 len); 213 return -EINVAL; 214 } 215 outb_p(len, NVIDIA_SMB_BCNT); 216 for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++) 217 outb_p(data->block[i + 1], 218 NVIDIA_SMB_DATA + i); 219 } 220 protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec; 221 break; 222 223 default: 224 dev_err(&adap->dev, "Unsupported transaction %d\n", size); 225 return -EOPNOTSUPP; 226 } 227 228 outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR); 229 outb_p(protocol, NVIDIA_SMB_PRTCL); 230 231 status = nforce2_check_status(adap); 232 if (status) 233 return status; 234 235 if (read_write == I2C_SMBUS_WRITE) 236 return 0; 237 238 switch (size) { 239 case I2C_SMBUS_BYTE: 240 case I2C_SMBUS_BYTE_DATA: 241 data->byte = inb_p(NVIDIA_SMB_DATA); 242 break; 243 244 case I2C_SMBUS_WORD_DATA: 245 data->word = inb_p(NVIDIA_SMB_DATA) | 246 (inb_p(NVIDIA_SMB_DATA + 1) << 8); 247 break; 248 249 case I2C_SMBUS_BLOCK_DATA: 250 len = inb_p(NVIDIA_SMB_BCNT); 251 if ((len <= 0) || (len > I2C_SMBUS_BLOCK_MAX)) { 252 dev_err(&adap->dev, 253 "Transaction failed (received block size: 0x%02x)\n", 254 len); 255 return -EPROTO; 256 } 257 for (i = 0; i < len; i++) 258 data->block[i + 1] = inb_p(NVIDIA_SMB_DATA + i); 259 data->block[0] = len; 260 break; 261 } 262 263 return 0; 264 } 265 266 267 static u32 nforce2_func(struct i2c_adapter *adapter) 268 { 269 /* other functionality might be possible, but is not tested */ 270 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 271 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 272 I2C_FUNC_SMBUS_PEC | 273 (((struct nforce2_smbus *)adapter->algo_data)->blockops ? 274 I2C_FUNC_SMBUS_BLOCK_DATA : 0); 275 } 276 277 static const struct i2c_algorithm smbus_algorithm = { 278 .smbus_xfer = nforce2_access, 279 .functionality = nforce2_func, 280 }; 281 282 283 static const struct pci_device_id nforce2_ids[] = { 284 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) }, 285 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) }, 286 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) }, 287 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) }, 288 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) }, 289 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) }, 290 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) }, 291 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) }, 292 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) }, 293 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) }, 294 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_SMBUS) }, 295 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_SMBUS) }, 296 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS) }, 297 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS) }, 298 { 0 } 299 }; 300 301 MODULE_DEVICE_TABLE(pci, nforce2_ids); 302 303 304 static int nforce2_probe_smb(struct pci_dev *dev, int bar, int alt_reg, 305 struct nforce2_smbus *smbus, const char *name) 306 { 307 int error; 308 309 smbus->base = pci_resource_start(dev, bar); 310 if (smbus->base) { 311 smbus->size = pci_resource_len(dev, bar); 312 } else { 313 /* Older incarnations of the device used non-standard BARs */ 314 u16 iobase; 315 316 error = pci_read_config_word(dev, alt_reg, &iobase); 317 if (error != PCIBIOS_SUCCESSFUL) { 318 dev_err(&dev->dev, "Error reading PCI config for %s\n", 319 name); 320 return -EIO; 321 } 322 323 smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK; 324 smbus->size = 64; 325 } 326 327 error = acpi_check_region(smbus->base, smbus->size, 328 nforce2_driver.name); 329 if (error) 330 return error; 331 332 if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) { 333 dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n", 334 smbus->base, smbus->base+smbus->size-1, name); 335 return -EBUSY; 336 } 337 smbus->adapter.owner = THIS_MODULE; 338 smbus->adapter.class = I2C_CLASS_HWMON; 339 smbus->adapter.algo = &smbus_algorithm; 340 smbus->adapter.algo_data = smbus; 341 smbus->adapter.dev.parent = &dev->dev; 342 snprintf(smbus->adapter.name, sizeof(smbus->adapter.name), 343 "SMBus nForce2 adapter at %04x", smbus->base); 344 345 error = i2c_add_adapter(&smbus->adapter); 346 if (error) { 347 release_region(smbus->base, smbus->size); 348 return error; 349 } 350 dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", 351 smbus->base); 352 return 0; 353 } 354 355 356 static int nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id) 357 { 358 struct nforce2_smbus *smbuses; 359 int res1, res2; 360 361 /* we support 2 SMBus adapters */ 362 smbuses = kcalloc(2, sizeof(struct nforce2_smbus), GFP_KERNEL); 363 if (!smbuses) 364 return -ENOMEM; 365 pci_set_drvdata(dev, smbuses); 366 367 switch (dev->device) { 368 case PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS: 369 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS: 370 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS: 371 smbuses[0].blockops = 1; 372 smbuses[1].blockops = 1; 373 smbuses[0].can_abort = 1; 374 smbuses[1].can_abort = 1; 375 } 376 377 /* SMBus adapter 1 */ 378 res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1"); 379 if (res1 < 0) 380 smbuses[0].base = 0; /* to have a check value */ 381 382 /* SMBus adapter 2 */ 383 if (dmi_check_system(nforce2_dmi_blacklist2)) { 384 dev_err(&dev->dev, "Disabling SMB2 for safety reasons.\n"); 385 res2 = -EPERM; 386 smbuses[1].base = 0; 387 } else { 388 res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1], 389 "SMB2"); 390 if (res2 < 0) 391 smbuses[1].base = 0; /* to have a check value */ 392 } 393 394 if ((res1 < 0) && (res2 < 0)) { 395 /* we did not find even one of the SMBuses, so we give up */ 396 kfree(smbuses); 397 return -ENODEV; 398 } 399 400 return 0; 401 } 402 403 404 static void nforce2_remove(struct pci_dev *dev) 405 { 406 struct nforce2_smbus *smbuses = pci_get_drvdata(dev); 407 408 if (smbuses[0].base) { 409 i2c_del_adapter(&smbuses[0].adapter); 410 release_region(smbuses[0].base, smbuses[0].size); 411 } 412 if (smbuses[1].base) { 413 i2c_del_adapter(&smbuses[1].adapter); 414 release_region(smbuses[1].base, smbuses[1].size); 415 } 416 kfree(smbuses); 417 } 418 419 static struct pci_driver nforce2_driver = { 420 .name = "nForce2_smbus", 421 .id_table = nforce2_ids, 422 .probe = nforce2_probe, 423 .remove = nforce2_remove, 424 }; 425 426 module_pci_driver(nforce2_driver); 427