1 /* 2 SMBus driver for nVidia nForce2 MCP 3 4 Added nForce3 Pro 150 Thomas Leibold <thomas@plx.com>, 5 Ported to 2.5 Patrick Dreker <patrick@dreker.de>, 6 Copyright (c) 2003 Hans-Frieder Vogt <hfvogt@arcor.de>, 7 Based on 8 SMBus 2.0 driver for AMD-8111 IO-Hub 9 Copyright (c) 2002 Vojtech Pavlik 10 11 This program is free software; you can redistribute it and/or modify 12 it under the terms of the GNU General Public License as published by 13 the Free Software Foundation; either version 2 of the License, or 14 (at your option) any later version. 15 16 This program is distributed in the hope that it will be useful, 17 but WITHOUT ANY WARRANTY; without even the implied warranty of 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 GNU General Public License for more details. 20 21 You should have received a copy of the GNU General Public License 22 along with this program; if not, write to the Free Software 23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 24 */ 25 26 /* 27 SUPPORTED DEVICES PCI ID 28 nForce2 MCP 0064 29 nForce2 Ultra 400 MCP 0084 30 nForce3 Pro150 MCP 00D4 31 nForce3 250Gb MCP 00E4 32 nForce4 MCP 0052 33 nForce4 MCP-04 0034 34 nForce MCP51 0264 35 nForce MCP55 0368 36 nForce MCP61 03EB 37 nForce MCP65 0446 38 nForce MCP67 0542 39 nForce MCP73 07D8 40 nForce MCP78S 0752 41 nForce MCP79 0AA2 42 43 This driver supports the 2 SMBuses that are included in the MCP of the 44 nForce2/3/4/5xx chipsets. 45 */ 46 47 /* Note: we assume there can only be one nForce2, with two SMBus interfaces */ 48 49 #include <linux/module.h> 50 #include <linux/pci.h> 51 #include <linux/kernel.h> 52 #include <linux/stddef.h> 53 #include <linux/ioport.h> 54 #include <linux/i2c.h> 55 #include <linux/delay.h> 56 #include <linux/dmi.h> 57 #include <linux/acpi.h> 58 #include <linux/slab.h> 59 #include <linux/io.h> 60 61 MODULE_LICENSE("GPL"); 62 MODULE_AUTHOR("Hans-Frieder Vogt <hfvogt@gmx.net>"); 63 MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver"); 64 65 66 struct nforce2_smbus { 67 struct i2c_adapter adapter; 68 int base; 69 int size; 70 int blockops; 71 int can_abort; 72 }; 73 74 75 /* 76 * nVidia nForce2 SMBus control register definitions 77 * (Newer incarnations use standard BARs 4 and 5 instead) 78 */ 79 #define NFORCE_PCI_SMB1 0x50 80 #define NFORCE_PCI_SMB2 0x54 81 82 83 /* 84 * ACPI 2.0 chapter 13 SMBus 2.0 EC register model 85 */ 86 #define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */ 87 #define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */ 88 #define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */ 89 #define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */ 90 #define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */ 91 #define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data 92 bytes */ 93 #define NVIDIA_SMB_STATUS_ABRT (smbus->base + 0x3c) /* register used to 94 check the status of 95 the abort command */ 96 #define NVIDIA_SMB_CTRL (smbus->base + 0x3e) /* control register */ 97 98 #define NVIDIA_SMB_STATUS_ABRT_STS 0x01 /* Bit to notify that 99 abort succeeded */ 100 #define NVIDIA_SMB_CTRL_ABORT 0x20 101 #define NVIDIA_SMB_STS_DONE 0x80 102 #define NVIDIA_SMB_STS_ALRM 0x40 103 #define NVIDIA_SMB_STS_RES 0x20 104 #define NVIDIA_SMB_STS_STATUS 0x1f 105 106 #define NVIDIA_SMB_PRTCL_WRITE 0x00 107 #define NVIDIA_SMB_PRTCL_READ 0x01 108 #define NVIDIA_SMB_PRTCL_QUICK 0x02 109 #define NVIDIA_SMB_PRTCL_BYTE 0x04 110 #define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06 111 #define NVIDIA_SMB_PRTCL_WORD_DATA 0x08 112 #define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a 113 #define NVIDIA_SMB_PRTCL_PEC 0x80 114 115 /* Misc definitions */ 116 #define MAX_TIMEOUT 100 117 118 /* We disable the second SMBus channel on these boards */ 119 static const struct dmi_system_id nforce2_dmi_blacklist2[] = { 120 { 121 .ident = "DFI Lanparty NF4 Expert", 122 .matches = { 123 DMI_MATCH(DMI_BOARD_VENDOR, "DFI Corp,LTD"), 124 DMI_MATCH(DMI_BOARD_NAME, "LP UT NF4 Expert"), 125 }, 126 }, 127 { } 128 }; 129 130 static struct pci_driver nforce2_driver; 131 132 /* For multiplexing support, we need a global reference to the 1st 133 SMBus channel */ 134 #if defined CONFIG_I2C_NFORCE2_S4985 || defined CONFIG_I2C_NFORCE2_S4985_MODULE 135 struct i2c_adapter *nforce2_smbus; 136 EXPORT_SYMBOL_GPL(nforce2_smbus); 137 138 static void nforce2_set_reference(struct i2c_adapter *adap) 139 { 140 nforce2_smbus = adap; 141 } 142 #else 143 static inline void nforce2_set_reference(struct i2c_adapter *adap) { } 144 #endif 145 146 static void nforce2_abort(struct i2c_adapter *adap) 147 { 148 struct nforce2_smbus *smbus = adap->algo_data; 149 int timeout = 0; 150 unsigned char temp; 151 152 dev_dbg(&adap->dev, "Aborting current transaction\n"); 153 154 outb_p(NVIDIA_SMB_CTRL_ABORT, NVIDIA_SMB_CTRL); 155 do { 156 msleep(1); 157 temp = inb_p(NVIDIA_SMB_STATUS_ABRT); 158 } while (!(temp & NVIDIA_SMB_STATUS_ABRT_STS) && 159 (timeout++ < MAX_TIMEOUT)); 160 if (!(temp & NVIDIA_SMB_STATUS_ABRT_STS)) 161 dev_err(&adap->dev, "Can't reset the smbus\n"); 162 outb_p(NVIDIA_SMB_STATUS_ABRT_STS, NVIDIA_SMB_STATUS_ABRT); 163 } 164 165 static int nforce2_check_status(struct i2c_adapter *adap) 166 { 167 struct nforce2_smbus *smbus = adap->algo_data; 168 int timeout = 0; 169 unsigned char temp; 170 171 do { 172 msleep(1); 173 temp = inb_p(NVIDIA_SMB_STS); 174 } while ((!temp) && (timeout++ < MAX_TIMEOUT)); 175 176 if (timeout > MAX_TIMEOUT) { 177 dev_dbg(&adap->dev, "SMBus Timeout!\n"); 178 if (smbus->can_abort) 179 nforce2_abort(adap); 180 return -ETIMEDOUT; 181 } 182 if (!(temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) { 183 dev_dbg(&adap->dev, "Transaction failed (0x%02x)!\n", temp); 184 return -EIO; 185 } 186 return 0; 187 } 188 189 /* Return negative errno on error */ 190 static s32 nforce2_access(struct i2c_adapter *adap, u16 addr, 191 unsigned short flags, char read_write, 192 u8 command, int size, union i2c_smbus_data *data) 193 { 194 struct nforce2_smbus *smbus = adap->algo_data; 195 unsigned char protocol, pec; 196 u8 len; 197 int i, status; 198 199 protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ : 200 NVIDIA_SMB_PRTCL_WRITE; 201 pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0; 202 203 switch (size) { 204 case I2C_SMBUS_QUICK: 205 protocol |= NVIDIA_SMB_PRTCL_QUICK; 206 read_write = I2C_SMBUS_WRITE; 207 break; 208 209 case I2C_SMBUS_BYTE: 210 if (read_write == I2C_SMBUS_WRITE) 211 outb_p(command, NVIDIA_SMB_CMD); 212 protocol |= NVIDIA_SMB_PRTCL_BYTE; 213 break; 214 215 case I2C_SMBUS_BYTE_DATA: 216 outb_p(command, NVIDIA_SMB_CMD); 217 if (read_write == I2C_SMBUS_WRITE) 218 outb_p(data->byte, NVIDIA_SMB_DATA); 219 protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA; 220 break; 221 222 case I2C_SMBUS_WORD_DATA: 223 outb_p(command, NVIDIA_SMB_CMD); 224 if (read_write == I2C_SMBUS_WRITE) { 225 outb_p(data->word, NVIDIA_SMB_DATA); 226 outb_p(data->word >> 8, NVIDIA_SMB_DATA + 1); 227 } 228 protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec; 229 break; 230 231 case I2C_SMBUS_BLOCK_DATA: 232 outb_p(command, NVIDIA_SMB_CMD); 233 if (read_write == I2C_SMBUS_WRITE) { 234 len = data->block[0]; 235 if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX)) { 236 dev_err(&adap->dev, 237 "Transaction failed (requested block size: %d)\n", 238 len); 239 return -EINVAL; 240 } 241 outb_p(len, NVIDIA_SMB_BCNT); 242 for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++) 243 outb_p(data->block[i + 1], 244 NVIDIA_SMB_DATA + i); 245 } 246 protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec; 247 break; 248 249 default: 250 dev_err(&adap->dev, "Unsupported transaction %d\n", size); 251 return -EOPNOTSUPP; 252 } 253 254 outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR); 255 outb_p(protocol, NVIDIA_SMB_PRTCL); 256 257 status = nforce2_check_status(adap); 258 if (status) 259 return status; 260 261 if (read_write == I2C_SMBUS_WRITE) 262 return 0; 263 264 switch (size) { 265 case I2C_SMBUS_BYTE: 266 case I2C_SMBUS_BYTE_DATA: 267 data->byte = inb_p(NVIDIA_SMB_DATA); 268 break; 269 270 case I2C_SMBUS_WORD_DATA: 271 data->word = inb_p(NVIDIA_SMB_DATA) | 272 (inb_p(NVIDIA_SMB_DATA + 1) << 8); 273 break; 274 275 case I2C_SMBUS_BLOCK_DATA: 276 len = inb_p(NVIDIA_SMB_BCNT); 277 if ((len <= 0) || (len > I2C_SMBUS_BLOCK_MAX)) { 278 dev_err(&adap->dev, 279 "Transaction failed (received block size: 0x%02x)\n", 280 len); 281 return -EPROTO; 282 } 283 for (i = 0; i < len; i++) 284 data->block[i + 1] = inb_p(NVIDIA_SMB_DATA + i); 285 data->block[0] = len; 286 break; 287 } 288 289 return 0; 290 } 291 292 293 static u32 nforce2_func(struct i2c_adapter *adapter) 294 { 295 /* other functionality might be possible, but is not tested */ 296 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 297 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 298 I2C_FUNC_SMBUS_PEC | 299 (((struct nforce2_smbus *)adapter->algo_data)->blockops ? 300 I2C_FUNC_SMBUS_BLOCK_DATA : 0); 301 } 302 303 static struct i2c_algorithm smbus_algorithm = { 304 .smbus_xfer = nforce2_access, 305 .functionality = nforce2_func, 306 }; 307 308 309 static const struct pci_device_id nforce2_ids[] = { 310 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) }, 311 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) }, 312 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) }, 313 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) }, 314 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) }, 315 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) }, 316 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) }, 317 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) }, 318 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) }, 319 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) }, 320 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_SMBUS) }, 321 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_SMBUS) }, 322 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS) }, 323 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS) }, 324 { 0 } 325 }; 326 327 MODULE_DEVICE_TABLE(pci, nforce2_ids); 328 329 330 static int nforce2_probe_smb(struct pci_dev *dev, int bar, int alt_reg, 331 struct nforce2_smbus *smbus, const char *name) 332 { 333 int error; 334 335 smbus->base = pci_resource_start(dev, bar); 336 if (smbus->base) { 337 smbus->size = pci_resource_len(dev, bar); 338 } else { 339 /* Older incarnations of the device used non-standard BARs */ 340 u16 iobase; 341 342 if (pci_read_config_word(dev, alt_reg, &iobase) 343 != PCIBIOS_SUCCESSFUL) { 344 dev_err(&dev->dev, "Error reading PCI config for %s\n", 345 name); 346 return -EIO; 347 } 348 349 smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK; 350 smbus->size = 64; 351 } 352 353 error = acpi_check_region(smbus->base, smbus->size, 354 nforce2_driver.name); 355 if (error) 356 return error; 357 358 if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) { 359 dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n", 360 smbus->base, smbus->base+smbus->size-1, name); 361 return -EBUSY; 362 } 363 smbus->adapter.owner = THIS_MODULE; 364 smbus->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD; 365 smbus->adapter.algo = &smbus_algorithm; 366 smbus->adapter.algo_data = smbus; 367 smbus->adapter.dev.parent = &dev->dev; 368 snprintf(smbus->adapter.name, sizeof(smbus->adapter.name), 369 "SMBus nForce2 adapter at %04x", smbus->base); 370 371 error = i2c_add_adapter(&smbus->adapter); 372 if (error) { 373 dev_err(&smbus->adapter.dev, "Failed to register adapter.\n"); 374 release_region(smbus->base, smbus->size); 375 return error; 376 } 377 dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", 378 smbus->base); 379 return 0; 380 } 381 382 383 static int nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id) 384 { 385 struct nforce2_smbus *smbuses; 386 int res1, res2; 387 388 /* we support 2 SMBus adapters */ 389 smbuses = kzalloc(2 * sizeof(struct nforce2_smbus), GFP_KERNEL); 390 if (!smbuses) 391 return -ENOMEM; 392 pci_set_drvdata(dev, smbuses); 393 394 switch (dev->device) { 395 case PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS: 396 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS: 397 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS: 398 smbuses[0].blockops = 1; 399 smbuses[1].blockops = 1; 400 smbuses[0].can_abort = 1; 401 smbuses[1].can_abort = 1; 402 } 403 404 /* SMBus adapter 1 */ 405 res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1"); 406 if (res1 < 0) 407 smbuses[0].base = 0; /* to have a check value */ 408 409 /* SMBus adapter 2 */ 410 if (dmi_check_system(nforce2_dmi_blacklist2)) { 411 dev_err(&dev->dev, "Disabling SMB2 for safety reasons.\n"); 412 res2 = -EPERM; 413 smbuses[1].base = 0; 414 } else { 415 res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1], 416 "SMB2"); 417 if (res2 < 0) 418 smbuses[1].base = 0; /* to have a check value */ 419 } 420 421 if ((res1 < 0) && (res2 < 0)) { 422 /* we did not find even one of the SMBuses, so we give up */ 423 kfree(smbuses); 424 return -ENODEV; 425 } 426 427 nforce2_set_reference(&smbuses[0].adapter); 428 return 0; 429 } 430 431 432 static void nforce2_remove(struct pci_dev *dev) 433 { 434 struct nforce2_smbus *smbuses = pci_get_drvdata(dev); 435 436 nforce2_set_reference(NULL); 437 if (smbuses[0].base) { 438 i2c_del_adapter(&smbuses[0].adapter); 439 release_region(smbuses[0].base, smbuses[0].size); 440 } 441 if (smbuses[1].base) { 442 i2c_del_adapter(&smbuses[1].adapter); 443 release_region(smbuses[1].base, smbuses[1].size); 444 } 445 kfree(smbuses); 446 } 447 448 static struct pci_driver nforce2_driver = { 449 .name = "nForce2_smbus", 450 .id_table = nforce2_ids, 451 .probe = nforce2_probe, 452 .remove = nforce2_remove, 453 }; 454 455 module_pci_driver(nforce2_driver); 456