16055af5eSWolfram Sang // SPDX-License-Identifier: GPL-2.0 25faf6e1fSWolfram Sang /* 35faf6e1fSWolfram Sang * I2C driver for the Renesas EMEV2 SoC 45faf6e1fSWolfram Sang * 55faf6e1fSWolfram Sang * Copyright (C) 2015 Wolfram Sang <wsa@sang-engineering.com> 65faf6e1fSWolfram Sang * Copyright 2013 Codethink Ltd. 75faf6e1fSWolfram Sang * Copyright 2010-2015 Renesas Electronics Corporation 85faf6e1fSWolfram Sang */ 95faf6e1fSWolfram Sang 105faf6e1fSWolfram Sang #include <linux/clk.h> 115faf6e1fSWolfram Sang #include <linux/completion.h> 125faf6e1fSWolfram Sang #include <linux/device.h> 135faf6e1fSWolfram Sang #include <linux/i2c.h> 145faf6e1fSWolfram Sang #include <linux/init.h> 155faf6e1fSWolfram Sang #include <linux/interrupt.h> 165faf6e1fSWolfram Sang #include <linux/io.h> 175faf6e1fSWolfram Sang #include <linux/kernel.h> 185faf6e1fSWolfram Sang #include <linux/module.h> 195faf6e1fSWolfram Sang #include <linux/of_device.h> 205faf6e1fSWolfram Sang #include <linux/platform_device.h> 215faf6e1fSWolfram Sang #include <linux/sched.h> 225faf6e1fSWolfram Sang 235faf6e1fSWolfram Sang /* I2C Registers */ 245faf6e1fSWolfram Sang #define I2C_OFS_IICACT0 0x00 /* start */ 255faf6e1fSWolfram Sang #define I2C_OFS_IIC0 0x04 /* shift */ 265faf6e1fSWolfram Sang #define I2C_OFS_IICC0 0x08 /* control */ 275faf6e1fSWolfram Sang #define I2C_OFS_SVA0 0x0c /* slave address */ 285faf6e1fSWolfram Sang #define I2C_OFS_IICCL0 0x10 /* clock select */ 295faf6e1fSWolfram Sang #define I2C_OFS_IICX0 0x14 /* extension */ 305faf6e1fSWolfram Sang #define I2C_OFS_IICS0 0x18 /* status */ 315faf6e1fSWolfram Sang #define I2C_OFS_IICSE0 0x1c /* status For emulation */ 325faf6e1fSWolfram Sang #define I2C_OFS_IICF0 0x20 /* IIC flag */ 335faf6e1fSWolfram Sang 345faf6e1fSWolfram Sang /* I2C IICACT0 Masks */ 355faf6e1fSWolfram Sang #define I2C_BIT_IICE0 0x0001 365faf6e1fSWolfram Sang 375faf6e1fSWolfram Sang /* I2C IICC0 Masks */ 385faf6e1fSWolfram Sang #define I2C_BIT_LREL0 0x0040 395faf6e1fSWolfram Sang #define I2C_BIT_WREL0 0x0020 405faf6e1fSWolfram Sang #define I2C_BIT_SPIE0 0x0010 415faf6e1fSWolfram Sang #define I2C_BIT_WTIM0 0x0008 425faf6e1fSWolfram Sang #define I2C_BIT_ACKE0 0x0004 435faf6e1fSWolfram Sang #define I2C_BIT_STT0 0x0002 445faf6e1fSWolfram Sang #define I2C_BIT_SPT0 0x0001 455faf6e1fSWolfram Sang 465faf6e1fSWolfram Sang /* I2C IICCL0 Masks */ 475faf6e1fSWolfram Sang #define I2C_BIT_SMC0 0x0008 485faf6e1fSWolfram Sang #define I2C_BIT_DFC0 0x0004 495faf6e1fSWolfram Sang 505faf6e1fSWolfram Sang /* I2C IICSE0 Masks */ 515faf6e1fSWolfram Sang #define I2C_BIT_MSTS0 0x0080 525faf6e1fSWolfram Sang #define I2C_BIT_ALD0 0x0040 535faf6e1fSWolfram Sang #define I2C_BIT_EXC0 0x0020 545faf6e1fSWolfram Sang #define I2C_BIT_COI0 0x0010 555faf6e1fSWolfram Sang #define I2C_BIT_TRC0 0x0008 565faf6e1fSWolfram Sang #define I2C_BIT_ACKD0 0x0004 575faf6e1fSWolfram Sang #define I2C_BIT_STD0 0x0002 585faf6e1fSWolfram Sang #define I2C_BIT_SPD0 0x0001 595faf6e1fSWolfram Sang 605faf6e1fSWolfram Sang /* I2C IICF0 Masks */ 615faf6e1fSWolfram Sang #define I2C_BIT_STCF 0x0080 625faf6e1fSWolfram Sang #define I2C_BIT_IICBSY 0x0040 635faf6e1fSWolfram Sang #define I2C_BIT_STCEN 0x0002 645faf6e1fSWolfram Sang #define I2C_BIT_IICRSV 0x0001 655faf6e1fSWolfram Sang 665faf6e1fSWolfram Sang struct em_i2c_device { 675faf6e1fSWolfram Sang void __iomem *base; 685faf6e1fSWolfram Sang struct i2c_adapter adap; 695faf6e1fSWolfram Sang struct completion msg_done; 705faf6e1fSWolfram Sang struct clk *sclk; 71c31d0a00SNiklas Söderlund struct i2c_client *slave; 72d7437fc0SWolfram Sang int irq; 735faf6e1fSWolfram Sang }; 745faf6e1fSWolfram Sang 755faf6e1fSWolfram Sang static inline void em_clear_set_bit(struct em_i2c_device *priv, u8 clear, u8 set, u8 reg) 765faf6e1fSWolfram Sang { 775faf6e1fSWolfram Sang writeb((readb(priv->base + reg) & ~clear) | set, priv->base + reg); 785faf6e1fSWolfram Sang } 795faf6e1fSWolfram Sang 805faf6e1fSWolfram Sang static int em_i2c_wait_for_event(struct em_i2c_device *priv) 815faf6e1fSWolfram Sang { 825faf6e1fSWolfram Sang unsigned long time_left; 835faf6e1fSWolfram Sang int status; 845faf6e1fSWolfram Sang 855faf6e1fSWolfram Sang reinit_completion(&priv->msg_done); 865faf6e1fSWolfram Sang 875faf6e1fSWolfram Sang time_left = wait_for_completion_timeout(&priv->msg_done, priv->adap.timeout); 885faf6e1fSWolfram Sang 895faf6e1fSWolfram Sang if (!time_left) 905faf6e1fSWolfram Sang return -ETIMEDOUT; 915faf6e1fSWolfram Sang 925faf6e1fSWolfram Sang status = readb(priv->base + I2C_OFS_IICSE0); 935faf6e1fSWolfram Sang return status & I2C_BIT_ALD0 ? -EAGAIN : status; 945faf6e1fSWolfram Sang } 955faf6e1fSWolfram Sang 965faf6e1fSWolfram Sang static void em_i2c_stop(struct em_i2c_device *priv) 975faf6e1fSWolfram Sang { 985faf6e1fSWolfram Sang /* Send Stop condition */ 995faf6e1fSWolfram Sang em_clear_set_bit(priv, 0, I2C_BIT_SPT0 | I2C_BIT_SPIE0, I2C_OFS_IICC0); 1005faf6e1fSWolfram Sang 1015faf6e1fSWolfram Sang /* Wait for stop condition */ 1025faf6e1fSWolfram Sang em_i2c_wait_for_event(priv); 1035faf6e1fSWolfram Sang } 1045faf6e1fSWolfram Sang 1055faf6e1fSWolfram Sang static void em_i2c_reset(struct i2c_adapter *adap) 1065faf6e1fSWolfram Sang { 1075faf6e1fSWolfram Sang struct em_i2c_device *priv = i2c_get_adapdata(adap); 1085faf6e1fSWolfram Sang int retr; 1095faf6e1fSWolfram Sang 1105faf6e1fSWolfram Sang /* If I2C active */ 1115faf6e1fSWolfram Sang if (readb(priv->base + I2C_OFS_IICACT0) & I2C_BIT_IICE0) { 1125faf6e1fSWolfram Sang /* Disable I2C operation */ 1135faf6e1fSWolfram Sang writeb(0, priv->base + I2C_OFS_IICACT0); 1145faf6e1fSWolfram Sang 1155faf6e1fSWolfram Sang retr = 1000; 1165faf6e1fSWolfram Sang while (readb(priv->base + I2C_OFS_IICACT0) == 1 && retr) 1175faf6e1fSWolfram Sang retr--; 1185faf6e1fSWolfram Sang WARN_ON(retr == 0); 1195faf6e1fSWolfram Sang } 1205faf6e1fSWolfram Sang 1215faf6e1fSWolfram Sang /* Transfer mode set */ 1225faf6e1fSWolfram Sang writeb(I2C_BIT_DFC0, priv->base + I2C_OFS_IICCL0); 1235faf6e1fSWolfram Sang 1245faf6e1fSWolfram Sang /* Can Issue start without detecting a stop, Reservation disabled. */ 1255faf6e1fSWolfram Sang writeb(I2C_BIT_STCEN | I2C_BIT_IICRSV, priv->base + I2C_OFS_IICF0); 1265faf6e1fSWolfram Sang 1275faf6e1fSWolfram Sang /* I2C enable, 9 bit interrupt mode */ 1285faf6e1fSWolfram Sang writeb(I2C_BIT_WTIM0, priv->base + I2C_OFS_IICC0); 1295faf6e1fSWolfram Sang 1305faf6e1fSWolfram Sang /* Enable I2C operation */ 1315faf6e1fSWolfram Sang writeb(I2C_BIT_IICE0, priv->base + I2C_OFS_IICACT0); 1325faf6e1fSWolfram Sang 1335faf6e1fSWolfram Sang retr = 1000; 1345faf6e1fSWolfram Sang while (readb(priv->base + I2C_OFS_IICACT0) == 0 && retr) 1355faf6e1fSWolfram Sang retr--; 1365faf6e1fSWolfram Sang WARN_ON(retr == 0); 1375faf6e1fSWolfram Sang } 1385faf6e1fSWolfram Sang 1395faf6e1fSWolfram Sang static int __em_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msg, 1405faf6e1fSWolfram Sang int stop) 1415faf6e1fSWolfram Sang { 1425faf6e1fSWolfram Sang struct em_i2c_device *priv = i2c_get_adapdata(adap); 1435faf6e1fSWolfram Sang int count, status, read = !!(msg->flags & I2C_M_RD); 1445faf6e1fSWolfram Sang 1455faf6e1fSWolfram Sang /* Send start condition */ 1465faf6e1fSWolfram Sang em_clear_set_bit(priv, 0, I2C_BIT_ACKE0 | I2C_BIT_WTIM0, I2C_OFS_IICC0); 1475faf6e1fSWolfram Sang em_clear_set_bit(priv, 0, I2C_BIT_STT0, I2C_OFS_IICC0); 1485faf6e1fSWolfram Sang 1495faf6e1fSWolfram Sang /* Send slave address and R/W type */ 15030a64757SPeter Rosin writeb(i2c_8bit_addr_from_msg(msg), priv->base + I2C_OFS_IIC0); 1515faf6e1fSWolfram Sang 1525faf6e1fSWolfram Sang /* Wait for transaction */ 1535faf6e1fSWolfram Sang status = em_i2c_wait_for_event(priv); 1545faf6e1fSWolfram Sang if (status < 0) 1555faf6e1fSWolfram Sang goto out_reset; 1565faf6e1fSWolfram Sang 1575faf6e1fSWolfram Sang /* Received NACK (result of setting slave address and R/W) */ 1585faf6e1fSWolfram Sang if (!(status & I2C_BIT_ACKD0)) { 1595faf6e1fSWolfram Sang em_i2c_stop(priv); 1605faf6e1fSWolfram Sang goto out; 1615faf6e1fSWolfram Sang } 1625faf6e1fSWolfram Sang 1635faf6e1fSWolfram Sang /* Extra setup for read transactions */ 1645faf6e1fSWolfram Sang if (read) { 1655faf6e1fSWolfram Sang /* 8 bit interrupt mode */ 1665faf6e1fSWolfram Sang em_clear_set_bit(priv, I2C_BIT_WTIM0, I2C_BIT_ACKE0, I2C_OFS_IICC0); 1675faf6e1fSWolfram Sang em_clear_set_bit(priv, I2C_BIT_WTIM0, I2C_BIT_WREL0, I2C_OFS_IICC0); 1685faf6e1fSWolfram Sang 1695faf6e1fSWolfram Sang /* Wait for transaction */ 1705faf6e1fSWolfram Sang status = em_i2c_wait_for_event(priv); 1715faf6e1fSWolfram Sang if (status < 0) 1725faf6e1fSWolfram Sang goto out_reset; 1735faf6e1fSWolfram Sang } 1745faf6e1fSWolfram Sang 1755faf6e1fSWolfram Sang /* Send / receive data */ 1765faf6e1fSWolfram Sang for (count = 0; count < msg->len; count++) { 1775faf6e1fSWolfram Sang if (read) { /* Read transaction */ 1785faf6e1fSWolfram Sang msg->buf[count] = readb(priv->base + I2C_OFS_IIC0); 1795faf6e1fSWolfram Sang em_clear_set_bit(priv, 0, I2C_BIT_WREL0, I2C_OFS_IICC0); 1805faf6e1fSWolfram Sang 1815faf6e1fSWolfram Sang } else { /* Write transaction */ 1825faf6e1fSWolfram Sang /* Received NACK */ 1835faf6e1fSWolfram Sang if (!(status & I2C_BIT_ACKD0)) { 1845faf6e1fSWolfram Sang em_i2c_stop(priv); 1855faf6e1fSWolfram Sang goto out; 1865faf6e1fSWolfram Sang } 1875faf6e1fSWolfram Sang 1885faf6e1fSWolfram Sang /* Write data */ 1895faf6e1fSWolfram Sang writeb(msg->buf[count], priv->base + I2C_OFS_IIC0); 1905faf6e1fSWolfram Sang } 1915faf6e1fSWolfram Sang 1925faf6e1fSWolfram Sang /* Wait for R/W transaction */ 1935faf6e1fSWolfram Sang status = em_i2c_wait_for_event(priv); 1945faf6e1fSWolfram Sang if (status < 0) 1955faf6e1fSWolfram Sang goto out_reset; 1965faf6e1fSWolfram Sang } 1975faf6e1fSWolfram Sang 1985faf6e1fSWolfram Sang if (stop) 1995faf6e1fSWolfram Sang em_i2c_stop(priv); 2005faf6e1fSWolfram Sang 2015faf6e1fSWolfram Sang return count; 2025faf6e1fSWolfram Sang 2035faf6e1fSWolfram Sang out_reset: 2045faf6e1fSWolfram Sang em_i2c_reset(adap); 2055faf6e1fSWolfram Sang out: 2065faf6e1fSWolfram Sang return status < 0 ? status : -ENXIO; 2075faf6e1fSWolfram Sang } 2085faf6e1fSWolfram Sang 2095faf6e1fSWolfram Sang static int em_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, 2105faf6e1fSWolfram Sang int num) 2115faf6e1fSWolfram Sang { 2125faf6e1fSWolfram Sang struct em_i2c_device *priv = i2c_get_adapdata(adap); 2135faf6e1fSWolfram Sang int ret, i; 2145faf6e1fSWolfram Sang 2155faf6e1fSWolfram Sang if (readb(priv->base + I2C_OFS_IICF0) & I2C_BIT_IICBSY) 2165faf6e1fSWolfram Sang return -EAGAIN; 2175faf6e1fSWolfram Sang 2185faf6e1fSWolfram Sang for (i = 0; i < num; i++) { 2195faf6e1fSWolfram Sang ret = __em_i2c_xfer(adap, &msgs[i], (i == (num - 1))); 2205faf6e1fSWolfram Sang if (ret < 0) 2215faf6e1fSWolfram Sang return ret; 2225faf6e1fSWolfram Sang } 2235faf6e1fSWolfram Sang 2245faf6e1fSWolfram Sang /* I2C transfer completed */ 2255faf6e1fSWolfram Sang return num; 2265faf6e1fSWolfram Sang } 2275faf6e1fSWolfram Sang 228c31d0a00SNiklas Söderlund static bool em_i2c_slave_irq(struct em_i2c_device *priv) 229c31d0a00SNiklas Söderlund { 230c31d0a00SNiklas Söderlund u8 status, value; 231c31d0a00SNiklas Söderlund enum i2c_slave_event event; 232c31d0a00SNiklas Söderlund int ret; 233c31d0a00SNiklas Söderlund 234c31d0a00SNiklas Söderlund if (!priv->slave) 235c31d0a00SNiklas Söderlund return false; 236c31d0a00SNiklas Söderlund 237c31d0a00SNiklas Söderlund status = readb(priv->base + I2C_OFS_IICSE0); 238c31d0a00SNiklas Söderlund 239c31d0a00SNiklas Söderlund /* Extension code, do not participate */ 240c31d0a00SNiklas Söderlund if (status & I2C_BIT_EXC0) { 241c31d0a00SNiklas Söderlund em_clear_set_bit(priv, 0, I2C_BIT_LREL0, I2C_OFS_IICC0); 242c31d0a00SNiklas Söderlund return true; 243c31d0a00SNiklas Söderlund } 244c31d0a00SNiklas Söderlund 245c31d0a00SNiklas Söderlund /* Stop detected, we don't know if it's for slave or master */ 246c31d0a00SNiklas Söderlund if (status & I2C_BIT_SPD0) { 247c31d0a00SNiklas Söderlund /* Notify slave device */ 248c31d0a00SNiklas Söderlund i2c_slave_event(priv->slave, I2C_SLAVE_STOP, &value); 249c31d0a00SNiklas Söderlund /* Pretend we did not handle the interrupt */ 250c31d0a00SNiklas Söderlund return false; 251c31d0a00SNiklas Söderlund } 252c31d0a00SNiklas Söderlund 253c31d0a00SNiklas Söderlund /* Only handle interrupts addressed to us */ 254c31d0a00SNiklas Söderlund if (!(status & I2C_BIT_COI0)) 255c31d0a00SNiklas Söderlund return false; 256c31d0a00SNiklas Söderlund 257c31d0a00SNiklas Söderlund /* Enable stop interrupts */ 258c31d0a00SNiklas Söderlund em_clear_set_bit(priv, 0, I2C_BIT_SPIE0, I2C_OFS_IICC0); 259c31d0a00SNiklas Söderlund 260c31d0a00SNiklas Söderlund /* Transmission or Reception */ 261c31d0a00SNiklas Söderlund if (status & I2C_BIT_TRC0) { 262c31d0a00SNiklas Söderlund if (status & I2C_BIT_ACKD0) { 263c31d0a00SNiklas Söderlund /* 9 bit interrupt mode */ 264c31d0a00SNiklas Söderlund em_clear_set_bit(priv, 0, I2C_BIT_WTIM0, I2C_OFS_IICC0); 265c31d0a00SNiklas Söderlund 266c31d0a00SNiklas Söderlund /* Send data */ 267c31d0a00SNiklas Söderlund event = status & I2C_BIT_STD0 ? 268c31d0a00SNiklas Söderlund I2C_SLAVE_READ_REQUESTED : 269c31d0a00SNiklas Söderlund I2C_SLAVE_READ_PROCESSED; 270c31d0a00SNiklas Söderlund i2c_slave_event(priv->slave, event, &value); 271c31d0a00SNiklas Söderlund writeb(value, priv->base + I2C_OFS_IIC0); 272c31d0a00SNiklas Söderlund } else { 273c31d0a00SNiklas Söderlund /* NACK, stop transmitting */ 274c31d0a00SNiklas Söderlund em_clear_set_bit(priv, 0, I2C_BIT_LREL0, I2C_OFS_IICC0); 275c31d0a00SNiklas Söderlund } 276c31d0a00SNiklas Söderlund } else { 277c31d0a00SNiklas Söderlund /* 8 bit interrupt mode */ 278c31d0a00SNiklas Söderlund em_clear_set_bit(priv, I2C_BIT_WTIM0, I2C_BIT_ACKE0, 279c31d0a00SNiklas Söderlund I2C_OFS_IICC0); 280c31d0a00SNiklas Söderlund em_clear_set_bit(priv, I2C_BIT_WTIM0, I2C_BIT_WREL0, 281c31d0a00SNiklas Söderlund I2C_OFS_IICC0); 282c31d0a00SNiklas Söderlund 283c31d0a00SNiklas Söderlund if (status & I2C_BIT_STD0) { 284c31d0a00SNiklas Söderlund i2c_slave_event(priv->slave, I2C_SLAVE_WRITE_REQUESTED, 285c31d0a00SNiklas Söderlund &value); 286c31d0a00SNiklas Söderlund } else { 287c31d0a00SNiklas Söderlund /* Recv data */ 288c31d0a00SNiklas Söderlund value = readb(priv->base + I2C_OFS_IIC0); 289c31d0a00SNiklas Söderlund ret = i2c_slave_event(priv->slave, 290c31d0a00SNiklas Söderlund I2C_SLAVE_WRITE_RECEIVED, &value); 291c31d0a00SNiklas Söderlund if (ret < 0) 292c31d0a00SNiklas Söderlund em_clear_set_bit(priv, I2C_BIT_ACKE0, 0, 293c31d0a00SNiklas Söderlund I2C_OFS_IICC0); 294c31d0a00SNiklas Söderlund } 295c31d0a00SNiklas Söderlund } 296c31d0a00SNiklas Söderlund 297c31d0a00SNiklas Söderlund return true; 298c31d0a00SNiklas Söderlund } 299c31d0a00SNiklas Söderlund 3005faf6e1fSWolfram Sang static irqreturn_t em_i2c_irq_handler(int this_irq, void *dev_id) 3015faf6e1fSWolfram Sang { 3025faf6e1fSWolfram Sang struct em_i2c_device *priv = dev_id; 3035faf6e1fSWolfram Sang 304c31d0a00SNiklas Söderlund if (em_i2c_slave_irq(priv)) 305c31d0a00SNiklas Söderlund return IRQ_HANDLED; 306c31d0a00SNiklas Söderlund 3075faf6e1fSWolfram Sang complete(&priv->msg_done); 308c31d0a00SNiklas Söderlund 3095faf6e1fSWolfram Sang return IRQ_HANDLED; 3105faf6e1fSWolfram Sang } 3115faf6e1fSWolfram Sang 3125faf6e1fSWolfram Sang static u32 em_i2c_func(struct i2c_adapter *adap) 3135faf6e1fSWolfram Sang { 314c31d0a00SNiklas Söderlund return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_SLAVE; 315c31d0a00SNiklas Söderlund } 316c31d0a00SNiklas Söderlund 317c31d0a00SNiklas Söderlund static int em_i2c_reg_slave(struct i2c_client *slave) 318c31d0a00SNiklas Söderlund { 319c31d0a00SNiklas Söderlund struct em_i2c_device *priv = i2c_get_adapdata(slave->adapter); 320c31d0a00SNiklas Söderlund 321c31d0a00SNiklas Söderlund if (priv->slave) 322c31d0a00SNiklas Söderlund return -EBUSY; 323c31d0a00SNiklas Söderlund 324c31d0a00SNiklas Söderlund if (slave->flags & I2C_CLIENT_TEN) 325c31d0a00SNiklas Söderlund return -EAFNOSUPPORT; 326c31d0a00SNiklas Söderlund 327c31d0a00SNiklas Söderlund priv->slave = slave; 328c31d0a00SNiklas Söderlund 329c31d0a00SNiklas Söderlund /* Set slave address */ 330c31d0a00SNiklas Söderlund writeb(slave->addr << 1, priv->base + I2C_OFS_SVA0); 331c31d0a00SNiklas Söderlund 332c31d0a00SNiklas Söderlund return 0; 333c31d0a00SNiklas Söderlund } 334c31d0a00SNiklas Söderlund 335c31d0a00SNiklas Söderlund static int em_i2c_unreg_slave(struct i2c_client *slave) 336c31d0a00SNiklas Söderlund { 337c31d0a00SNiklas Söderlund struct em_i2c_device *priv = i2c_get_adapdata(slave->adapter); 338c31d0a00SNiklas Söderlund 339c31d0a00SNiklas Söderlund WARN_ON(!priv->slave); 340c31d0a00SNiklas Söderlund 341c31d0a00SNiklas Söderlund writeb(0, priv->base + I2C_OFS_SVA0); 342c31d0a00SNiklas Söderlund 343d7437fc0SWolfram Sang /* 344d7437fc0SWolfram Sang * Wait for interrupt to finish. New slave irqs cannot happen because we 345d7437fc0SWolfram Sang * cleared the slave address and, thus, only extension codes will be 346d7437fc0SWolfram Sang * detected which do not use the slave ptr. 347d7437fc0SWolfram Sang */ 348d7437fc0SWolfram Sang synchronize_irq(priv->irq); 349c31d0a00SNiklas Söderlund priv->slave = NULL; 350c31d0a00SNiklas Söderlund 351c31d0a00SNiklas Söderlund return 0; 3525faf6e1fSWolfram Sang } 3535faf6e1fSWolfram Sang 35492d9d0dfSBhumika Goyal static const struct i2c_algorithm em_i2c_algo = { 3555faf6e1fSWolfram Sang .master_xfer = em_i2c_xfer, 3565faf6e1fSWolfram Sang .functionality = em_i2c_func, 357c31d0a00SNiklas Söderlund .reg_slave = em_i2c_reg_slave, 358c31d0a00SNiklas Söderlund .unreg_slave = em_i2c_unreg_slave, 3595faf6e1fSWolfram Sang }; 3605faf6e1fSWolfram Sang 3615faf6e1fSWolfram Sang static int em_i2c_probe(struct platform_device *pdev) 3625faf6e1fSWolfram Sang { 3635faf6e1fSWolfram Sang struct em_i2c_device *priv; 364d7437fc0SWolfram Sang int ret; 3655faf6e1fSWolfram Sang 3665faf6e1fSWolfram Sang priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 3675faf6e1fSWolfram Sang if (!priv) 3685faf6e1fSWolfram Sang return -ENOMEM; 3695faf6e1fSWolfram Sang 370e0442d76SDejin Zheng priv->base = devm_platform_ioremap_resource(pdev, 0); 3715faf6e1fSWolfram Sang if (IS_ERR(priv->base)) 3725faf6e1fSWolfram Sang return PTR_ERR(priv->base); 3735faf6e1fSWolfram Sang 374*ea1558ceSWolfram Sang strscpy(priv->adap.name, "EMEV2 I2C", sizeof(priv->adap.name)); 3755faf6e1fSWolfram Sang 3765faf6e1fSWolfram Sang priv->sclk = devm_clk_get(&pdev->dev, "sclk"); 3775faf6e1fSWolfram Sang if (IS_ERR(priv->sclk)) 3785faf6e1fSWolfram Sang return PTR_ERR(priv->sclk); 3795faf6e1fSWolfram Sang 380f6462216SArvind Yadav ret = clk_prepare_enable(priv->sclk); 381f6462216SArvind Yadav if (ret) 382f6462216SArvind Yadav return ret; 3835faf6e1fSWolfram Sang 3845faf6e1fSWolfram Sang priv->adap.timeout = msecs_to_jiffies(100); 3855faf6e1fSWolfram Sang priv->adap.retries = 5; 3865faf6e1fSWolfram Sang priv->adap.dev.parent = &pdev->dev; 3875faf6e1fSWolfram Sang priv->adap.algo = &em_i2c_algo; 3885faf6e1fSWolfram Sang priv->adap.owner = THIS_MODULE; 3895faf6e1fSWolfram Sang priv->adap.dev.of_node = pdev->dev.of_node; 3905faf6e1fSWolfram Sang 3915faf6e1fSWolfram Sang init_completion(&priv->msg_done); 3925faf6e1fSWolfram Sang 3935faf6e1fSWolfram Sang platform_set_drvdata(pdev, priv); 3945faf6e1fSWolfram Sang i2c_set_adapdata(&priv->adap, priv); 3955faf6e1fSWolfram Sang 3965faf6e1fSWolfram Sang em_i2c_reset(&priv->adap); 3975faf6e1fSWolfram Sang 398bb6129c3SSergey Shtylyov ret = platform_get_irq(pdev, 0); 399bb6129c3SSergey Shtylyov if (ret < 0) 400bb6129c3SSergey Shtylyov goto err_clk; 401bb6129c3SSergey Shtylyov priv->irq = ret; 402d7437fc0SWolfram Sang ret = devm_request_irq(&pdev->dev, priv->irq, em_i2c_irq_handler, 0, 4035faf6e1fSWolfram Sang "em_i2c", priv); 4045faf6e1fSWolfram Sang if (ret) 4055faf6e1fSWolfram Sang goto err_clk; 4065faf6e1fSWolfram Sang 4075faf6e1fSWolfram Sang ret = i2c_add_adapter(&priv->adap); 4085faf6e1fSWolfram Sang 4095faf6e1fSWolfram Sang if (ret) 4105faf6e1fSWolfram Sang goto err_clk; 4115faf6e1fSWolfram Sang 412d7437fc0SWolfram Sang dev_info(&pdev->dev, "Added i2c controller %d, irq %d\n", priv->adap.nr, 413d7437fc0SWolfram Sang priv->irq); 4145faf6e1fSWolfram Sang 4155faf6e1fSWolfram Sang return 0; 4165faf6e1fSWolfram Sang 4175faf6e1fSWolfram Sang err_clk: 4185faf6e1fSWolfram Sang clk_disable_unprepare(priv->sclk); 4195faf6e1fSWolfram Sang return ret; 4205faf6e1fSWolfram Sang } 4215faf6e1fSWolfram Sang 4225faf6e1fSWolfram Sang static int em_i2c_remove(struct platform_device *dev) 4235faf6e1fSWolfram Sang { 4245faf6e1fSWolfram Sang struct em_i2c_device *priv = platform_get_drvdata(dev); 4255faf6e1fSWolfram Sang 4265faf6e1fSWolfram Sang i2c_del_adapter(&priv->adap); 4275faf6e1fSWolfram Sang clk_disable_unprepare(priv->sclk); 4285faf6e1fSWolfram Sang 4295faf6e1fSWolfram Sang return 0; 4305faf6e1fSWolfram Sang } 4315faf6e1fSWolfram Sang 4325faf6e1fSWolfram Sang static const struct of_device_id em_i2c_ids[] = { 4335faf6e1fSWolfram Sang { .compatible = "renesas,iic-emev2", }, 4345faf6e1fSWolfram Sang { } 4355faf6e1fSWolfram Sang }; 4365faf6e1fSWolfram Sang 4375faf6e1fSWolfram Sang static struct platform_driver em_i2c_driver = { 4385faf6e1fSWolfram Sang .probe = em_i2c_probe, 4395faf6e1fSWolfram Sang .remove = em_i2c_remove, 4405faf6e1fSWolfram Sang .driver = { 4415faf6e1fSWolfram Sang .name = "em-i2c", 4425faf6e1fSWolfram Sang .of_match_table = em_i2c_ids, 4435faf6e1fSWolfram Sang } 4445faf6e1fSWolfram Sang }; 4455faf6e1fSWolfram Sang module_platform_driver(em_i2c_driver); 4465faf6e1fSWolfram Sang 4475faf6e1fSWolfram Sang MODULE_DESCRIPTION("EMEV2 I2C bus driver"); 448f80531c8SJarkko Nikula MODULE_AUTHOR("Ian Molton"); 449f80531c8SJarkko Nikula MODULE_AUTHOR("Wolfram Sang <wsa@sang-engineering.com>"); 4505faf6e1fSWolfram Sang MODULE_LICENSE("GPL v2"); 4515faf6e1fSWolfram Sang MODULE_DEVICE_TABLE(of, em_i2c_ids); 452