1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * I2C bus driver for Conexant Digicolor SoCs 4 * 5 * Author: Baruch Siach <baruch@tkos.co.il> 6 * 7 * Copyright (C) 2015 Paradox Innovation Ltd. 8 */ 9 10 #include <linux/clk.h> 11 #include <linux/completion.h> 12 #include <linux/delay.h> 13 #include <linux/i2c.h> 14 #include <linux/interrupt.h> 15 #include <linux/io.h> 16 #include <linux/kernel.h> 17 #include <linux/module.h> 18 #include <linux/of.h> 19 #include <linux/platform_device.h> 20 21 #define TIMEOUT_MS 100 22 23 #define II_CONTROL 0x0 24 #define II_CONTROL_LOCAL_RESET BIT(0) 25 26 #define II_CLOCKTIME 0x1 27 28 #define II_COMMAND 0x2 29 #define II_CMD_START 1 30 #define II_CMD_RESTART 2 31 #define II_CMD_SEND_ACK 3 32 #define II_CMD_GET_ACK 6 33 #define II_CMD_GET_NOACK 7 34 #define II_CMD_STOP 10 35 #define II_COMMAND_GO BIT(7) 36 #define II_COMMAND_COMPLETION_STATUS(r) (((r) >> 5) & 3) 37 #define II_CMD_STATUS_NORMAL 0 38 #define II_CMD_STATUS_ACK_GOOD 1 39 #define II_CMD_STATUS_ACK_BAD 2 40 #define II_CMD_STATUS_ABORT 3 41 42 #define II_DATA 0x3 43 #define II_INTFLAG_CLEAR 0x8 44 #define II_INTENABLE 0xa 45 46 struct dc_i2c { 47 struct i2c_adapter adap; 48 struct device *dev; 49 void __iomem *regs; 50 struct clk *clk; 51 unsigned int frequency; 52 53 struct i2c_msg *msg; 54 unsigned int msgbuf_ptr; 55 int last; 56 spinlock_t lock; 57 struct completion done; 58 int state; 59 int error; 60 }; 61 62 enum { 63 STATE_IDLE, 64 STATE_START, 65 STATE_ADDR, 66 STATE_WRITE, 67 STATE_READ, 68 STATE_STOP, 69 }; 70 71 static void dc_i2c_cmd(struct dc_i2c *i2c, u8 cmd) 72 { 73 writeb_relaxed(cmd | II_COMMAND_GO, i2c->regs + II_COMMAND); 74 } 75 76 static u8 dc_i2c_addr_cmd(struct i2c_msg *msg) 77 { 78 u8 addr = (msg->addr & 0x7f) << 1; 79 80 if (msg->flags & I2C_M_RD) 81 addr |= 1; 82 83 return addr; 84 } 85 86 static void dc_i2c_data(struct dc_i2c *i2c, u8 data) 87 { 88 writeb_relaxed(data, i2c->regs + II_DATA); 89 } 90 91 static void dc_i2c_write_byte(struct dc_i2c *i2c, u8 byte) 92 { 93 dc_i2c_data(i2c, byte); 94 dc_i2c_cmd(i2c, II_CMD_SEND_ACK); 95 } 96 97 static void dc_i2c_write_buf(struct dc_i2c *i2c) 98 { 99 dc_i2c_write_byte(i2c, i2c->msg->buf[i2c->msgbuf_ptr++]); 100 } 101 102 static void dc_i2c_next_read(struct dc_i2c *i2c) 103 { 104 bool last = (i2c->msgbuf_ptr + 1 == i2c->msg->len); 105 106 dc_i2c_cmd(i2c, last ? II_CMD_GET_NOACK : II_CMD_GET_ACK); 107 } 108 109 static void dc_i2c_stop(struct dc_i2c *i2c) 110 { 111 i2c->state = STATE_STOP; 112 if (i2c->last) 113 dc_i2c_cmd(i2c, II_CMD_STOP); 114 else 115 complete(&i2c->done); 116 } 117 118 static u8 dc_i2c_read_byte(struct dc_i2c *i2c) 119 { 120 return readb_relaxed(i2c->regs + II_DATA); 121 } 122 123 static void dc_i2c_read_buf(struct dc_i2c *i2c) 124 { 125 i2c->msg->buf[i2c->msgbuf_ptr++] = dc_i2c_read_byte(i2c); 126 dc_i2c_next_read(i2c); 127 } 128 129 static void dc_i2c_set_irq(struct dc_i2c *i2c, int enable) 130 { 131 if (enable) 132 writeb_relaxed(1, i2c->regs + II_INTFLAG_CLEAR); 133 writeb_relaxed(!!enable, i2c->regs + II_INTENABLE); 134 } 135 136 static int dc_i2c_cmd_status(struct dc_i2c *i2c) 137 { 138 u8 cmd = readb_relaxed(i2c->regs + II_COMMAND); 139 140 return II_COMMAND_COMPLETION_STATUS(cmd); 141 } 142 143 static void dc_i2c_start_msg(struct dc_i2c *i2c, int first) 144 { 145 struct i2c_msg *msg = i2c->msg; 146 147 if (!(msg->flags & I2C_M_NOSTART)) { 148 i2c->state = STATE_START; 149 dc_i2c_cmd(i2c, first ? II_CMD_START : II_CMD_RESTART); 150 } else if (msg->flags & I2C_M_RD) { 151 i2c->state = STATE_READ; 152 dc_i2c_next_read(i2c); 153 } else { 154 i2c->state = STATE_WRITE; 155 dc_i2c_write_buf(i2c); 156 } 157 } 158 159 static irqreturn_t dc_i2c_irq(int irq, void *dev_id) 160 { 161 struct dc_i2c *i2c = dev_id; 162 int cmd_status = dc_i2c_cmd_status(i2c); 163 unsigned long flags; 164 u8 addr_cmd; 165 166 writeb_relaxed(1, i2c->regs + II_INTFLAG_CLEAR); 167 168 spin_lock_irqsave(&i2c->lock, flags); 169 170 if (cmd_status == II_CMD_STATUS_ACK_BAD 171 || cmd_status == II_CMD_STATUS_ABORT) { 172 i2c->error = -EIO; 173 complete(&i2c->done); 174 goto out; 175 } 176 177 switch (i2c->state) { 178 case STATE_START: 179 addr_cmd = dc_i2c_addr_cmd(i2c->msg); 180 dc_i2c_write_byte(i2c, addr_cmd); 181 i2c->state = STATE_ADDR; 182 break; 183 case STATE_ADDR: 184 if (i2c->msg->flags & I2C_M_RD) { 185 dc_i2c_next_read(i2c); 186 i2c->state = STATE_READ; 187 break; 188 } 189 i2c->state = STATE_WRITE; 190 fallthrough; 191 case STATE_WRITE: 192 if (i2c->msgbuf_ptr < i2c->msg->len) 193 dc_i2c_write_buf(i2c); 194 else 195 dc_i2c_stop(i2c); 196 break; 197 case STATE_READ: 198 if (i2c->msgbuf_ptr < i2c->msg->len) 199 dc_i2c_read_buf(i2c); 200 else 201 dc_i2c_stop(i2c); 202 break; 203 case STATE_STOP: 204 i2c->state = STATE_IDLE; 205 complete(&i2c->done); 206 break; 207 } 208 209 out: 210 spin_unlock_irqrestore(&i2c->lock, flags); 211 return IRQ_HANDLED; 212 } 213 214 static int dc_i2c_xfer_msg(struct dc_i2c *i2c, struct i2c_msg *msg, int first, 215 int last) 216 { 217 unsigned long timeout = msecs_to_jiffies(TIMEOUT_MS); 218 unsigned long flags; 219 220 spin_lock_irqsave(&i2c->lock, flags); 221 i2c->msg = msg; 222 i2c->msgbuf_ptr = 0; 223 i2c->last = last; 224 i2c->error = 0; 225 226 reinit_completion(&i2c->done); 227 dc_i2c_set_irq(i2c, 1); 228 dc_i2c_start_msg(i2c, first); 229 spin_unlock_irqrestore(&i2c->lock, flags); 230 231 timeout = wait_for_completion_timeout(&i2c->done, timeout); 232 dc_i2c_set_irq(i2c, 0); 233 if (timeout == 0) { 234 i2c->state = STATE_IDLE; 235 return -ETIMEDOUT; 236 } 237 238 if (i2c->error) 239 return i2c->error; 240 241 return 0; 242 } 243 244 static int dc_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) 245 { 246 struct dc_i2c *i2c = adap->algo_data; 247 int i, ret; 248 249 for (i = 0; i < num; i++) { 250 ret = dc_i2c_xfer_msg(i2c, &msgs[i], i == 0, i == num - 1); 251 if (ret) 252 return ret; 253 } 254 255 return num; 256 } 257 258 static int dc_i2c_init_hw(struct dc_i2c *i2c) 259 { 260 unsigned long clk_rate = clk_get_rate(i2c->clk); 261 unsigned int clocktime; 262 263 writeb_relaxed(II_CONTROL_LOCAL_RESET, i2c->regs + II_CONTROL); 264 udelay(100); 265 writeb_relaxed(0, i2c->regs + II_CONTROL); 266 udelay(100); 267 268 clocktime = DIV_ROUND_UP(clk_rate, 64 * i2c->frequency); 269 if (clocktime < 1 || clocktime > 0xff) { 270 dev_err(i2c->dev, "can't set bus speed of %u Hz\n", 271 i2c->frequency); 272 return -EINVAL; 273 } 274 writeb_relaxed(clocktime - 1, i2c->regs + II_CLOCKTIME); 275 276 return 0; 277 } 278 279 static u32 dc_i2c_func(struct i2c_adapter *adap) 280 { 281 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_NOSTART; 282 } 283 284 static const struct i2c_algorithm dc_i2c_algorithm = { 285 .master_xfer = dc_i2c_xfer, 286 .functionality = dc_i2c_func, 287 }; 288 289 static int dc_i2c_probe(struct platform_device *pdev) 290 { 291 struct device_node *np = pdev->dev.of_node; 292 struct dc_i2c *i2c; 293 int ret = 0, irq; 294 295 i2c = devm_kzalloc(&pdev->dev, sizeof(struct dc_i2c), GFP_KERNEL); 296 if (!i2c) 297 return -ENOMEM; 298 299 if (of_property_read_u32(pdev->dev.of_node, "clock-frequency", 300 &i2c->frequency)) 301 i2c->frequency = I2C_MAX_STANDARD_MODE_FREQ; 302 303 i2c->dev = &pdev->dev; 304 platform_set_drvdata(pdev, i2c); 305 306 spin_lock_init(&i2c->lock); 307 init_completion(&i2c->done); 308 309 i2c->clk = devm_clk_get(&pdev->dev, NULL); 310 if (IS_ERR(i2c->clk)) 311 return PTR_ERR(i2c->clk); 312 313 i2c->regs = devm_platform_ioremap_resource(pdev, 0); 314 if (IS_ERR(i2c->regs)) 315 return PTR_ERR(i2c->regs); 316 317 irq = platform_get_irq(pdev, 0); 318 if (irq < 0) 319 return irq; 320 321 ret = devm_request_irq(&pdev->dev, irq, dc_i2c_irq, 0, 322 dev_name(&pdev->dev), i2c); 323 if (ret < 0) 324 return ret; 325 326 strlcpy(i2c->adap.name, "Conexant Digicolor I2C adapter", 327 sizeof(i2c->adap.name)); 328 i2c->adap.owner = THIS_MODULE; 329 i2c->adap.algo = &dc_i2c_algorithm; 330 i2c->adap.dev.parent = &pdev->dev; 331 i2c->adap.dev.of_node = np; 332 i2c->adap.algo_data = i2c; 333 334 ret = dc_i2c_init_hw(i2c); 335 if (ret) 336 return ret; 337 338 ret = clk_prepare_enable(i2c->clk); 339 if (ret < 0) 340 return ret; 341 342 ret = i2c_add_adapter(&i2c->adap); 343 if (ret < 0) { 344 clk_disable_unprepare(i2c->clk); 345 return ret; 346 } 347 348 return 0; 349 } 350 351 static int dc_i2c_remove(struct platform_device *pdev) 352 { 353 struct dc_i2c *i2c = platform_get_drvdata(pdev); 354 355 i2c_del_adapter(&i2c->adap); 356 clk_disable_unprepare(i2c->clk); 357 358 return 0; 359 } 360 361 static const struct of_device_id dc_i2c_match[] = { 362 { .compatible = "cnxt,cx92755-i2c" }, 363 { }, 364 }; 365 MODULE_DEVICE_TABLE(of, dc_i2c_match); 366 367 static struct platform_driver dc_i2c_driver = { 368 .probe = dc_i2c_probe, 369 .remove = dc_i2c_remove, 370 .driver = { 371 .name = "digicolor-i2c", 372 .of_match_table = dc_i2c_match, 373 }, 374 }; 375 module_platform_driver(dc_i2c_driver); 376 377 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>"); 378 MODULE_DESCRIPTION("Conexant Digicolor I2C master driver"); 379 MODULE_LICENSE("GPL v2"); 380