xref: /linux/drivers/i2c/busses/i2c-designware-slave.c (revision b50ecc5aca4d18f1f0c4942f5c797bc85edef144)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Synopsys DesignWare I2C adapter driver (slave only).
4  *
5  * Based on the Synopsys DesignWare I2C adapter driver (master).
6  *
7  * Copyright (C) 2016 Synopsys Inc.
8  */
9 #include <linux/delay.h>
10 #include <linux/err.h>
11 #include <linux/errno.h>
12 #include <linux/i2c.h>
13 #include <linux/interrupt.h>
14 #include <linux/io.h>
15 #include <linux/module.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/regmap.h>
18 
19 #define DEFAULT_SYMBOL_NAMESPACE	I2C_DW
20 
21 #include "i2c-designware-core.h"
22 
23 static void i2c_dw_configure_fifo_slave(struct dw_i2c_dev *dev)
24 {
25 	/* Configure Tx/Rx FIFO threshold levels. */
26 	regmap_write(dev->map, DW_IC_TX_TL, 0);
27 	regmap_write(dev->map, DW_IC_RX_TL, 0);
28 
29 	/* Configure the I2C slave. */
30 	regmap_write(dev->map, DW_IC_CON, dev->slave_cfg);
31 	regmap_write(dev->map, DW_IC_INTR_MASK, DW_IC_INTR_SLAVE_MASK);
32 }
33 
34 /**
35  * i2c_dw_init_slave() - Initialize the DesignWare i2c slave hardware
36  * @dev: device private data
37  *
38  * This function configures and enables the I2C in slave mode.
39  * This function is called during I2C init function, and in case of timeout at
40  * run time.
41  *
42  * Return: 0 on success, or negative errno otherwise.
43  */
44 static int i2c_dw_init_slave(struct dw_i2c_dev *dev)
45 {
46 	int ret;
47 
48 	ret = i2c_dw_acquire_lock(dev);
49 	if (ret)
50 		return ret;
51 
52 	/* Disable the adapter. */
53 	__i2c_dw_disable(dev);
54 
55 	/* Write SDA hold time if supported */
56 	if (dev->sda_hold_time)
57 		regmap_write(dev->map, DW_IC_SDA_HOLD, dev->sda_hold_time);
58 
59 	i2c_dw_configure_fifo_slave(dev);
60 	i2c_dw_release_lock(dev);
61 
62 	return 0;
63 }
64 
65 static int i2c_dw_reg_slave(struct i2c_client *slave)
66 {
67 	struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter);
68 
69 	if (dev->slave)
70 		return -EBUSY;
71 	if (slave->flags & I2C_CLIENT_TEN)
72 		return -EAFNOSUPPORT;
73 	pm_runtime_get_sync(dev->dev);
74 
75 	/*
76 	 * Set slave address in the IC_SAR register,
77 	 * the address to which the DW_apb_i2c responds.
78 	 */
79 	__i2c_dw_disable_nowait(dev);
80 	regmap_write(dev->map, DW_IC_SAR, slave->addr);
81 	dev->slave = slave;
82 
83 	__i2c_dw_enable(dev);
84 
85 	dev->status = 0;
86 
87 	return 0;
88 }
89 
90 static int i2c_dw_unreg_slave(struct i2c_client *slave)
91 {
92 	struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter);
93 
94 	regmap_write(dev->map, DW_IC_INTR_MASK, 0);
95 	i2c_dw_disable(dev);
96 	synchronize_irq(dev->irq);
97 	dev->slave = NULL;
98 	pm_runtime_put(dev->dev);
99 
100 	return 0;
101 }
102 
103 static u32 i2c_dw_read_clear_intrbits_slave(struct dw_i2c_dev *dev)
104 {
105 	unsigned int stat, dummy;
106 
107 	/*
108 	 * The IC_INTR_STAT register just indicates "enabled" interrupts.
109 	 * The unmasked raw version of interrupt status bits is available
110 	 * in the IC_RAW_INTR_STAT register.
111 	 *
112 	 * That is,
113 	 *   stat = readl(IC_INTR_STAT);
114 	 * equals to,
115 	 *   stat = readl(IC_RAW_INTR_STAT) & readl(IC_INTR_MASK);
116 	 *
117 	 * The raw version might be useful for debugging purposes.
118 	 */
119 	regmap_read(dev->map, DW_IC_INTR_STAT, &stat);
120 
121 	/*
122 	 * Do not use the IC_CLR_INTR register to clear interrupts, or
123 	 * you'll miss some interrupts, triggered during the period from
124 	 * readl(IC_INTR_STAT) to readl(IC_CLR_INTR).
125 	 *
126 	 * Instead, use the separately-prepared IC_CLR_* registers.
127 	 */
128 	if (stat & DW_IC_INTR_TX_ABRT)
129 		regmap_read(dev->map, DW_IC_CLR_TX_ABRT, &dummy);
130 	if (stat & DW_IC_INTR_RX_UNDER)
131 		regmap_read(dev->map, DW_IC_CLR_RX_UNDER, &dummy);
132 	if (stat & DW_IC_INTR_RX_OVER)
133 		regmap_read(dev->map, DW_IC_CLR_RX_OVER, &dummy);
134 	if (stat & DW_IC_INTR_TX_OVER)
135 		regmap_read(dev->map, DW_IC_CLR_TX_OVER, &dummy);
136 	if (stat & DW_IC_INTR_RX_DONE)
137 		regmap_read(dev->map, DW_IC_CLR_RX_DONE, &dummy);
138 	if (stat & DW_IC_INTR_ACTIVITY)
139 		regmap_read(dev->map, DW_IC_CLR_ACTIVITY, &dummy);
140 	if (stat & DW_IC_INTR_STOP_DET)
141 		regmap_read(dev->map, DW_IC_CLR_STOP_DET, &dummy);
142 	if (stat & DW_IC_INTR_START_DET)
143 		regmap_read(dev->map, DW_IC_CLR_START_DET, &dummy);
144 	if (stat & DW_IC_INTR_GEN_CALL)
145 		regmap_read(dev->map, DW_IC_CLR_GEN_CALL, &dummy);
146 
147 	return stat;
148 }
149 
150 /*
151  * Interrupt service routine. This gets called whenever an I2C slave interrupt
152  * occurs.
153  */
154 static irqreturn_t i2c_dw_isr_slave(int this_irq, void *dev_id)
155 {
156 	struct dw_i2c_dev *dev = dev_id;
157 	unsigned int raw_stat, stat, enabled, tmp;
158 	u8 val = 0, slave_activity;
159 
160 	regmap_read(dev->map, DW_IC_ENABLE, &enabled);
161 	regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &raw_stat);
162 	regmap_read(dev->map, DW_IC_STATUS, &tmp);
163 	slave_activity = ((tmp & DW_IC_STATUS_SLAVE_ACTIVITY) >> 6);
164 
165 	if (!enabled || !(raw_stat & ~DW_IC_INTR_ACTIVITY) || !dev->slave)
166 		return IRQ_NONE;
167 
168 	stat = i2c_dw_read_clear_intrbits_slave(dev);
169 	dev_dbg(dev->dev,
170 		"%#x STATUS SLAVE_ACTIVITY=%#x : RAW_INTR_STAT=%#x : INTR_STAT=%#x\n",
171 		enabled, slave_activity, raw_stat, stat);
172 
173 	if (stat & DW_IC_INTR_RX_FULL) {
174 		if (!(dev->status & STATUS_WRITE_IN_PROGRESS)) {
175 			dev->status |= STATUS_WRITE_IN_PROGRESS;
176 			dev->status &= ~STATUS_READ_IN_PROGRESS;
177 			i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_REQUESTED,
178 					&val);
179 		}
180 
181 		do {
182 			regmap_read(dev->map, DW_IC_DATA_CMD, &tmp);
183 			if (tmp & DW_IC_DATA_CMD_FIRST_DATA_BYTE)
184 				i2c_slave_event(dev->slave,
185 						I2C_SLAVE_WRITE_REQUESTED,
186 						&val);
187 			val = tmp;
188 			i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_RECEIVED,
189 					&val);
190 			regmap_read(dev->map, DW_IC_STATUS, &tmp);
191 		} while (tmp & DW_IC_STATUS_RFNE);
192 	}
193 
194 	if (stat & DW_IC_INTR_RD_REQ) {
195 		if (slave_activity) {
196 			regmap_read(dev->map, DW_IC_CLR_RD_REQ, &tmp);
197 
198 			if (!(dev->status & STATUS_READ_IN_PROGRESS)) {
199 				i2c_slave_event(dev->slave,
200 						I2C_SLAVE_READ_REQUESTED,
201 						&val);
202 				dev->status |= STATUS_READ_IN_PROGRESS;
203 				dev->status &= ~STATUS_WRITE_IN_PROGRESS;
204 			} else {
205 				i2c_slave_event(dev->slave,
206 						I2C_SLAVE_READ_PROCESSED,
207 						&val);
208 			}
209 			regmap_write(dev->map, DW_IC_DATA_CMD, val);
210 		}
211 	}
212 
213 	if (stat & DW_IC_INTR_STOP_DET)
214 		i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val);
215 
216 	return IRQ_HANDLED;
217 }
218 
219 static const struct i2c_algorithm i2c_dw_algo = {
220 	.functionality = i2c_dw_func,
221 	.reg_slave = i2c_dw_reg_slave,
222 	.unreg_slave = i2c_dw_unreg_slave,
223 };
224 
225 void i2c_dw_configure_slave(struct dw_i2c_dev *dev)
226 {
227 	dev->functionality = I2C_FUNC_SLAVE;
228 
229 	dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL |
230 			 DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED;
231 
232 	dev->mode = DW_IC_SLAVE;
233 }
234 EXPORT_SYMBOL_GPL(i2c_dw_configure_slave);
235 
236 int i2c_dw_probe_slave(struct dw_i2c_dev *dev)
237 {
238 	struct i2c_adapter *adap = &dev->adapter;
239 	int ret;
240 
241 	dev->init = i2c_dw_init_slave;
242 
243 	ret = i2c_dw_init_regmap(dev);
244 	if (ret)
245 		return ret;
246 
247 	ret = i2c_dw_set_sda_hold(dev);
248 	if (ret)
249 		return ret;
250 
251 	ret = i2c_dw_set_fifo_size(dev);
252 	if (ret)
253 		return ret;
254 
255 	ret = dev->init(dev);
256 	if (ret)
257 		return ret;
258 
259 	snprintf(adap->name, sizeof(adap->name),
260 		 "Synopsys DesignWare I2C Slave adapter");
261 	adap->retries = 3;
262 	adap->algo = &i2c_dw_algo;
263 	adap->dev.parent = dev->dev;
264 	i2c_set_adapdata(adap, dev);
265 
266 	ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr_slave,
267 			       IRQF_SHARED, dev_name(dev->dev), dev);
268 	if (ret) {
269 		dev_err(dev->dev, "failure requesting IRQ %i: %d\n",
270 			dev->irq, ret);
271 		return ret;
272 	}
273 
274 	ret = i2c_add_numbered_adapter(adap);
275 	if (ret)
276 		dev_err(dev->dev, "failure adding adapter: %d\n", ret);
277 
278 	return ret;
279 }
280 EXPORT_SYMBOL_GPL(i2c_dw_probe_slave);
281 
282 MODULE_AUTHOR("Luis Oliveira <lolivei@synopsys.com>");
283 MODULE_DESCRIPTION("Synopsys DesignWare I2C bus slave adapter");
284 MODULE_LICENSE("GPL v2");
285 MODULE_IMPORT_NS(I2C_DW_COMMON);
286