xref: /linux/drivers/i2c/busses/i2c-designware-platdrv.c (revision b615879dbfea6cf1236acbc3f2fb25ae84e07071)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Synopsys DesignWare I2C adapter driver.
4  *
5  * Based on the TI DAVINCI I2C adapter driver.
6  *
7  * Copyright (C) 2006 Texas Instruments.
8  * Copyright (C) 2007 MontaVista Software Inc.
9  * Copyright (C) 2009 Provigent Ltd.
10  */
11 #include <linux/clk-provider.h>
12 #include <linux/clk.h>
13 #include <linux/delay.h>
14 #include <linux/dmi.h>
15 #include <linux/err.h>
16 #include <linux/errno.h>
17 #include <linux/i2c.h>
18 #include <linux/interrupt.h>
19 #include <linux/io.h>
20 #include <linux/kernel.h>
21 #include <linux/mfd/syscon.h>
22 #include <linux/module.h>
23 #include <linux/platform_device.h>
24 #include <linux/pm.h>
25 #include <linux/pm_runtime.h>
26 #include <linux/property.h>
27 #include <linux/regmap.h>
28 #include <linux/reset.h>
29 #include <linux/sched.h>
30 #include <linux/slab.h>
31 #include <linux/units.h>
32 
33 #include "i2c-designware-core.h"
34 
35 static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
36 {
37 	return clk_get_rate(dev->clk) / HZ_PER_KHZ;
38 }
39 
40 #ifdef CONFIG_OF
41 #define BT1_I2C_CTL			0x100
42 #define BT1_I2C_CTL_ADDR_MASK		GENMASK(7, 0)
43 #define BT1_I2C_CTL_WR			BIT(8)
44 #define BT1_I2C_CTL_GO			BIT(31)
45 #define BT1_I2C_DI			0x104
46 #define BT1_I2C_DO			0x108
47 
48 static int bt1_i2c_read(void *context, unsigned int reg, unsigned int *val)
49 {
50 	struct dw_i2c_dev *dev = context;
51 	int ret;
52 
53 	/*
54 	 * Note these methods shouldn't ever fail because the system controller
55 	 * registers are memory mapped. We check the return value just in case.
56 	 */
57 	ret = regmap_write(dev->sysmap, BT1_I2C_CTL,
58 			   BT1_I2C_CTL_GO | (reg & BT1_I2C_CTL_ADDR_MASK));
59 	if (ret)
60 		return ret;
61 
62 	return regmap_read(dev->sysmap, BT1_I2C_DO, val);
63 }
64 
65 static int bt1_i2c_write(void *context, unsigned int reg, unsigned int val)
66 {
67 	struct dw_i2c_dev *dev = context;
68 	int ret;
69 
70 	ret = regmap_write(dev->sysmap, BT1_I2C_DI, val);
71 	if (ret)
72 		return ret;
73 
74 	return regmap_write(dev->sysmap, BT1_I2C_CTL,
75 			    BT1_I2C_CTL_GO | BT1_I2C_CTL_WR | (reg & BT1_I2C_CTL_ADDR_MASK));
76 }
77 
78 static const struct regmap_config bt1_i2c_cfg = {
79 	.reg_bits = 32,
80 	.val_bits = 32,
81 	.reg_stride = 4,
82 	.fast_io = true,
83 	.reg_read = bt1_i2c_read,
84 	.reg_write = bt1_i2c_write,
85 	.max_register = DW_IC_COMP_TYPE,
86 };
87 
88 static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
89 {
90 	dev->sysmap = syscon_node_to_regmap(dev->dev->of_node->parent);
91 	if (IS_ERR(dev->sysmap))
92 		return PTR_ERR(dev->sysmap);
93 
94 	dev->map = devm_regmap_init(dev->dev, NULL, dev, &bt1_i2c_cfg);
95 	return PTR_ERR_OR_ZERO(dev->map);
96 }
97 #else
98 static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
99 {
100 	return -ENODEV;
101 }
102 #endif
103 
104 static int dw_i2c_get_parent_regmap(struct dw_i2c_dev *dev)
105 {
106 	dev->map = dev_get_regmap(dev->dev->parent, NULL);
107 	if (!dev->map)
108 		return -ENODEV;
109 
110 	return 0;
111 }
112 
113 static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev)
114 {
115 	pm_runtime_disable(dev->dev);
116 
117 	if (dev->shared_with_punit)
118 		pm_runtime_put_noidle(dev->dev);
119 }
120 
121 static int dw_i2c_plat_request_regs(struct dw_i2c_dev *dev)
122 {
123 	struct platform_device *pdev = to_platform_device(dev->dev);
124 	int ret;
125 
126 	if (device_is_compatible(dev->dev, "intel,xe-i2c"))
127 		return dw_i2c_get_parent_regmap(dev);
128 
129 	switch (dev->flags & MODEL_MASK) {
130 	case MODEL_BAIKAL_BT1:
131 		ret = bt1_i2c_request_regs(dev);
132 		break;
133 	case MODEL_WANGXUN_SP:
134 		ret = dw_i2c_get_parent_regmap(dev);
135 		break;
136 	default:
137 		dev->base = devm_platform_ioremap_resource(pdev, 0);
138 		ret = PTR_ERR_OR_ZERO(dev->base);
139 		break;
140 	}
141 
142 	return ret;
143 }
144 
145 static const struct dmi_system_id dw_i2c_hwmon_class_dmi[] = {
146 	{
147 		.ident = "Qtechnology QT5222",
148 		.matches = {
149 			DMI_MATCH(DMI_SYS_VENDOR, "Qtechnology"),
150 			DMI_MATCH(DMI_PRODUCT_NAME, "QT5222"),
151 		},
152 	},
153 	{ } /* terminate list */
154 };
155 
156 static const struct i2c_dw_semaphore_callbacks i2c_dw_semaphore_cb_table[] = {
157 #ifdef CONFIG_I2C_DESIGNWARE_BAYTRAIL
158 	{
159 		.probe = i2c_dw_baytrail_probe_lock_support,
160 	},
161 #endif
162 #ifdef CONFIG_I2C_DESIGNWARE_AMDPSP
163 	{
164 		.probe = i2c_dw_amdpsp_probe_lock_support,
165 	},
166 #endif
167 	{}
168 };
169 
170 static int i2c_dw_probe_lock_support(struct dw_i2c_dev *dev)
171 {
172 	const struct i2c_dw_semaphore_callbacks *ptr;
173 	int i = 0;
174 	int ret;
175 
176 	dev->semaphore_idx = -1;
177 
178 	for (ptr = i2c_dw_semaphore_cb_table; ptr->probe; ptr++) {
179 		ret = ptr->probe(dev);
180 		if (ret) {
181 			/*
182 			 * If there is no semaphore device attached to this
183 			 * controller, we shouldn't abort general i2c_controller
184 			 * probe.
185 			 */
186 			if (ret != -ENODEV)
187 				return ret;
188 
189 			i++;
190 			continue;
191 		}
192 
193 		dev->semaphore_idx = i;
194 		break;
195 	}
196 
197 	return 0;
198 }
199 
200 static void i2c_dw_remove_lock_support(struct dw_i2c_dev *dev)
201 {
202 	if (dev->semaphore_idx < 0)
203 		return;
204 
205 	if (i2c_dw_semaphore_cb_table[dev->semaphore_idx].remove)
206 		i2c_dw_semaphore_cb_table[dev->semaphore_idx].remove(dev);
207 }
208 
209 static int dw_i2c_plat_probe(struct platform_device *pdev)
210 {
211 	u32 flags = (uintptr_t)device_get_match_data(&pdev->dev);
212 	struct device *device = &pdev->dev;
213 	struct i2c_adapter *adap;
214 	struct dw_i2c_dev *dev;
215 	int irq, ret;
216 
217 	irq = platform_get_irq_optional(pdev, 0);
218 	if (irq == -ENXIO)
219 		flags |= ACCESS_POLLING;
220 	else if (irq < 0)
221 		return irq;
222 
223 	dev = devm_kzalloc(device, sizeof(*dev), GFP_KERNEL);
224 	if (!dev)
225 		return -ENOMEM;
226 
227 	if (device_property_present(device, "wx,i2c-snps-model"))
228 		flags = MODEL_WANGXUN_SP | ACCESS_POLLING;
229 
230 	dev->dev = device;
231 	dev->irq = irq;
232 	dev->flags = flags;
233 	platform_set_drvdata(pdev, dev);
234 
235 	ret = dw_i2c_plat_request_regs(dev);
236 	if (ret)
237 		return ret;
238 
239 	dev->rst = devm_reset_control_get_optional_exclusive(device, NULL);
240 	if (IS_ERR(dev->rst))
241 		return dev_err_probe(device, PTR_ERR(dev->rst), "failed to acquire reset\n");
242 
243 	reset_control_deassert(dev->rst);
244 
245 	ret = i2c_dw_fw_parse_and_configure(dev);
246 	if (ret)
247 		goto exit_reset;
248 
249 	ret = i2c_dw_probe_lock_support(dev);
250 	if (ret) {
251 		ret = dev_err_probe(device, ret, "failed to probe lock support\n");
252 		goto exit_reset;
253 	}
254 
255 	i2c_dw_configure(dev);
256 
257 	/* Optional interface clock */
258 	dev->pclk = devm_clk_get_optional(device, "pclk");
259 	if (IS_ERR(dev->pclk)) {
260 		ret = dev_err_probe(device, PTR_ERR(dev->pclk), "failed to acquire pclk\n");
261 		goto exit_reset;
262 	}
263 
264 	dev->clk = devm_clk_get_optional(device, NULL);
265 	if (IS_ERR(dev->clk)) {
266 		ret = dev_err_probe(device, PTR_ERR(dev->clk), "failed to acquire clock\n");
267 		goto exit_reset;
268 	}
269 
270 	ret = i2c_dw_prepare_clk(dev, true);
271 	if (ret)
272 		goto exit_reset;
273 
274 	if (dev->clk) {
275 		struct i2c_timings *t = &dev->timings;
276 		u64 clk_khz;
277 
278 		dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
279 		clk_khz = dev->get_clk_rate_khz(dev);
280 
281 		if (!dev->sda_hold_time && t->sda_hold_ns)
282 			dev->sda_hold_time =
283 				DIV_S64_ROUND_CLOSEST(clk_khz * t->sda_hold_ns, MICRO);
284 	}
285 
286 	adap = &dev->adapter;
287 	adap->owner = THIS_MODULE;
288 	adap->class = dmi_check_system(dw_i2c_hwmon_class_dmi) ?
289 				       I2C_CLASS_HWMON : I2C_CLASS_DEPRECATED;
290 	adap->nr = -1;
291 
292 	if (dev->flags & ACCESS_NO_IRQ_SUSPEND)
293 		dev_pm_set_driver_flags(device, DPM_FLAG_SMART_PREPARE);
294 	else
295 		dev_pm_set_driver_flags(device, DPM_FLAG_SMART_PREPARE | DPM_FLAG_SMART_SUSPEND);
296 
297 	device_enable_async_suspend(device);
298 
299 	/* The code below assumes runtime PM to be disabled. */
300 	WARN_ON(pm_runtime_enabled(device));
301 
302 	pm_runtime_set_autosuspend_delay(device, 1000);
303 	pm_runtime_use_autosuspend(device);
304 	pm_runtime_set_active(device);
305 
306 	if (dev->shared_with_punit)
307 		pm_runtime_get_noresume(device);
308 
309 	pm_runtime_enable(device);
310 
311 	ret = i2c_dw_probe(dev);
312 	if (ret)
313 		goto exit_probe;
314 
315 	return ret;
316 
317 exit_probe:
318 	dw_i2c_plat_pm_cleanup(dev);
319 	i2c_dw_prepare_clk(dev, false);
320 exit_reset:
321 	reset_control_assert(dev->rst);
322 	return ret;
323 }
324 
325 static void dw_i2c_plat_remove(struct platform_device *pdev)
326 {
327 	struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
328 	struct device *device = &pdev->dev;
329 
330 	pm_runtime_get_sync(device);
331 
332 	i2c_del_adapter(&dev->adapter);
333 
334 	i2c_dw_disable(dev);
335 
336 	pm_runtime_dont_use_autosuspend(device);
337 	pm_runtime_put_noidle(device);
338 	dw_i2c_plat_pm_cleanup(dev);
339 
340 	i2c_dw_prepare_clk(dev, false);
341 
342 	i2c_dw_remove_lock_support(dev);
343 
344 	reset_control_assert(dev->rst);
345 }
346 
347 static const struct of_device_id dw_i2c_of_match[] = {
348 	{ .compatible = "snps,designware-i2c", },
349 	{ .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT },
350 	{ .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 },
351 	{}
352 };
353 MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
354 
355 static const struct acpi_device_id dw_i2c_acpi_match[] = {
356 	{ "80860F41", ACCESS_NO_IRQ_SUSPEND },
357 	{ "808622C1", ACCESS_NO_IRQ_SUSPEND },
358 	{ "AMD0010", ACCESS_INTR_MASK },
359 	{ "AMDI0010", ACCESS_INTR_MASK },
360 	{ "AMDI0019", ACCESS_INTR_MASK | ARBITRATION_SEMAPHORE },
361 	{ "AMDI0510", 0 },
362 	{ "APMC0D0F", 0 },
363 	{ "FUJI200B", 0 },
364 	{ "HISI02A1", 0 },
365 	{ "HISI02A2", 0 },
366 	{ "HISI02A3", 0 },
367 	{ "HJMC3001", 0 },
368 	{ "HYGO0010", ACCESS_INTR_MASK },
369 	{ "INT33C2", 0 },
370 	{ "INT33C3", 0 },
371 	{ "INT3432", 0 },
372 	{ "INT3433", 0 },
373 	{ "INTC10EF", 0 },
374 	{}
375 };
376 MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
377 
378 static const struct platform_device_id dw_i2c_platform_ids[] = {
379 	{ "i2c_designware" },
380 	{}
381 };
382 MODULE_DEVICE_TABLE(platform, dw_i2c_platform_ids);
383 
384 static struct platform_driver dw_i2c_driver = {
385 	.probe = dw_i2c_plat_probe,
386 	.remove = dw_i2c_plat_remove,
387 	.driver		= {
388 		.name	= "i2c_designware",
389 		.of_match_table = dw_i2c_of_match,
390 		.acpi_match_table = dw_i2c_acpi_match,
391 		.pm	= pm_ptr(&i2c_dw_dev_pm_ops),
392 	},
393 	.id_table = dw_i2c_platform_ids,
394 };
395 
396 static int __init dw_i2c_init_driver(void)
397 {
398 	return platform_driver_register(&dw_i2c_driver);
399 }
400 subsys_initcall(dw_i2c_init_driver);
401 
402 static void __exit dw_i2c_exit_driver(void)
403 {
404 	platform_driver_unregister(&dw_i2c_driver);
405 }
406 module_exit(dw_i2c_exit_driver);
407 
408 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
409 MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
410 MODULE_LICENSE("GPL");
411 MODULE_IMPORT_NS("I2C_DW");
412 MODULE_IMPORT_NS("I2C_DW_COMMON");
413