1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Synopsys DesignWare I2C adapter driver. 4 * 5 * Based on the TI DAVINCI I2C adapter driver. 6 * 7 * Copyright (C) 2006 Texas Instruments. 8 * Copyright (C) 2007 MontaVista Software Inc. 9 * Copyright (C) 2009 Provigent Ltd. 10 */ 11 #include <linux/acpi.h> 12 #include <linux/clk-provider.h> 13 #include <linux/clk.h> 14 #include <linux/delay.h> 15 #include <linux/dmi.h> 16 #include <linux/err.h> 17 #include <linux/errno.h> 18 #include <linux/i2c.h> 19 #include <linux/interrupt.h> 20 #include <linux/io.h> 21 #include <linux/kernel.h> 22 #include <linux/mfd/syscon.h> 23 #include <linux/module.h> 24 #include <linux/of.h> 25 #include <linux/platform_device.h> 26 #include <linux/pm.h> 27 #include <linux/pm_runtime.h> 28 #include <linux/property.h> 29 #include <linux/regmap.h> 30 #include <linux/reset.h> 31 #include <linux/sched.h> 32 #include <linux/slab.h> 33 #include <linux/suspend.h> 34 #include <linux/units.h> 35 36 #include "i2c-designware-core.h" 37 38 static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev) 39 { 40 return clk_get_rate(dev->clk) / KILO; 41 } 42 43 #ifdef CONFIG_ACPI 44 static const struct acpi_device_id dw_i2c_acpi_match[] = { 45 { "INT33C2", 0 }, 46 { "INT33C3", 0 }, 47 { "INT3432", 0 }, 48 { "INT3433", 0 }, 49 { "INTC10EF", 0 }, 50 { "80860F41", ACCESS_NO_IRQ_SUSPEND }, 51 { "808622C1", ACCESS_NO_IRQ_SUSPEND }, 52 { "AMD0010", ACCESS_INTR_MASK }, 53 { "AMDI0010", ACCESS_INTR_MASK }, 54 { "AMDI0019", ACCESS_INTR_MASK | ARBITRATION_SEMAPHORE }, 55 { "AMDI0510", 0 }, 56 { "APMC0D0F", 0 }, 57 { "HISI02A1", 0 }, 58 { "HISI02A2", 0 }, 59 { "HISI02A3", 0 }, 60 { "HYGO0010", ACCESS_INTR_MASK }, 61 { } 62 }; 63 MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match); 64 #endif 65 66 #ifdef CONFIG_OF 67 #define BT1_I2C_CTL 0x100 68 #define BT1_I2C_CTL_ADDR_MASK GENMASK(7, 0) 69 #define BT1_I2C_CTL_WR BIT(8) 70 #define BT1_I2C_CTL_GO BIT(31) 71 #define BT1_I2C_DI 0x104 72 #define BT1_I2C_DO 0x108 73 74 static int bt1_i2c_read(void *context, unsigned int reg, unsigned int *val) 75 { 76 struct dw_i2c_dev *dev = context; 77 int ret; 78 79 /* 80 * Note these methods shouldn't ever fail because the system controller 81 * registers are memory mapped. We check the return value just in case. 82 */ 83 ret = regmap_write(dev->sysmap, BT1_I2C_CTL, 84 BT1_I2C_CTL_GO | (reg & BT1_I2C_CTL_ADDR_MASK)); 85 if (ret) 86 return ret; 87 88 return regmap_read(dev->sysmap, BT1_I2C_DO, val); 89 } 90 91 static int bt1_i2c_write(void *context, unsigned int reg, unsigned int val) 92 { 93 struct dw_i2c_dev *dev = context; 94 int ret; 95 96 ret = regmap_write(dev->sysmap, BT1_I2C_DI, val); 97 if (ret) 98 return ret; 99 100 return regmap_write(dev->sysmap, BT1_I2C_CTL, 101 BT1_I2C_CTL_GO | BT1_I2C_CTL_WR | (reg & BT1_I2C_CTL_ADDR_MASK)); 102 } 103 104 static const struct regmap_config bt1_i2c_cfg = { 105 .reg_bits = 32, 106 .val_bits = 32, 107 .reg_stride = 4, 108 .fast_io = true, 109 .reg_read = bt1_i2c_read, 110 .reg_write = bt1_i2c_write, 111 .max_register = DW_IC_COMP_TYPE, 112 }; 113 114 static int bt1_i2c_request_regs(struct dw_i2c_dev *dev) 115 { 116 dev->sysmap = syscon_node_to_regmap(dev->dev->of_node->parent); 117 if (IS_ERR(dev->sysmap)) 118 return PTR_ERR(dev->sysmap); 119 120 dev->map = devm_regmap_init(dev->dev, NULL, dev, &bt1_i2c_cfg); 121 return PTR_ERR_OR_ZERO(dev->map); 122 } 123 124 #define MSCC_ICPU_CFG_TWI_DELAY 0x0 125 #define MSCC_ICPU_CFG_TWI_DELAY_ENABLE BIT(0) 126 #define MSCC_ICPU_CFG_TWI_SPIKE_FILTER 0x4 127 128 static int mscc_twi_set_sda_hold_time(struct dw_i2c_dev *dev) 129 { 130 writel((dev->sda_hold_time << 1) | MSCC_ICPU_CFG_TWI_DELAY_ENABLE, 131 dev->ext + MSCC_ICPU_CFG_TWI_DELAY); 132 133 return 0; 134 } 135 136 static int dw_i2c_of_configure(struct platform_device *pdev) 137 { 138 struct dw_i2c_dev *dev = platform_get_drvdata(pdev); 139 140 switch (dev->flags & MODEL_MASK) { 141 case MODEL_MSCC_OCELOT: 142 dev->ext = devm_platform_ioremap_resource(pdev, 1); 143 if (!IS_ERR(dev->ext)) 144 dev->set_sda_hold_time = mscc_twi_set_sda_hold_time; 145 break; 146 default: 147 break; 148 } 149 150 return 0; 151 } 152 153 static const struct of_device_id dw_i2c_of_match[] = { 154 { .compatible = "snps,designware-i2c", }, 155 { .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT }, 156 { .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 }, 157 {}, 158 }; 159 MODULE_DEVICE_TABLE(of, dw_i2c_of_match); 160 #else 161 static int bt1_i2c_request_regs(struct dw_i2c_dev *dev) 162 { 163 return -ENODEV; 164 } 165 166 static inline int dw_i2c_of_configure(struct platform_device *pdev) 167 { 168 return -ENODEV; 169 } 170 #endif 171 172 static int txgbe_i2c_request_regs(struct dw_i2c_dev *dev) 173 { 174 dev->map = dev_get_regmap(dev->dev->parent, NULL); 175 if (!dev->map) 176 return -ENODEV; 177 178 return 0; 179 } 180 181 static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev) 182 { 183 pm_runtime_disable(dev->dev); 184 185 if (dev->shared_with_punit) 186 pm_runtime_put_noidle(dev->dev); 187 } 188 189 static int dw_i2c_plat_request_regs(struct dw_i2c_dev *dev) 190 { 191 struct platform_device *pdev = to_platform_device(dev->dev); 192 int ret; 193 194 switch (dev->flags & MODEL_MASK) { 195 case MODEL_BAIKAL_BT1: 196 ret = bt1_i2c_request_regs(dev); 197 break; 198 case MODEL_WANGXUN_SP: 199 ret = txgbe_i2c_request_regs(dev); 200 break; 201 default: 202 dev->base = devm_platform_ioremap_resource(pdev, 0); 203 ret = PTR_ERR_OR_ZERO(dev->base); 204 break; 205 } 206 207 return ret; 208 } 209 210 static const struct dmi_system_id dw_i2c_hwmon_class_dmi[] = { 211 { 212 .ident = "Qtechnology QT5222", 213 .matches = { 214 DMI_MATCH(DMI_SYS_VENDOR, "Qtechnology"), 215 DMI_MATCH(DMI_PRODUCT_NAME, "QT5222"), 216 }, 217 }, 218 { } /* terminate list */ 219 }; 220 221 static const struct i2c_dw_semaphore_callbacks i2c_dw_semaphore_cb_table[] = { 222 #ifdef CONFIG_I2C_DESIGNWARE_BAYTRAIL 223 { 224 .probe = i2c_dw_baytrail_probe_lock_support, 225 }, 226 #endif 227 #ifdef CONFIG_I2C_DESIGNWARE_AMDPSP 228 { 229 .probe = i2c_dw_amdpsp_probe_lock_support, 230 }, 231 #endif 232 {} 233 }; 234 235 static int i2c_dw_probe_lock_support(struct dw_i2c_dev *dev) 236 { 237 const struct i2c_dw_semaphore_callbacks *ptr; 238 int i = 0; 239 int ret; 240 241 ptr = i2c_dw_semaphore_cb_table; 242 243 dev->semaphore_idx = -1; 244 245 while (ptr->probe) { 246 ret = ptr->probe(dev); 247 if (ret) { 248 /* 249 * If there is no semaphore device attached to this 250 * controller, we shouldn't abort general i2c_controller 251 * probe. 252 */ 253 if (ret != -ENODEV) 254 return ret; 255 256 i++; 257 ptr++; 258 continue; 259 } 260 261 dev->semaphore_idx = i; 262 break; 263 } 264 265 return 0; 266 } 267 268 static void i2c_dw_remove_lock_support(struct dw_i2c_dev *dev) 269 { 270 if (dev->semaphore_idx < 0) 271 return; 272 273 if (i2c_dw_semaphore_cb_table[dev->semaphore_idx].remove) 274 i2c_dw_semaphore_cb_table[dev->semaphore_idx].remove(dev); 275 } 276 277 static int dw_i2c_plat_probe(struct platform_device *pdev) 278 { 279 struct i2c_adapter *adap; 280 struct dw_i2c_dev *dev; 281 struct i2c_timings *t; 282 int irq, ret; 283 284 irq = platform_get_irq(pdev, 0); 285 if (irq < 0) 286 return irq; 287 288 dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL); 289 if (!dev) 290 return -ENOMEM; 291 292 dev->flags = (uintptr_t)device_get_match_data(&pdev->dev); 293 if (device_property_present(&pdev->dev, "wx,i2c-snps-model")) 294 dev->flags = MODEL_WANGXUN_SP | ACCESS_POLLING; 295 296 dev->dev = &pdev->dev; 297 dev->irq = irq; 298 platform_set_drvdata(pdev, dev); 299 300 ret = dw_i2c_plat_request_regs(dev); 301 if (ret) 302 return ret; 303 304 dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL); 305 if (IS_ERR(dev->rst)) 306 return PTR_ERR(dev->rst); 307 308 reset_control_deassert(dev->rst); 309 310 t = &dev->timings; 311 i2c_parse_fw_timings(&pdev->dev, t, false); 312 313 i2c_dw_adjust_bus_speed(dev); 314 315 if (pdev->dev.of_node) 316 dw_i2c_of_configure(pdev); 317 318 if (has_acpi_companion(&pdev->dev)) 319 i2c_dw_acpi_configure(&pdev->dev); 320 321 ret = i2c_dw_validate_speed(dev); 322 if (ret) 323 goto exit_reset; 324 325 ret = i2c_dw_probe_lock_support(dev); 326 if (ret) 327 goto exit_reset; 328 329 i2c_dw_configure(dev); 330 331 /* Optional interface clock */ 332 dev->pclk = devm_clk_get_optional(&pdev->dev, "pclk"); 333 if (IS_ERR(dev->pclk)) { 334 ret = PTR_ERR(dev->pclk); 335 goto exit_reset; 336 } 337 338 dev->clk = devm_clk_get_optional(&pdev->dev, NULL); 339 if (IS_ERR(dev->clk)) { 340 ret = PTR_ERR(dev->clk); 341 goto exit_reset; 342 } 343 344 ret = i2c_dw_prepare_clk(dev, true); 345 if (ret) 346 goto exit_reset; 347 348 if (dev->clk) { 349 u64 clk_khz; 350 351 dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz; 352 clk_khz = dev->get_clk_rate_khz(dev); 353 354 if (!dev->sda_hold_time && t->sda_hold_ns) 355 dev->sda_hold_time = 356 DIV_S64_ROUND_CLOSEST(clk_khz * t->sda_hold_ns, MICRO); 357 } 358 359 adap = &dev->adapter; 360 adap->owner = THIS_MODULE; 361 adap->class = dmi_check_system(dw_i2c_hwmon_class_dmi) ? 362 I2C_CLASS_HWMON : I2C_CLASS_DEPRECATED; 363 ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev)); 364 adap->dev.of_node = pdev->dev.of_node; 365 adap->nr = -1; 366 367 if (dev->flags & ACCESS_NO_IRQ_SUSPEND) { 368 dev_pm_set_driver_flags(&pdev->dev, 369 DPM_FLAG_SMART_PREPARE); 370 } else { 371 dev_pm_set_driver_flags(&pdev->dev, 372 DPM_FLAG_SMART_PREPARE | 373 DPM_FLAG_SMART_SUSPEND); 374 } 375 376 device_enable_async_suspend(&pdev->dev); 377 378 /* The code below assumes runtime PM to be disabled. */ 379 WARN_ON(pm_runtime_enabled(&pdev->dev)); 380 381 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000); 382 pm_runtime_use_autosuspend(&pdev->dev); 383 pm_runtime_set_active(&pdev->dev); 384 385 if (dev->shared_with_punit) 386 pm_runtime_get_noresume(&pdev->dev); 387 388 pm_runtime_enable(&pdev->dev); 389 390 ret = i2c_dw_probe(dev); 391 if (ret) 392 goto exit_probe; 393 394 return ret; 395 396 exit_probe: 397 dw_i2c_plat_pm_cleanup(dev); 398 exit_reset: 399 reset_control_assert(dev->rst); 400 return ret; 401 } 402 403 static void dw_i2c_plat_remove(struct platform_device *pdev) 404 { 405 struct dw_i2c_dev *dev = platform_get_drvdata(pdev); 406 407 pm_runtime_get_sync(&pdev->dev); 408 409 i2c_del_adapter(&dev->adapter); 410 411 dev->disable(dev); 412 413 pm_runtime_dont_use_autosuspend(&pdev->dev); 414 pm_runtime_put_sync(&pdev->dev); 415 dw_i2c_plat_pm_cleanup(dev); 416 417 i2c_dw_remove_lock_support(dev); 418 419 reset_control_assert(dev->rst); 420 } 421 422 static int dw_i2c_plat_prepare(struct device *dev) 423 { 424 /* 425 * If the ACPI companion device object is present for this device, it 426 * may be accessed during suspend and resume of other devices via I2C 427 * operation regions, so tell the PM core and middle layers to avoid 428 * skipping system suspend/resume callbacks for it in that case. 429 */ 430 return !has_acpi_companion(dev); 431 } 432 433 static int dw_i2c_plat_runtime_suspend(struct device *dev) 434 { 435 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev); 436 437 if (i_dev->shared_with_punit) 438 return 0; 439 440 i_dev->disable(i_dev); 441 i2c_dw_prepare_clk(i_dev, false); 442 443 return 0; 444 } 445 446 static int dw_i2c_plat_suspend(struct device *dev) 447 { 448 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev); 449 450 i2c_mark_adapter_suspended(&i_dev->adapter); 451 452 return dw_i2c_plat_runtime_suspend(dev); 453 } 454 455 static int dw_i2c_plat_runtime_resume(struct device *dev) 456 { 457 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev); 458 459 if (!i_dev->shared_with_punit) 460 i2c_dw_prepare_clk(i_dev, true); 461 462 i_dev->init(i_dev); 463 464 return 0; 465 } 466 467 static int dw_i2c_plat_resume(struct device *dev) 468 { 469 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev); 470 471 dw_i2c_plat_runtime_resume(dev); 472 i2c_mark_adapter_resumed(&i_dev->adapter); 473 474 return 0; 475 } 476 477 static const struct dev_pm_ops dw_i2c_dev_pm_ops = { 478 .prepare = pm_sleep_ptr(dw_i2c_plat_prepare), 479 LATE_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume) 480 RUNTIME_PM_OPS(dw_i2c_plat_runtime_suspend, dw_i2c_plat_runtime_resume, NULL) 481 }; 482 483 static const struct platform_device_id dw_i2c_platform_ids[] = { 484 { "i2c_designware" }, 485 {} 486 }; 487 MODULE_DEVICE_TABLE(platform, dw_i2c_platform_ids); 488 489 static struct platform_driver dw_i2c_driver = { 490 .probe = dw_i2c_plat_probe, 491 .remove_new = dw_i2c_plat_remove, 492 .driver = { 493 .name = "i2c_designware", 494 .of_match_table = of_match_ptr(dw_i2c_of_match), 495 .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match), 496 .pm = pm_ptr(&dw_i2c_dev_pm_ops), 497 }, 498 .id_table = dw_i2c_platform_ids, 499 }; 500 501 static int __init dw_i2c_init_driver(void) 502 { 503 return platform_driver_register(&dw_i2c_driver); 504 } 505 subsys_initcall(dw_i2c_init_driver); 506 507 static void __exit dw_i2c_exit_driver(void) 508 { 509 platform_driver_unregister(&dw_i2c_driver); 510 } 511 module_exit(dw_i2c_exit_driver); 512 513 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>"); 514 MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter"); 515 MODULE_LICENSE("GPL"); 516