1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Synopsys DesignWare I2C adapter driver. 4 * 5 * Based on the TI DAVINCI I2C adapter driver. 6 * 7 * Copyright (C) 2006 Texas Instruments. 8 * Copyright (C) 2007 MontaVista Software Inc. 9 * Copyright (C) 2009 Provigent Ltd. 10 */ 11 #include <linux/acpi.h> 12 #include <linux/clk-provider.h> 13 #include <linux/clk.h> 14 #include <linux/delay.h> 15 #include <linux/dmi.h> 16 #include <linux/err.h> 17 #include <linux/errno.h> 18 #include <linux/i2c.h> 19 #include <linux/interrupt.h> 20 #include <linux/io.h> 21 #include <linux/kernel.h> 22 #include <linux/mfd/syscon.h> 23 #include <linux/module.h> 24 #include <linux/of.h> 25 #include <linux/platform_data/i2c-designware.h> 26 #include <linux/platform_device.h> 27 #include <linux/pm.h> 28 #include <linux/pm_runtime.h> 29 #include <linux/property.h> 30 #include <linux/regmap.h> 31 #include <linux/reset.h> 32 #include <linux/sched.h> 33 #include <linux/slab.h> 34 #include <linux/suspend.h> 35 36 #include "i2c-designware-core.h" 37 38 static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev) 39 { 40 return clk_get_rate(dev->clk)/1000; 41 } 42 43 #ifdef CONFIG_ACPI 44 static const struct acpi_device_id dw_i2c_acpi_match[] = { 45 { "INT33C2", 0 }, 46 { "INT33C3", 0 }, 47 { "INT3432", 0 }, 48 { "INT3433", 0 }, 49 { "80860F41", ACCESS_NO_IRQ_SUSPEND }, 50 { "808622C1", ACCESS_NO_IRQ_SUSPEND }, 51 { "AMD0010", ACCESS_INTR_MASK }, 52 { "AMDI0010", ACCESS_INTR_MASK }, 53 { "AMDI0510", 0 }, 54 { "APMC0D0F", 0 }, 55 { "HISI02A1", 0 }, 56 { "HISI02A2", 0 }, 57 { "HISI02A3", 0 }, 58 { "HYGO0010", ACCESS_INTR_MASK }, 59 { } 60 }; 61 MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match); 62 #endif 63 64 #ifdef CONFIG_OF 65 #define BT1_I2C_CTL 0x100 66 #define BT1_I2C_CTL_ADDR_MASK GENMASK(7, 0) 67 #define BT1_I2C_CTL_WR BIT(8) 68 #define BT1_I2C_CTL_GO BIT(31) 69 #define BT1_I2C_DI 0x104 70 #define BT1_I2C_DO 0x108 71 72 static int bt1_i2c_read(void *context, unsigned int reg, unsigned int *val) 73 { 74 struct dw_i2c_dev *dev = context; 75 int ret; 76 77 /* 78 * Note these methods shouldn't ever fail because the system controller 79 * registers are memory mapped. We check the return value just in case. 80 */ 81 ret = regmap_write(dev->sysmap, BT1_I2C_CTL, 82 BT1_I2C_CTL_GO | (reg & BT1_I2C_CTL_ADDR_MASK)); 83 if (ret) 84 return ret; 85 86 return regmap_read(dev->sysmap, BT1_I2C_DO, val); 87 } 88 89 static int bt1_i2c_write(void *context, unsigned int reg, unsigned int val) 90 { 91 struct dw_i2c_dev *dev = context; 92 int ret; 93 94 ret = regmap_write(dev->sysmap, BT1_I2C_DI, val); 95 if (ret) 96 return ret; 97 98 return regmap_write(dev->sysmap, BT1_I2C_CTL, 99 BT1_I2C_CTL_GO | BT1_I2C_CTL_WR | (reg & BT1_I2C_CTL_ADDR_MASK)); 100 } 101 102 static struct regmap_config bt1_i2c_cfg = { 103 .reg_bits = 32, 104 .val_bits = 32, 105 .reg_stride = 4, 106 .fast_io = true, 107 .reg_read = bt1_i2c_read, 108 .reg_write = bt1_i2c_write, 109 .max_register = DW_IC_COMP_TYPE, 110 }; 111 112 static int bt1_i2c_request_regs(struct dw_i2c_dev *dev) 113 { 114 dev->sysmap = syscon_node_to_regmap(dev->dev->of_node->parent); 115 if (IS_ERR(dev->sysmap)) 116 return PTR_ERR(dev->sysmap); 117 118 dev->map = devm_regmap_init(dev->dev, NULL, dev, &bt1_i2c_cfg); 119 return PTR_ERR_OR_ZERO(dev->map); 120 } 121 122 #define MSCC_ICPU_CFG_TWI_DELAY 0x0 123 #define MSCC_ICPU_CFG_TWI_DELAY_ENABLE BIT(0) 124 #define MSCC_ICPU_CFG_TWI_SPIKE_FILTER 0x4 125 126 static int mscc_twi_set_sda_hold_time(struct dw_i2c_dev *dev) 127 { 128 writel((dev->sda_hold_time << 1) | MSCC_ICPU_CFG_TWI_DELAY_ENABLE, 129 dev->ext + MSCC_ICPU_CFG_TWI_DELAY); 130 131 return 0; 132 } 133 134 static int dw_i2c_of_configure(struct platform_device *pdev) 135 { 136 struct dw_i2c_dev *dev = platform_get_drvdata(pdev); 137 138 switch (dev->flags & MODEL_MASK) { 139 case MODEL_MSCC_OCELOT: 140 dev->ext = devm_platform_ioremap_resource(pdev, 1); 141 if (!IS_ERR(dev->ext)) 142 dev->set_sda_hold_time = mscc_twi_set_sda_hold_time; 143 break; 144 default: 145 break; 146 } 147 148 return 0; 149 } 150 151 static const struct of_device_id dw_i2c_of_match[] = { 152 { .compatible = "snps,designware-i2c", }, 153 { .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT }, 154 { .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 }, 155 {}, 156 }; 157 MODULE_DEVICE_TABLE(of, dw_i2c_of_match); 158 #else 159 static int bt1_i2c_request_regs(struct dw_i2c_dev *dev) 160 { 161 return -ENODEV; 162 } 163 164 static inline int dw_i2c_of_configure(struct platform_device *pdev) 165 { 166 return -ENODEV; 167 } 168 #endif 169 170 static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev) 171 { 172 pm_runtime_disable(dev->dev); 173 174 if (dev->shared_with_punit) 175 pm_runtime_put_noidle(dev->dev); 176 } 177 178 static int dw_i2c_plat_request_regs(struct dw_i2c_dev *dev) 179 { 180 struct platform_device *pdev = to_platform_device(dev->dev); 181 int ret; 182 183 switch (dev->flags & MODEL_MASK) { 184 case MODEL_BAIKAL_BT1: 185 ret = bt1_i2c_request_regs(dev); 186 break; 187 default: 188 dev->base = devm_platform_ioremap_resource(pdev, 0); 189 ret = PTR_ERR_OR_ZERO(dev->base); 190 break; 191 } 192 193 return ret; 194 } 195 196 static const struct dmi_system_id dw_i2c_hwmon_class_dmi[] = { 197 { 198 .ident = "Qtechnology QT5222", 199 .matches = { 200 DMI_MATCH(DMI_SYS_VENDOR, "Qtechnology"), 201 DMI_MATCH(DMI_PRODUCT_NAME, "QT5222"), 202 }, 203 }, 204 { } /* terminate list */ 205 }; 206 207 static int dw_i2c_plat_probe(struct platform_device *pdev) 208 { 209 struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev); 210 struct i2c_adapter *adap; 211 struct dw_i2c_dev *dev; 212 struct i2c_timings *t; 213 int irq, ret; 214 215 irq = platform_get_irq(pdev, 0); 216 if (irq < 0) 217 return irq; 218 219 dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL); 220 if (!dev) 221 return -ENOMEM; 222 223 dev->flags = (uintptr_t)device_get_match_data(&pdev->dev); 224 dev->dev = &pdev->dev; 225 dev->irq = irq; 226 platform_set_drvdata(pdev, dev); 227 228 ret = dw_i2c_plat_request_regs(dev); 229 if (ret) 230 return ret; 231 232 dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL); 233 if (IS_ERR(dev->rst)) 234 return PTR_ERR(dev->rst); 235 236 reset_control_deassert(dev->rst); 237 238 t = &dev->timings; 239 if (pdata) 240 t->bus_freq_hz = pdata->i2c_scl_freq; 241 else 242 i2c_parse_fw_timings(&pdev->dev, t, false); 243 244 i2c_dw_adjust_bus_speed(dev); 245 246 if (pdev->dev.of_node) 247 dw_i2c_of_configure(pdev); 248 249 if (has_acpi_companion(&pdev->dev)) 250 i2c_dw_acpi_configure(&pdev->dev); 251 252 ret = i2c_dw_validate_speed(dev); 253 if (ret) 254 goto exit_reset; 255 256 ret = i2c_dw_probe_lock_support(dev); 257 if (ret) 258 goto exit_reset; 259 260 i2c_dw_configure(dev); 261 262 /* Optional interface clock */ 263 dev->pclk = devm_clk_get_optional(&pdev->dev, "pclk"); 264 if (IS_ERR(dev->pclk)) { 265 ret = PTR_ERR(dev->pclk); 266 goto exit_reset; 267 } 268 269 dev->clk = devm_clk_get(&pdev->dev, NULL); 270 if (!i2c_dw_prepare_clk(dev, true)) { 271 u64 clk_khz; 272 273 dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz; 274 clk_khz = dev->get_clk_rate_khz(dev); 275 276 if (!dev->sda_hold_time && t->sda_hold_ns) 277 dev->sda_hold_time = 278 div_u64(clk_khz * t->sda_hold_ns + 500000, 1000000); 279 } 280 281 adap = &dev->adapter; 282 adap->owner = THIS_MODULE; 283 adap->class = dmi_check_system(dw_i2c_hwmon_class_dmi) ? 284 I2C_CLASS_HWMON : I2C_CLASS_DEPRECATED; 285 ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev)); 286 adap->dev.of_node = pdev->dev.of_node; 287 adap->nr = -1; 288 289 if (dev->flags & ACCESS_NO_IRQ_SUSPEND) { 290 dev_pm_set_driver_flags(&pdev->dev, 291 DPM_FLAG_SMART_PREPARE | 292 DPM_FLAG_MAY_SKIP_RESUME); 293 } else { 294 dev_pm_set_driver_flags(&pdev->dev, 295 DPM_FLAG_SMART_PREPARE | 296 DPM_FLAG_SMART_SUSPEND | 297 DPM_FLAG_MAY_SKIP_RESUME); 298 } 299 300 /* The code below assumes runtime PM to be disabled. */ 301 WARN_ON(pm_runtime_enabled(&pdev->dev)); 302 303 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000); 304 pm_runtime_use_autosuspend(&pdev->dev); 305 pm_runtime_set_active(&pdev->dev); 306 307 if (dev->shared_with_punit) 308 pm_runtime_get_noresume(&pdev->dev); 309 310 pm_runtime_enable(&pdev->dev); 311 312 ret = i2c_dw_probe(dev); 313 if (ret) 314 goto exit_probe; 315 316 return ret; 317 318 exit_probe: 319 dw_i2c_plat_pm_cleanup(dev); 320 exit_reset: 321 reset_control_assert(dev->rst); 322 return ret; 323 } 324 325 static int dw_i2c_plat_remove(struct platform_device *pdev) 326 { 327 struct dw_i2c_dev *dev = platform_get_drvdata(pdev); 328 329 pm_runtime_get_sync(&pdev->dev); 330 331 i2c_del_adapter(&dev->adapter); 332 333 dev->disable(dev); 334 335 pm_runtime_dont_use_autosuspend(&pdev->dev); 336 pm_runtime_put_sync(&pdev->dev); 337 dw_i2c_plat_pm_cleanup(dev); 338 339 reset_control_assert(dev->rst); 340 341 return 0; 342 } 343 344 #ifdef CONFIG_PM_SLEEP 345 static int dw_i2c_plat_prepare(struct device *dev) 346 { 347 /* 348 * If the ACPI companion device object is present for this device, it 349 * may be accessed during suspend and resume of other devices via I2C 350 * operation regions, so tell the PM core and middle layers to avoid 351 * skipping system suspend/resume callbacks for it in that case. 352 */ 353 return !has_acpi_companion(dev); 354 } 355 356 static void dw_i2c_plat_complete(struct device *dev) 357 { 358 /* 359 * The device can only be in runtime suspend at this point if it has not 360 * been resumed throughout the ending system suspend/resume cycle, so if 361 * the platform firmware might mess up with it, request the runtime PM 362 * framework to resume it. 363 */ 364 if (pm_runtime_suspended(dev) && pm_resume_via_firmware()) 365 pm_request_resume(dev); 366 } 367 #else 368 #define dw_i2c_plat_prepare NULL 369 #define dw_i2c_plat_complete NULL 370 #endif 371 372 #ifdef CONFIG_PM 373 static int dw_i2c_plat_suspend(struct device *dev) 374 { 375 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev); 376 377 i_dev->suspended = true; 378 379 if (i_dev->shared_with_punit) 380 return 0; 381 382 i_dev->disable(i_dev); 383 i2c_dw_prepare_clk(i_dev, false); 384 385 return 0; 386 } 387 388 static int dw_i2c_plat_resume(struct device *dev) 389 { 390 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev); 391 392 if (!i_dev->shared_with_punit) 393 i2c_dw_prepare_clk(i_dev, true); 394 395 i_dev->init(i_dev); 396 i_dev->suspended = false; 397 398 return 0; 399 } 400 401 static const struct dev_pm_ops dw_i2c_dev_pm_ops = { 402 .prepare = dw_i2c_plat_prepare, 403 .complete = dw_i2c_plat_complete, 404 SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume) 405 SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL) 406 }; 407 408 #define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops) 409 #else 410 #define DW_I2C_DEV_PMOPS NULL 411 #endif 412 413 /* Work with hotplug and coldplug */ 414 MODULE_ALIAS("platform:i2c_designware"); 415 416 static struct platform_driver dw_i2c_driver = { 417 .probe = dw_i2c_plat_probe, 418 .remove = dw_i2c_plat_remove, 419 .driver = { 420 .name = "i2c_designware", 421 .of_match_table = of_match_ptr(dw_i2c_of_match), 422 .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match), 423 .pm = DW_I2C_DEV_PMOPS, 424 }, 425 }; 426 427 static int __init dw_i2c_init_driver(void) 428 { 429 return platform_driver_register(&dw_i2c_driver); 430 } 431 subsys_initcall(dw_i2c_init_driver); 432 433 static void __exit dw_i2c_exit_driver(void) 434 { 435 platform_driver_unregister(&dw_i2c_driver); 436 } 437 module_exit(dw_i2c_exit_driver); 438 439 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>"); 440 MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter"); 441 MODULE_LICENSE("GPL"); 442