1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Synopsys DesignWare I2C adapter driver (master only). 4 * 5 * Based on the TI DAVINCI I2C adapter driver. 6 * 7 * Copyright (C) 2006 Texas Instruments. 8 * Copyright (C) 2007 MontaVista Software Inc. 9 * Copyright (C) 2009 Provigent Ltd. 10 * Copyright (C) 2011, 2015, 2016 Intel Corporation. 11 */ 12 #include <linux/acpi.h> 13 #include <linux/delay.h> 14 #include <linux/err.h> 15 #include <linux/errno.h> 16 #include <linux/i2c.h> 17 #include <linux/interrupt.h> 18 #include <linux/io.h> 19 #include <linux/kernel.h> 20 #include <linux/module.h> 21 #include <linux/pci.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/sched.h> 24 #include <linux/slab.h> 25 26 #include "i2c-designware-core.h" 27 28 #define DRIVER_NAME "i2c-designware-pci" 29 #define AMD_CLK_RATE_HZ 100000 30 31 enum dw_pci_ctl_id_t { 32 medfield, 33 merrifield, 34 baytrail, 35 cherrytrail, 36 haswell, 37 elkhartlake, 38 navi_amd, 39 }; 40 41 struct dw_scl_sda_cfg { 42 u32 ss_hcnt; 43 u32 fs_hcnt; 44 u32 ss_lcnt; 45 u32 fs_lcnt; 46 u32 sda_hold; 47 }; 48 49 struct dw_pci_controller { 50 u32 bus_num; 51 u32 flags; 52 struct dw_scl_sda_cfg *scl_sda_cfg; 53 int (*setup)(struct pci_dev *pdev, struct dw_pci_controller *c); 54 u32 (*get_clk_rate_khz)(struct dw_i2c_dev *dev); 55 }; 56 57 /* Merrifield HCNT/LCNT/SDA hold time */ 58 static struct dw_scl_sda_cfg mrfld_config = { 59 .ss_hcnt = 0x2f8, 60 .fs_hcnt = 0x87, 61 .ss_lcnt = 0x37b, 62 .fs_lcnt = 0x10a, 63 }; 64 65 /* BayTrail HCNT/LCNT/SDA hold time */ 66 static struct dw_scl_sda_cfg byt_config = { 67 .ss_hcnt = 0x200, 68 .fs_hcnt = 0x55, 69 .ss_lcnt = 0x200, 70 .fs_lcnt = 0x99, 71 .sda_hold = 0x6, 72 }; 73 74 /* Haswell HCNT/LCNT/SDA hold time */ 75 static struct dw_scl_sda_cfg hsw_config = { 76 .ss_hcnt = 0x01b0, 77 .fs_hcnt = 0x48, 78 .ss_lcnt = 0x01fb, 79 .fs_lcnt = 0xa0, 80 .sda_hold = 0x9, 81 }; 82 83 /* NAVI-AMD HCNT/LCNT/SDA hold time */ 84 static struct dw_scl_sda_cfg navi_amd_config = { 85 .ss_hcnt = 0x1ae, 86 .ss_lcnt = 0x23a, 87 .sda_hold = 0x9, 88 }; 89 90 static u32 mfld_get_clk_rate_khz(struct dw_i2c_dev *dev) 91 { 92 return 25000; 93 } 94 95 static u32 navi_amd_get_clk_rate_khz(struct dw_i2c_dev *dev) 96 { 97 return AMD_CLK_RATE_HZ; 98 } 99 100 static int mfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c) 101 { 102 struct dw_i2c_dev *dev = dev_get_drvdata(&pdev->dev); 103 104 switch (pdev->device) { 105 case 0x0817: 106 dev->timings.bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ; 107 fallthrough; 108 case 0x0818: 109 case 0x0819: 110 c->bus_num = pdev->device - 0x817 + 3; 111 return 0; 112 case 0x082C: 113 case 0x082D: 114 case 0x082E: 115 c->bus_num = pdev->device - 0x82C + 0; 116 return 0; 117 } 118 return -ENODEV; 119 } 120 121 /* 122 * TODO find a better way how to deduplicate instantiation 123 * of USB PD slave device from nVidia GPU driver. 124 */ 125 static int navi_amd_register_client(struct dw_i2c_dev *dev) 126 { 127 struct i2c_board_info info; 128 129 memset(&info, 0, sizeof(struct i2c_board_info)); 130 strscpy(info.type, "ccgx-ucsi", I2C_NAME_SIZE); 131 info.addr = 0x08; 132 info.irq = dev->irq; 133 134 dev->slave = i2c_new_client_device(&dev->adapter, &info); 135 if (IS_ERR(dev->slave)) 136 return PTR_ERR(dev->slave); 137 138 return 0; 139 } 140 141 static int navi_amd_setup(struct pci_dev *pdev, struct dw_pci_controller *c) 142 { 143 struct dw_i2c_dev *dev = dev_get_drvdata(&pdev->dev); 144 145 dev->flags |= MODEL_AMD_NAVI_GPU; 146 dev->timings.bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ; 147 return 0; 148 } 149 150 static int mrfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c) 151 { 152 /* 153 * On Intel Merrifield the user visible i2c buses are enumerated 154 * [1..7]. So, we add 1 to shift the default range. Besides that the 155 * first PCI slot provides 4 functions, that's why we have to add 0 to 156 * the first slot and 4 to the next one. 157 */ 158 switch (PCI_SLOT(pdev->devfn)) { 159 case 8: 160 c->bus_num = PCI_FUNC(pdev->devfn) + 0 + 1; 161 return 0; 162 case 9: 163 c->bus_num = PCI_FUNC(pdev->devfn) + 4 + 1; 164 return 0; 165 } 166 return -ENODEV; 167 } 168 169 static u32 ehl_get_clk_rate_khz(struct dw_i2c_dev *dev) 170 { 171 return 100000; 172 } 173 174 static struct dw_pci_controller dw_pci_controllers[] = { 175 [medfield] = { 176 .bus_num = -1, 177 .setup = mfld_setup, 178 .get_clk_rate_khz = mfld_get_clk_rate_khz, 179 }, 180 [merrifield] = { 181 .bus_num = -1, 182 .scl_sda_cfg = &mrfld_config, 183 .setup = mrfld_setup, 184 }, 185 [baytrail] = { 186 .bus_num = -1, 187 .scl_sda_cfg = &byt_config, 188 }, 189 [haswell] = { 190 .bus_num = -1, 191 .scl_sda_cfg = &hsw_config, 192 }, 193 [cherrytrail] = { 194 .bus_num = -1, 195 .scl_sda_cfg = &byt_config, 196 }, 197 [elkhartlake] = { 198 .bus_num = -1, 199 .get_clk_rate_khz = ehl_get_clk_rate_khz, 200 }, 201 [navi_amd] = { 202 .bus_num = -1, 203 .scl_sda_cfg = &navi_amd_config, 204 .setup = navi_amd_setup, 205 .get_clk_rate_khz = navi_amd_get_clk_rate_khz, 206 }, 207 }; 208 209 #ifdef CONFIG_PM 210 static int i2c_dw_pci_suspend(struct device *dev) 211 { 212 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev); 213 214 i_dev->suspended = true; 215 i_dev->disable(i_dev); 216 217 return 0; 218 } 219 220 static int i2c_dw_pci_resume(struct device *dev) 221 { 222 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev); 223 int ret; 224 225 ret = i_dev->init(i_dev); 226 i_dev->suspended = false; 227 228 return ret; 229 } 230 #endif 231 232 static UNIVERSAL_DEV_PM_OPS(i2c_dw_pm_ops, i2c_dw_pci_suspend, 233 i2c_dw_pci_resume, NULL); 234 235 static int i2c_dw_pci_probe(struct pci_dev *pdev, 236 const struct pci_device_id *id) 237 { 238 struct dw_i2c_dev *dev; 239 struct i2c_adapter *adap; 240 int r; 241 struct dw_pci_controller *controller; 242 struct dw_scl_sda_cfg *cfg; 243 244 if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers)) { 245 dev_err(&pdev->dev, "%s: invalid driver data %ld\n", __func__, 246 id->driver_data); 247 return -EINVAL; 248 } 249 250 controller = &dw_pci_controllers[id->driver_data]; 251 252 r = pcim_enable_device(pdev); 253 if (r) { 254 dev_err(&pdev->dev, "Failed to enable I2C PCI device (%d)\n", 255 r); 256 return r; 257 } 258 259 pci_set_master(pdev); 260 261 r = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev)); 262 if (r) { 263 dev_err(&pdev->dev, "I/O memory remapping failed\n"); 264 return r; 265 } 266 267 dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL); 268 if (!dev) 269 return -ENOMEM; 270 271 r = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); 272 if (r < 0) 273 return r; 274 275 dev->get_clk_rate_khz = controller->get_clk_rate_khz; 276 dev->timings.bus_freq_hz = I2C_MAX_FAST_MODE_FREQ; 277 dev->base = pcim_iomap_table(pdev)[0]; 278 dev->dev = &pdev->dev; 279 dev->irq = pci_irq_vector(pdev, 0); 280 dev->flags |= controller->flags; 281 282 pci_set_drvdata(pdev, dev); 283 284 if (controller->setup) { 285 r = controller->setup(pdev, controller); 286 if (r) { 287 pci_free_irq_vectors(pdev); 288 return r; 289 } 290 } 291 292 i2c_dw_adjust_bus_speed(dev); 293 294 if (has_acpi_companion(&pdev->dev)) 295 i2c_dw_acpi_configure(&pdev->dev); 296 297 r = i2c_dw_validate_speed(dev); 298 if (r) { 299 pci_free_irq_vectors(pdev); 300 return r; 301 } 302 303 i2c_dw_configure(dev); 304 305 if (controller->scl_sda_cfg) { 306 cfg = controller->scl_sda_cfg; 307 dev->ss_hcnt = cfg->ss_hcnt; 308 dev->fs_hcnt = cfg->fs_hcnt; 309 dev->ss_lcnt = cfg->ss_lcnt; 310 dev->fs_lcnt = cfg->fs_lcnt; 311 dev->sda_hold_time = cfg->sda_hold; 312 } 313 314 adap = &dev->adapter; 315 adap->owner = THIS_MODULE; 316 adap->class = 0; 317 ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev)); 318 adap->nr = controller->bus_num; 319 320 r = i2c_dw_probe(dev); 321 if (r) { 322 pci_free_irq_vectors(pdev); 323 return r; 324 } 325 326 if ((dev->flags & MODEL_MASK) == MODEL_AMD_NAVI_GPU) { 327 r = navi_amd_register_client(dev); 328 if (r) { 329 dev_err(dev->dev, "register client failed with %d\n", r); 330 return r; 331 } 332 } 333 334 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000); 335 pm_runtime_use_autosuspend(&pdev->dev); 336 pm_runtime_put_autosuspend(&pdev->dev); 337 pm_runtime_allow(&pdev->dev); 338 339 return 0; 340 } 341 342 static void i2c_dw_pci_remove(struct pci_dev *pdev) 343 { 344 struct dw_i2c_dev *dev = pci_get_drvdata(pdev); 345 346 dev->disable(dev); 347 pm_runtime_forbid(&pdev->dev); 348 pm_runtime_get_noresume(&pdev->dev); 349 350 i2c_del_adapter(&dev->adapter); 351 devm_free_irq(&pdev->dev, dev->irq, dev); 352 pci_free_irq_vectors(pdev); 353 } 354 355 /* work with hotplug and coldplug */ 356 MODULE_ALIAS("i2c_designware-pci"); 357 358 static const struct pci_device_id i2_designware_pci_ids[] = { 359 /* Medfield */ 360 { PCI_VDEVICE(INTEL, 0x0817), medfield }, 361 { PCI_VDEVICE(INTEL, 0x0818), medfield }, 362 { PCI_VDEVICE(INTEL, 0x0819), medfield }, 363 { PCI_VDEVICE(INTEL, 0x082C), medfield }, 364 { PCI_VDEVICE(INTEL, 0x082D), medfield }, 365 { PCI_VDEVICE(INTEL, 0x082E), medfield }, 366 /* Merrifield */ 367 { PCI_VDEVICE(INTEL, 0x1195), merrifield }, 368 { PCI_VDEVICE(INTEL, 0x1196), merrifield }, 369 /* Baytrail */ 370 { PCI_VDEVICE(INTEL, 0x0F41), baytrail }, 371 { PCI_VDEVICE(INTEL, 0x0F42), baytrail }, 372 { PCI_VDEVICE(INTEL, 0x0F43), baytrail }, 373 { PCI_VDEVICE(INTEL, 0x0F44), baytrail }, 374 { PCI_VDEVICE(INTEL, 0x0F45), baytrail }, 375 { PCI_VDEVICE(INTEL, 0x0F46), baytrail }, 376 { PCI_VDEVICE(INTEL, 0x0F47), baytrail }, 377 /* Haswell */ 378 { PCI_VDEVICE(INTEL, 0x9c61), haswell }, 379 { PCI_VDEVICE(INTEL, 0x9c62), haswell }, 380 /* Braswell / Cherrytrail */ 381 { PCI_VDEVICE(INTEL, 0x22C1), cherrytrail }, 382 { PCI_VDEVICE(INTEL, 0x22C2), cherrytrail }, 383 { PCI_VDEVICE(INTEL, 0x22C3), cherrytrail }, 384 { PCI_VDEVICE(INTEL, 0x22C4), cherrytrail }, 385 { PCI_VDEVICE(INTEL, 0x22C5), cherrytrail }, 386 { PCI_VDEVICE(INTEL, 0x22C6), cherrytrail }, 387 { PCI_VDEVICE(INTEL, 0x22C7), cherrytrail }, 388 /* Elkhart Lake (PSE I2C) */ 389 { PCI_VDEVICE(INTEL, 0x4bb9), elkhartlake }, 390 { PCI_VDEVICE(INTEL, 0x4bba), elkhartlake }, 391 { PCI_VDEVICE(INTEL, 0x4bbb), elkhartlake }, 392 { PCI_VDEVICE(INTEL, 0x4bbc), elkhartlake }, 393 { PCI_VDEVICE(INTEL, 0x4bbd), elkhartlake }, 394 { PCI_VDEVICE(INTEL, 0x4bbe), elkhartlake }, 395 { PCI_VDEVICE(INTEL, 0x4bbf), elkhartlake }, 396 { PCI_VDEVICE(INTEL, 0x4bc0), elkhartlake }, 397 { PCI_VDEVICE(ATI, 0x7314), navi_amd }, 398 { PCI_VDEVICE(ATI, 0x73a4), navi_amd }, 399 { PCI_VDEVICE(ATI, 0x73e4), navi_amd }, 400 { PCI_VDEVICE(ATI, 0x73c4), navi_amd }, 401 { 0,} 402 }; 403 MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids); 404 405 static struct pci_driver dw_i2c_driver = { 406 .name = DRIVER_NAME, 407 .id_table = i2_designware_pci_ids, 408 .probe = i2c_dw_pci_probe, 409 .remove = i2c_dw_pci_remove, 410 .driver = { 411 .pm = &i2c_dw_pm_ops, 412 }, 413 }; 414 415 module_pci_driver(dw_i2c_driver); 416 417 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>"); 418 MODULE_DESCRIPTION("Synopsys DesignWare PCI I2C bus adapter"); 419 MODULE_LICENSE("GPL"); 420