1 /* 2 * BCM2835 master mode driver 3 * 4 * This software is licensed under the terms of the GNU General Public 5 * License version 2, as published by the Free Software Foundation, and 6 * may be copied, distributed, and modified under those terms. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 */ 13 14 #include <linux/clk.h> 15 #include <linux/completion.h> 16 #include <linux/err.h> 17 #include <linux/i2c.h> 18 #include <linux/interrupt.h> 19 #include <linux/io.h> 20 #include <linux/module.h> 21 #include <linux/platform_device.h> 22 #include <linux/slab.h> 23 24 #define BCM2835_I2C_C 0x0 25 #define BCM2835_I2C_S 0x4 26 #define BCM2835_I2C_DLEN 0x8 27 #define BCM2835_I2C_A 0xc 28 #define BCM2835_I2C_FIFO 0x10 29 #define BCM2835_I2C_DIV 0x14 30 #define BCM2835_I2C_DEL 0x18 31 #define BCM2835_I2C_CLKT 0x1c 32 33 #define BCM2835_I2C_C_READ BIT(0) 34 #define BCM2835_I2C_C_CLEAR BIT(4) /* bits 4 and 5 both clear */ 35 #define BCM2835_I2C_C_ST BIT(7) 36 #define BCM2835_I2C_C_INTD BIT(8) 37 #define BCM2835_I2C_C_INTT BIT(9) 38 #define BCM2835_I2C_C_INTR BIT(10) 39 #define BCM2835_I2C_C_I2CEN BIT(15) 40 41 #define BCM2835_I2C_S_TA BIT(0) 42 #define BCM2835_I2C_S_DONE BIT(1) 43 #define BCM2835_I2C_S_TXW BIT(2) 44 #define BCM2835_I2C_S_RXR BIT(3) 45 #define BCM2835_I2C_S_TXD BIT(4) 46 #define BCM2835_I2C_S_RXD BIT(5) 47 #define BCM2835_I2C_S_TXE BIT(6) 48 #define BCM2835_I2C_S_RXF BIT(7) 49 #define BCM2835_I2C_S_ERR BIT(8) 50 #define BCM2835_I2C_S_CLKT BIT(9) 51 #define BCM2835_I2C_S_LEN BIT(10) /* Fake bit for SW error reporting */ 52 53 #define BCM2835_I2C_BITMSK_S 0x03FF 54 55 #define BCM2835_I2C_CDIV_MIN 0x0002 56 #define BCM2835_I2C_CDIV_MAX 0xFFFE 57 58 #define BCM2835_I2C_TIMEOUT (msecs_to_jiffies(1000)) 59 60 struct bcm2835_i2c_dev { 61 struct device *dev; 62 void __iomem *regs; 63 struct clk *clk; 64 int irq; 65 struct i2c_adapter adapter; 66 struct completion completion; 67 u32 msg_err; 68 u8 *msg_buf; 69 size_t msg_buf_remaining; 70 }; 71 72 static inline void bcm2835_i2c_writel(struct bcm2835_i2c_dev *i2c_dev, 73 u32 reg, u32 val) 74 { 75 writel(val, i2c_dev->regs + reg); 76 } 77 78 static inline u32 bcm2835_i2c_readl(struct bcm2835_i2c_dev *i2c_dev, u32 reg) 79 { 80 return readl(i2c_dev->regs + reg); 81 } 82 83 static void bcm2835_fill_txfifo(struct bcm2835_i2c_dev *i2c_dev) 84 { 85 u32 val; 86 87 while (i2c_dev->msg_buf_remaining) { 88 val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S); 89 if (!(val & BCM2835_I2C_S_TXD)) 90 break; 91 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_FIFO, 92 *i2c_dev->msg_buf); 93 i2c_dev->msg_buf++; 94 i2c_dev->msg_buf_remaining--; 95 } 96 } 97 98 static void bcm2835_drain_rxfifo(struct bcm2835_i2c_dev *i2c_dev) 99 { 100 u32 val; 101 102 while (i2c_dev->msg_buf_remaining) { 103 val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S); 104 if (!(val & BCM2835_I2C_S_RXD)) 105 break; 106 *i2c_dev->msg_buf = bcm2835_i2c_readl(i2c_dev, 107 BCM2835_I2C_FIFO); 108 i2c_dev->msg_buf++; 109 i2c_dev->msg_buf_remaining--; 110 } 111 } 112 113 static irqreturn_t bcm2835_i2c_isr(int this_irq, void *data) 114 { 115 struct bcm2835_i2c_dev *i2c_dev = data; 116 u32 val, err; 117 118 val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S); 119 val &= BCM2835_I2C_BITMSK_S; 120 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_S, val); 121 122 err = val & (BCM2835_I2C_S_CLKT | BCM2835_I2C_S_ERR); 123 if (err) { 124 i2c_dev->msg_err = err; 125 complete(&i2c_dev->completion); 126 return IRQ_HANDLED; 127 } 128 129 if (val & BCM2835_I2C_S_RXD) { 130 bcm2835_drain_rxfifo(i2c_dev); 131 if (!(val & BCM2835_I2C_S_DONE)) 132 return IRQ_HANDLED; 133 } 134 135 if (val & BCM2835_I2C_S_DONE) { 136 if (i2c_dev->msg_buf_remaining) 137 i2c_dev->msg_err = BCM2835_I2C_S_LEN; 138 else 139 i2c_dev->msg_err = 0; 140 complete(&i2c_dev->completion); 141 return IRQ_HANDLED; 142 } 143 144 if (val & BCM2835_I2C_S_TXD) { 145 bcm2835_fill_txfifo(i2c_dev); 146 return IRQ_HANDLED; 147 } 148 149 return IRQ_NONE; 150 } 151 152 static int bcm2835_i2c_xfer_msg(struct bcm2835_i2c_dev *i2c_dev, 153 struct i2c_msg *msg) 154 { 155 u32 c; 156 unsigned long time_left; 157 158 i2c_dev->msg_buf = msg->buf; 159 i2c_dev->msg_buf_remaining = msg->len; 160 reinit_completion(&i2c_dev->completion); 161 162 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR); 163 164 if (msg->flags & I2C_M_RD) { 165 c = BCM2835_I2C_C_READ | BCM2835_I2C_C_INTR; 166 } else { 167 c = BCM2835_I2C_C_INTT; 168 bcm2835_fill_txfifo(i2c_dev); 169 } 170 c |= BCM2835_I2C_C_ST | BCM2835_I2C_C_INTD | BCM2835_I2C_C_I2CEN; 171 172 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_A, msg->addr); 173 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DLEN, msg->len); 174 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, c); 175 176 time_left = wait_for_completion_timeout(&i2c_dev->completion, 177 BCM2835_I2C_TIMEOUT); 178 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR); 179 if (!time_left) { 180 dev_err(i2c_dev->dev, "i2c transfer timed out\n"); 181 return -ETIMEDOUT; 182 } 183 184 if (likely(!i2c_dev->msg_err)) 185 return 0; 186 187 if ((i2c_dev->msg_err & BCM2835_I2C_S_ERR) && 188 (msg->flags & I2C_M_IGNORE_NAK)) 189 return 0; 190 191 dev_err(i2c_dev->dev, "i2c transfer failed: %x\n", i2c_dev->msg_err); 192 193 if (i2c_dev->msg_err & BCM2835_I2C_S_ERR) 194 return -EREMOTEIO; 195 else 196 return -EIO; 197 } 198 199 static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], 200 int num) 201 { 202 struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap); 203 int i; 204 int ret = 0; 205 206 for (i = 0; i < num; i++) { 207 ret = bcm2835_i2c_xfer_msg(i2c_dev, &msgs[i]); 208 if (ret) 209 break; 210 } 211 212 return ret ?: i; 213 } 214 215 static u32 bcm2835_i2c_func(struct i2c_adapter *adap) 216 { 217 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; 218 } 219 220 static const struct i2c_algorithm bcm2835_i2c_algo = { 221 .master_xfer = bcm2835_i2c_xfer, 222 .functionality = bcm2835_i2c_func, 223 }; 224 225 /* 226 * This HW was reported to have problems with clock stretching: 227 * http://www.advamation.com/knowhow/raspberrypi/rpi-i2c-bug.html 228 * https://www.raspberrypi.org/forums/viewtopic.php?p=146272 229 */ 230 static const struct i2c_adapter_quirks bcm2835_i2c_quirks = { 231 .flags = I2C_AQ_NO_CLK_STRETCH, 232 }; 233 234 static int bcm2835_i2c_probe(struct platform_device *pdev) 235 { 236 struct bcm2835_i2c_dev *i2c_dev; 237 struct resource *mem, *irq; 238 u32 bus_clk_rate, divider; 239 int ret; 240 struct i2c_adapter *adap; 241 242 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); 243 if (!i2c_dev) 244 return -ENOMEM; 245 platform_set_drvdata(pdev, i2c_dev); 246 i2c_dev->dev = &pdev->dev; 247 init_completion(&i2c_dev->completion); 248 249 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 250 i2c_dev->regs = devm_ioremap_resource(&pdev->dev, mem); 251 if (IS_ERR(i2c_dev->regs)) 252 return PTR_ERR(i2c_dev->regs); 253 254 i2c_dev->clk = devm_clk_get(&pdev->dev, NULL); 255 if (IS_ERR(i2c_dev->clk)) { 256 if (PTR_ERR(i2c_dev->clk) != -EPROBE_DEFER) 257 dev_err(&pdev->dev, "Could not get clock\n"); 258 return PTR_ERR(i2c_dev->clk); 259 } 260 261 ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency", 262 &bus_clk_rate); 263 if (ret < 0) { 264 dev_warn(&pdev->dev, 265 "Could not read clock-frequency property\n"); 266 bus_clk_rate = 100000; 267 } 268 269 divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk), bus_clk_rate); 270 /* 271 * Per the datasheet, the register is always interpreted as an even 272 * number, by rounding down. In other words, the LSB is ignored. So, 273 * if the LSB is set, increment the divider to avoid any issue. 274 */ 275 if (divider & 1) 276 divider++; 277 if ((divider < BCM2835_I2C_CDIV_MIN) || 278 (divider > BCM2835_I2C_CDIV_MAX)) { 279 dev_err(&pdev->dev, "Invalid clock-frequency\n"); 280 return -ENODEV; 281 } 282 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DIV, divider); 283 284 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 285 if (!irq) { 286 dev_err(&pdev->dev, "No IRQ resource\n"); 287 return -ENODEV; 288 } 289 i2c_dev->irq = irq->start; 290 291 ret = request_irq(i2c_dev->irq, bcm2835_i2c_isr, IRQF_SHARED, 292 dev_name(&pdev->dev), i2c_dev); 293 if (ret) { 294 dev_err(&pdev->dev, "Could not request IRQ\n"); 295 return -ENODEV; 296 } 297 298 adap = &i2c_dev->adapter; 299 i2c_set_adapdata(adap, i2c_dev); 300 adap->owner = THIS_MODULE; 301 adap->class = I2C_CLASS_DEPRECATED; 302 strlcpy(adap->name, "bcm2835 I2C adapter", sizeof(adap->name)); 303 adap->algo = &bcm2835_i2c_algo; 304 adap->dev.parent = &pdev->dev; 305 adap->dev.of_node = pdev->dev.of_node; 306 adap->quirks = &bcm2835_i2c_quirks; 307 308 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, 0); 309 310 ret = i2c_add_adapter(adap); 311 if (ret) 312 free_irq(i2c_dev->irq, i2c_dev); 313 314 return ret; 315 } 316 317 static int bcm2835_i2c_remove(struct platform_device *pdev) 318 { 319 struct bcm2835_i2c_dev *i2c_dev = platform_get_drvdata(pdev); 320 321 free_irq(i2c_dev->irq, i2c_dev); 322 i2c_del_adapter(&i2c_dev->adapter); 323 324 return 0; 325 } 326 327 static const struct of_device_id bcm2835_i2c_of_match[] = { 328 { .compatible = "brcm,bcm2835-i2c" }, 329 {}, 330 }; 331 MODULE_DEVICE_TABLE(of, bcm2835_i2c_of_match); 332 333 static struct platform_driver bcm2835_i2c_driver = { 334 .probe = bcm2835_i2c_probe, 335 .remove = bcm2835_i2c_remove, 336 .driver = { 337 .name = "i2c-bcm2835", 338 .of_match_table = bcm2835_i2c_of_match, 339 }, 340 }; 341 module_platform_driver(bcm2835_i2c_driver); 342 343 MODULE_AUTHOR("Stephen Warren <swarren@wwwdotorg.org>"); 344 MODULE_DESCRIPTION("BCM2835 I2C bus adapter"); 345 MODULE_LICENSE("GPL v2"); 346 MODULE_ALIAS("platform:i2c-bcm2835"); 347