1 /* 2 * i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters 3 * Copyright (C) 2004 Arcom Control Systems 4 * Copyright (C) 2008 Pengutronix 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 19 * MA 02110-1301 USA. 20 */ 21 22 #include <linux/kernel.h> 23 #include <linux/module.h> 24 #include <linux/moduleparam.h> 25 #include <linux/delay.h> 26 #include <linux/jiffies.h> 27 #include <linux/errno.h> 28 #include <linux/i2c.h> 29 #include <linux/i2c-algo-pca.h> 30 31 #define DEB1(fmt, args...) do { if (i2c_debug >= 1) \ 32 printk(KERN_DEBUG fmt, ## args); } while (0) 33 #define DEB2(fmt, args...) do { if (i2c_debug >= 2) \ 34 printk(KERN_DEBUG fmt, ## args); } while (0) 35 #define DEB3(fmt, args...) do { if (i2c_debug >= 3) \ 36 printk(KERN_DEBUG fmt, ## args); } while (0) 37 38 static int i2c_debug; 39 40 #define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val) 41 #define pca_inw(adap, reg) adap->read_byte(adap->data, reg) 42 43 #define pca_status(adap) pca_inw(adap, I2C_PCA_STA) 44 #define pca_clock(adap) adap->i2c_clock 45 #define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val) 46 #define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON) 47 #define pca_wait(adap) adap->wait_for_completion(adap->data) 48 49 static void pca_reset(struct i2c_algo_pca_data *adap) 50 { 51 if (adap->chip == I2C_PCA_CHIP_9665) { 52 /* Ignore the reset function from the module, 53 * we can use the parallel bus reset. 54 */ 55 pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET); 56 pca_outw(adap, I2C_PCA_IND, 0xA5); 57 pca_outw(adap, I2C_PCA_IND, 0x5A); 58 } else { 59 adap->reset_chip(adap->data); 60 } 61 } 62 63 /* 64 * Generate a start condition on the i2c bus. 65 * 66 * returns after the start condition has occurred 67 */ 68 static int pca_start(struct i2c_algo_pca_data *adap) 69 { 70 int sta = pca_get_con(adap); 71 DEB2("=== START\n"); 72 sta |= I2C_PCA_CON_STA; 73 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI); 74 pca_set_con(adap, sta); 75 return pca_wait(adap); 76 } 77 78 /* 79 * Generate a repeated start condition on the i2c bus 80 * 81 * return after the repeated start condition has occurred 82 */ 83 static int pca_repeated_start(struct i2c_algo_pca_data *adap) 84 { 85 int sta = pca_get_con(adap); 86 DEB2("=== REPEATED START\n"); 87 sta |= I2C_PCA_CON_STA; 88 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI); 89 pca_set_con(adap, sta); 90 return pca_wait(adap); 91 } 92 93 /* 94 * Generate a stop condition on the i2c bus 95 * 96 * returns after the stop condition has been generated 97 * 98 * STOPs do not generate an interrupt or set the SI flag, since the 99 * part returns the idle state (0xf8). Hence we don't need to 100 * pca_wait here. 101 */ 102 static void pca_stop(struct i2c_algo_pca_data *adap) 103 { 104 int sta = pca_get_con(adap); 105 DEB2("=== STOP\n"); 106 sta |= I2C_PCA_CON_STO; 107 sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI); 108 pca_set_con(adap, sta); 109 } 110 111 /* 112 * Send the slave address and R/W bit 113 * 114 * returns after the address has been sent 115 */ 116 static int pca_address(struct i2c_algo_pca_data *adap, 117 struct i2c_msg *msg) 118 { 119 int sta = pca_get_con(adap); 120 int addr; 121 122 addr = ((0x7f & msg->addr) << 1); 123 if (msg->flags & I2C_M_RD) 124 addr |= 1; 125 DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n", 126 msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr); 127 128 pca_outw(adap, I2C_PCA_DAT, addr); 129 130 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI); 131 pca_set_con(adap, sta); 132 133 return pca_wait(adap); 134 } 135 136 /* 137 * Transmit a byte. 138 * 139 * Returns after the byte has been transmitted 140 */ 141 static int pca_tx_byte(struct i2c_algo_pca_data *adap, 142 __u8 b) 143 { 144 int sta = pca_get_con(adap); 145 DEB2("=== WRITE %#04x\n", b); 146 pca_outw(adap, I2C_PCA_DAT, b); 147 148 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI); 149 pca_set_con(adap, sta); 150 151 return pca_wait(adap); 152 } 153 154 /* 155 * Receive a byte 156 * 157 * returns immediately. 158 */ 159 static void pca_rx_byte(struct i2c_algo_pca_data *adap, 160 __u8 *b, int ack) 161 { 162 *b = pca_inw(adap, I2C_PCA_DAT); 163 DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK"); 164 } 165 166 /* 167 * Setup ACK or NACK for next received byte and wait for it to arrive. 168 * 169 * Returns after next byte has arrived. 170 */ 171 static int pca_rx_ack(struct i2c_algo_pca_data *adap, 172 int ack) 173 { 174 int sta = pca_get_con(adap); 175 176 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA); 177 178 if (ack) 179 sta |= I2C_PCA_CON_AA; 180 181 pca_set_con(adap, sta); 182 return pca_wait(adap); 183 } 184 185 static int pca_xfer(struct i2c_adapter *i2c_adap, 186 struct i2c_msg *msgs, 187 int num) 188 { 189 struct i2c_algo_pca_data *adap = i2c_adap->algo_data; 190 struct i2c_msg *msg = NULL; 191 int curmsg; 192 int numbytes = 0; 193 int state; 194 int ret; 195 int completed = 1; 196 unsigned long timeout = jiffies + i2c_adap->timeout; 197 198 while ((state = pca_status(adap)) != 0xf8) { 199 if (time_before(jiffies, timeout)) { 200 msleep(10); 201 } else { 202 dev_dbg(&i2c_adap->dev, "bus is not idle. status is " 203 "%#04x\n", state); 204 return -EBUSY; 205 } 206 } 207 208 DEB1("{{{ XFER %d messages\n", num); 209 210 if (i2c_debug >= 2) { 211 for (curmsg = 0; curmsg < num; curmsg++) { 212 int addr, i; 213 msg = &msgs[curmsg]; 214 215 addr = (0x7f & msg->addr) ; 216 217 if (msg->flags & I2C_M_RD) 218 printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n", 219 curmsg, msg->len, addr, (addr << 1) | 1); 220 else { 221 printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s", 222 curmsg, msg->len, addr, addr << 1, 223 msg->len == 0 ? "" : ", "); 224 for (i = 0; i < msg->len; i++) 225 printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", "); 226 printk("]\n"); 227 } 228 } 229 } 230 231 curmsg = 0; 232 ret = -EIO; 233 while (curmsg < num) { 234 state = pca_status(adap); 235 236 DEB3("STATE is 0x%02x\n", state); 237 msg = &msgs[curmsg]; 238 239 switch (state) { 240 case 0xf8: /* On reset or stop the bus is idle */ 241 completed = pca_start(adap); 242 break; 243 244 case 0x08: /* A START condition has been transmitted */ 245 case 0x10: /* A repeated start condition has been transmitted */ 246 completed = pca_address(adap, msg); 247 break; 248 249 case 0x18: /* SLA+W has been transmitted; ACK has been received */ 250 case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */ 251 if (numbytes < msg->len) { 252 completed = pca_tx_byte(adap, 253 msg->buf[numbytes]); 254 numbytes++; 255 break; 256 } 257 curmsg++; numbytes = 0; 258 if (curmsg == num) 259 pca_stop(adap); 260 else 261 completed = pca_repeated_start(adap); 262 break; 263 264 case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */ 265 DEB2("NOT ACK received after SLA+W\n"); 266 pca_stop(adap); 267 ret = -ENXIO; 268 goto out; 269 270 case 0x40: /* SLA+R has been transmitted; ACK has been received */ 271 completed = pca_rx_ack(adap, msg->len > 1); 272 break; 273 274 case 0x50: /* Data bytes has been received; ACK has been returned */ 275 if (numbytes < msg->len) { 276 pca_rx_byte(adap, &msg->buf[numbytes], 1); 277 numbytes++; 278 completed = pca_rx_ack(adap, 279 numbytes < msg->len - 1); 280 break; 281 } 282 curmsg++; numbytes = 0; 283 if (curmsg == num) 284 pca_stop(adap); 285 else 286 completed = pca_repeated_start(adap); 287 break; 288 289 case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */ 290 DEB2("NOT ACK received after SLA+R\n"); 291 pca_stop(adap); 292 ret = -ENXIO; 293 goto out; 294 295 case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */ 296 DEB2("NOT ACK received after data byte\n"); 297 pca_stop(adap); 298 goto out; 299 300 case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */ 301 DEB2("Arbitration lost\n"); 302 /* 303 * The PCA9564 data sheet (2006-09-01) says "A 304 * START condition will be transmitted when the 305 * bus becomes free (STOP or SCL and SDA high)" 306 * when the STA bit is set (p. 11). 307 * 308 * In case this won't work, try pca_reset() 309 * instead. 310 */ 311 pca_start(adap); 312 goto out; 313 314 case 0x58: /* Data byte has been received; NOT ACK has been returned */ 315 if (numbytes == msg->len - 1) { 316 pca_rx_byte(adap, &msg->buf[numbytes], 0); 317 curmsg++; numbytes = 0; 318 if (curmsg == num) 319 pca_stop(adap); 320 else 321 completed = pca_repeated_start(adap); 322 } else { 323 DEB2("NOT ACK sent after data byte received. " 324 "Not final byte. numbytes %d. len %d\n", 325 numbytes, msg->len); 326 pca_stop(adap); 327 goto out; 328 } 329 break; 330 case 0x70: /* Bus error - SDA stuck low */ 331 DEB2("BUS ERROR - SDA Stuck low\n"); 332 pca_reset(adap); 333 goto out; 334 case 0x90: /* Bus error - SCL stuck low */ 335 DEB2("BUS ERROR - SCL Stuck low\n"); 336 pca_reset(adap); 337 goto out; 338 case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */ 339 DEB2("BUS ERROR - Illegal START or STOP\n"); 340 pca_reset(adap); 341 goto out; 342 default: 343 dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state); 344 break; 345 } 346 347 if (!completed) 348 goto out; 349 } 350 351 ret = curmsg; 352 out: 353 DEB1("}}} transferred %d/%d messages. " 354 "status is %#04x. control is %#04x\n", 355 curmsg, num, pca_status(adap), 356 pca_get_con(adap)); 357 return ret; 358 } 359 360 static u32 pca_func(struct i2c_adapter *adap) 361 { 362 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; 363 } 364 365 static const struct i2c_algorithm pca_algo = { 366 .master_xfer = pca_xfer, 367 .functionality = pca_func, 368 }; 369 370 static unsigned int pca_probe_chip(struct i2c_adapter *adap) 371 { 372 struct i2c_algo_pca_data *pca_data = adap->algo_data; 373 /* The trick here is to check if there is an indirect register 374 * available. If there is one, we will read the value we first 375 * wrote on I2C_PCA_IADR. Otherwise, we will read the last value 376 * we wrote on I2C_PCA_ADR 377 */ 378 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR); 379 pca_outw(pca_data, I2C_PCA_IND, 0xAA); 380 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO); 381 pca_outw(pca_data, I2C_PCA_IND, 0x00); 382 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR); 383 if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) { 384 printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name); 385 pca_data->chip = I2C_PCA_CHIP_9665; 386 } else { 387 printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name); 388 pca_data->chip = I2C_PCA_CHIP_9564; 389 } 390 return pca_data->chip; 391 } 392 393 static int pca_init(struct i2c_adapter *adap) 394 { 395 struct i2c_algo_pca_data *pca_data = adap->algo_data; 396 397 adap->algo = &pca_algo; 398 399 if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) { 400 static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36}; 401 int clock; 402 403 if (pca_data->i2c_clock > 7) { 404 switch (pca_data->i2c_clock) { 405 case 330000: 406 pca_data->i2c_clock = I2C_PCA_CON_330kHz; 407 break; 408 case 288000: 409 pca_data->i2c_clock = I2C_PCA_CON_288kHz; 410 break; 411 case 217000: 412 pca_data->i2c_clock = I2C_PCA_CON_217kHz; 413 break; 414 case 146000: 415 pca_data->i2c_clock = I2C_PCA_CON_146kHz; 416 break; 417 case 88000: 418 pca_data->i2c_clock = I2C_PCA_CON_88kHz; 419 break; 420 case 59000: 421 pca_data->i2c_clock = I2C_PCA_CON_59kHz; 422 break; 423 case 44000: 424 pca_data->i2c_clock = I2C_PCA_CON_44kHz; 425 break; 426 case 36000: 427 pca_data->i2c_clock = I2C_PCA_CON_36kHz; 428 break; 429 default: 430 printk(KERN_WARNING 431 "%s: Invalid I2C clock speed selected." 432 " Using default 59kHz.\n", adap->name); 433 pca_data->i2c_clock = I2C_PCA_CON_59kHz; 434 } 435 } else { 436 printk(KERN_WARNING "%s: " 437 "Choosing the clock frequency based on " 438 "index is deprecated." 439 " Use the nominal frequency.\n", adap->name); 440 } 441 442 pca_reset(pca_data); 443 444 clock = pca_clock(pca_data); 445 printk(KERN_INFO "%s: Clock frequency is %dkHz\n", 446 adap->name, freqs[clock]); 447 448 pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock); 449 } else { 450 int clock; 451 int mode; 452 int tlow, thi; 453 /* Values can be found on PCA9665 datasheet section 7.3.2.6 */ 454 int min_tlow, min_thi; 455 /* These values are the maximum raise and fall values allowed 456 * by the I2C operation mode (Standard, Fast or Fast+) 457 * They are used (added) below to calculate the clock dividers 458 * of PCA9665. Note that they are slightly different of the 459 * real maximum, to allow the change on mode exactly on the 460 * maximum clock rate for each mode 461 */ 462 int raise_fall_time; 463 464 if (pca_data->i2c_clock > 1265800) { 465 printk(KERN_WARNING "%s: I2C clock speed too high." 466 " Using 1265.8kHz.\n", adap->name); 467 pca_data->i2c_clock = 1265800; 468 } 469 470 if (pca_data->i2c_clock < 60300) { 471 printk(KERN_WARNING "%s: I2C clock speed too low." 472 " Using 60.3kHz.\n", adap->name); 473 pca_data->i2c_clock = 60300; 474 } 475 476 /* To avoid integer overflow, use clock/100 for calculations */ 477 clock = pca_clock(pca_data) / 100; 478 479 if (pca_data->i2c_clock > 1000000) { 480 mode = I2C_PCA_MODE_TURBO; 481 min_tlow = 14; 482 min_thi = 5; 483 raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */ 484 } else if (pca_data->i2c_clock > 400000) { 485 mode = I2C_PCA_MODE_FASTP; 486 min_tlow = 17; 487 min_thi = 9; 488 raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */ 489 } else if (pca_data->i2c_clock > 100000) { 490 mode = I2C_PCA_MODE_FAST; 491 min_tlow = 44; 492 min_thi = 20; 493 raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */ 494 } else { 495 mode = I2C_PCA_MODE_STD; 496 min_tlow = 157; 497 min_thi = 134; 498 raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */ 499 } 500 501 /* The minimum clock that respects the thi/tlow = 134/157 is 502 * 64800 Hz. Below that, we have to fix the tlow to 255 and 503 * calculate the thi factor. 504 */ 505 if (clock < 648) { 506 tlow = 255; 507 thi = 1000000 - clock * raise_fall_time; 508 thi /= (I2C_PCA_OSC_PER * clock) - tlow; 509 } else { 510 tlow = (1000000 - clock * raise_fall_time) * min_tlow; 511 tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow); 512 thi = tlow * min_thi / min_tlow; 513 } 514 515 pca_reset(pca_data); 516 517 printk(KERN_INFO 518 "%s: Clock frequency is %dHz\n", adap->name, clock * 100); 519 520 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE); 521 pca_outw(pca_data, I2C_PCA_IND, mode); 522 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL); 523 pca_outw(pca_data, I2C_PCA_IND, tlow); 524 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH); 525 pca_outw(pca_data, I2C_PCA_IND, thi); 526 527 pca_set_con(pca_data, I2C_PCA_CON_ENSIO); 528 } 529 udelay(500); /* 500 us for oscilator to stabilise */ 530 531 return 0; 532 } 533 534 /* 535 * registering functions to load algorithms at runtime 536 */ 537 int i2c_pca_add_bus(struct i2c_adapter *adap) 538 { 539 int rval; 540 541 rval = pca_init(adap); 542 if (rval) 543 return rval; 544 545 return i2c_add_adapter(adap); 546 } 547 EXPORT_SYMBOL(i2c_pca_add_bus); 548 549 int i2c_pca_add_numbered_bus(struct i2c_adapter *adap) 550 { 551 int rval; 552 553 rval = pca_init(adap); 554 if (rval) 555 return rval; 556 557 return i2c_add_numbered_adapter(adap); 558 } 559 EXPORT_SYMBOL(i2c_pca_add_numbered_bus); 560 561 MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, " 562 "Wolfram Sang <w.sang@pengutronix.de>"); 563 MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm"); 564 MODULE_LICENSE("GPL"); 565 566 module_param(i2c_debug, int, 0); 567